1/*- 2 * Copyright (c) 1997, 1998, 1999, 2000 3 * Bill Paul <wpaul@ee.columbia.edu>. All rights reserved. 4 * 5 * Copyright (c) 2006 6 * Alfred Perlstein <alfred@FreeBSD.org>. All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by Bill Paul. 19 * 4. Neither the name of the author nor the names of any co-contributors 20 * may be used to endorse or promote products derived from this software 21 * without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 26 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 27 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 33 * THE POSSIBILITY OF SUCH DAMAGE. 34 */ 35 36#include <sys/cdefs.h> 37__FBSDID("$FreeBSD$"); 38 39/* 40 * ADMtek AN986 Pegasus and AN8511 Pegasus II USB to ethernet driver. 41 * Datasheet is available from http://www.admtek.com.tw. 42 * 43 * Written by Bill Paul <wpaul@ee.columbia.edu> 44 * Electrical Engineering Department 45 * Columbia University, New York City 46 * 47 * SMP locking by Alfred Perlstein <alfred@FreeBSD.org>. 48 * RED Inc. 49 */ 50 51/* 52 * The Pegasus chip uses four USB "endpoints" to provide 10/100 ethernet 53 * support: the control endpoint for reading/writing registers, burst 54 * read endpoint for packet reception, burst write for packet transmission 55 * and one for "interrupts." The chip uses the same RX filter scheme 56 * as the other ADMtek ethernet parts: one perfect filter entry for the 57 * the station address and a 64-bit multicast hash table. The chip supports 58 * both MII and HomePNA attachments. 59 * 60 * Since the maximum data transfer speed of USB is supposed to be 12Mbps, 61 * you're never really going to get 100Mbps speeds from this device. I 62 * think the idea is to allow the device to connect to 10 or 100Mbps 63 * networks, not necessarily to provide 100Mbps performance. Also, since 64 * the controller uses an external PHY chip, it's possible that board 65 * designers might simply choose a 10Mbps PHY. 66 * 67 * Registers are accessed using uether_do_request(). Packet 68 * transfers are done using usbd_transfer() and friends. 69 */ 70 71#include <sys/stdint.h> 72#include <sys/stddef.h> 73#include <sys/param.h> 74#include <sys/queue.h> 75#include <sys/types.h> 76#include <sys/systm.h> 77#include <sys/kernel.h> 78#include <sys/bus.h> 79#include <sys/module.h> 80#include <sys/lock.h> 81#include <sys/mutex.h> 82#include <sys/condvar.h> 83#include <sys/sysctl.h> 84#include <sys/sx.h> 85#include <sys/unistd.h> 86#include <sys/callout.h> 87#include <sys/malloc.h> 88#include <sys/priv.h> 89 90#include <dev/usb/usb.h> 91#include <dev/usb/usbdi.h> 92#include <dev/usb/usbdi_util.h> 93#include "usbdevs.h" 94 95#define USB_DEBUG_VAR aue_debug 96#include <dev/usb/usb_debug.h> 97#include <dev/usb/usb_process.h> 98 99#include <dev/usb/net/usb_ethernet.h> 100#include <dev/usb/net/if_auereg.h> 101 102#ifdef USB_DEBUG 103static int aue_debug = 0; 104 105static SYSCTL_NODE(_hw_usb, OID_AUTO, aue, CTLFLAG_RW, 0, "USB aue"); 106SYSCTL_INT(_hw_usb_aue, OID_AUTO, debug, CTLFLAG_RW, &aue_debug, 0, 107 "Debug level"); 108#endif 109 110/* 111 * Various supported device vendors/products. 112 */ 113static const STRUCT_USB_HOST_ID aue_devs[] = { 114#define AUE_DEV(v,p,i) { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, i) } 115 AUE_DEV(3COM, 3C460B, AUE_FLAG_PII), 116 AUE_DEV(ABOCOM, DSB650TX_PNA, 0), 117 AUE_DEV(ABOCOM, UFE1000, AUE_FLAG_LSYS), 118 AUE_DEV(ABOCOM, XX10, 0), 119 AUE_DEV(ABOCOM, XX1, AUE_FLAG_PNA | AUE_FLAG_PII), 120 AUE_DEV(ABOCOM, XX2, AUE_FLAG_PII), 121 AUE_DEV(ABOCOM, XX4, AUE_FLAG_PNA), 122 AUE_DEV(ABOCOM, XX5, AUE_FLAG_PNA), 123 AUE_DEV(ABOCOM, XX6, AUE_FLAG_PII), 124 AUE_DEV(ABOCOM, XX7, AUE_FLAG_PII), 125 AUE_DEV(ABOCOM, XX8, AUE_FLAG_PII), 126 AUE_DEV(ABOCOM, XX9, AUE_FLAG_PNA), 127 AUE_DEV(ACCTON, SS1001, AUE_FLAG_PII), 128 AUE_DEV(ACCTON, USB320_EC, 0), 129 AUE_DEV(ADMTEK, PEGASUSII_2, AUE_FLAG_PII), 130 AUE_DEV(ADMTEK, PEGASUSII_3, AUE_FLAG_PII), 131 AUE_DEV(ADMTEK, PEGASUSII_4, AUE_FLAG_PII), 132 AUE_DEV(ADMTEK, PEGASUSII, AUE_FLAG_PII), 133 AUE_DEV(ADMTEK, PEGASUS, AUE_FLAG_PNA | AUE_FLAG_DUAL_PHY), 134 AUE_DEV(AEI, FASTETHERNET, AUE_FLAG_PII), 135 AUE_DEV(ALLIEDTELESYN, ATUSB100, AUE_FLAG_PII), 136 AUE_DEV(ATEN, UC110T, AUE_FLAG_PII), 137 AUE_DEV(BELKIN, USB2LAN, AUE_FLAG_PII), 138 AUE_DEV(BILLIONTON, USB100, 0), 139 AUE_DEV(BILLIONTON, USBE100, AUE_FLAG_PII), 140 AUE_DEV(BILLIONTON, USBEL100, 0), 141 AUE_DEV(BILLIONTON, USBLP100, AUE_FLAG_PNA), 142 AUE_DEV(COREGA, FETHER_USB_TXS, AUE_FLAG_PII), 143 AUE_DEV(COREGA, FETHER_USB_TX, 0), 144 AUE_DEV(DLINK, DSB650TX1, AUE_FLAG_LSYS), 145 AUE_DEV(DLINK, DSB650TX2, AUE_FLAG_LSYS | AUE_FLAG_PII), 146 AUE_DEV(DLINK, DSB650TX3, AUE_FLAG_LSYS | AUE_FLAG_PII), 147 AUE_DEV(DLINK, DSB650TX4, AUE_FLAG_LSYS | AUE_FLAG_PII), 148 AUE_DEV(DLINK, DSB650TX_PNA, AUE_FLAG_PNA), 149 AUE_DEV(DLINK, DSB650TX, AUE_FLAG_LSYS), 150 AUE_DEV(DLINK, DSB650, AUE_FLAG_LSYS), 151 AUE_DEV(ELCON, PLAN, AUE_FLAG_PNA | AUE_FLAG_PII), 152 AUE_DEV(ELECOM, LDUSB20, AUE_FLAG_PII), 153 AUE_DEV(ELECOM, LDUSBLTX, AUE_FLAG_PII), 154 AUE_DEV(ELECOM, LDUSBTX0, 0), 155 AUE_DEV(ELECOM, LDUSBTX1, AUE_FLAG_LSYS), 156 AUE_DEV(ELECOM, LDUSBTX2, 0), 157 AUE_DEV(ELECOM, LDUSBTX3, AUE_FLAG_LSYS), 158 AUE_DEV(ELSA, USB2ETHERNET, 0), 159 AUE_DEV(GIGABYTE, GNBR402W, 0), 160 AUE_DEV(HAWKING, UF100, AUE_FLAG_PII), 161 AUE_DEV(HP, HN210E, AUE_FLAG_PII), 162 AUE_DEV(IODATA, USBETTXS, AUE_FLAG_PII), 163 AUE_DEV(IODATA, USBETTX, 0), 164 AUE_DEV(KINGSTON, KNU101TX, 0), 165 AUE_DEV(LINKSYS, USB100H1, AUE_FLAG_LSYS | AUE_FLAG_PNA), 166 AUE_DEV(LINKSYS, USB100TX, AUE_FLAG_LSYS), 167 AUE_DEV(LINKSYS, USB10TA, AUE_FLAG_LSYS), 168 AUE_DEV(LINKSYS, USB10TX1, AUE_FLAG_LSYS | AUE_FLAG_PII), 169 AUE_DEV(LINKSYS, USB10TX2, AUE_FLAG_LSYS | AUE_FLAG_PII), 170 AUE_DEV(LINKSYS, USB10T, AUE_FLAG_LSYS), 171 AUE_DEV(MELCO, LUA2TX5, AUE_FLAG_PII), 172 AUE_DEV(MELCO, LUATX1, 0), 173 AUE_DEV(MELCO, LUATX5, 0), 174 AUE_DEV(MICROSOFT, MN110, AUE_FLAG_PII), 175 AUE_DEV(NETGEAR, FA101, AUE_FLAG_PII), 176 AUE_DEV(SIEMENS, SPEEDSTREAM, AUE_FLAG_PII), 177 AUE_DEV(SIIG2, USBTOETHER, AUE_FLAG_PII), 178 AUE_DEV(SMARTBRIDGES, SMARTNIC, AUE_FLAG_PII), 179 AUE_DEV(SMC, 2202USB, 0), 180 AUE_DEV(SMC, 2206USB, AUE_FLAG_PII), 181 AUE_DEV(SOHOWARE, NUB100, 0), 182 AUE_DEV(SOHOWARE, NUB110, AUE_FLAG_PII), 183#undef AUE_DEV 184}; 185 186/* prototypes */ 187 188static device_probe_t aue_probe; 189static device_attach_t aue_attach; 190static device_detach_t aue_detach; 191static miibus_readreg_t aue_miibus_readreg; 192static miibus_writereg_t aue_miibus_writereg; 193static miibus_statchg_t aue_miibus_statchg; 194 195static usb_callback_t aue_intr_callback; 196static usb_callback_t aue_bulk_read_callback; 197static usb_callback_t aue_bulk_write_callback; 198 199static uether_fn_t aue_attach_post; 200static uether_fn_t aue_init; 201static uether_fn_t aue_stop; 202static uether_fn_t aue_start; 203static uether_fn_t aue_tick; 204static uether_fn_t aue_setmulti; 205static uether_fn_t aue_setpromisc; 206 207static uint8_t aue_csr_read_1(struct aue_softc *, uint16_t); 208static uint16_t aue_csr_read_2(struct aue_softc *, uint16_t); 209static void aue_csr_write_1(struct aue_softc *, uint16_t, uint8_t); 210static void aue_csr_write_2(struct aue_softc *, uint16_t, uint16_t); 211static uint16_t aue_eeprom_getword(struct aue_softc *, int); 212static void aue_reset(struct aue_softc *); 213static void aue_reset_pegasus_II(struct aue_softc *); 214 215static int aue_ifmedia_upd(struct ifnet *); 216static void aue_ifmedia_sts(struct ifnet *, struct ifmediareq *); 217 218static const struct usb_config aue_config[AUE_N_TRANSFER] = { 219 220 [AUE_BULK_DT_WR] = { 221 .type = UE_BULK, 222 .endpoint = UE_ADDR_ANY, 223 .direction = UE_DIR_OUT, 224 .bufsize = (MCLBYTES + 2), 225 .flags = {.pipe_bof = 1,.force_short_xfer = 1,}, 226 .callback = aue_bulk_write_callback, 227 .timeout = 10000, /* 10 seconds */ 228 }, 229 230 [AUE_BULK_DT_RD] = { 231 .type = UE_BULK, 232 .endpoint = UE_ADDR_ANY, 233 .direction = UE_DIR_IN, 234 .bufsize = (MCLBYTES + 4 + ETHER_CRC_LEN), 235 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,}, 236 .callback = aue_bulk_read_callback, 237 }, 238 239 [AUE_INTR_DT_RD] = { 240 .type = UE_INTERRUPT, 241 .endpoint = UE_ADDR_ANY, 242 .direction = UE_DIR_IN, 243 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,}, 244 .bufsize = 0, /* use wMaxPacketSize */ 245 .callback = aue_intr_callback, 246 }, 247}; 248 249static device_method_t aue_methods[] = { 250 /* Device interface */ 251 DEVMETHOD(device_probe, aue_probe), 252 DEVMETHOD(device_attach, aue_attach), 253 DEVMETHOD(device_detach, aue_detach), 254 255 /* MII interface */ 256 DEVMETHOD(miibus_readreg, aue_miibus_readreg), 257 DEVMETHOD(miibus_writereg, aue_miibus_writereg), 258 DEVMETHOD(miibus_statchg, aue_miibus_statchg), 259 260 DEVMETHOD_END 261}; 262 263static driver_t aue_driver = { 264 .name = "aue", 265 .methods = aue_methods, 266 .size = sizeof(struct aue_softc) 267}; 268 269static devclass_t aue_devclass; 270 271DRIVER_MODULE(aue, uhub, aue_driver, aue_devclass, NULL, 0); 272DRIVER_MODULE(miibus, aue, miibus_driver, miibus_devclass, 0, 0); 273MODULE_DEPEND(aue, uether, 1, 1, 1); 274MODULE_DEPEND(aue, usb, 1, 1, 1); 275MODULE_DEPEND(aue, ether, 1, 1, 1); 276MODULE_DEPEND(aue, miibus, 1, 1, 1); 277MODULE_VERSION(aue, 1); 278 279static const struct usb_ether_methods aue_ue_methods = { 280 .ue_attach_post = aue_attach_post, 281 .ue_start = aue_start, 282 .ue_init = aue_init, 283 .ue_stop = aue_stop, 284 .ue_tick = aue_tick, 285 .ue_setmulti = aue_setmulti, 286 .ue_setpromisc = aue_setpromisc, 287 .ue_mii_upd = aue_ifmedia_upd, 288 .ue_mii_sts = aue_ifmedia_sts, 289}; 290 291#define AUE_SETBIT(sc, reg, x) \ 292 aue_csr_write_1(sc, reg, aue_csr_read_1(sc, reg) | (x)) 293 294#define AUE_CLRBIT(sc, reg, x) \ 295 aue_csr_write_1(sc, reg, aue_csr_read_1(sc, reg) & ~(x)) 296 297static uint8_t 298aue_csr_read_1(struct aue_softc *sc, uint16_t reg) 299{ 300 struct usb_device_request req; 301 usb_error_t err; 302 uint8_t val; 303 304 req.bmRequestType = UT_READ_VENDOR_DEVICE; 305 req.bRequest = AUE_UR_READREG; 306 USETW(req.wValue, 0); 307 USETW(req.wIndex, reg); 308 USETW(req.wLength, 1); 309 310 err = uether_do_request(&sc->sc_ue, &req, &val, 1000); 311 if (err) 312 return (0); 313 return (val); 314} 315 316static uint16_t 317aue_csr_read_2(struct aue_softc *sc, uint16_t reg) 318{ 319 struct usb_device_request req; 320 usb_error_t err; 321 uint16_t val; 322 323 req.bmRequestType = UT_READ_VENDOR_DEVICE; 324 req.bRequest = AUE_UR_READREG; 325 USETW(req.wValue, 0); 326 USETW(req.wIndex, reg); 327 USETW(req.wLength, 2); 328 329 err = uether_do_request(&sc->sc_ue, &req, &val, 1000); 330 if (err) 331 return (0); 332 return (le16toh(val)); 333} 334 335static void 336aue_csr_write_1(struct aue_softc *sc, uint16_t reg, uint8_t val) 337{ 338 struct usb_device_request req; 339 340 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 341 req.bRequest = AUE_UR_WRITEREG; 342 req.wValue[0] = val; 343 req.wValue[1] = 0; 344 USETW(req.wIndex, reg); 345 USETW(req.wLength, 1); 346 347 if (uether_do_request(&sc->sc_ue, &req, &val, 1000)) { 348 /* error ignored */ 349 } 350} 351 352static void 353aue_csr_write_2(struct aue_softc *sc, uint16_t reg, uint16_t val) 354{ 355 struct usb_device_request req; 356 357 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 358 req.bRequest = AUE_UR_WRITEREG; 359 USETW(req.wValue, val); 360 USETW(req.wIndex, reg); 361 USETW(req.wLength, 2); 362 363 val = htole16(val); 364 365 if (uether_do_request(&sc->sc_ue, &req, &val, 1000)) { 366 /* error ignored */ 367 } 368} 369 370/* 371 * Read a word of data stored in the EEPROM at address 'addr.' 372 */ 373static uint16_t 374aue_eeprom_getword(struct aue_softc *sc, int addr) 375{ 376 int i; 377 378 aue_csr_write_1(sc, AUE_EE_REG, addr); 379 aue_csr_write_1(sc, AUE_EE_CTL, AUE_EECTL_READ); 380 381 for (i = 0; i != AUE_TIMEOUT; i++) { 382 if (aue_csr_read_1(sc, AUE_EE_CTL) & AUE_EECTL_DONE) 383 break; 384 if (uether_pause(&sc->sc_ue, hz / 100)) 385 break; 386 } 387 388 if (i == AUE_TIMEOUT) 389 device_printf(sc->sc_ue.ue_dev, "EEPROM read timed out\n"); 390 391 return (aue_csr_read_2(sc, AUE_EE_DATA)); 392} 393 394/* 395 * Read station address(offset 0) from the EEPROM. 396 */ 397static void 398aue_read_mac(struct aue_softc *sc, uint8_t *eaddr) 399{ 400 int i, offset; 401 uint16_t word; 402 403 for (i = 0, offset = 0; i < ETHER_ADDR_LEN / 2; i++) { 404 word = aue_eeprom_getword(sc, offset + i); 405 eaddr[i * 2] = (uint8_t)word; 406 eaddr[i * 2 + 1] = (uint8_t)(word >> 8); 407 } 408} 409 410static int 411aue_miibus_readreg(device_t dev, int phy, int reg) 412{ 413 struct aue_softc *sc = device_get_softc(dev); 414 int i, locked; 415 uint16_t val = 0; 416 417 locked = mtx_owned(&sc->sc_mtx); 418 if (!locked) 419 AUE_LOCK(sc); 420 421 /* 422 * The Am79C901 HomePNA PHY actually contains two transceivers: a 1Mbps 423 * HomePNA PHY and a 10Mbps full/half duplex ethernet PHY with NWAY 424 * autoneg. However in the ADMtek adapter, only the 1Mbps PHY is 425 * actually connected to anything, so we ignore the 10Mbps one. It 426 * happens to be configured for MII address 3, so we filter that out. 427 */ 428 if (sc->sc_flags & AUE_FLAG_DUAL_PHY) { 429 if (phy == 3) 430 goto done; 431#if 0 432 if (phy != 1) 433 goto done; 434#endif 435 } 436 aue_csr_write_1(sc, AUE_PHY_ADDR, phy); 437 aue_csr_write_1(sc, AUE_PHY_CTL, reg | AUE_PHYCTL_READ); 438 439 for (i = 0; i != AUE_TIMEOUT; i++) { 440 if (aue_csr_read_1(sc, AUE_PHY_CTL) & AUE_PHYCTL_DONE) 441 break; 442 if (uether_pause(&sc->sc_ue, hz / 100)) 443 break; 444 } 445 446 if (i == AUE_TIMEOUT) 447 device_printf(sc->sc_ue.ue_dev, "MII read timed out\n"); 448 449 val = aue_csr_read_2(sc, AUE_PHY_DATA); 450 451done: 452 if (!locked) 453 AUE_UNLOCK(sc); 454 return (val); 455} 456 457static int 458aue_miibus_writereg(device_t dev, int phy, int reg, int data) 459{ 460 struct aue_softc *sc = device_get_softc(dev); 461 int i; 462 int locked; 463 464 if (phy == 3) 465 return (0); 466 467 locked = mtx_owned(&sc->sc_mtx); 468 if (!locked) 469 AUE_LOCK(sc); 470 471 aue_csr_write_2(sc, AUE_PHY_DATA, data); 472 aue_csr_write_1(sc, AUE_PHY_ADDR, phy); 473 aue_csr_write_1(sc, AUE_PHY_CTL, reg | AUE_PHYCTL_WRITE); 474 475 for (i = 0; i != AUE_TIMEOUT; i++) { 476 if (aue_csr_read_1(sc, AUE_PHY_CTL) & AUE_PHYCTL_DONE) 477 break; 478 if (uether_pause(&sc->sc_ue, hz / 100)) 479 break; 480 } 481 482 if (i == AUE_TIMEOUT) 483 device_printf(sc->sc_ue.ue_dev, "MII write timed out\n"); 484 485 if (!locked) 486 AUE_UNLOCK(sc); 487 return (0); 488} 489 490static void 491aue_miibus_statchg(device_t dev) 492{ 493 struct aue_softc *sc = device_get_softc(dev); 494 struct mii_data *mii = GET_MII(sc); 495 int locked; 496 497 locked = mtx_owned(&sc->sc_mtx); 498 if (!locked) 499 AUE_LOCK(sc); 500 501 AUE_CLRBIT(sc, AUE_CTL0, AUE_CTL0_RX_ENB | AUE_CTL0_TX_ENB); 502 if (IFM_SUBTYPE(mii->mii_media_active) == IFM_100_TX) 503 AUE_SETBIT(sc, AUE_CTL1, AUE_CTL1_SPEEDSEL); 504 else 505 AUE_CLRBIT(sc, AUE_CTL1, AUE_CTL1_SPEEDSEL); 506 507 if ((mii->mii_media_active & IFM_GMASK) == IFM_FDX) 508 AUE_SETBIT(sc, AUE_CTL1, AUE_CTL1_DUPLEX); 509 else 510 AUE_CLRBIT(sc, AUE_CTL1, AUE_CTL1_DUPLEX); 511 512 AUE_SETBIT(sc, AUE_CTL0, AUE_CTL0_RX_ENB | AUE_CTL0_TX_ENB); 513 514 /* 515 * Set the LED modes on the LinkSys adapter. 516 * This turns on the 'dual link LED' bin in the auxmode 517 * register of the Broadcom PHY. 518 */ 519 if (sc->sc_flags & AUE_FLAG_LSYS) { 520 uint16_t auxmode; 521 522 auxmode = aue_miibus_readreg(dev, 0, 0x1b); 523 aue_miibus_writereg(dev, 0, 0x1b, auxmode | 0x04); 524 } 525 if (!locked) 526 AUE_UNLOCK(sc); 527} 528 529#define AUE_BITS 6 530static void 531aue_setmulti(struct usb_ether *ue) 532{ 533 struct aue_softc *sc = uether_getsc(ue); 534 struct ifnet *ifp = uether_getifp(ue); 535 struct ifmultiaddr *ifma; 536 uint32_t h = 0; 537 uint32_t i; 538 uint8_t hashtbl[8] = { 0, 0, 0, 0, 0, 0, 0, 0 }; 539 540 AUE_LOCK_ASSERT(sc, MA_OWNED); 541 542 if (ifp->if_flags & IFF_ALLMULTI || ifp->if_flags & IFF_PROMISC) { 543 AUE_SETBIT(sc, AUE_CTL0, AUE_CTL0_ALLMULTI); 544 return; 545 } 546 547 AUE_CLRBIT(sc, AUE_CTL0, AUE_CTL0_ALLMULTI); 548 549 /* now program new ones */ 550 if_maddr_rlock(ifp); 551 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 552 if (ifma->ifma_addr->sa_family != AF_LINK) 553 continue; 554 h = ether_crc32_le(LLADDR((struct sockaddr_dl *) 555 ifma->ifma_addr), ETHER_ADDR_LEN) & ((1 << AUE_BITS) - 1); 556 hashtbl[(h >> 3)] |= 1 << (h & 0x7); 557 } 558 if_maddr_runlock(ifp); 559 560 /* write the hashtable */ 561 for (i = 0; i != 8; i++) 562 aue_csr_write_1(sc, AUE_MAR0 + i, hashtbl[i]); 563} 564 565static void 566aue_reset_pegasus_II(struct aue_softc *sc) 567{ 568 /* Magic constants taken from Linux driver. */ 569 aue_csr_write_1(sc, AUE_REG_1D, 0); 570 aue_csr_write_1(sc, AUE_REG_7B, 2); 571#if 0 572 if ((sc->sc_flags & HAS_HOME_PNA) && mii_mode) 573 aue_csr_write_1(sc, AUE_REG_81, 6); 574 else 575#endif 576 aue_csr_write_1(sc, AUE_REG_81, 2); 577} 578 579static void 580aue_reset(struct aue_softc *sc) 581{ 582 int i; 583 584 AUE_SETBIT(sc, AUE_CTL1, AUE_CTL1_RESETMAC); 585 586 for (i = 0; i != AUE_TIMEOUT; i++) { 587 if (!(aue_csr_read_1(sc, AUE_CTL1) & AUE_CTL1_RESETMAC)) 588 break; 589 if (uether_pause(&sc->sc_ue, hz / 100)) 590 break; 591 } 592 593 if (i == AUE_TIMEOUT) 594 device_printf(sc->sc_ue.ue_dev, "reset failed\n"); 595 596 /* 597 * The PHY(s) attached to the Pegasus chip may be held 598 * in reset until we flip on the GPIO outputs. Make sure 599 * to set the GPIO pins high so that the PHY(s) will 600 * be enabled. 601 * 602 * NOTE: We used to force all of the GPIO pins low first and then 603 * enable the ones we want. This has been changed to better 604 * match the ADMtek's reference design to avoid setting the 605 * power-down configuration line of the PHY at the same time 606 * it is reset. 607 */ 608 aue_csr_write_1(sc, AUE_GPIO0, AUE_GPIO_SEL0|AUE_GPIO_SEL1); 609 aue_csr_write_1(sc, AUE_GPIO0, AUE_GPIO_SEL0|AUE_GPIO_SEL1|AUE_GPIO_OUT0); 610 611 if (sc->sc_flags & AUE_FLAG_LSYS) { 612 /* Grrr. LinkSys has to be different from everyone else. */ 613 aue_csr_write_1(sc, AUE_GPIO0, AUE_GPIO_SEL0|AUE_GPIO_SEL1); 614 aue_csr_write_1(sc, AUE_GPIO0, 615 AUE_GPIO_SEL0|AUE_GPIO_SEL1|AUE_GPIO_OUT0); 616 } 617 if (sc->sc_flags & AUE_FLAG_PII) 618 aue_reset_pegasus_II(sc); 619 620 /* Wait a little while for the chip to get its brains in order: */ 621 uether_pause(&sc->sc_ue, hz / 100); 622} 623 624static void 625aue_attach_post(struct usb_ether *ue) 626{ 627 struct aue_softc *sc = uether_getsc(ue); 628 629 /* reset the adapter */ 630 aue_reset(sc); 631 632 /* get station address from the EEPROM */ 633 aue_read_mac(sc, ue->ue_eaddr); 634} 635 636/* 637 * Probe for a Pegasus chip. 638 */ 639static int 640aue_probe(device_t dev) 641{ 642 struct usb_attach_arg *uaa = device_get_ivars(dev); 643 644 if (uaa->usb_mode != USB_MODE_HOST) 645 return (ENXIO); 646 if (uaa->info.bConfigIndex != AUE_CONFIG_INDEX) 647 return (ENXIO); 648 if (uaa->info.bIfaceIndex != AUE_IFACE_IDX) 649 return (ENXIO); 650 /* 651 * Belkin USB Bluetooth dongles of the F8T012xx1 model series conflict 652 * with older Belkin USB2LAN adapters. Skip if_aue if we detect one of 653 * the devices that look like Bluetooth adapters. 654 */ 655 if (uaa->info.idVendor == USB_VENDOR_BELKIN && 656 uaa->info.idProduct == USB_PRODUCT_BELKIN_F8T012 && 657 uaa->info.bcdDevice == 0x0413) 658 return (ENXIO); 659 660 return (usbd_lookup_id_by_uaa(aue_devs, sizeof(aue_devs), uaa)); 661} 662 663/* 664 * Attach the interface. Allocate softc structures, do ifmedia 665 * setup and ethernet/BPF attach. 666 */ 667static int 668aue_attach(device_t dev) 669{ 670 struct usb_attach_arg *uaa = device_get_ivars(dev); 671 struct aue_softc *sc = device_get_softc(dev); 672 struct usb_ether *ue = &sc->sc_ue; 673 uint8_t iface_index; 674 int error; 675 676 sc->sc_flags = USB_GET_DRIVER_INFO(uaa); 677 678 if (uaa->info.bcdDevice >= 0x0201) { 679 /* XXX currently undocumented */ 680 sc->sc_flags |= AUE_FLAG_VER_2; 681 } 682 683 device_set_usb_desc(dev); 684 mtx_init(&sc->sc_mtx, device_get_nameunit(dev), NULL, MTX_DEF); 685 686 iface_index = AUE_IFACE_IDX; 687 error = usbd_transfer_setup(uaa->device, &iface_index, 688 sc->sc_xfer, aue_config, AUE_N_TRANSFER, 689 sc, &sc->sc_mtx); 690 if (error) { 691 device_printf(dev, "allocating USB transfers failed\n"); 692 goto detach; 693 } 694 695 ue->ue_sc = sc; 696 ue->ue_dev = dev; 697 ue->ue_udev = uaa->device; 698 ue->ue_mtx = &sc->sc_mtx; 699 ue->ue_methods = &aue_ue_methods; 700 701 error = uether_ifattach(ue); 702 if (error) { 703 device_printf(dev, "could not attach interface\n"); 704 goto detach; 705 } 706 return (0); /* success */ 707 708detach: 709 aue_detach(dev); 710 return (ENXIO); /* failure */ 711} 712 713static int 714aue_detach(device_t dev) 715{ 716 struct aue_softc *sc = device_get_softc(dev); 717 struct usb_ether *ue = &sc->sc_ue; 718 719 usbd_transfer_unsetup(sc->sc_xfer, AUE_N_TRANSFER); 720 uether_ifdetach(ue); 721 mtx_destroy(&sc->sc_mtx); 722 723 return (0); 724} 725 726static void 727aue_intr_callback(struct usb_xfer *xfer, usb_error_t error) 728{ 729 struct aue_softc *sc = usbd_xfer_softc(xfer); 730 struct ifnet *ifp = uether_getifp(&sc->sc_ue); 731 struct aue_intrpkt pkt; 732 struct usb_page_cache *pc; 733 int actlen; 734 735 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 736 737 switch (USB_GET_STATE(xfer)) { 738 case USB_ST_TRANSFERRED: 739 740 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) && 741 actlen >= (int)sizeof(pkt)) { 742 743 pc = usbd_xfer_get_frame(xfer, 0); 744 usbd_copy_out(pc, 0, &pkt, sizeof(pkt)); 745 746 if (pkt.aue_txstat0) 747 ifp->if_oerrors++; 748 if (pkt.aue_txstat0 & (AUE_TXSTAT0_LATECOLL | 749 AUE_TXSTAT0_EXCESSCOLL)) 750 ifp->if_collisions++; 751 } 752 /* FALLTHROUGH */ 753 case USB_ST_SETUP: 754tr_setup: 755 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer)); 756 usbd_transfer_submit(xfer); 757 return; 758 759 default: /* Error */ 760 if (error != USB_ERR_CANCELLED) { 761 /* try to clear stall first */ 762 usbd_xfer_set_stall(xfer); 763 goto tr_setup; 764 } 765 return; 766 } 767} 768 769static void 770aue_bulk_read_callback(struct usb_xfer *xfer, usb_error_t error) 771{ 772 struct aue_softc *sc = usbd_xfer_softc(xfer); 773 struct usb_ether *ue = &sc->sc_ue; 774 struct ifnet *ifp = uether_getifp(ue); 775 struct aue_rxpkt stat; 776 struct usb_page_cache *pc; 777 int actlen; 778 779 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 780 pc = usbd_xfer_get_frame(xfer, 0); 781 782 switch (USB_GET_STATE(xfer)) { 783 case USB_ST_TRANSFERRED: 784 DPRINTFN(11, "received %d bytes\n", actlen); 785 786 if (sc->sc_flags & AUE_FLAG_VER_2) { 787 788 if (actlen == 0) { 789 ifp->if_ierrors++; 790 goto tr_setup; 791 } 792 } else { 793 794 if (actlen <= (int)(sizeof(stat) + ETHER_CRC_LEN)) { 795 ifp->if_ierrors++; 796 goto tr_setup; 797 } 798 usbd_copy_out(pc, actlen - sizeof(stat), &stat, 799 sizeof(stat)); 800 801 /* 802 * turn off all the non-error bits in the rx status 803 * word: 804 */ 805 stat.aue_rxstat &= AUE_RXSTAT_MASK; 806 if (stat.aue_rxstat) { 807 ifp->if_ierrors++; 808 goto tr_setup; 809 } 810 /* No errors; receive the packet. */ 811 actlen -= (sizeof(stat) + ETHER_CRC_LEN); 812 } 813 uether_rxbuf(ue, pc, 0, actlen); 814 815 /* FALLTHROUGH */ 816 case USB_ST_SETUP: 817tr_setup: 818 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer)); 819 usbd_transfer_submit(xfer); 820 uether_rxflush(ue); 821 return; 822 823 default: /* Error */ 824 DPRINTF("bulk read error, %s\n", 825 usbd_errstr(error)); 826 827 if (error != USB_ERR_CANCELLED) { 828 /* try to clear stall first */ 829 usbd_xfer_set_stall(xfer); 830 goto tr_setup; 831 } 832 return; 833 } 834} 835 836static void 837aue_bulk_write_callback(struct usb_xfer *xfer, usb_error_t error) 838{ 839 struct aue_softc *sc = usbd_xfer_softc(xfer); 840 struct ifnet *ifp = uether_getifp(&sc->sc_ue); 841 struct usb_page_cache *pc; 842 struct mbuf *m; 843 uint8_t buf[2]; 844 int actlen; 845 846 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 847 pc = usbd_xfer_get_frame(xfer, 0); 848 849 switch (USB_GET_STATE(xfer)) { 850 case USB_ST_TRANSFERRED: 851 DPRINTFN(11, "transfer of %d bytes complete\n", actlen); 852 ifp->if_opackets++; 853 854 /* FALLTHROUGH */ 855 case USB_ST_SETUP: 856tr_setup: 857 if ((sc->sc_flags & AUE_FLAG_LINK) == 0) { 858 /* 859 * don't send anything if there is no link ! 860 */ 861 return; 862 } 863 IFQ_DRV_DEQUEUE(&ifp->if_snd, m); 864 865 if (m == NULL) 866 return; 867 if (m->m_pkthdr.len > MCLBYTES) 868 m->m_pkthdr.len = MCLBYTES; 869 if (sc->sc_flags & AUE_FLAG_VER_2) { 870 871 usbd_xfer_set_frame_len(xfer, 0, m->m_pkthdr.len); 872 873 usbd_m_copy_in(pc, 0, m, 0, m->m_pkthdr.len); 874 875 } else { 876 877 usbd_xfer_set_frame_len(xfer, 0, (m->m_pkthdr.len + 2)); 878 879 /* 880 * The ADMtek documentation says that the 881 * packet length is supposed to be specified 882 * in the first two bytes of the transfer, 883 * however it actually seems to ignore this 884 * info and base the frame size on the bulk 885 * transfer length. 886 */ 887 buf[0] = (uint8_t)(m->m_pkthdr.len); 888 buf[1] = (uint8_t)(m->m_pkthdr.len >> 8); 889 890 usbd_copy_in(pc, 0, buf, 2); 891 usbd_m_copy_in(pc, 2, m, 0, m->m_pkthdr.len); 892 } 893 894 /* 895 * if there's a BPF listener, bounce a copy 896 * of this frame to him: 897 */ 898 BPF_MTAP(ifp, m); 899 900 m_freem(m); 901 902 usbd_transfer_submit(xfer); 903 return; 904 905 default: /* Error */ 906 DPRINTFN(11, "transfer error, %s\n", 907 usbd_errstr(error)); 908 909 ifp->if_oerrors++; 910 911 if (error != USB_ERR_CANCELLED) { 912 /* try to clear stall first */ 913 usbd_xfer_set_stall(xfer); 914 goto tr_setup; 915 } 916 return; 917 } 918} 919 920static void 921aue_tick(struct usb_ether *ue) 922{ 923 struct aue_softc *sc = uether_getsc(ue); 924 struct mii_data *mii = GET_MII(sc); 925 926 AUE_LOCK_ASSERT(sc, MA_OWNED); 927 928 mii_tick(mii); 929 if ((sc->sc_flags & AUE_FLAG_LINK) == 0 930 && mii->mii_media_status & IFM_ACTIVE && 931 IFM_SUBTYPE(mii->mii_media_active) != IFM_NONE) { 932 sc->sc_flags |= AUE_FLAG_LINK; 933 aue_start(ue); 934 } 935} 936 937static void 938aue_start(struct usb_ether *ue) 939{ 940 struct aue_softc *sc = uether_getsc(ue); 941 942 /* 943 * start the USB transfers, if not already started: 944 */ 945 usbd_transfer_start(sc->sc_xfer[AUE_INTR_DT_RD]); 946 usbd_transfer_start(sc->sc_xfer[AUE_BULK_DT_RD]); 947 usbd_transfer_start(sc->sc_xfer[AUE_BULK_DT_WR]); 948} 949 950static void 951aue_init(struct usb_ether *ue) 952{ 953 struct aue_softc *sc = uether_getsc(ue); 954 struct ifnet *ifp = uether_getifp(ue); 955 int i; 956 957 AUE_LOCK_ASSERT(sc, MA_OWNED); 958 959 /* 960 * Cancel pending I/O 961 */ 962 aue_reset(sc); 963 964 /* Set MAC address */ 965 for (i = 0; i != ETHER_ADDR_LEN; i++) 966 aue_csr_write_1(sc, AUE_PAR0 + i, IF_LLADDR(ifp)[i]); 967 968 /* update promiscuous setting */ 969 aue_setpromisc(ue); 970 971 /* Load the multicast filter. */ 972 aue_setmulti(ue); 973 974 /* Enable RX and TX */ 975 aue_csr_write_1(sc, AUE_CTL0, AUE_CTL0_RXSTAT_APPEND | AUE_CTL0_RX_ENB); 976 AUE_SETBIT(sc, AUE_CTL0, AUE_CTL0_TX_ENB); 977 AUE_SETBIT(sc, AUE_CTL2, AUE_CTL2_EP3_CLR); 978 979 usbd_xfer_set_stall(sc->sc_xfer[AUE_BULK_DT_WR]); 980 981 ifp->if_drv_flags |= IFF_DRV_RUNNING; 982 aue_start(ue); 983} 984 985static void 986aue_setpromisc(struct usb_ether *ue) 987{ 988 struct aue_softc *sc = uether_getsc(ue); 989 struct ifnet *ifp = uether_getifp(ue); 990 991 AUE_LOCK_ASSERT(sc, MA_OWNED); 992 993 /* if we want promiscuous mode, set the allframes bit: */ 994 if (ifp->if_flags & IFF_PROMISC) 995 AUE_SETBIT(sc, AUE_CTL2, AUE_CTL2_RX_PROMISC); 996 else 997 AUE_CLRBIT(sc, AUE_CTL2, AUE_CTL2_RX_PROMISC); 998} 999 1000/* 1001 * Set media options. 1002 */ 1003static int 1004aue_ifmedia_upd(struct ifnet *ifp) 1005{ 1006 struct aue_softc *sc = ifp->if_softc; 1007 struct mii_data *mii = GET_MII(sc); 1008 struct mii_softc *miisc; 1009 int error; 1010 1011 AUE_LOCK_ASSERT(sc, MA_OWNED); 1012 1013 sc->sc_flags &= ~AUE_FLAG_LINK; 1014 LIST_FOREACH(miisc, &mii->mii_phys, mii_list) 1015 PHY_RESET(miisc); 1016 error = mii_mediachg(mii); 1017 return (error); 1018} 1019 1020/* 1021 * Report current media status. 1022 */ 1023static void 1024aue_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr) 1025{ 1026 struct aue_softc *sc = ifp->if_softc; 1027 struct mii_data *mii = GET_MII(sc); 1028 1029 AUE_LOCK(sc); 1030 mii_pollstat(mii); 1031 ifmr->ifm_active = mii->mii_media_active; 1032 ifmr->ifm_status = mii->mii_media_status; 1033 AUE_UNLOCK(sc); 1034} 1035 1036/* 1037 * Stop the adapter and free any mbufs allocated to the 1038 * RX and TX lists. 1039 */ 1040static void 1041aue_stop(struct usb_ether *ue) 1042{ 1043 struct aue_softc *sc = uether_getsc(ue); 1044 struct ifnet *ifp = uether_getifp(ue); 1045 1046 AUE_LOCK_ASSERT(sc, MA_OWNED); 1047 1048 ifp->if_drv_flags &= ~IFF_DRV_RUNNING; 1049 sc->sc_flags &= ~AUE_FLAG_LINK; 1050 1051 /* 1052 * stop all the transfers, if not already stopped: 1053 */ 1054 usbd_transfer_stop(sc->sc_xfer[AUE_BULK_DT_WR]); 1055 usbd_transfer_stop(sc->sc_xfer[AUE_BULK_DT_RD]); 1056 usbd_transfer_stop(sc->sc_xfer[AUE_INTR_DT_RD]); 1057 1058 aue_csr_write_1(sc, AUE_CTL0, 0); 1059 aue_csr_write_1(sc, AUE_CTL1, 0); 1060 aue_reset(sc); 1061} 1062