1/** 2 * \file ati_pcigart.c 3 * ATI PCI GART support 4 * 5 * \author Gareth Hughes <gareth@valinux.com> 6 */ 7 8/* 9 * Created: Wed Dec 13 21:52:19 2000 by gareth@valinux.com 10 * 11 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. 12 * All Rights Reserved. 13 * 14 * Permission is hereby granted, free of charge, to any person obtaining a 15 * copy of this software and associated documentation files (the "Software"), 16 * to deal in the Software without restriction, including without limitation 17 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 18 * and/or sell copies of the Software, and to permit persons to whom the 19 * Software is furnished to do so, subject to the following conditions: 20 * 21 * The above copyright notice and this permission notice (including the next 22 * paragraph) shall be included in all copies or substantial portions of the 23 * Software. 24 * 25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 26 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 27 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 28 * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 29 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 30 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 31 * DEALINGS IN THE SOFTWARE. 32 */ 33 34#include <sys/cdefs.h> 35__FBSDID("$FreeBSD$"); 36 37#include <dev/drm2/drmP.h> 38 39# define ATI_PCIGART_PAGE_SIZE 4096 /**< PCI GART page size */ 40 41static int drm_ati_alloc_pcigart_table(struct drm_device *dev, 42 struct drm_ati_pcigart_info *gart_info) 43{ 44 gart_info->table_handle = drm_pci_alloc(dev, gart_info->table_size, 45 PAGE_SIZE, 0xFFFFFFFFUL); 46 if (gart_info->table_handle == NULL) 47 return -ENOMEM; 48 49 return 0; 50} 51 52static void drm_ati_free_pcigart_table(struct drm_device *dev, 53 struct drm_ati_pcigart_info *gart_info) 54{ 55 drm_pci_free(dev, gart_info->table_handle); 56 gart_info->table_handle = NULL; 57} 58 59int drm_ati_pcigart_cleanup(struct drm_device *dev, struct drm_ati_pcigart_info *gart_info) 60{ 61 struct drm_sg_mem *entry = dev->sg; 62#ifdef __linux__ 63 unsigned long pages; 64 int i; 65 int max_pages; 66#endif 67 68 /* we need to support large memory configurations */ 69 if (!entry) { 70 DRM_ERROR("no scatter/gather memory!\n"); 71 return 0; 72 } 73 74 if (gart_info->bus_addr) { 75#ifdef __linux__ 76 77 max_pages = (gart_info->table_size / sizeof(u32)); 78 pages = (entry->pages <= max_pages) 79 ? entry->pages : max_pages; 80 81 for (i = 0; i < pages; i++) { 82 if (!entry->busaddr[i]) 83 break; 84 pci_unmap_page(dev->pdev, entry->busaddr[i], 85 PAGE_SIZE, PCI_DMA_BIDIRECTIONAL); 86 } 87#endif 88 89 if (gart_info->gart_table_location == DRM_ATI_GART_MAIN) 90 gart_info->bus_addr = 0; 91 } 92 93 if (gart_info->gart_table_location == DRM_ATI_GART_MAIN && 94 gart_info->table_handle) { 95 drm_ati_free_pcigart_table(dev, gart_info); 96 } 97 98 return 1; 99} 100 101int drm_ati_pcigart_init(struct drm_device *dev, struct drm_ati_pcigart_info *gart_info) 102{ 103 struct drm_local_map *map = &gart_info->mapping; 104 struct drm_sg_mem *entry = dev->sg; 105 void *address = NULL; 106 unsigned long pages; 107 u32 *pci_gart = NULL, page_base, gart_idx; 108 dma_addr_t bus_address = 0; 109 int i, j, ret = 0; 110 int max_ati_pages, max_real_pages; 111 112 if (!entry) { 113 DRM_ERROR("no scatter/gather memory!\n"); 114 goto done; 115 } 116 117 if (gart_info->gart_table_location == DRM_ATI_GART_MAIN) { 118 DRM_DEBUG("PCI: no table in VRAM: using normal RAM\n"); 119 120#ifdef __linux__ 121 if (pci_set_dma_mask(dev->pdev, gart_info->table_mask)) { 122 DRM_ERROR("fail to set dma mask to 0x%Lx\n", 123 (unsigned long long)gart_info->table_mask); 124 ret = 1; 125 goto done; 126 } 127#endif 128 129 ret = drm_ati_alloc_pcigart_table(dev, gart_info); 130 if (ret) { 131 DRM_ERROR("cannot allocate PCI GART page!\n"); 132 goto done; 133 } 134 135 pci_gart = gart_info->table_handle->vaddr; 136 address = gart_info->table_handle->vaddr; 137 bus_address = gart_info->table_handle->busaddr; 138 } else { 139 address = gart_info->addr; 140 bus_address = gart_info->bus_addr; 141 DRM_DEBUG("PCI: Gart Table: VRAM %08LX mapped at %08lX\n", 142 (unsigned long long)bus_address, 143 (unsigned long)address); 144 } 145 146 147 max_ati_pages = (gart_info->table_size / sizeof(u32)); 148 max_real_pages = max_ati_pages / (PAGE_SIZE / ATI_PCIGART_PAGE_SIZE); 149 pages = (entry->pages <= max_real_pages) 150 ? entry->pages : max_real_pages; 151 152 if (gart_info->gart_table_location == DRM_ATI_GART_MAIN) { 153 memset(pci_gart, 0, max_ati_pages * sizeof(u32)); 154 } else { 155 memset_io((void __iomem *)map->handle, 0, max_ati_pages * sizeof(u32)); 156 } 157 158 gart_idx = 0; 159 for (i = 0; i < pages; i++) { 160#ifdef __linux__ 161 /* we need to support large memory configurations */ 162 entry->busaddr[i] = pci_map_page(dev->pdev, entry->pagelist[i], 163 0, PAGE_SIZE, PCI_DMA_BIDIRECTIONAL); 164 if (pci_dma_mapping_error(dev->pdev, entry->busaddr[i])) { 165 DRM_ERROR("unable to map PCIGART pages!\n"); 166 drm_ati_pcigart_cleanup(dev, gart_info); 167 address = NULL; 168 bus_address = 0; 169 goto done; 170 } 171#endif 172 page_base = (u32) entry->busaddr[i]; 173 174 for (j = 0; j < (PAGE_SIZE / ATI_PCIGART_PAGE_SIZE); j++) { 175 u32 val; 176 177 switch(gart_info->gart_reg_if) { 178 case DRM_ATI_GART_IGP: 179 val = page_base | 0xc; 180 break; 181 case DRM_ATI_GART_PCIE: 182 val = (page_base >> 8) | 0xc; 183 break; 184 default: 185 case DRM_ATI_GART_PCI: 186 val = page_base; 187 break; 188 } 189 if (gart_info->gart_table_location == 190 DRM_ATI_GART_MAIN) 191 pci_gart[gart_idx] = cpu_to_le32(val); 192 else 193 DRM_WRITE32(map, gart_idx * sizeof(u32), val); 194 gart_idx++; 195 page_base += ATI_PCIGART_PAGE_SIZE; 196 } 197 } 198 ret = 1; 199 200#if defined(__i386) || defined(__amd64) 201 wbinvd(); 202#else 203 mb(); 204#endif 205 206 done: 207 gart_info->addr = address; 208 gart_info->bus_addr = bus_address; 209 return ret; 210} 211