cpufunc.h revision 18548
1/*-
2 * Copyright (c) 1993 The Regents of the University of California.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 *    must display the following acknowledgement:
15 *	This product includes software developed by the University of
16 *	California, Berkeley and its contributors.
17 * 4. Neither the name of the University nor the names of its contributors
18 *    may be used to endorse or promote products derived from this software
19 *    without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * SUCH DAMAGE.
32 *
33 *	$Id: cpufunc.h,v 1.57 1996/09/28 04:22:46 dyson Exp $
34 */
35
36/*
37 * Functions to provide access to special i386 instructions.
38 */
39
40#ifndef _MACHINE_CPUFUNC_H_
41#define	_MACHINE_CPUFUNC_H_
42
43#include <sys/cdefs.h>
44#include <sys/types.h>
45
46#ifdef	__GNUC__
47
48static __inline void
49breakpoint(void)
50{
51	__asm __volatile("int $3");
52}
53
54static __inline void
55disable_intr(void)
56{
57	__asm __volatile("cli" : : : "memory");
58}
59
60static __inline void
61enable_intr(void)
62{
63	__asm __volatile("sti");
64}
65
66#define	HAVE_INLINE_FFS
67
68static __inline int
69ffs(int mask)
70{
71	int	result;
72	/*
73	 * bsfl turns out to be not all that slow on 486's.  It can beaten
74	 * using a binary search to reduce to 4 bits and then a table lookup,
75	 * but only if the code is inlined and in the cache, and the code
76	 * is quite large so inlining it probably busts the cache.
77	 *
78	 * Note that gcc-2's builtin ffs would be used if we didn't declare
79	 * this inline or turn off the builtin.  The builtin is faster but
80	 * broken in gcc-2.4.5 and slower but working in gcc-2.5 and 2.6.
81	 */
82	__asm __volatile("testl %0,%0; je 1f; bsfl %0,%0; incl %0; 1:"
83			 : "=r" (result) : "0" (mask));
84	return (result);
85}
86
87#define	HAVE_INLINE_FLS
88
89static __inline int
90fls(int mask)
91{
92	int	result;
93	__asm __volatile("testl %0,%0; je 1f; bsrl %0,%0; incl %0; 1:"
94			 : "=r" (result) : "0" (mask));
95	return (result);
96}
97
98#if __GNUC__ < 2
99
100#define	inb(port)		inbv(port)
101#define	outb(port, data)	outbv(port, data)
102
103#else /* __GNUC >= 2 */
104
105/*
106 * The following complications are to get around gcc not having a
107 * constraint letter for the range 0..255.  We still put "d" in the
108 * constraint because "i" isn't a valid constraint when the port
109 * isn't constant.  This only matters for -O0 because otherwise
110 * the non-working version gets optimized away.
111 *
112 * Use an expression-statement instead of a conditional expression
113 * because gcc-2.6.0 would promote the operands of the conditional
114 * and produce poor code for "if ((inb(var) & const1) == const2)".
115 *
116 * The unnecessary test `(port) < 0x10000' is to generate a warning if
117 * the `port' has type u_short or smaller.  Such types are pessimal.
118 * This actually only works for signed types.  The range check is
119 * careful to avoid generating warnings.
120 */
121#define	inb(port) __extension__ ({					\
122	u_char	_data;							\
123	if (__builtin_constant_p(port) && ((port) & 0xffff) < 0x100	\
124	    && (port) < 0x10000)					\
125		_data = inbc(port);					\
126	else								\
127		_data = inbv(port);					\
128	_data; })
129
130#define	outb(port, data) (						\
131	__builtin_constant_p(port) && ((port) & 0xffff) < 0x100		\
132	&& (port) < 0x10000						\
133	? outbc(port, data) : outbv(port, data))
134
135static __inline u_char
136inbc(u_int port)
137{
138	u_char	data;
139
140	__asm __volatile("inb %1,%0" : "=a" (data) : "id" ((u_short)(port)));
141	return (data);
142}
143
144static __inline void
145outbc(u_int port, u_char data)
146{
147	__asm __volatile("outb %0,%1" : : "a" (data), "id" ((u_short)(port)));
148}
149
150#endif /* __GNUC <= 2 */
151
152static __inline u_char
153inbv(u_int port)
154{
155	u_char	data;
156	/*
157	 * We use %%dx and not %1 here because i/o is done at %dx and not at
158	 * %edx, while gcc generates inferior code (movw instead of movl)
159	 * if we tell it to load (u_short) port.
160	 */
161	__asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
162	return (data);
163}
164
165static __inline u_long
166inl(u_int port)
167{
168	u_long	data;
169
170	__asm __volatile("inl %%dx,%0" : "=a" (data) : "d" (port));
171	return (data);
172}
173
174static __inline void
175insb(u_int port, void *addr, size_t cnt)
176{
177	__asm __volatile("cld; rep; insb"
178			 : : "d" (port), "D" (addr), "c" (cnt)
179			 : "di", "cx", "memory");
180}
181
182static __inline void
183insw(u_int port, void *addr, size_t cnt)
184{
185	__asm __volatile("cld; rep; insw"
186			 : : "d" (port), "D" (addr), "c" (cnt)
187			 : "di", "cx", "memory");
188}
189
190static __inline void
191insl(u_int port, void *addr, size_t cnt)
192{
193	__asm __volatile("cld; rep; insl"
194			 : : "d" (port), "D" (addr), "c" (cnt)
195			 : "di", "cx", "memory");
196}
197
198static __inline u_short
199inw(u_int port)
200{
201	u_short	data;
202
203	__asm __volatile("inw %%dx,%0" : "=a" (data) : "d" (port));
204	return (data);
205}
206
207static __inline u_int
208loadandclear(u_int *addr)
209{
210	u_int	result;
211
212	__asm __volatile("xorl %0,%0; xchgl %1,%0"
213			 : "=&r" (result) : "m" (*addr));
214	return (result);
215}
216
217static __inline void
218outbv(u_int port, u_char data)
219{
220	u_char	al;
221	/*
222	 * Use an unnecessary assignment to help gcc's register allocator.
223	 * This make a large difference for gcc-1.40 and a tiny difference
224	 * for gcc-2.6.0.  For gcc-1.40, al had to be ``asm("ax")'' for
225	 * best results.  gcc-2.6.0 can't handle this.
226	 */
227	al = data;
228	__asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));
229}
230
231static __inline void
232outl(u_int port, u_long data)
233{
234	/*
235	 * outl() and outw() aren't used much so we haven't looked at
236	 * possible micro-optimizations such as the unnecessary
237	 * assignment for them.
238	 */
239	__asm __volatile("outl %0,%%dx" : : "a" (data), "d" (port));
240}
241
242static __inline void
243outsb(u_int port, void *addr, size_t cnt)
244{
245	__asm __volatile("cld; rep; outsb"
246			 : : "d" (port), "S" (addr), "c" (cnt)
247			 : "si", "cx");
248}
249
250static __inline void
251outsw(u_int port, void *addr, size_t cnt)
252{
253	__asm __volatile("cld; rep; outsw"
254			 : : "d" (port), "S" (addr), "c" (cnt)
255			 : "si", "cx");
256}
257
258static __inline void
259outsl(u_int port, void *addr, size_t cnt)
260{
261	__asm __volatile("cld; rep; outsl"
262			 : : "d" (port), "S" (addr), "c" (cnt)
263			 : "si", "cx");
264}
265
266static __inline void
267outw(u_int port, u_short data)
268{
269	__asm __volatile("outw %0,%%dx" : : "a" (data), "d" (port));
270}
271
272
273static __inline void
274invltlb(void)
275{
276	u_long	temp;
277	/*
278	 * This should be implemented as load_cr3(rcr3()) when load_cr3()
279	 * is inlined.
280	 */
281	__asm __volatile("movl %%cr3, %0; movl %0, %%cr3" : "=r" (temp)
282			 : : "memory");
283}
284
285static __inline void
286invlpg(u_long addr)
287{
288	__asm __volatile("invlpg (%0)": :"r"(addr));
289}
290
291static __inline u_long
292rcr2(void)
293{
294	u_long	data;
295
296	__asm __volatile("movl %%cr2,%0" : "=r" (data));
297	return (data);
298}
299
300static __inline u_long
301read_eflags(void)
302{
303	u_long	ef;
304
305	__asm __volatile("pushfl; popl %0" : "=r" (ef));
306	return (ef);
307}
308
309static __inline quad_t
310rdmsr(u_int msr)
311{
312	quad_t rv;
313
314	__asm __volatile(".byte 0x0f, 0x32" : "=A" (rv) : "c" (msr));
315	return (rv);
316}
317
318static __inline quad_t
319rdpmc(u_int pmc)
320{
321	quad_t rv;
322
323	__asm __volatile(".byte 0x0f, 0x33" : "=A" (rv) : "c" (pmc));
324	return (rv);
325}
326
327static __inline quad_t
328rdtsc(void)
329{
330	quad_t rv;
331
332	__asm __volatile(".byte 0x0f, 0x31" : "=A" (rv));
333	return (rv);
334}
335
336static __inline void
337setbits(volatile unsigned *addr, u_int bits)
338{
339	__asm __volatile("orl %1,%0" : "=m" (*addr) : "ir" (bits));
340}
341
342static __inline void
343write_eflags(u_long ef)
344{
345	__asm __volatile("pushl %0; popfl" : : "r" (ef));
346}
347
348static __inline void
349wrmsr(u_int msr, quad_t newval)
350{
351	__asm __volatile(".byte 0x0f, 0x30" : : "A" (newval), "c" (msr));
352}
353
354#else /* !__GNUC__ */
355
356int	breakpoint	__P((void));
357void	disable_intr	__P((void));
358void	enable_intr	__P((void));
359u_char	inb		__P((u_int port));
360u_long	inl		__P((u_int port));
361void	insb		__P((u_int port, void *addr, size_t cnt));
362void	insl		__P((u_int port, void *addr, size_t cnt));
363void	insw		__P((u_int port, void *addr, size_t cnt));
364u_short	inw		__P((u_int port));
365u_int	loadandclear	__P((u_int *addr));
366void	outb		__P((u_int port, u_char data));
367void	outl		__P((u_int port, u_long data));
368void	outsb		__P((u_int port, void *addr, size_t cnt));
369void	outsl		__P((u_int port, void *addr, size_t cnt));
370void	outsw		__P((u_int port, void *addr, size_t cnt));
371void	outw		__P((u_int port, u_short data));
372u_long	rcr2		__P((void));
373quad_t	rdmsr		__P((u_int msr));
374quad_t	rdpmc		__P((u_int pmc));
375quad_t	rdtsc		__P((void));
376u_long	read_eflags	__P((void));
377void	setbits		__P((volatile unsigned *addr, u_int bits));
378void	write_eflags	__P((u_long ef));
379void	wrmsr		__P((u_int msr, quad_t newval));
380
381#endif	/* __GNUC__ */
382
383void	load_cr0	__P((u_long cr0));
384void	load_cr3	__P((u_long cr3));
385void	ltr		__P((u_short sel));
386u_int	rcr0		__P((void));
387u_long	rcr3		__P((void));
388
389#include <machine/spl.h>	/* XXX belongs elsewhere */
390
391#endif /* !_MACHINE_CPUFUNC_H_ */
392