1//===-- RegisterContextFreeBSD_x86_64.cpp ----------------------*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===---------------------------------------------------------------------===//
9
10#include <vector>
11#include "RegisterContextPOSIX_x86.h"
12#include "RegisterContextFreeBSD_i386.h"
13#include "RegisterContextFreeBSD_x86_64.h"
14
15using namespace lldb_private;
16using namespace lldb;
17
18// http://svnweb.freebsd.org/base/head/sys/x86/include/reg.h
19typedef struct _GPR
20{
21    uint64_t r15;
22    uint64_t r14;
23    uint64_t r13;
24    uint64_t r12;
25    uint64_t r11;
26    uint64_t r10;
27    uint64_t r9;
28    uint64_t r8;
29    uint64_t rdi;
30    uint64_t rsi;
31    uint64_t rbp;
32    uint64_t rbx;
33    uint64_t rdx;
34    uint64_t rcx;
35    uint64_t rax;
36    uint32_t trapno;
37    uint16_t fs;
38    uint16_t gs;
39    uint32_t err;
40    uint16_t es;
41    uint16_t ds;
42    uint64_t rip;
43    uint64_t cs;
44    uint64_t rflags;
45    uint64_t rsp;
46    uint64_t ss;
47} GPR;
48
49struct dbreg {
50       uint64_t  dr[16];  /* debug registers */
51                          /* Index 0-3: debug address registers */
52                          /* Index 4-5: reserved */
53                          /* Index 6: debug status */
54                          /* Index 7: debug control */
55                          /* Index 8-15: reserved */
56};
57
58#define DR_SIZE sizeof(uint64_t)
59#define DR_OFFSET(reg_index) \
60    (LLVM_EXTENSION offsetof(dbreg, dr[reg_index]))
61
62
63//---------------------------------------------------------------------------
64// Include RegisterInfos_x86_64 to declare our g_register_infos_x86_64 structure.
65//---------------------------------------------------------------------------
66#define DECLARE_REGISTER_INFOS_X86_64_STRUCT
67#include "RegisterInfos_x86_64.h"
68#undef DECLARE_REGISTER_INFOS_X86_64_STRUCT
69
70static const RegisterInfo *
71GetRegisterInfo_i386(const lldb_private::ArchSpec& arch)
72{
73    static std::vector<lldb_private::RegisterInfo> g_register_infos;
74
75    // Allocate RegisterInfo only once
76    if (g_register_infos.empty())
77    {
78        // Copy the register information from base class
79        std::unique_ptr<RegisterContextFreeBSD_i386> reg_interface(new RegisterContextFreeBSD_i386 (arch));
80        const RegisterInfo *base_info = reg_interface->GetRegisterInfo();
81        g_register_infos.insert(g_register_infos.end(), &base_info[0], &base_info[k_num_registers_i386]);
82
83        //---------------------------------------------------------------------------
84        // Include RegisterInfos_x86_64 to update the g_register_infos structure
85        //  with x86_64 offsets.
86        //---------------------------------------------------------------------------
87        #define UPDATE_REGISTER_INFOS_I386_STRUCT_WITH_X86_64_OFFSETS
88        #include "RegisterInfos_x86_64.h"
89        #undef UPDATE_REGISTER_INFOS_I386_STRUCT_WITH_X86_64_OFFSETS
90    }
91
92    return &g_register_infos[0];
93}
94
95RegisterContextFreeBSD_x86_64::RegisterContextFreeBSD_x86_64(const ArchSpec &target_arch) :
96    RegisterInfoInterface(target_arch)
97{
98}
99
100RegisterContextFreeBSD_x86_64::~RegisterContextFreeBSD_x86_64()
101{
102}
103
104size_t
105RegisterContextFreeBSD_x86_64::GetGPRSize()
106{
107    return sizeof(GPR);
108}
109
110const RegisterInfo *
111RegisterContextFreeBSD_x86_64::GetRegisterInfo()
112{
113    switch (m_target_arch.GetCore())
114    {
115        case ArchSpec::eCore_x86_32_i386:
116        case ArchSpec::eCore_x86_32_i486:
117        case ArchSpec::eCore_x86_32_i486sx:
118            return GetRegisterInfo_i386 (m_target_arch);
119        case ArchSpec::eCore_x86_64_x86_64:
120            return g_register_infos_x86_64;
121        default:
122            assert(false && "Unhandled target architecture.");
123            return NULL;
124    }
125}
126
127