1/*-
2 * Copyright (c) 2003
3 *	Bill Paul <wpaul@windriver.com>.  All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 *    must display the following acknowledgement:
15 *	This product includes software developed by Bill Paul.
16 * 4. Neither the name of the author nor the names of any co-contributors
17 *    may be used to endorse or promote products derived from this software
18 *    without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED.  IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 * $FreeBSD$
33 */
34
35#ifndef _DEV_MII_RGEPHYREG_H_
36#define	_DEV_MII_RGEPHYREG_H_
37
38/*
39 * RealTek 8169S/8110S gigE PHY registers
40 */
41
42#define RGEPHY_MII_BMCR		0x00
43#define RGEPHY_BMCR_RESET	0x8000
44#define RGEPHY_BMCR_LOOP	0x4000
45#define RGEPHY_BMCR_SPD0	0x2000	/* speed select, lower bit */
46#define RGEPHY_BMCR_AUTOEN	0x1000	/* Autoneg enabled */
47#define RGEPHY_BMCR_PDOWN	0x0800	/* Power down */
48#define RGEPHY_BMCR_ISO		0x0400	/* Isolate */
49#define RGEPHY_BMCR_STARTNEG	0x0200	/* Restart autoneg */
50#define RGEPHY_BMCR_FDX		0x0100	/* Duplex mode */
51#define RGEPHY_BMCR_CTEST	0x0080	/* Collision test enable */
52#define RGEPHY_BMCR_SPD1	0x0040	/* Speed select, upper bit */
53
54#define RGEPHY_S1000		RGEPHY_BMCR_SPD1	/* 1000mbps */
55#define RGEPHY_S100		RGEPHY_BMCR_SPD0	/* 100mpbs */
56#define RGEPHY_S10		0			/* 10mbps */
57
58#define RGEPHY_MII_BMSR		0x01
59#define RGEPHY_BMSR_100T4	0x8000	/* 100 base T4 capable */
60#define RGEPHY_BMSR_100TXFDX	0x4000	/* 100 base Tx full duplex capable */
61#define RGEPHY_BMSR_100TXHDX	0x2000	/* 100 base Tx half duplex capable */
62#define RGEPHY_BMSR_10TFDX	0x1000	/* 10 base T full duplex capable */
63#define RGEPHY_BMSR_10THDX	0x0800	/* 10 base T half duplex capable */
64#define RGEPHY_BMSR_100T2FDX	0x0400	/* 100 base T2 full duplex capable */
65#define RGEPHY_BMSR_100T2HDX	0x0200	/* 100 base T2 half duplex capable */
66#define RGEPHY_BMSR_EXTSTS	0x0100	/* Extended status present */
67#define RGEPHY_BMSR_PRESUB	0x0040	/* Preamble surpression */
68#define RGEPHY_BMSR_ACOMP	0x0020	/* Autoneg complete */
69#define RGEPHY_BMSR_RFAULT	0x0010	/* Remote fault condition occurred */
70#define RGEPHY_BMSR_ANEG	0x0008	/* Autoneg capable */
71#define RGEPHY_BMSR_LINK	0x0004	/* Link status */
72#define RGEPHY_BMSR_JABBER	0x0002	/* Jabber detected */
73#define RGEPHY_BMSR_EXT		0x0001	/* Extended capability */
74
75#define RGEPHY_MII_ANAR		0x04
76#define RGEPHY_ANAR_NP		0x8000	/* Next page */
77#define RGEPHY_ANAR_RF		0x2000	/* Remote fault */
78#define RGEPHY_ANAR_ASP		0x0800	/* Asymmetric Pause */
79#define RGEPHY_ANAR_PC		0x0400	/* Pause capable */
80#define RGEPHY_ANAR_T4		0x0200	/* local device supports 100bT4 */
81#define RGEPHY_ANAR_TX_FD	0x0100	/* local device supports 100bTx FD */
82#define RGEPHY_ANAR_TX		0x0080	/* local device supports 100bTx */
83#define RGEPHY_ANAR_10_FD	0x0040	/* local device supports 10bT FD */
84#define RGEPHY_ANAR_10		0x0020	/* local device supports 10bT */
85#define RGEPHY_ANAR_SEL		0x001F	/* selector field, 00001=Ethernet */
86
87#define RGEPHY_MII_ANLPAR	0x05
88#define RGEPHY_ANLPAR_NP	0x8000	/* Next page */
89#define RGEPHY_ANLPAR_RF	0x2000	/* Remote fault */
90#define RGEPHY_ANLPAR_ASP	0x0800	/* Asymmetric Pause */
91#define RGEPHY_ANLPAR_PC	0x0400	/* Pause capable */
92#define RGEPHY_ANLPAR_T4	0x0200	/* link partner supports 100bT4 */
93#define RGEPHY_ANLPAR_TX_FD	0x0100	/* link partner supports 100bTx FD */
94#define RGEPHY_ANLPAR_TX	0x0080	/* link partner supports 100bTx */
95#define RGEPHY_ANLPAR_10_FD	0x0040	/* link partner supports 10bT FD */
96#define RGEPHY_ANLPAR_10	0x0020	/* link partner supports 10bT */
97#define RGEPHY_ANLPAR_SEL	0x001F	/* selector field, 00001=Ethernet */
98
99#define RGEPHY_SEL_TYPE		0x0001	/* ethernet */
100
101#define RGEPHY_MII_ANER		0x06
102#define RGEPHY_ANER_PDF		0x0010	/* Parallel detection fault */
103#define RGEPHY_ANER_LPNP	0x0008	/* Link partner can next page */
104#define RGEPHY_ANER_NP		0x0004	/* Local PHY can next page */
105#define RGEPHY_ANER_RX		0x0002	/* Next page received */
106#define RGEPHY_ANER_LPAN	0x0001 	/* Link partner autoneg capable */
107
108#define RGEPHY_MII_NEXTP	0x07	/* Next page */
109
110#define RGEPHY_MII_NEXTP_LP	0x08	/* Next page of link partner */
111
112#define RGEPHY_MII_1000CTL	0x09	/* 1000baseT control */
113#define RGEPHY_1000CTL_TST	0xE000	/* test modes */
114#define RGEPHY_1000CTL_MSE	0x1000	/* Master/Slave manual enable */
115#define RGEPHY_1000CTL_MSC	0x0800	/* Master/Slave select */
116#define RGEPHY_1000CTL_RD	0x0400	/* Repeater/DTE */
117#define RGEPHY_1000CTL_AFD	0x0200	/* Advertise full duplex */
118#define RGEPHY_1000CTL_AHD	0x0100	/* Advertise half duplex */
119
120#define RGEPHY_TEST_TX_JITTER			0x2000
121#define RGEPHY_TEST_TX_JITTER_MASTER_MODE	0x4000
122#define RGEPHY_TEST_TX_JITTER_SLAVE_MODE	0x6000
123#define RGEPHY_TEST_TX_DISTORTION		0x8000
124
125#define RGEPHY_MII_1000STS	0x0A	/* 1000baseT status */
126#define RGEPHY_1000STS_MSF	0x8000	/* Master/slave fault */
127#define RGEPHY_1000STS_MSR	0x4000	/* Master/slave result */
128#define RGEPHY_1000STS_LRS	0x2000	/* Local receiver status */
129#define RGEPHY_1000STS_RRS	0x1000	/* Remote receiver status */
130#define RGEPHY_1000STS_LPFD	0x0800	/* Link partner can FD */
131#define RGEPHY_1000STS_LPHD	0x0400	/* Link partner can HD */
132#define RGEPHY_1000STS_IEC	0x00FF	/* Idle error count */
133
134#define RGEPHY_MII_EXTSTS	0x0F	/* Extended status */
135#define RGEPHY_EXTSTS_X_FD_CAP	0x8000	/* 1000base-X FD capable */
136#define RGEPHY_EXTSTS_X_HD_CAP	0x4000	/* 1000base-X HD capable */
137#define RGEPHY_EXTSTS_T_FD_CAP	0x2000	/* 1000base-T FD capable */
138#define RGEPHY_EXTSTS_T_HD_CAP	0x1000	/* 1000base-T HD capable */
139
140/* RTL8211B(L)/RTL8211C(L) */
141#define RGEPHY_MII_PCR		0x10	/* PHY Specific control register */
142#define RGEPHY_PCR_ASSERT_CRS	0x0800
143#define RGEPHY_PCR_FORCE_LINK	0x0400
144#define RGEPHY_PCR_MDI_MASK	0x0060
145#define RGEPHY_PCR_MDIX_AUTO	0x0040
146#define RGEPHY_PCR_MDIX_MANUAL	0x0020
147#define RGEPHY_PCR_MDI_MANUAL	0x0000
148#define RGEPHY_PCR_CLK125_DIS	0x0010
149#define RGEPHY_PCR_JABBER_DIS	0x0001
150
151/* RTL8211B(L)/RTL8211C(L) */
152#define RGEPHY_MII_SSR		0x11	/* PHY Specific status register */
153#define	RGEPHY_SSR_S1000	0x8000	/* 1000Mbps */
154#define	RGEPHY_SSR_S100		0x4000	/* 100Mbps */
155#define	RGEPHY_SSR_S10		0x0000	/* 10Mbps */
156#define	RGEPHY_SSR_SPD_MASK	0xc000
157#define	RGEPHY_SSR_FDX		0x2000	/* full duplex */
158#define	RGEPHY_SSR_PAGE_RECEIVED	0x1000	/* new page received */
159#define	RGEPHY_SSR_SPD_DPLX_RESOLVED	0x0800	/* speed/duplex resolved */
160#define	RGEPHY_SSR_LINK		0x0400	/* link up */
161#define	RGEPHY_SSR_MDI_XOVER	0x0040	/* MDI crossover */
162#define	RGEPHY_SSR_ALDPS	0x0008	/* RTL8211C(L) only */
163#define	RGEPHY_SSR_JABBER	0x0001	/* Jabber */
164
165#endif /* _DEV_RGEPHY_MIIREG_H_ */
166