1/*- 2 * Copyright (c) 2005, M. Warner Losh 3 * Copyright (c) 1995, David Greenman 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice unmodified, this list of conditions, and the following 11 * disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * $FreeBSD$ 29 */ 30 31/* 32 * Notes for adding media support. Each chipset is somewhat different 33 * from the others. Linux has a table of OIDs that it uses to see what 34 * supports the misc register of the NS83903. But a sampling of datasheets 35 * I could dig up on cards I own paints a different picture. 36 * 37 * Chipset specific details: 38 * NS 83903/902A paired 39 * ccr base 0x1020 40 * id register at 0x1000: 7-3 = 0, 2-0 = 1. 41 * (maybe this test is too week) 42 * misc register at 0x018: 43 * 6 WAIT_TOUTENABLE enable watchdog timeout 44 * 3 AUI/TPI 1 AUX, 0 TPI 45 * 2 loopback 46 * 1 gdlink (tpi mode only) 1 tp good, 0 tp bad 47 * 0 0-no mam, 1 mam connected 48 * 49 * NS83926 appears to be a NS pcmcia glue chip used on the IBM Ethernet II 50 * and the NEC PC9801N-J12 ccr base 0x2000! 51 * 52 * winbond 289c926 53 * ccr base 0xfd0 54 * cfb (am 0xff2): 55 * 0-1 PHY01 00 TPI, 01 10B2, 10 10B5, 11 TPI (reduced squ) 56 * 2 LNKEN 0 - enable link and auto switch, 1 disable 57 * 3 LNKSTS TPI + LNKEN=0 + link good == 1, else 0 58 * sr (am 0xff4) 59 * 88 00 88 00 88 00, etc 60 * 61 * TMI tc3299a (cr PHY01 == 0) 62 * ccr base 0x3f8 63 * cra (io 0xa) 64 * crb (io 0xb) 65 * 0-1 PHY01 00 auto, 01 res, 10 10B5, 11 TPI 66 * 2 GDLINK 1 disable checking of link 67 * 6 LINK 0 bad link, 1 good link 68 * 69 * EN5017A, EN5020 no data, but very popular 70 * Other chips? 71 * NetBSD supports RTL8019, but none have surfaced that I can see 72 */ 73 74#include <sys/param.h> 75#include <sys/systm.h> 76#include <sys/socket.h> 77#include <sys/kernel.h> 78#include <sys/conf.h> 79#include <sys/uio.h> 80 81#include <sys/module.h> 82#include <sys/bus.h> 83#include <machine/bus.h> 84#include <sys/rman.h> 85#include <machine/resource.h> 86 87#include <net/ethernet.h> 88#include <net/if.h> 89#include <net/if_arp.h> 90#include <net/if_mib.h> 91#include <net/if_media.h> 92 93#include <dev/ed/if_edreg.h> 94#include <dev/ed/if_edvar.h> 95#include <dev/ed/ax88x90reg.h> 96#include <dev/ed/dl100xxreg.h> 97#include <dev/ed/tc5299jreg.h> 98#include <dev/pccard/pccardvar.h> 99#include <dev/pccard/pccardreg.h> 100#include <dev/pccard/pccard_cis.h> 101#include <dev/mii/mii.h> 102#include <dev/mii/miivar.h> 103 104#include "card_if.h" 105/* "device miibus" required. See GENERIC if you get errors here. */ 106#include "miibus_if.h" 107#include "pccarddevs.h" 108 109/* 110 * NE-2000 based PC Cards have a number of ways to get the MAC address. 111 * Some cards encode this as a FUNCE. Others have this in the ROMs the 112 * same way that ISA cards do. Some have it encoded in the attribute 113 * memory somewhere that isn't in the CIS. Some new chipsets have it 114 * in special registers in the ASIC part of the chip. 115 * 116 * For those cards that have the MAC adress stored in attribute memory 117 * outside of a FUNCE entry in the CIS, nearly all of them have it at 118 * a fixed offset (0xff0). We use that offset as a source of last 119 * resource if other offsets have failed. This is the address of the 120 * National Semiconductor DP83903A, which is the only chip's datasheet 121 * I've found. 122 */ 123#define ED_DEFAULT_MAC_OFFSET 0xff0 124 125static const struct ed_product { 126 struct pccard_product prod; 127 int flags; 128#define NE2000DVF_DL100XX 0x0001 /* chip is D-Link DL10019/22 */ 129#define NE2000DVF_AX88X90 0x0002 /* chip is ASIX AX88[17]90 */ 130#define NE2000DVF_TC5299J 0x0004 /* chip is Tamarack TC5299J */ 131#define NE2000DVF_TOSHIBA 0x0008 /* Toshiba DP83902A */ 132#define NE2000DVF_ENADDR 0x0100 /* Get MAC from attr mem */ 133#define NE2000DVF_ANYFUNC 0x0200 /* Allow any function type */ 134#define NE2000DVF_MODEM 0x0400 /* Has a modem/serial */ 135 int enoff; 136} ed_pccard_products[] = { 137 { PCMCIA_CARD(ACCTON, EN2212), 0}, 138 { PCMCIA_CARD(ACCTON, EN2216), 0}, 139 { PCMCIA_CARD(ALLIEDTELESIS, LA_PCM), 0}, 140 { PCMCIA_CARD(AMBICOM, AMB8002), 0}, 141 { PCMCIA_CARD(AMBICOM, AMB8002T), 0}, 142 { PCMCIA_CARD(AMBICOM, AMB8010), 0}, 143 { PCMCIA_CARD(AMBICOM, AMB8010_ALT), 0}, 144 { PCMCIA_CARD(AMBICOM, AMB8610), 0}, 145 { PCMCIA_CARD(BILLIONTON, CFLT10N), 0}, 146 { PCMCIA_CARD(BILLIONTON, LNA100B), NE2000DVF_AX88X90}, 147 { PCMCIA_CARD(BILLIONTON, LNT10TB), 0}, 148 { PCMCIA_CARD(BILLIONTON, LNT10TN), 0}, 149 { PCMCIA_CARD(BROMAX, AXNET), NE2000DVF_AX88X90}, 150 { PCMCIA_CARD(BROMAX, IPORT), 0}, 151 { PCMCIA_CARD(BROMAX, IPORT2), 0}, 152 { PCMCIA_CARD(BUFFALO, LPC2_CLT), 0}, 153 { PCMCIA_CARD(BUFFALO, LPC3_CLT), 0}, 154 { PCMCIA_CARD(BUFFALO, LPC3_CLX), NE2000DVF_AX88X90}, 155 { PCMCIA_CARD(BUFFALO, LPC4_TX), NE2000DVF_AX88X90}, 156 { PCMCIA_CARD(BUFFALO, LPC4_CLX), NE2000DVF_AX88X90}, 157 { PCMCIA_CARD(BUFFALO, LPC_CF_CLT), 0}, 158 { PCMCIA_CARD(CNET, NE2000), 0}, 159 { PCMCIA_CARD(COMPEX, AX88190), NE2000DVF_AX88X90}, 160 { PCMCIA_CARD(COMPEX, LANMODEM), 0}, 161 { PCMCIA_CARD(COMPEX, LINKPORT_ENET_B), 0}, 162 { PCMCIA_CARD(COREGA, ETHER_II_PCC_T), 0}, 163 { PCMCIA_CARD(COREGA, ETHER_II_PCC_TD), 0}, 164 { PCMCIA_CARD(COREGA, ETHER_PCC_T), 0}, 165 { PCMCIA_CARD(COREGA, ETHER_PCC_TD), 0}, 166 { PCMCIA_CARD(COREGA, FAST_ETHER_PCC_TX), NE2000DVF_DL100XX}, 167 { PCMCIA_CARD(COREGA, FETHER_PCC_TXD), NE2000DVF_AX88X90}, 168 { PCMCIA_CARD(COREGA, FETHER_PCC_TXF), NE2000DVF_DL100XX}, 169 { PCMCIA_CARD(COREGA, FETHER_II_PCC_TXD), NE2000DVF_AX88X90}, 170 { PCMCIA_CARD(COREGA, LAPCCTXD), 0}, 171 { PCMCIA_CARD(DAYNA, COMMUNICARD_E_1), 0}, 172 { PCMCIA_CARD(DAYNA, COMMUNICARD_E_2), 0}, 173 { PCMCIA_CARD(DLINK, DE650), NE2000DVF_ANYFUNC }, 174 { PCMCIA_CARD(DLINK, DE660), 0 }, 175 { PCMCIA_CARD(DLINK, DE660PLUS), 0}, 176 { PCMCIA_CARD(DYNALINK, L10C), 0}, 177 { PCMCIA_CARD(EDIMAX, EP4000A), 0}, 178 { PCMCIA_CARD(EPSON, EEN10B), 0}, 179 { PCMCIA_CARD(EXP, THINLANCOMBO), 0}, 180 { PCMCIA_CARD(GLOBALVILLAGE, LANMODEM), 0}, 181 { PCMCIA_CARD(GREY_CELL, TDK3000), 0}, 182 { PCMCIA_CARD(GREY_CELL, DMF650TX), 183 NE2000DVF_ANYFUNC | NE2000DVF_DL100XX | NE2000DVF_MODEM}, 184 { PCMCIA_CARD(GVC, NIC_2000P), 0}, 185 { PCMCIA_CARD(IBM, HOME_AND_AWAY), 0}, 186 { PCMCIA_CARD(IBM, INFOMOVER), 0}, 187 { PCMCIA_CARD(IODATA3, PCLAT), 0}, 188 { PCMCIA_CARD(KINGSTON, CIO10T), 0}, 189 { PCMCIA_CARD(KINGSTON, KNE2), 0}, 190 { PCMCIA_CARD(LANTECH, FASTNETTX), NE2000DVF_AX88X90}, 191 /* Same ID for many different cards, including generic NE2000 */ 192 { PCMCIA_CARD(LINKSYS, COMBO_ECARD), 193 NE2000DVF_DL100XX | NE2000DVF_AX88X90}, 194 { PCMCIA_CARD(LINKSYS, ECARD_1), 0}, 195 { PCMCIA_CARD(LINKSYS, ECARD_2), 0}, 196 { PCMCIA_CARD(LINKSYS, ETHERFAST), NE2000DVF_DL100XX}, 197 { PCMCIA_CARD(LINKSYS, TRUST_COMBO_ECARD), 0}, 198 { PCMCIA_CARD(MACNICA, ME1_JEIDA), 0}, 199 { PCMCIA_CARD(MAGICRAM, ETHER), 0}, 200 { PCMCIA_CARD(MELCO, LPC3_CLX), NE2000DVF_AX88X90}, 201 { PCMCIA_CARD(MELCO, LPC3_TX), NE2000DVF_AX88X90}, 202 { PCMCIA_CARD(MELCO2, LPC2_T), 0}, 203 { PCMCIA_CARD(MELCO2, LPC2_TX), 0}, 204 { PCMCIA_CARD(MITSUBISHI, B8895), NE2000DVF_ANYFUNC}, /* NG */ 205 { PCMCIA_CARD(MICRORESEARCH, MR10TPC), 0}, 206 { PCMCIA_CARD(NDC, ND5100_E), 0}, 207 { PCMCIA_CARD(NETGEAR, FA410TXC), NE2000DVF_DL100XX}, 208 /* Same ID as DLINK DFE-670TXD. 670 has DL10022, fa411 has ax88790 */ 209 { PCMCIA_CARD(NETGEAR, FA411), NE2000DVF_AX88X90 | NE2000DVF_DL100XX}, 210 { PCMCIA_CARD(NEXTCOM, NEXTHAWK), 0}, 211 { PCMCIA_CARD(NEWMEDIA, LANSURFER), NE2000DVF_ANYFUNC}, 212 { PCMCIA_CARD(NEWMEDIA, LIVEWIRE), 0}, 213 { PCMCIA_CARD(OEM2, 100BASE), NE2000DVF_AX88X90}, 214 { PCMCIA_CARD(OEM2, ETHERNET), 0}, 215 { PCMCIA_CARD(OEM2, FAST_ETHERNET), NE2000DVF_AX88X90}, 216 { PCMCIA_CARD(OEM2, NE2000), 0}, 217 { PCMCIA_CARD(PLANET, SMARTCOM2000), 0 }, 218 { PCMCIA_CARD(PREMAX, PE200), 0}, 219 { PCMCIA_CARD(PSION, LANGLOBAL), 220 NE2000DVF_ANYFUNC | NE2000DVF_AX88X90 | NE2000DVF_MODEM}, 221 { PCMCIA_CARD(RACORE, ETHERNET), 0}, 222 { PCMCIA_CARD(RACORE, FASTENET), NE2000DVF_AX88X90}, 223 { PCMCIA_CARD(RACORE, 8041TX), NE2000DVF_AX88X90 | NE2000DVF_TC5299J}, 224 { PCMCIA_CARD(RELIA, COMBO), 0}, 225 { PCMCIA_CARD(RIOS, PCCARD3), 0}, 226 { PCMCIA_CARD(RPTI, EP400), 0}, 227 { PCMCIA_CARD(RPTI, EP401), 0}, 228 { PCMCIA_CARD(SMC, EZCARD), 0}, 229 { PCMCIA_CARD(SOCKET, EA_ETHER), 0}, 230 { PCMCIA_CARD(SOCKET, ES_1000), 0}, 231 { PCMCIA_CARD(SOCKET, LP_ETHER), 0}, 232 { PCMCIA_CARD(SOCKET, LP_ETHER_CF), 0}, 233 { PCMCIA_CARD(SOCKET, LP_ETH_10_100_CF), NE2000DVF_DL100XX}, 234 { PCMCIA_CARD(SVEC, COMBOCARD), 0}, 235 { PCMCIA_CARD(SVEC, LANCARD), 0}, 236 { PCMCIA_CARD(TAMARACK, ETHERNET), 0}, 237 { PCMCIA_CARD(TDK, CFE_10), 0}, 238 { PCMCIA_CARD(TDK, LAK_CD031), 0}, 239 { PCMCIA_CARD(TDK, DFL5610WS), 0}, 240 { PCMCIA_CARD(TELECOMDEVICE, LM5LT), 0 }, 241 { PCMCIA_CARD(TELECOMDEVICE, TCD_HPC100), NE2000DVF_AX88X90}, 242 { PCMCIA_CARD(TJ, PTJ_LAN_T), 0 }, 243 { PCMCIA_CARD(TOSHIBA2, LANCT00A), NE2000DVF_ANYFUNC | NE2000DVF_TOSHIBA}, 244 { PCMCIA_CARD(ZONET, ZEN), 0}, 245 { { NULL } } 246}; 247 248/* 249 * PC Card (PCMCIA) specific code. 250 */ 251static int ed_pccard_probe(device_t); 252static int ed_pccard_attach(device_t); 253static void ed_pccard_tick(struct ed_softc *); 254 255static int ed_pccard_dl100xx(device_t dev, const struct ed_product *); 256static void ed_pccard_dl100xx_mii_reset(struct ed_softc *sc); 257static u_int ed_pccard_dl100xx_mii_readbits(struct ed_softc *sc, int nbits); 258static void ed_pccard_dl100xx_mii_writebits(struct ed_softc *sc, u_int val, 259 int nbits); 260 261static int ed_pccard_ax88x90(device_t dev, const struct ed_product *); 262static u_int ed_pccard_ax88x90_mii_readbits(struct ed_softc *sc, int nbits); 263static void ed_pccard_ax88x90_mii_writebits(struct ed_softc *sc, u_int val, 264 int nbits); 265 266static int ed_miibus_readreg(device_t dev, int phy, int reg); 267static int ed_ifmedia_upd(struct ifnet *); 268static void ed_ifmedia_sts(struct ifnet *, struct ifmediareq *); 269 270static int ed_pccard_tc5299j(device_t dev, const struct ed_product *); 271static u_int ed_pccard_tc5299j_mii_readbits(struct ed_softc *sc, int nbits); 272static void ed_pccard_tc5299j_mii_writebits(struct ed_softc *sc, u_int val, 273 int nbits); 274 275static void 276ed_pccard_print_entry(const struct ed_product *pp) 277{ 278 int i; 279 280 printf("Product entry: "); 281 if (pp->prod.pp_name) 282 printf("name='%s',", pp->prod.pp_name); 283 printf("vendor=%#x,product=%#x", pp->prod.pp_vendor, 284 pp->prod.pp_product); 285 for (i = 0; i < 4; i++) 286 if (pp->prod.pp_cis[i]) 287 printf(",CIS%d='%s'", i, pp->prod.pp_cis[i]); 288 printf("\n"); 289} 290 291static int 292ed_pccard_probe(device_t dev) 293{ 294 const struct ed_product *pp, *pp2; 295 int error, first = 1; 296 uint32_t fcn = PCCARD_FUNCTION_UNSPEC; 297 298 /* Make sure we're a network function */ 299 error = pccard_get_function(dev, &fcn); 300 if (error != 0) 301 return (error); 302 303 if ((pp = (const struct ed_product *) pccard_product_lookup(dev, 304 (const struct pccard_product *) ed_pccard_products, 305 sizeof(ed_pccard_products[0]), NULL)) != NULL) { 306 if (pp->prod.pp_name != NULL) 307 device_set_desc(dev, pp->prod.pp_name); 308 /* 309 * Some devices don't ID themselves as network, but 310 * that's OK if the flags say so. 311 */ 312 if (!(pp->flags & NE2000DVF_ANYFUNC) && 313 fcn != PCCARD_FUNCTION_NETWORK) 314 return (ENXIO); 315 /* 316 * Some devices match multiple entries. Report that 317 * as a warning to help cull the table 318 */ 319 pp2 = pp; 320 while ((pp2 = (const struct ed_product *)pccard_product_lookup( 321 dev, (const struct pccard_product *)(pp2 + 1), 322 sizeof(ed_pccard_products[0]), NULL)) != NULL) { 323 if (first) { 324 device_printf(dev, 325 "Warning: card matches multiple entries. Report to imp@freebsd.org\n"); 326 ed_pccard_print_entry(pp); 327 first = 0; 328 } 329 ed_pccard_print_entry(pp2); 330 } 331 332 return (0); 333 } 334 return (ENXIO); 335} 336 337static int 338ed_pccard_rom_mac(device_t dev, uint8_t *enaddr) 339{ 340 struct ed_softc *sc = device_get_softc(dev); 341 uint8_t romdata[32], sum; 342 int i; 343 344 /* 345 * Read in the rom data at location 0. Since there are no 346 * NE-1000 based PC Card devices, we'll assume we're 16-bit. 347 * 348 * In researching what format this takes, I've found that the 349 * following appears to be true for multiple cards based on 350 * observation as well as datasheet digging. 351 * 352 * Data is stored in some ROM and is copied out 8 bits at a time 353 * into 16-bit wide locations. This means that the odd locations 354 * of the ROM are not used (and can be either 0 or ff). 355 * 356 * The contents appears to be as follows: 357 * PROM RAM 358 * Offset Offset What 359 * 0 0 ENETADDR 0 360 * 1 2 ENETADDR 1 361 * 2 4 ENETADDR 2 362 * 3 6 ENETADDR 3 363 * 4 8 ENETADDR 4 364 * 5 10 ENETADDR 5 365 * 6-13 12-26 Reserved (varies by manufacturer) 366 * 14 28 0x57 367 * 15 30 0x57 368 * 369 * Some manufacturers have another image of enetaddr from 370 * PROM offset 0x10 to 0x15 with 0x42 in 0x1e and 0x1f, but 371 * this doesn't appear to be universally documented in the 372 * datasheets. Some manufactuers have a card type, card config 373 * checksums, etc encoded into PROM offset 6-13, but deciphering it 374 * requires more knowledge about the exact underlying chipset than 375 * we possess (and maybe can possess). 376 */ 377 ed_pio_readmem(sc, 0, romdata, 32); 378 if (bootverbose) 379 device_printf(dev, "ROM DATA: %32D\n", romdata, " "); 380 if (romdata[28] != 0x57 || romdata[30] != 0x57) 381 return (0); 382 for (i = 0, sum = 0; i < ETHER_ADDR_LEN; i++) 383 sum |= romdata[i * 2]; 384 if (sum == 0) 385 return (0); 386 for (i = 0; i < ETHER_ADDR_LEN; i++) 387 enaddr[i] = romdata[i * 2]; 388 return (1); 389} 390 391static int 392ed_pccard_add_modem(device_t dev) 393{ 394 device_printf(dev, "Need to write this code\n"); 395 return 0; 396} 397 398static int 399ed_pccard_kick_phy(struct ed_softc *sc) 400{ 401 struct mii_softc *miisc; 402 struct mii_data *mii; 403 404 mii = device_get_softc(sc->miibus); 405 LIST_FOREACH(miisc, &mii->mii_phys, mii_list) 406 PHY_RESET(miisc); 407 return (mii_mediachg(mii)); 408} 409 410static int 411ed_pccard_media_ioctl(struct ed_softc *sc, struct ifreq *ifr, u_long command) 412{ 413 struct mii_data *mii; 414 415 if (sc->miibus == NULL) 416 return (EINVAL); 417 mii = device_get_softc(sc->miibus); 418 return (ifmedia_ioctl(sc->ifp, ifr, &mii->mii_media, command)); 419} 420 421 422static void 423ed_pccard_mediachg(struct ed_softc *sc) 424{ 425 struct mii_data *mii; 426 427 if (sc->miibus == NULL) 428 return; 429 mii = device_get_softc(sc->miibus); 430 mii_mediachg(mii); 431} 432 433static int 434ed_pccard_attach(device_t dev) 435{ 436 u_char sum; 437 u_char enaddr[ETHER_ADDR_LEN]; 438 const struct ed_product *pp; 439 int error, i, flags, port_rid, modem_rid; 440 struct ed_softc *sc = device_get_softc(dev); 441 u_long size; 442 static uint16_t *intr_vals[] = {NULL, NULL}; 443 444 sc->dev = dev; 445 if ((pp = (const struct ed_product *) pccard_product_lookup(dev, 446 (const struct pccard_product *) ed_pccard_products, 447 sizeof(ed_pccard_products[0]), NULL)) == NULL) { 448 printf("Can't find\n"); 449 return (ENXIO); 450 } 451 modem_rid = port_rid = -1; 452 if (pp->flags & NE2000DVF_MODEM) { 453 for (i = 0; i < 4; i++) { 454 size = bus_get_resource_count(dev, SYS_RES_IOPORT, i); 455 if (size == ED_NOVELL_IO_PORTS) 456 port_rid = i; 457 else if (size == 8) 458 modem_rid = i; 459 } 460 if (port_rid == -1) { 461 device_printf(dev, "Cannot locate my ports!\n"); 462 return (ENXIO); 463 } 464 } else { 465 port_rid = 0; 466 } 467 /* Allocate the port resource during setup. */ 468 error = ed_alloc_port(dev, port_rid, ED_NOVELL_IO_PORTS); 469 if (error) { 470 printf("alloc_port failed\n"); 471 return (error); 472 } 473 if (rman_get_size(sc->port_res) == ED_NOVELL_IO_PORTS / 2) { 474 port_rid++; 475 sc->port_res2 = bus_alloc_resource(dev, SYS_RES_IOPORT, 476 &port_rid, 0ul, ~0ul, 1, RF_ACTIVE); 477 if (sc->port_res2 == NULL || 478 rman_get_size(sc->port_res2) != ED_NOVELL_IO_PORTS / 2) { 479 error = ENXIO; 480 goto bad; 481 } 482 } 483 error = ed_alloc_irq(dev, 0, 0); 484 if (error) 485 goto bad; 486 487 /* 488 * Determine which chipset we are. Almost all the PC Card chipsets 489 * have the Novel ASIC and NIC offsets. There's 2 known cards that 490 * follow the WD80x3 conventions, which are handled as a special case. 491 */ 492 sc->asic_offset = ED_NOVELL_ASIC_OFFSET; 493 sc->nic_offset = ED_NOVELL_NIC_OFFSET; 494 error = ENXIO; 495 flags = device_get_flags(dev); 496 if (error != 0) 497 error = ed_pccard_dl100xx(dev, pp); 498 if (error != 0) 499 error = ed_pccard_ax88x90(dev, pp); 500 if (error != 0) 501 error = ed_pccard_tc5299j(dev, pp); 502 if (error != 0) { 503 error = ed_probe_Novell_generic(dev, flags); 504 printf("Novell probe generic %d\n", error); 505 } 506 if (error != 0 && (pp->flags & NE2000DVF_TOSHIBA)) { 507 flags |= ED_FLAGS_TOSH_ETHER; 508 flags |= ED_FLAGS_PCCARD; 509 sc->asic_offset = ED_WD_ASIC_OFFSET; 510 sc->nic_offset = ED_WD_NIC_OFFSET; 511 error = ed_probe_WD80x3_generic(dev, flags, intr_vals); 512 } 513 if (error) 514 goto bad; 515 516 /* 517 * There are several ways to get the MAC address for the card. 518 * Some of the above probe routines can fill in the enaddr. If 519 * not, we run through a number of 'well known' locations: 520 * (1) From the PC Card FUNCE 521 * (2) From offset 0 in the shared memory 522 * (3) From a hinted offset in attribute memory 523 * (4) From 0xff0 in attribute memory 524 * If we can't get a non-zero MAC address from this list, we fail. 525 */ 526 for (i = 0, sum = 0; i < ETHER_ADDR_LEN; i++) 527 sum |= sc->enaddr[i]; 528 if (sum == 0) { 529 pccard_get_ether(dev, enaddr); 530 if (bootverbose) 531 device_printf(dev, "CIS MAC %6D\n", enaddr, ":"); 532 for (i = 0, sum = 0; i < ETHER_ADDR_LEN; i++) 533 sum |= enaddr[i]; 534 if (sum == 0 && ed_pccard_rom_mac(dev, enaddr)) { 535 if (bootverbose) 536 device_printf(dev, "ROM mac %6D\n", enaddr, 537 ":"); 538 sum++; 539 } 540 if (sum == 0 && pp->flags & NE2000DVF_ENADDR) { 541 for (i = 0; i < ETHER_ADDR_LEN; i++) { 542 pccard_attr_read_1(dev, pp->enoff + i * 2, 543 enaddr + i); 544 sum |= enaddr[i]; 545 } 546 if (bootverbose) 547 device_printf(dev, "Hint %x MAC %6D\n", 548 pp->enoff, enaddr, ":"); 549 } 550 if (sum == 0) { 551 for (i = 0; i < ETHER_ADDR_LEN; i++) { 552 pccard_attr_read_1(dev, ED_DEFAULT_MAC_OFFSET + 553 i * 2, enaddr + i); 554 sum |= enaddr[i]; 555 } 556 if (bootverbose) 557 device_printf(dev, "Fallback MAC %6D\n", 558 enaddr, ":"); 559 } 560 if (sum == 0) { 561 device_printf(dev, "Cannot extract MAC address.\n"); 562 ed_release_resources(dev); 563 return (ENXIO); 564 } 565 bcopy(enaddr, sc->enaddr, ETHER_ADDR_LEN); 566 } 567 568 error = ed_attach(dev); 569 if (error) 570 goto bad; 571 if (sc->chip_type == ED_CHIP_TYPE_DL10019 || 572 sc->chip_type == ED_CHIP_TYPE_DL10022) { 573 /* Try to attach an MII bus, but ignore errors. */ 574 ed_pccard_dl100xx_mii_reset(sc); 575 (void)mii_attach(dev, &sc->miibus, sc->ifp, ed_ifmedia_upd, 576 ed_ifmedia_sts, BMSR_DEFCAPMASK, MII_PHY_ANY, 577 MII_OFFSET_ANY, MIIF_FORCEANEG); 578 } else if (sc->chip_type == ED_CHIP_TYPE_AX88190 || 579 sc->chip_type == ED_CHIP_TYPE_AX88790 || 580 sc->chip_type == ED_CHIP_TYPE_TC5299J) { 581 error = mii_attach(dev, &sc->miibus, sc->ifp, ed_ifmedia_upd, 582 ed_ifmedia_sts, BMSR_DEFCAPMASK, MII_PHY_ANY, 583 MII_OFFSET_ANY, MIIF_FORCEANEG); 584 if (error != 0) { 585 device_printf(dev, "attaching PHYs failed\n"); 586 goto bad; 587 } 588 } 589 if (sc->miibus != NULL) { 590 sc->sc_tick = ed_pccard_tick; 591 sc->sc_mediachg = ed_pccard_mediachg; 592 sc->sc_media_ioctl = ed_pccard_media_ioctl; 593 ed_pccard_kick_phy(sc); 594 } else { 595 ed_gen_ifmedia_init(sc); 596 } 597 if (modem_rid != -1) 598 ed_pccard_add_modem(dev); 599 600 error = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_NET | INTR_MPSAFE, 601 NULL, edintr, sc, &sc->irq_handle); 602 if (error) { 603 device_printf(dev, "setup intr failed %d \n", error); 604 goto bad; 605 } 606 607 return (0); 608bad: 609 ed_detach(dev); 610 return (error); 611} 612 613/* 614 * Probe the Ethernet MAC addrees for PCMCIA Linksys EtherFast 10/100 615 * and compatible cards (DL10019C Ethernet controller). 616 */ 617static int 618ed_pccard_dl100xx(device_t dev, const struct ed_product *pp) 619{ 620 struct ed_softc *sc = device_get_softc(dev); 621 u_char sum; 622 uint8_t id; 623 u_int memsize; 624 int i, error; 625 626 if (!(pp->flags & NE2000DVF_DL100XX)) 627 return (ENXIO); 628 if (bootverbose) 629 device_printf(dev, "Trying DL100xx probing\n"); 630 error = ed_probe_Novell_generic(dev, device_get_flags(dev)); 631 if (bootverbose && error) 632 device_printf(dev, "Novell generic probe failed: %d\n", error); 633 if (error != 0) 634 return (error); 635 636 /* 637 * Linksys registers(offset from ASIC base) 638 * 639 * 0x04-0x09 : Physical Address Register 0-5 (PAR0-PAR5) 640 * 0x0A : Card ID Register (CIR) 641 * 0x0B : Check Sum Register (SR) 642 */ 643 for (sum = 0, i = 0x04; i < 0x0c; i++) 644 sum += ed_asic_inb(sc, i); 645 if (sum != 0xff) { 646 if (bootverbose) 647 device_printf(dev, "Bad checksum %#x\n", sum); 648 return (ENXIO); /* invalid DL10019C */ 649 } 650 if (bootverbose) 651 device_printf(dev, "CIR is %d\n", ed_asic_inb(sc, 0xa)); 652 for (i = 0; i < ETHER_ADDR_LEN; i++) 653 sc->enaddr[i] = ed_asic_inb(sc, 0x04 + i); 654 ed_nic_outb(sc, ED_P0_DCR, ED_DCR_WTS | ED_DCR_FT1 | ED_DCR_LS); 655 id = ed_asic_inb(sc, 0xf); 656 sc->isa16bit = 1; 657 /* 658 * Hard code values based on the datasheet. We're NE-2000 compatible 659 * NIC with 24kb of packet memory starting at 24k offset. These 660 * cards also work with 16k at 16k, but don't work with 24k at 16k 661 * or 32k at 16k. 662 */ 663 sc->type = ED_TYPE_NE2000; 664 sc->mem_start = 24 * 1024; 665 memsize = sc->mem_size = 24 * 1024; 666 sc->mem_end = sc->mem_start + memsize; 667 sc->tx_page_start = memsize / ED_PAGE_SIZE; 668 sc->txb_cnt = 3; 669 sc->rec_page_start = sc->tx_page_start + sc->txb_cnt * ED_TXBUF_SIZE; 670 sc->rec_page_stop = sc->tx_page_start + memsize / ED_PAGE_SIZE; 671 672 sc->mem_ring = sc->mem_start + sc->txb_cnt * ED_PAGE_SIZE * ED_TXBUF_SIZE; 673 674 ed_nic_outb(sc, ED_P0_PSTART, sc->mem_start / ED_PAGE_SIZE); 675 ed_nic_outb(sc, ED_P0_PSTOP, sc->mem_end / ED_PAGE_SIZE); 676 sc->vendor = ED_VENDOR_NOVELL; 677 sc->chip_type = (id & 0x90) == 0x90 ? 678 ED_CHIP_TYPE_DL10022 : ED_CHIP_TYPE_DL10019; 679 sc->type_str = ((id & 0x90) == 0x90) ? "DL10022" : "DL10019"; 680 sc->mii_readbits = ed_pccard_dl100xx_mii_readbits; 681 sc->mii_writebits = ed_pccard_dl100xx_mii_writebits; 682 return (0); 683} 684 685/* MII bit-twiddling routines for cards using Dlink chipset */ 686#define DL100XX_MIISET(sc, x) ed_asic_outb(sc, ED_DL100XX_MIIBUS, \ 687 ed_asic_inb(sc, ED_DL100XX_MIIBUS) | (x)) 688#define DL100XX_MIICLR(sc, x) ed_asic_outb(sc, ED_DL100XX_MIIBUS, \ 689 ed_asic_inb(sc, ED_DL100XX_MIIBUS) & ~(x)) 690 691static void 692ed_pccard_dl100xx_mii_reset(struct ed_softc *sc) 693{ 694 if (sc->chip_type != ED_CHIP_TYPE_DL10022) 695 return; 696 697 ed_asic_outb(sc, ED_DL100XX_MIIBUS, ED_DL10022_MII_RESET2); 698 DELAY(10); 699 ed_asic_outb(sc, ED_DL100XX_MIIBUS, 700 ED_DL10022_MII_RESET2 | ED_DL10022_MII_RESET1); 701 DELAY(10); 702 ed_asic_outb(sc, ED_DL100XX_MIIBUS, ED_DL10022_MII_RESET2); 703 DELAY(10); 704 ed_asic_outb(sc, ED_DL100XX_MIIBUS, 705 ED_DL10022_MII_RESET2 | ED_DL10022_MII_RESET1); 706 DELAY(10); 707 ed_asic_outb(sc, ED_DL100XX_MIIBUS, 0); 708} 709 710static void 711ed_pccard_dl100xx_mii_writebits(struct ed_softc *sc, u_int val, int nbits) 712{ 713 int i; 714 715 DL100XX_MIISET(sc, ED_DL100XX_MII_DIROUT); 716 for (i = nbits - 1; i >= 0; i--) { 717 if ((val >> i) & 1) 718 DL100XX_MIISET(sc, ED_DL100XX_MII_DATAOUT); 719 else 720 DL100XX_MIICLR(sc, ED_DL100XX_MII_DATAOUT); 721 DL100XX_MIISET(sc, ED_DL100XX_MII_CLK); 722 DL100XX_MIICLR(sc, ED_DL100XX_MII_CLK); 723 } 724} 725 726static u_int 727ed_pccard_dl100xx_mii_readbits(struct ed_softc *sc, int nbits) 728{ 729 int i; 730 u_int val = 0; 731 732 DL100XX_MIICLR(sc, ED_DL100XX_MII_DIROUT); 733 for (i = nbits - 1; i >= 0; i--) { 734 DL100XX_MIISET(sc, ED_DL100XX_MII_CLK); 735 val <<= 1; 736 if (ed_asic_inb(sc, ED_DL100XX_MIIBUS) & ED_DL100XX_MII_DATAIN) 737 val++; 738 DL100XX_MIICLR(sc, ED_DL100XX_MII_CLK); 739 } 740 return val; 741} 742 743static void 744ed_pccard_ax88x90_reset(struct ed_softc *sc) 745{ 746 int i; 747 748 /* Reset Card */ 749 ed_nic_outb(sc, ED_P0_CR, ED_CR_RD2 | ED_CR_STP | ED_CR_PAGE_0); 750 ed_asic_outb(sc, ED_NOVELL_RESET, ed_asic_inb(sc, ED_NOVELL_RESET)); 751 752 /* Wait for the RST bit to assert, but cap it at 10ms */ 753 for (i = 10000; !(ed_nic_inb(sc, ED_P0_ISR) & ED_ISR_RST) && i > 0; 754 i--) 755 continue; 756 ed_nic_outb(sc, ED_P0_ISR, ED_ISR_RST); /* ACK INTR */ 757 if (i == 0) 758 device_printf(sc->dev, "Reset didn't finish\n"); 759} 760 761/* 762 * Probe and vendor-specific initialization routine for ax88x90 boards 763 */ 764static int 765ed_probe_ax88x90_generic(device_t dev, int flags) 766{ 767 struct ed_softc *sc = device_get_softc(dev); 768 u_int memsize; 769 static char test_pattern[32] = "THIS is A memory TEST pattern"; 770 char test_buffer[32]; 771 772 ed_pccard_ax88x90_reset(sc); 773 DELAY(10*1000); 774 775 /* Make sure that we really have an 8390 based board */ 776 if (!ed_probe_generic8390(sc)) 777 return (ENXIO); 778 779 sc->vendor = ED_VENDOR_NOVELL; 780 sc->mem_shared = 0; 781 sc->cr_proto = ED_CR_RD2; 782 783 /* 784 * This prevents packets from being stored in the NIC memory when the 785 * readmem routine turns on the start bit in the CR. We write some 786 * bytes in word mode and verify we can read them back. If we can't 787 * then we don't have an AX88x90 chip here. 788 */ 789 sc->isa16bit = 1; 790 ed_nic_outb(sc, ED_P0_RCR, ED_RCR_MON); 791 ed_nic_outb(sc, ED_P0_DCR, ED_DCR_WTS | ED_DCR_FT1 | ED_DCR_LS); 792 ed_pio_writemem(sc, test_pattern, 16384, sizeof(test_pattern)); 793 ed_pio_readmem(sc, 16384, test_buffer, sizeof(test_pattern)); 794 if (bcmp(test_pattern, test_buffer, sizeof(test_pattern)) != 0) 795 return (ENXIO); 796 797 /* 798 * Hard code values based on the datasheet. We're NE-2000 compatible 799 * NIC with 16kb of packet memory starting at 16k offset. 800 */ 801 sc->type = ED_TYPE_NE2000; 802 memsize = sc->mem_size = 16*1024; 803 sc->mem_start = 16 * 1024; 804 if (ed_asic_inb(sc, ED_AX88X90_TEST) != 0) 805 sc->chip_type = ED_CHIP_TYPE_AX88790; 806 else { 807 sc->chip_type = ED_CHIP_TYPE_AX88190; 808 /* 809 * The AX88190 (not A) has external 64k SRAM. Probe for this 810 * here. Most of the cards I have either use the AX88190A 811 * part, or have only 32k SRAM for some reason, so I don't 812 * know if this works or not. 813 */ 814 ed_pio_writemem(sc, test_pattern, 32768, sizeof(test_pattern)); 815 ed_pio_readmem(sc, 32768, test_buffer, sizeof(test_pattern)); 816 if (bcmp(test_pattern, test_buffer, sizeof(test_pattern)) == 0) { 817 sc->mem_start = 2*1024; 818 memsize = sc->mem_size = 62 * 1024; 819 } 820 } 821 sc->mem_end = sc->mem_start + memsize; 822 sc->tx_page_start = memsize / ED_PAGE_SIZE; 823 if (sc->mem_size > 16 * 1024) 824 sc->txb_cnt = 3; 825 else 826 sc->txb_cnt = 2; 827 sc->rec_page_start = sc->tx_page_start + sc->txb_cnt * ED_TXBUF_SIZE; 828 sc->rec_page_stop = sc->tx_page_start + memsize / ED_PAGE_SIZE; 829 830 sc->mem_ring = sc->mem_start + sc->txb_cnt * ED_PAGE_SIZE * ED_TXBUF_SIZE; 831 832 ed_nic_outb(sc, ED_P0_PSTART, sc->mem_start / ED_PAGE_SIZE); 833 ed_nic_outb(sc, ED_P0_PSTOP, sc->mem_end / ED_PAGE_SIZE); 834 835 /* Get the mac before we go -- It's just at 0x400 in "SRAM" */ 836 ed_pio_readmem(sc, 0x400, sc->enaddr, ETHER_ADDR_LEN); 837 838 /* clear any pending interrupts that might have occurred above */ 839 ed_nic_outb(sc, ED_P0_ISR, 0xff); 840 sc->sc_write_mbufs = ed_pio_write_mbufs; 841 return (0); 842} 843 844static int 845ed_pccard_ax88x90_check_mii(device_t dev, struct ed_softc *sc) 846{ 847 int i, id; 848 849 /* 850 * All AX88x90 devices have MII and a PHY, so we use this to weed out 851 * chips that would otherwise make it through the tests we have after 852 * this point. 853 */ 854 for (i = 0; i < 32; i++) { 855 id = ed_miibus_readreg(dev, i, MII_BMSR); 856 if (id != 0 && id != 0xffff) 857 break; 858 } 859 /* 860 * Found one, we're good. 861 */ 862 if (i != 32) 863 return (0); 864 /* 865 * Didn't find anything, so try to power up and try again. The PHY 866 * may be not responding because we're in power down mode. 867 */ 868 if (sc->chip_type == ED_CHIP_TYPE_AX88190) 869 return (ENXIO); 870 pccard_ccr_write_1(dev, PCCARD_CCR_STATUS, PCCARD_CCR_STATUS_PWRDWN); 871 for (i = 0; i < 32; i++) { 872 id = ed_miibus_readreg(dev, i, MII_BMSR); 873 if (id != 0 && id != 0xffff) 874 break; 875 } 876 /* 877 * Still no joy? We're AFU, punt. 878 */ 879 if (i == 32) 880 return (ENXIO); 881 return (0); 882 883} 884 885/* 886 * Special setup for AX88[17]90 887 */ 888static int 889ed_pccard_ax88x90(device_t dev, const struct ed_product *pp) 890{ 891 int error; 892 int iobase; 893 struct ed_softc *sc = device_get_softc(dev); 894 895 if (!(pp->flags & NE2000DVF_AX88X90)) 896 return (ENXIO); 897 898 if (bootverbose) 899 device_printf(dev, "Checking AX88x90\n"); 900 901 /* 902 * Set the IOBASE Register. The AX88x90 cards are potentially 903 * multifunction cards, and thus requires a slight workaround. 904 * We write the address the card is at, on the off chance that this 905 * card is not MFC. 906 * XXX I'm not sure that this is still needed... 907 */ 908 iobase = rman_get_start(sc->port_res); 909 pccard_ccr_write_1(dev, PCCARD_CCR_IOBASE0, iobase & 0xff); 910 pccard_ccr_write_1(dev, PCCARD_CCR_IOBASE1, (iobase >> 8) & 0xff); 911 912 sc->mii_readbits = ed_pccard_ax88x90_mii_readbits; 913 sc->mii_writebits = ed_pccard_ax88x90_mii_writebits; 914 error = ed_probe_ax88x90_generic(dev, device_get_flags(dev)); 915 if (error) { 916 if (bootverbose) 917 device_printf(dev, "probe ax88x90 failed %d\n", 918 error); 919 goto fail; 920 } 921 error = ed_pccard_ax88x90_check_mii(dev, sc); 922 if (error) 923 goto fail; 924 sc->vendor = ED_VENDOR_NOVELL; 925 sc->type = ED_TYPE_NE2000; 926 if (sc->chip_type == ED_CHIP_TYPE_AX88190) 927 sc->type_str = "AX88190"; 928 else 929 sc->type_str = "AX88790"; 930 return (0); 931fail:; 932 sc->mii_readbits = 0; 933 sc->mii_writebits = 0; 934 return (error); 935} 936 937static void 938ed_pccard_ax88x90_mii_writebits(struct ed_softc *sc, u_int val, int nbits) 939{ 940 int i, data; 941 942 for (i = nbits - 1; i >= 0; i--) { 943 data = (val >> i) & 1 ? ED_AX88X90_MII_DATAOUT : 0; 944 ed_asic_outb(sc, ED_AX88X90_MIIBUS, data); 945 ed_asic_outb(sc, ED_AX88X90_MIIBUS, data | ED_AX88X90_MII_CLK); 946 } 947} 948 949static u_int 950ed_pccard_ax88x90_mii_readbits(struct ed_softc *sc, int nbits) 951{ 952 int i; 953 u_int val = 0; 954 uint8_t mdio; 955 956 mdio = ED_AX88X90_MII_DIRIN; 957 for (i = nbits - 1; i >= 0; i--) { 958 ed_asic_outb(sc, ED_AX88X90_MIIBUS, mdio); 959 val <<= 1; 960 if (ed_asic_inb(sc, ED_AX88X90_MIIBUS) & ED_AX88X90_MII_DATAIN) 961 val++; 962 ed_asic_outb(sc, ED_AX88X90_MIIBUS, mdio | ED_AX88X90_MII_CLK); 963 } 964 return val; 965} 966 967/* 968 * Special setup for TC5299J 969 */ 970static int 971ed_pccard_tc5299j(device_t dev, const struct ed_product *pp) 972{ 973 int error, i, id; 974 char *ts; 975 struct ed_softc *sc = device_get_softc(dev); 976 977 if (!(pp->flags & NE2000DVF_TC5299J)) 978 return (ENXIO); 979 980 if (bootverbose) 981 device_printf(dev, "Checking Tc5299j\n"); 982 983 error = ed_probe_Novell_generic(dev, device_get_flags(dev)); 984 if (bootverbose) 985 device_printf(dev, "probe novel returns %d\n", error); 986 if (error != 0) 987 return (error); 988 989 /* 990 * Check to see if we have a MII PHY ID at any address. All TC5299J 991 * devices have MII and a PHY, so we use this to weed out chips that 992 * would otherwise make it through the tests we have after this point. 993 */ 994 sc->mii_readbits = ed_pccard_tc5299j_mii_readbits; 995 sc->mii_writebits = ed_pccard_tc5299j_mii_writebits; 996 for (i = 0; i < 32; i++) { 997 id = ed_miibus_readreg(dev, i, MII_PHYIDR1); 998 if (id != 0 && id != 0xffff) 999 break; 1000 } 1001 if (i == 32) { 1002 sc->mii_readbits = 0; 1003 sc->mii_writebits = 0; 1004 return (ENXIO); 1005 } 1006 ts = "TC5299J"; 1007 if (ed_pccard_rom_mac(dev, sc->enaddr) == 0) { 1008 sc->mii_readbits = 0; 1009 sc->mii_writebits = 0; 1010 return (ENXIO); 1011 } 1012 sc->vendor = ED_VENDOR_NOVELL; 1013 sc->type = ED_TYPE_NE2000; 1014 sc->chip_type = ED_CHIP_TYPE_TC5299J; 1015 sc->type_str = ts; 1016 return (0); 1017} 1018 1019static void 1020ed_pccard_tc5299j_mii_writebits(struct ed_softc *sc, u_int val, int nbits) 1021{ 1022 int i; 1023 uint8_t cr, data; 1024 1025 /* Select page 3 */ 1026 cr = ed_nic_inb(sc, ED_P0_CR); 1027 ed_nic_outb(sc, ED_P0_CR, cr | ED_CR_PAGE_3); 1028 1029 for (i = nbits - 1; i >= 0; i--) { 1030 data = (val >> i) & 1 ? ED_TC5299J_MII_DATAOUT : 0; 1031 ed_nic_outb(sc, ED_TC5299J_MIIBUS, data); 1032 ed_nic_outb(sc, ED_TC5299J_MIIBUS, data | ED_TC5299J_MII_CLK); 1033 } 1034 ed_nic_outb(sc, ED_TC5299J_MIIBUS, 0); 1035 1036 /* Restore prior page */ 1037 ed_nic_outb(sc, ED_P0_CR, cr); 1038} 1039 1040static u_int 1041ed_pccard_tc5299j_mii_readbits(struct ed_softc *sc, int nbits) 1042{ 1043 int i; 1044 u_int val = 0; 1045 uint8_t cr; 1046 1047 /* Select page 3 */ 1048 cr = ed_nic_inb(sc, ED_P0_CR); 1049 ed_nic_outb(sc, ED_P0_CR, cr | ED_CR_PAGE_3); 1050 1051 ed_asic_outb(sc, ED_TC5299J_MIIBUS, ED_TC5299J_MII_DIROUT); 1052 for (i = nbits - 1; i >= 0; i--) { 1053 ed_nic_outb(sc, ED_TC5299J_MIIBUS, 1054 ED_TC5299J_MII_CLK | ED_TC5299J_MII_DIROUT); 1055 val <<= 1; 1056 if (ed_nic_inb(sc, ED_TC5299J_MIIBUS) & ED_TC5299J_MII_DATAIN) 1057 val++; 1058 ed_nic_outb(sc, ED_TC5299J_MIIBUS, ED_TC5299J_MII_DIROUT); 1059 } 1060 1061 /* Restore prior page */ 1062 ed_nic_outb(sc, ED_P0_CR, cr); 1063 return val; 1064} 1065 1066/* 1067 * MII bus support routines. 1068 */ 1069static int 1070ed_miibus_readreg(device_t dev, int phy, int reg) 1071{ 1072 struct ed_softc *sc; 1073 int failed, val; 1074 1075 sc = device_get_softc(dev); 1076 /* 1077 * The AX88790 has an interesting quirk. It has an internal phy that 1078 * needs a special bit set to access, but can also have additional 1079 * external PHYs set for things like HomeNET media. When accessing 1080 * the internal PHY, a bit has to be set, when accessing the external 1081 * PHYs, it must be clear. See Errata 1, page 51, in the AX88790 1082 * datasheet for more details. 1083 * 1084 * Also, PHYs above 16 appear to be phantoms on some cards, but not 1085 * others. Registers read for this are often the same as prior values 1086 * read. Filter all register requests to 17-31. 1087 * 1088 * I can't explain it, since I don't have the DL100xx data sheets, but 1089 * the DL100xx chips do 13-bits before the 'ACK' but, but the AX88x90 1090 * chips have 14. The linux pcnet and axnet drivers confirm this. 1091 */ 1092 if (sc->chip_type == ED_CHIP_TYPE_AX88790) { 1093 if (phy > 0x10) 1094 return (0); 1095 if (phy == 0x10) 1096 ed_asic_outb(sc, ED_AX88X90_GPIO, 1097 ED_AX88X90_GPIO_INT_PHY); 1098 else 1099 ed_asic_outb(sc, ED_AX88X90_GPIO, 0); 1100 } 1101 1102 (*sc->mii_writebits)(sc, 0xffffffff, 32); 1103 (*sc->mii_writebits)(sc, ED_MII_STARTDELIM, ED_MII_STARTDELIM_BITS); 1104 (*sc->mii_writebits)(sc, ED_MII_READOP, ED_MII_OP_BITS); 1105 (*sc->mii_writebits)(sc, phy, ED_MII_PHY_BITS); 1106 (*sc->mii_writebits)(sc, reg, ED_MII_REG_BITS); 1107 if (sc->chip_type == ED_CHIP_TYPE_AX88790 || 1108 sc->chip_type == ED_CHIP_TYPE_AX88190) 1109 (*sc->mii_readbits)(sc, ED_MII_ACK_BITS); 1110 failed = (*sc->mii_readbits)(sc, ED_MII_ACK_BITS); 1111 val = (*sc->mii_readbits)(sc, ED_MII_DATA_BITS); 1112 (*sc->mii_writebits)(sc, ED_MII_IDLE, ED_MII_IDLE_BITS); 1113/* printf("Reading phy %d reg %#x returning %#x (valid %d)\n", phy, reg, val, !failed); */ 1114 return (failed ? 0 : val); 1115} 1116 1117static int 1118ed_miibus_writereg(device_t dev, int phy, int reg, int data) 1119{ 1120 struct ed_softc *sc; 1121 1122/* printf("Writing phy %d reg %#x data %#x\n", phy, reg, data); */ 1123 sc = device_get_softc(dev); 1124 /* See ed_miibus_readreg for details */ 1125 if (sc->chip_type == ED_CHIP_TYPE_AX88790) { 1126 if (phy > 0x10) 1127 return (0); 1128 if (phy == 0x10) 1129 ed_asic_outb(sc, ED_AX88X90_GPIO, 1130 ED_AX88X90_GPIO_INT_PHY); 1131 else 1132 ed_asic_outb(sc, ED_AX88X90_GPIO, 0); 1133 } 1134 (*sc->mii_writebits)(sc, 0xffffffff, 32); 1135 (*sc->mii_writebits)(sc, ED_MII_STARTDELIM, ED_MII_STARTDELIM_BITS); 1136 (*sc->mii_writebits)(sc, ED_MII_WRITEOP, ED_MII_OP_BITS); 1137 (*sc->mii_writebits)(sc, phy, ED_MII_PHY_BITS); 1138 (*sc->mii_writebits)(sc, reg, ED_MII_REG_BITS); 1139 (*sc->mii_writebits)(sc, ED_MII_TURNAROUND, ED_MII_TURNAROUND_BITS); 1140 (*sc->mii_writebits)(sc, data, ED_MII_DATA_BITS); 1141 (*sc->mii_writebits)(sc, ED_MII_IDLE, ED_MII_IDLE_BITS); 1142 return (0); 1143} 1144 1145static int 1146ed_ifmedia_upd(struct ifnet *ifp) 1147{ 1148 struct ed_softc *sc; 1149 int error; 1150 1151 sc = ifp->if_softc; 1152 if (sc->miibus == NULL) 1153 return (ENXIO); 1154 ED_LOCK(sc); 1155 error = ed_pccard_kick_phy(sc); 1156 ED_UNLOCK(sc); 1157 return (error); 1158} 1159 1160static void 1161ed_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr) 1162{ 1163 struct ed_softc *sc; 1164 struct mii_data *mii; 1165 1166 sc = ifp->if_softc; 1167 if (sc->miibus == NULL) 1168 return; 1169 1170 mii = device_get_softc(sc->miibus); 1171 mii_pollstat(mii); 1172 ifmr->ifm_active = mii->mii_media_active; 1173 ifmr->ifm_status = mii->mii_media_status; 1174} 1175 1176static void 1177ed_child_detached(device_t dev, device_t child) 1178{ 1179 struct ed_softc *sc; 1180 1181 sc = device_get_softc(dev); 1182 if (child == sc->miibus) 1183 sc->miibus = NULL; 1184} 1185 1186static void 1187ed_pccard_tick(struct ed_softc *sc) 1188{ 1189 struct mii_data *mii; 1190 int media = 0; 1191 1192 ED_ASSERT_LOCKED(sc); 1193 if (sc->miibus != NULL) { 1194 mii = device_get_softc(sc->miibus); 1195 media = mii->mii_media_status; 1196 mii_tick(mii); 1197 if (mii->mii_media_status & IFM_ACTIVE && 1198 media != mii->mii_media_status) { 1199 if (sc->chip_type == ED_CHIP_TYPE_DL10022) { 1200 ed_asic_outb(sc, ED_DL10022_DIAG, 1201 (mii->mii_media_active & IFM_FDX) ? 1202 ED_DL10022_COLLISON_DIS : 0); 1203#ifdef notyet 1204 } else if (sc->chip_type == ED_CHIP_TYPE_DL10019) { 1205 write_asic(sc, ED_DL10019_MAGIC, 1206 (mii->mii_media_active & IFM_FDX) ? 1207 DL19FDUPLX : 0); 1208#endif 1209 } 1210 } 1211 1212 } 1213} 1214 1215static device_method_t ed_pccard_methods[] = { 1216 /* Device interface */ 1217 DEVMETHOD(device_probe, ed_pccard_probe), 1218 DEVMETHOD(device_attach, ed_pccard_attach), 1219 DEVMETHOD(device_detach, ed_detach), 1220 1221 /* Bus interface */ 1222 DEVMETHOD(bus_child_detached, ed_child_detached), 1223 1224 /* MII interface */ 1225 DEVMETHOD(miibus_readreg, ed_miibus_readreg), 1226 DEVMETHOD(miibus_writereg, ed_miibus_writereg), 1227 1228 { 0, 0 } 1229}; 1230 1231static driver_t ed_pccard_driver = { 1232 "ed", 1233 ed_pccard_methods, 1234 sizeof(struct ed_softc) 1235}; 1236 1237DRIVER_MODULE(ed, pccard, ed_pccard_driver, ed_devclass, 0, 0); 1238DRIVER_MODULE(miibus, ed, miibus_driver, miibus_devclass, 0, 0); 1239MODULE_DEPEND(ed, miibus, 1, 1, 1); 1240MODULE_DEPEND(ed, ether, 1, 1, 1); 1241