1//===-- llvm/CallingConvLower.h - Calling Conventions -----------*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file declares the CCState and CCValAssign classes, used for lowering
11// and implementing calling conventions.
12//
13//===----------------------------------------------------------------------===//
14
15#ifndef LLVM_CODEGEN_CALLINGCONVLOWER_H
16#define LLVM_CODEGEN_CALLINGCONVLOWER_H
17
18#include "llvm/ADT/SmallVector.h"
19#include "llvm/CodeGen/MachineFrameInfo.h"
20#include "llvm/CodeGen/MachineFunction.h"
21#include "llvm/CodeGen/ValueTypes.h"
22#include "llvm/IR/CallingConv.h"
23#include "llvm/Target/TargetCallingConv.h"
24
25namespace llvm {
26  class TargetRegisterInfo;
27  class TargetMachine;
28  class CCState;
29
30/// CCValAssign - Represent assignment of one arg/retval to a location.
31class CCValAssign {
32public:
33  enum LocInfo {
34    Full,   // The value fills the full location.
35    SExt,   // The value is sign extended in the location.
36    ZExt,   // The value is zero extended in the location.
37    AExt,   // The value is extended with undefined upper bits.
38    BCvt,   // The value is bit-converted in the location.
39    VExt,   // The value is vector-widened in the location.
40            // FIXME: Not implemented yet. Code that uses AExt to mean
41            // vector-widen should be fixed to use VExt instead.
42    Indirect // The location contains pointer to the value.
43    // TODO: a subset of the value is in the location.
44  };
45private:
46  /// ValNo - This is the value number begin assigned (e.g. an argument number).
47  unsigned ValNo;
48
49  /// Loc is either a stack offset or a register number.
50  unsigned Loc;
51
52  /// isMem - True if this is a memory loc, false if it is a register loc.
53  unsigned isMem : 1;
54
55  /// isCustom - True if this arg/retval requires special handling.
56  unsigned isCustom : 1;
57
58  /// Information about how the value is assigned.
59  LocInfo HTP : 6;
60
61  /// ValVT - The type of the value being assigned.
62  MVT ValVT;
63
64  /// LocVT - The type of the location being assigned to.
65  MVT LocVT;
66public:
67
68  static CCValAssign getReg(unsigned ValNo, MVT ValVT,
69                            unsigned RegNo, MVT LocVT,
70                            LocInfo HTP) {
71    CCValAssign Ret;
72    Ret.ValNo = ValNo;
73    Ret.Loc = RegNo;
74    Ret.isMem = false;
75    Ret.isCustom = false;
76    Ret.HTP = HTP;
77    Ret.ValVT = ValVT;
78    Ret.LocVT = LocVT;
79    return Ret;
80  }
81
82  static CCValAssign getCustomReg(unsigned ValNo, MVT ValVT,
83                                  unsigned RegNo, MVT LocVT,
84                                  LocInfo HTP) {
85    CCValAssign Ret;
86    Ret = getReg(ValNo, ValVT, RegNo, LocVT, HTP);
87    Ret.isCustom = true;
88    return Ret;
89  }
90
91  static CCValAssign getMem(unsigned ValNo, MVT ValVT,
92                            unsigned Offset, MVT LocVT,
93                            LocInfo HTP) {
94    CCValAssign Ret;
95    Ret.ValNo = ValNo;
96    Ret.Loc = Offset;
97    Ret.isMem = true;
98    Ret.isCustom = false;
99    Ret.HTP = HTP;
100    Ret.ValVT = ValVT;
101    Ret.LocVT = LocVT;
102    return Ret;
103  }
104
105  static CCValAssign getCustomMem(unsigned ValNo, MVT ValVT,
106                                  unsigned Offset, MVT LocVT,
107                                  LocInfo HTP) {
108    CCValAssign Ret;
109    Ret = getMem(ValNo, ValVT, Offset, LocVT, HTP);
110    Ret.isCustom = true;
111    return Ret;
112  }
113
114  unsigned getValNo() const { return ValNo; }
115  MVT getValVT() const { return ValVT; }
116
117  bool isRegLoc() const { return !isMem; }
118  bool isMemLoc() const { return isMem; }
119
120  bool needsCustom() const { return isCustom; }
121
122  unsigned getLocReg() const { assert(isRegLoc()); return Loc; }
123  unsigned getLocMemOffset() const { assert(isMemLoc()); return Loc; }
124  MVT getLocVT() const { return LocVT; }
125
126  LocInfo getLocInfo() const { return HTP; }
127  bool isExtInLoc() const {
128    return (HTP == AExt || HTP == SExt || HTP == ZExt);
129  }
130
131};
132
133/// CCAssignFn - This function assigns a location for Val, updating State to
134/// reflect the change.  It returns 'true' if it failed to handle Val.
135typedef bool CCAssignFn(unsigned ValNo, MVT ValVT,
136                        MVT LocVT, CCValAssign::LocInfo LocInfo,
137                        ISD::ArgFlagsTy ArgFlags, CCState &State);
138
139/// CCCustomFn - This function assigns a location for Val, possibly updating
140/// all args to reflect changes and indicates if it handled it. It must set
141/// isCustom if it handles the arg and returns true.
142typedef bool CCCustomFn(unsigned &ValNo, MVT &ValVT,
143                        MVT &LocVT, CCValAssign::LocInfo &LocInfo,
144                        ISD::ArgFlagsTy &ArgFlags, CCState &State);
145
146/// ParmContext - This enum tracks whether calling convention lowering is in
147/// the context of prologue or call generation. Not all backends make use of
148/// this information.
149typedef enum { Unknown, Prologue, Call } ParmContext;
150
151/// CCState - This class holds information needed while lowering arguments and
152/// return values.  It captures which registers are already assigned and which
153/// stack slots are used.  It provides accessors to allocate these values.
154class CCState {
155private:
156  CallingConv::ID CallingConv;
157  bool IsVarArg;
158  MachineFunction &MF;
159  const TargetMachine &TM;
160  const TargetRegisterInfo &TRI;
161  SmallVector<CCValAssign, 16> &Locs;
162  LLVMContext &Context;
163
164  unsigned StackOffset;
165  SmallVector<uint32_t, 16> UsedRegs;
166
167  // ByValInfo and SmallVector<ByValInfo, 4> ByValRegs:
168  //
169  // Vector of ByValInfo instances (ByValRegs) is introduced for byval registers
170  // tracking.
171  // Or, in another words it tracks byval parameters that are stored in
172  // general purpose registers.
173  //
174  // For 4 byte stack alignment,
175  // instance index means byval parameter number in formal
176  // arguments set. Assume, we have some "struct_type" with size = 4 bytes,
177  // then, for function "foo":
178  //
179  // i32 foo(i32 %p, %struct_type* %r, i32 %s, %struct_type* %t)
180  //
181  // ByValRegs[0] describes how "%r" is stored (Begin == r1, End == r2)
182  // ByValRegs[1] describes how "%t" is stored (Begin == r3, End == r4).
183  //
184  // In case of 8 bytes stack alignment,
185  // ByValRegs may also contain information about wasted registers.
186  // In function shown above, r3 would be wasted according to AAPCS rules.
187  // And in that case ByValRegs[1].Waste would be "true".
188  // ByValRegs vector size still would be 2,
189  // while "%t" goes to the stack: it wouldn't be described in ByValRegs.
190  //
191  // Supposed use-case for this collection:
192  // 1. Initially ByValRegs is empty, InRegsParamsProceed is 0.
193  // 2. HandleByVal fillups ByValRegs.
194  // 3. Argument analysis (LowerFormatArguments, for example). After
195  // some byval argument was analyzed, InRegsParamsProceed is increased.
196  struct ByValInfo {
197    ByValInfo(unsigned B, unsigned E, bool IsWaste = false) :
198      Begin(B), End(E), Waste(IsWaste) {}
199    // First register allocated for current parameter.
200    unsigned Begin;
201
202    // First after last register allocated for current parameter.
203    unsigned End;
204
205    // Means that current range of registers doesn't belong to any
206    // parameters. It was wasted due to stack alignment rules.
207    // For more information see:
208    // AAPCS, 5.5 Parameter Passing, Stage C, C.3.
209    bool Waste;
210  };
211  SmallVector<ByValInfo, 4 > ByValRegs;
212
213  // InRegsParamsProceed - shows how many instances of ByValRegs was proceed
214  // during argument analysis.
215  unsigned InRegsParamsProceed;
216
217protected:
218  ParmContext CallOrPrologue;
219
220public:
221  CCState(CallingConv::ID CC, bool isVarArg, MachineFunction &MF,
222          const TargetMachine &TM, SmallVector<CCValAssign, 16> &locs,
223          LLVMContext &C);
224
225  void addLoc(const CCValAssign &V) {
226    Locs.push_back(V);
227  }
228
229  LLVMContext &getContext() const { return Context; }
230  const TargetMachine &getTarget() const { return TM; }
231  MachineFunction &getMachineFunction() const { return MF; }
232  CallingConv::ID getCallingConv() const { return CallingConv; }
233  bool isVarArg() const { return IsVarArg; }
234
235  unsigned getNextStackOffset() const { return StackOffset; }
236
237  /// isAllocated - Return true if the specified register (or an alias) is
238  /// allocated.
239  bool isAllocated(unsigned Reg) const {
240    return UsedRegs[Reg/32] & (1 << (Reg&31));
241  }
242
243  /// AnalyzeFormalArguments - Analyze an array of argument values,
244  /// incorporating info about the formals into this state.
245  void AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins,
246                              CCAssignFn Fn);
247
248  /// AnalyzeReturn - Analyze the returned values of a return,
249  /// incorporating info about the result values into this state.
250  void AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
251                     CCAssignFn Fn);
252
253  /// CheckReturn - Analyze the return values of a function, returning
254  /// true if the return can be performed without sret-demotion, and
255  /// false otherwise.
256  bool CheckReturn(const SmallVectorImpl<ISD::OutputArg> &ArgsFlags,
257                   CCAssignFn Fn);
258
259  /// AnalyzeCallOperands - Analyze the outgoing arguments to a call,
260  /// incorporating info about the passed values into this state.
261  void AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
262                           CCAssignFn Fn);
263
264  /// AnalyzeCallOperands - Same as above except it takes vectors of types
265  /// and argument flags.
266  void AnalyzeCallOperands(SmallVectorImpl<MVT> &ArgVTs,
267                           SmallVectorImpl<ISD::ArgFlagsTy> &Flags,
268                           CCAssignFn Fn);
269
270  /// AnalyzeCallResult - Analyze the return values of a call,
271  /// incorporating info about the passed values into this state.
272  void AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins,
273                         CCAssignFn Fn);
274
275  /// AnalyzeCallResult - Same as above except it's specialized for calls which
276  /// produce a single value.
277  void AnalyzeCallResult(MVT VT, CCAssignFn Fn);
278
279  /// getFirstUnallocated - Return the first unallocated register in the set, or
280  /// NumRegs if they are all allocated.
281  unsigned getFirstUnallocated(const uint16_t *Regs, unsigned NumRegs) const {
282    for (unsigned i = 0; i != NumRegs; ++i)
283      if (!isAllocated(Regs[i]))
284        return i;
285    return NumRegs;
286  }
287
288  /// AllocateReg - Attempt to allocate one register.  If it is not available,
289  /// return zero.  Otherwise, return the register, marking it and any aliases
290  /// as allocated.
291  unsigned AllocateReg(unsigned Reg) {
292    if (isAllocated(Reg)) return 0;
293    MarkAllocated(Reg);
294    return Reg;
295  }
296
297  /// Version of AllocateReg with extra register to be shadowed.
298  unsigned AllocateReg(unsigned Reg, unsigned ShadowReg) {
299    if (isAllocated(Reg)) return 0;
300    MarkAllocated(Reg);
301    MarkAllocated(ShadowReg);
302    return Reg;
303  }
304
305  /// AllocateReg - Attempt to allocate one of the specified registers.  If none
306  /// are available, return zero.  Otherwise, return the first one available,
307  /// marking it and any aliases as allocated.
308  unsigned AllocateReg(const uint16_t *Regs, unsigned NumRegs) {
309    unsigned FirstUnalloc = getFirstUnallocated(Regs, NumRegs);
310    if (FirstUnalloc == NumRegs)
311      return 0;    // Didn't find the reg.
312
313    // Mark the register and any aliases as allocated.
314    unsigned Reg = Regs[FirstUnalloc];
315    MarkAllocated(Reg);
316    return Reg;
317  }
318
319  /// Version of AllocateReg with list of registers to be shadowed.
320  unsigned AllocateReg(const uint16_t *Regs, const uint16_t *ShadowRegs,
321                       unsigned NumRegs) {
322    unsigned FirstUnalloc = getFirstUnallocated(Regs, NumRegs);
323    if (FirstUnalloc == NumRegs)
324      return 0;    // Didn't find the reg.
325
326    // Mark the register and any aliases as allocated.
327    unsigned Reg = Regs[FirstUnalloc], ShadowReg = ShadowRegs[FirstUnalloc];
328    MarkAllocated(Reg);
329    MarkAllocated(ShadowReg);
330    return Reg;
331  }
332
333  /// AllocateStack - Allocate a chunk of stack space with the specified size
334  /// and alignment.
335  unsigned AllocateStack(unsigned Size, unsigned Align) {
336    assert(Align && ((Align-1) & Align) == 0); // Align is power of 2.
337    StackOffset = ((StackOffset + Align-1) & ~(Align-1));
338    unsigned Result = StackOffset;
339    StackOffset += Size;
340    MF.getFrameInfo()->ensureMaxAlignment(Align);
341    return Result;
342  }
343
344  /// Version of AllocateStack with extra register to be shadowed.
345  unsigned AllocateStack(unsigned Size, unsigned Align, unsigned ShadowReg) {
346    MarkAllocated(ShadowReg);
347    return AllocateStack(Size, Align);
348  }
349
350  // HandleByVal - Allocate a stack slot large enough to pass an argument by
351  // value. The size and alignment information of the argument is encoded in its
352  // parameter attribute.
353  void HandleByVal(unsigned ValNo, MVT ValVT,
354                   MVT LocVT, CCValAssign::LocInfo LocInfo,
355                   int MinSize, int MinAlign, ISD::ArgFlagsTy ArgFlags);
356
357  // Returns count of byval arguments that are to be stored (even partly)
358  // in registers.
359  unsigned getInRegsParamsCount() const { return ByValRegs.size(); }
360
361  // Returns count of byval in-regs arguments proceed.
362  unsigned getInRegsParamsProceed() const { return InRegsParamsProceed; }
363
364  // Get information about N-th byval parameter that is stored in registers.
365  // Here "ByValParamIndex" is N.
366  void getInRegsParamInfo(unsigned InRegsParamRecordIndex,
367                          unsigned& BeginReg, unsigned& EndReg) const {
368    assert(InRegsParamRecordIndex < ByValRegs.size() &&
369           "Wrong ByVal parameter index");
370
371    const ByValInfo& info = ByValRegs[InRegsParamRecordIndex];
372    BeginReg = info.Begin;
373    EndReg = info.End;
374  }
375
376  // Add information about parameter that is kept in registers.
377  void addInRegsParamInfo(unsigned RegBegin, unsigned RegEnd) {
378    ByValRegs.push_back(ByValInfo(RegBegin, RegEnd));
379  }
380
381  // Goes either to next byval parameter (excluding "waste" record), or
382  // to the end of collection.
383  // Returns false, if end is reached.
384  bool nextInRegsParam() {
385    unsigned e = ByValRegs.size();
386    if (InRegsParamsProceed < e)
387      ++InRegsParamsProceed;
388    return InRegsParamsProceed < e;
389  }
390
391  // Clear byval registers tracking info.
392  void clearByValRegsInfo() {
393    InRegsParamsProceed = 0;
394    ByValRegs.clear();
395  }
396
397  ParmContext getCallOrPrologue() const { return CallOrPrologue; }
398
399private:
400  /// MarkAllocated - Mark a register and all of its aliases as allocated.
401  void MarkAllocated(unsigned Reg);
402};
403
404
405
406} // end namespace llvm
407
408#endif
409