tc-i386.h revision 94546
133965Sjdp/* tc-i386.h -- Header file for tc-i386.c 278838Sobrien Copyright 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 378838Sobrien 2001 478838Sobrien Free Software Foundation, Inc. 533965Sjdp 633965Sjdp This file is part of GAS, the GNU Assembler. 733965Sjdp 833965Sjdp GAS is free software; you can redistribute it and/or modify 933965Sjdp it under the terms of the GNU General Public License as published by 1033965Sjdp the Free Software Foundation; either version 2, or (at your option) 1133965Sjdp any later version. 1233965Sjdp 1333965Sjdp GAS is distributed in the hope that it will be useful, 1433965Sjdp but WITHOUT ANY WARRANTY; without even the implied warranty of 1533965Sjdp MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 1633965Sjdp GNU General Public License for more details. 1733965Sjdp 1833965Sjdp You should have received a copy of the GNU General Public License 1933965Sjdp along with GAS; see the file COPYING. If not, write to the Free 2033965Sjdp Software Foundation, 59 Temple Place - Suite 330, Boston, MA 2133965Sjdp 02111-1307, USA. */ 2233965Sjdp 2377312Sobrien 2460518Sobrien/* $FreeBSD: head/contrib/binutils/gas/config/tc-i386.h 94546 2002-04-12 19:54:03Z obrien $ */ 2560518Sobrien 2677312Sobrien 2733965Sjdp#ifndef TC_I386 2833965Sjdp#define TC_I386 1 2933965Sjdp 3033965Sjdp#ifdef ANSI_PROTOTYPES 3133965Sjdpstruct fix; 3233965Sjdp#endif 3333965Sjdp 3433965Sjdp#define TARGET_BYTES_BIG_ENDIAN 0 3533965Sjdp 3633965Sjdp#ifdef TE_LYNX 3733965Sjdp#define TARGET_FORMAT "coff-i386-lynx" 3833965Sjdp#endif 3933965Sjdp 4033965Sjdp#ifdef BFD_ASSEMBLER 4133965Sjdp/* This is used to determine relocation types in tc-i386.c. The first 4233965Sjdp parameter is the current relocation type, the second one is the desired 4333965Sjdp type. The idea is that if the original type is already some kind of PIC 4433965Sjdp relocation, we leave it alone, otherwise we give it the desired type */ 4533965Sjdp 4633965Sjdp#define tc_fix_adjustable(X) tc_i386_fix_adjustable(X) 4733965Sjdpextern int tc_i386_fix_adjustable PARAMS ((struct fix *)); 4833965Sjdp 4977312Sobrien#if (defined (OBJ_MAYBE_ELF) || defined (OBJ_ELF) || defined (OBJ_MAYBE_COFF) || defined (OBJ_COFF)) && !defined (TE_PE) 5077312Sobrien/* This arranges for gas/write.c to not apply a relocation if 5177312Sobrien tc_fix_adjustable() says it is not adjustable. 5277312Sobrien The "! symbol_used_in_reloc_p" test is there specifically to cover 5377312Sobrien the case of non-global symbols in linkonce sections. It's the 5477312Sobrien generally correct thing to do though; If a reloc is going to be 5577312Sobrien emitted against a symbol then we don't want to adjust the fixup by 5677312Sobrien applying the reloc during assembly. The reloc will be applied by 5777312Sobrien the linker during final link. */ 5877312Sobrien#define TC_FIX_ADJUSTABLE(fixP) \ 5977312Sobrien (! symbol_used_in_reloc_p ((fixP)->fx_addsy) && tc_fix_adjustable (fixP)) 6077312Sobrien#endif 6133965Sjdp 6233965Sjdp/* This expression evaluates to false if the relocation is for a local object 6333965Sjdp for which we still want to do the relocation at runtime. True if we 6433965Sjdp are willing to perform this relocation while building the .o file. 6533965Sjdp This is only used for pcrel relocations, so GOTOFF does not need to be 6633965Sjdp checked here. I am not sure if some of the others are ever used with 6777312Sobrien pcrel, but it is easier to be safe than sorry. */ 6833965Sjdp 6960518Sobrien#define TC_RELOC_RTSYM_LOC_FIXUP(FIX) \ 7060518Sobrien ((FIX)->fx_r_type != BFD_RELOC_386_PLT32 \ 7160518Sobrien && (FIX)->fx_r_type != BFD_RELOC_386_GOT32 \ 7260518Sobrien && (FIX)->fx_r_type != BFD_RELOC_386_GOTPC \ 7360518Sobrien && ((FIX)->fx_addsy == NULL \ 7460518Sobrien || (! S_IS_EXTERNAL ((FIX)->fx_addsy) \ 7560518Sobrien && ! S_IS_WEAK ((FIX)->fx_addsy) \ 7660518Sobrien && S_IS_DEFINED ((FIX)->fx_addsy) \ 7760518Sobrien && ! S_IS_COMMON ((FIX)->fx_addsy)))) 7833965Sjdp 7933965Sjdp#define TARGET_ARCH bfd_arch_i386 8077312Sobrien#define TARGET_MACH (i386_mach ()) 8177312Sobrienextern unsigned long i386_mach PARAMS ((void)); 8233965Sjdp 8333973Sjdp#ifdef TE_FreeBSD 8460518Sobrien#define AOUT_TARGET_FORMAT "a.out-i386-freebsd" 8533973Sjdp#endif 8633965Sjdp#ifdef TE_NetBSD 8760518Sobrien#define AOUT_TARGET_FORMAT "a.out-i386-netbsd" 8833965Sjdp#endif 8933965Sjdp#ifdef TE_386BSD 9060518Sobrien#define AOUT_TARGET_FORMAT "a.out-i386-bsd" 9133965Sjdp#endif 9233965Sjdp#ifdef TE_LINUX 9360518Sobrien#define AOUT_TARGET_FORMAT "a.out-i386-linux" 9433965Sjdp#endif 9533965Sjdp#ifdef TE_Mach 9660518Sobrien#define AOUT_TARGET_FORMAT "a.out-mach3" 9733965Sjdp#endif 9833965Sjdp#ifdef TE_DYNIX 9960518Sobrien#define AOUT_TARGET_FORMAT "a.out-i386-dynix" 10033965Sjdp#endif 10160518Sobrien#ifndef AOUT_TARGET_FORMAT 10260518Sobrien#define AOUT_TARGET_FORMAT "a.out-i386" 10333965Sjdp#endif 10433965Sjdp 10577312Sobrien#if ((defined (OBJ_MAYBE_COFF) && defined (OBJ_MAYBE_AOUT)) \ 10677312Sobrien || defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)) 10760518Sobrienextern const char *i386_target_format PARAMS ((void)); 10860518Sobrien#define TARGET_FORMAT i386_target_format () 10960518Sobrien#else 11033965Sjdp#ifdef OBJ_ELF 11133965Sjdp#define TARGET_FORMAT "elf32-i386" 11233965Sjdp#endif 11360518Sobrien#ifdef OBJ_AOUT 11460518Sobrien#define TARGET_FORMAT AOUT_TARGET_FORMAT 11533965Sjdp#endif 11633965Sjdp#endif 11733965Sjdp 11889868Sobrien#if (defined (OBJ_MAYBE_ELF) || defined (OBJ_ELF)) 11989868Sobrien#define md_end i386_elf_emit_arch_note 12089868Sobrienextern void i386_elf_emit_arch_note PARAMS ((void)); 12189868Sobrien#endif 12289868Sobrien 12333965Sjdp#else /* ! BFD_ASSEMBLER */ 12433965Sjdp 12533965Sjdp/* COFF STUFF */ 12633965Sjdp 12733965Sjdp#define COFF_MAGIC I386MAGIC 12833965Sjdp#define BFD_ARCH bfd_arch_i386 12933965Sjdp#define COFF_FLAGS F_AR32WR 13033965Sjdp#define TC_COUNT_RELOC(x) ((x)->fx_addsy || (x)->fx_r_type==7) 13133965Sjdp#define TC_COFF_FIX2RTYPE(fixP) tc_coff_fix2rtype(fixP) 13233965Sjdpextern short tc_coff_fix2rtype PARAMS ((struct fix *)); 13389868Sobrien#define TC_COFF_SIZEMACHDEP(frag) tc_coff_sizemachdep (frag) 13433965Sjdpextern int tc_coff_sizemachdep PARAMS ((fragS *frag)); 13560518Sobrien 13660518Sobrien#ifdef TE_GO32 13760518Sobrien/* DJGPP now expects some sections to be 2**4 aligned. */ 13860518Sobrien#define SUB_SEGMENT_ALIGN(SEG) \ 13960518Sobrien ((strcmp (obj_segment_name (SEG), ".text") == 0 \ 14060518Sobrien || strcmp (obj_segment_name (SEG), ".data") == 0 \ 14160518Sobrien || strcmp (obj_segment_name (SEG), ".bss") == 0 \ 14260518Sobrien || strncmp (obj_segment_name (SEG), ".gnu.linkonce.t", 15) == 0 \ 14360518Sobrien || strncmp (obj_segment_name (SEG), ".gnu.linkonce.d", 15) == 0 \ 14460518Sobrien || strncmp (obj_segment_name (SEG), ".gnu.linkonce.r", 15) == 0) \ 14560518Sobrien ? 4 \ 14660518Sobrien : 2) 14760518Sobrien#else 14833965Sjdp#define SUB_SEGMENT_ALIGN(SEG) 2 14960518Sobrien#endif 15060518Sobrien 15133965Sjdp#define TC_RVA_RELOC 7 15233965Sjdp/* Need this for PIC relocations */ 15333965Sjdp#define NEED_FX_R_TYPE 15433965Sjdp 15533965Sjdp#ifdef TE_386BSD 15633965Sjdp/* The BSDI linker apparently rejects objects with a machine type of 15733965Sjdp M_386 (100). */ 15833965Sjdp#define AOUT_MACHTYPE 0 15933965Sjdp#else 16033965Sjdp#define AOUT_MACHTYPE 100 16133965Sjdp#endif 16233965Sjdp 16333965Sjdp#undef REVERSE_SORT_RELOCS 16433965Sjdp 16533965Sjdp#endif /* ! BFD_ASSEMBLER */ 16633965Sjdp 16778838Sobrien#ifndef LEX_AT 16878838Sobrien#define TC_PARSE_CONS_EXPRESSION(EXP, NBYTES) x86_cons (EXP, NBYTES) 16978838Sobrienextern void x86_cons PARAMS ((expressionS *, int)); 17078838Sobrien 17178838Sobrien#define TC_CONS_FIX_NEW(FRAG,OFF,LEN,EXP) x86_cons_fix_new(FRAG, OFF, LEN, EXP) 17278838Sobrienextern void x86_cons_fix_new 17378838Sobrien PARAMS ((fragS *, unsigned int, unsigned int, expressionS *)); 17478838Sobrien#endif 17578838Sobrien 17660518Sobrien#define TC_FORCE_RELOCATION(fixp) tc_i386_force_relocation(fixp) 17760518Sobrienextern int tc_i386_force_relocation PARAMS ((struct fix *)); 17860518Sobrien 17933965Sjdp#ifdef BFD_ASSEMBLER 18033965Sjdp#define NO_RELOC BFD_RELOC_NONE 18133965Sjdp#else 18233965Sjdp#define NO_RELOC 0 18333965Sjdp#endif 18433965Sjdp#define tc_coff_symbol_emit_hook(a) ; /* not used */ 18533965Sjdp 18633965Sjdp#ifndef BFD_ASSEMBLER 18733965Sjdp#ifndef OBJ_AOUT 18833965Sjdp#ifndef TE_PE 18960518Sobrien#ifndef TE_GO32 19033965Sjdp/* Local labels starts with .L */ 19133965Sjdp#define LOCAL_LABEL(name) (name[0] == '.' \ 19233965Sjdp && (name[1] == 'L' || name[1] == 'X' || name[1] == '.')) 19333965Sjdp#endif 19433965Sjdp#endif 19533965Sjdp#endif 19660518Sobrien#endif 19733965Sjdp 19833965Sjdp#define LOCAL_LABELS_FB 1 19933965Sjdp 20033965Sjdp#define tc_aout_pre_write_hook(x) {;} /* not used */ 20133965Sjdp#define tc_crawl_symbol_chain(a) {;} /* not used */ 20233965Sjdp#define tc_headers_hook(a) {;} /* not used */ 20333965Sjdp 20460518Sobrienextern const char extra_symbol_chars[]; 20560518Sobrien#define tc_symbol_chars extra_symbol_chars 20660518Sobrien 20733965Sjdp#define MAX_OPERANDS 3 /* max operands per insn */ 20860518Sobrien#define MAX_IMMEDIATE_OPERANDS 2/* max immediates per insn (lcall, ljmp) */ 20960518Sobrien#define MAX_MEMORY_OPERANDS 2 /* max memory refs per insn (string ops) */ 21033965Sjdp 21160518Sobrien/* Prefixes will be emitted in the order defined below. 21260518Sobrien WAIT_PREFIX must be the first prefix since FWAIT is really is an 21377312Sobrien instruction, and so must come before any prefixes. */ 21460518Sobrien#define WAIT_PREFIX 0 21560518Sobrien#define LOCKREP_PREFIX 1 21660518Sobrien#define ADDR_PREFIX 2 21760518Sobrien#define DATA_PREFIX 3 21860518Sobrien#define SEG_PREFIX 4 21977312Sobrien#define REX_PREFIX 5 /* must come last. */ 22077312Sobrien#define MAX_PREFIXES 6 /* max prefixes per opcode */ 22160518Sobrien 22233965Sjdp/* we define the syntax here (modulo base,index,scale syntax) */ 22333965Sjdp#define REGISTER_PREFIX '%' 22433965Sjdp#define IMMEDIATE_PREFIX '$' 22533965Sjdp#define ABSOLUTE_PREFIX '*' 22633965Sjdp 22733965Sjdp#define TWO_BYTE_OPCODE_ESCAPE 0x0f 22833965Sjdp#define NOP_OPCODE (char) 0x90 22933965Sjdp 23033965Sjdp/* register numbers */ 23133965Sjdp#define EBP_REG_NUM 5 23233965Sjdp#define ESP_REG_NUM 4 23333965Sjdp 23433965Sjdp/* modrm_byte.regmem for twobyte escape */ 23533965Sjdp#define ESCAPE_TO_TWO_BYTE_ADDRESSING ESP_REG_NUM 23633965Sjdp/* index_base_byte.index for no index register addressing */ 23733965Sjdp#define NO_INDEX_REGISTER ESP_REG_NUM 23833965Sjdp/* index_base_byte.base for no base register addressing */ 23933965Sjdp#define NO_BASE_REGISTER EBP_REG_NUM 24060518Sobrien#define NO_BASE_REGISTER_16 6 24133965Sjdp 24260518Sobrien/* these are the instruction mnemonic suffixes. */ 24360518Sobrien#define WORD_MNEM_SUFFIX 'w' 24460518Sobrien#define BYTE_MNEM_SUFFIX 'b' 24560518Sobrien#define SHORT_MNEM_SUFFIX 's' 24660518Sobrien#define LONG_MNEM_SUFFIX 'l' 24777312Sobrien#define QWORD_MNEM_SUFFIX 'q' 24860518Sobrien/* Intel Syntax */ 24960518Sobrien#define LONG_DOUBLE_MNEM_SUFFIX 'x' 25033965Sjdp 25133965Sjdp/* modrm.mode = REGMEM_FIELD_HAS_REG when a register is in there */ 25233965Sjdp#define REGMEM_FIELD_HAS_REG 0x3/* always = 0x3 */ 25333965Sjdp#define REGMEM_FIELD_HAS_MEM (~REGMEM_FIELD_HAS_REG) 25433965Sjdp 25533965Sjdp#define END_OF_INSN '\0' 25633965Sjdp 25760518Sobrien/* Intel Syntax */ 25860518Sobrien/* Values 0-4 map onto scale factor */ 25960518Sobrien#define BYTE_PTR 0 26060518Sobrien#define WORD_PTR 1 26160518Sobrien#define DWORD_PTR 2 26260518Sobrien#define QWORD_PTR 3 26360518Sobrien#define XWORD_PTR 4 26460518Sobrien#define SHORT 5 26560518Sobrien#define OFFSET_FLAT 6 26660518Sobrien#define FLAT 7 26760518Sobrien#define NONE_FOUND 8 26860518Sobrien 26933965Sjdptypedef struct 27033965Sjdp{ 27133965Sjdp /* instruction name sans width suffix ("mov" for movl insns) */ 27233965Sjdp char *name; 27333965Sjdp 27433965Sjdp /* how many operands */ 27533965Sjdp unsigned int operands; 27633965Sjdp 27760518Sobrien /* base_opcode is the fundamental opcode byte without optional 27860518Sobrien prefix(es). */ 27933965Sjdp unsigned int base_opcode; 28033965Sjdp 28133965Sjdp /* extension_opcode is the 3 bit extension for group <n> insns. 28260518Sobrien This field is also used to store the 8-bit opcode suffix for the 28360518Sobrien AMD 3DNow! instructions. 28433965Sjdp If this template has no extension opcode (the usual case) use None */ 28560518Sobrien unsigned int extension_opcode; 28677312Sobrien#define None 0xffff /* If no extension_opcode is possible. */ 28733965Sjdp 28877312Sobrien /* cpu feature flags */ 28977312Sobrien unsigned int cpu_flags; 29077312Sobrien#define Cpu086 0x1 /* Any old cpu will do, 0 does the same */ 29177312Sobrien#define Cpu186 0x2 /* i186 or better required */ 29277312Sobrien#define Cpu286 0x4 /* i286 or better required */ 29377312Sobrien#define Cpu386 0x8 /* i386 or better required */ 29477312Sobrien#define Cpu486 0x10 /* i486 or better required */ 29577312Sobrien#define Cpu586 0x20 /* i585 or better required */ 29677312Sobrien#define Cpu686 0x40 /* i686 or better required */ 29777312Sobrien#define CpuP4 0x80 /* Pentium4 or better required */ 29877312Sobrien#define CpuK6 0x100 /* AMD K6 or better required*/ 29977312Sobrien#define CpuAthlon 0x200 /* AMD Athlon or better required*/ 30077312Sobrien#define CpuSledgehammer 0x400 /* Sledgehammer or better required */ 30177312Sobrien#define CpuMMX 0x800 /* MMX support required */ 30277312Sobrien#define CpuSSE 0x1000 /* Streaming SIMD extensions required */ 30377312Sobrien#define CpuSSE2 0x2000 /* Streaming SIMD extensions 2 required */ 30477312Sobrien#define Cpu3dnow 0x4000 /* 3dnow! support required */ 30577312Sobrien 30677312Sobrien /* These flags are set by gas depending on the flag_code. */ 30777312Sobrien#define Cpu64 0x4000000 /* 64bit support required */ 30877312Sobrien#define CpuNo64 0x8000000 /* Not supported in the 64bit mode */ 30977312Sobrien 31077312Sobrien /* The default value for unknown CPUs - enable all features to avoid problems. */ 31177312Sobrien#define CpuUnknownFlags (Cpu086|Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuP4|CpuSledgehammer|CpuMMX|CpuSSE|CpuSSE2|Cpu3dnow|CpuK6|CpuAthlon) 31277312Sobrien 31333965Sjdp /* the bits in opcode_modifier are used to generate the final opcode from 31433965Sjdp the base_opcode. These bits also are used to detect alternate forms of 31533965Sjdp the same instruction */ 31633965Sjdp unsigned int opcode_modifier; 31733965Sjdp 31833965Sjdp /* opcode_modifier bits: */ 31960518Sobrien#define W 0x1 /* set if operands can be words or dwords 32060518Sobrien encoded the canonical way */ 32160518Sobrien#define D 0x2 /* D = 0 if Reg --> Regmem; 32260518Sobrien D = 1 if Regmem --> Reg: MUST BE 0x2 */ 32360518Sobrien#define Modrm 0x4 32460518Sobrien#define FloatR 0x8 /* src/dest swap for floats: MUST BE 0x8 */ 32560518Sobrien#define ShortForm 0x10 /* register is in low 3 bits of opcode */ 32660518Sobrien#define FloatMF 0x20 /* FP insn memory format bit, sized by 0x4 */ 32777312Sobrien#define Jump 0x40 /* special case for jump insns. */ 32860518Sobrien#define JumpDword 0x80 /* call and jump */ 32960518Sobrien#define JumpByte 0x100 /* loop and jecxz */ 33033965Sjdp#define JumpInterSegment 0x200 /* special case for intersegment leaps/calls */ 33160518Sobrien#define FloatD 0x400 /* direction for float insns: MUST BE 0x400 */ 33260518Sobrien#define Seg2ShortForm 0x800 /* encoding of load segment reg insns */ 33377312Sobrien#define Seg3ShortForm 0x1000 /* fs/gs segment register insns. */ 33460518Sobrien#define Size16 0x2000 /* needs size prefix if in 32-bit mode */ 33560518Sobrien#define Size32 0x4000 /* needs size prefix if in 16-bit mode */ 33677312Sobrien#define Size64 0x8000 /* needs size prefix if in 16-bit mode */ 33777312Sobrien#define IgnoreSize 0x10000 /* instruction ignores operand size prefix */ 33877312Sobrien#define DefaultSize 0x20000 /* default insn size depends on mode */ 33977312Sobrien#define No_bSuf 0x40000 /* b suffix on instruction illegal */ 34077312Sobrien#define No_wSuf 0x80000 /* w suffix on instruction illegal */ 34177312Sobrien#define No_lSuf 0x100000 /* l suffix on instruction illegal */ 34277312Sobrien#define No_sSuf 0x200000 /* s suffix on instruction illegal */ 34377312Sobrien#define No_qSuf 0x400000 /* q suffix on instruction illegal */ 34477312Sobrien#define No_xSuf 0x800000 /* x suffix on instruction illegal */ 34577312Sobrien#define FWait 0x1000000 /* instruction needs FWAIT */ 34677312Sobrien#define IsString 0x2000000 /* quick test for string instructions */ 34777312Sobrien#define regKludge 0x4000000 /* fake an extra reg operand for clr, imul */ 34877312Sobrien#define IsPrefix 0x8000000 /* opcode is a prefix */ 34977312Sobrien#define ImmExt 0x10000000 /* instruction has extension in 8 bit imm */ 35077312Sobrien#define NoRex64 0x20000000 /* instruction don't need Rex64 prefix. */ 35177312Sobrien#define Rex64 0x40000000 /* instruction require Rex64 prefix. */ 35260518Sobrien#define Ugh 0x80000000 /* deprecated fp insn, gets a warning */ 35333965Sjdp 35433965Sjdp /* operand_types[i] describes the type of operand i. This is made 35533965Sjdp by OR'ing together all of the possible type masks. (e.g. 35633965Sjdp 'operand_types[i] = Reg|Imm' specifies that operand i can be 35777312Sobrien either a register or an immediate operand. */ 35833965Sjdp unsigned int operand_types[3]; 35977312Sobrien 36077312Sobrien /* operand_types[i] bits */ 36177312Sobrien /* register */ 36277312Sobrien#define Reg8 0x1 /* 8 bit reg */ 36377312Sobrien#define Reg16 0x2 /* 16 bit reg */ 36477312Sobrien#define Reg32 0x4 /* 32 bit reg */ 36577312Sobrien#define Reg64 0x8 /* 64 bit reg */ 36677312Sobrien /* immediate */ 36777312Sobrien#define Imm8 0x10 /* 8 bit immediate */ 36877312Sobrien#define Imm8S 0x20 /* 8 bit immediate sign extended */ 36977312Sobrien#define Imm16 0x40 /* 16 bit immediate */ 37077312Sobrien#define Imm32 0x80 /* 32 bit immediate */ 37177312Sobrien#define Imm32S 0x100 /* 32 bit immediate sign extended */ 37277312Sobrien#define Imm64 0x200 /* 64 bit immediate */ 37377312Sobrien#define Imm1 0x400 /* 1 bit immediate */ 37477312Sobrien /* memory */ 37577312Sobrien#define BaseIndex 0x800 37677312Sobrien /* Disp8,16,32 are used in different ways, depending on the 37777312Sobrien instruction. For jumps, they specify the size of the PC relative 37877312Sobrien displacement, for baseindex type instructions, they specify the 37977312Sobrien size of the offset relative to the base register, and for memory 38077312Sobrien offset instructions such as `mov 1234,%al' they specify the size of 38177312Sobrien the offset relative to the segment base. */ 38277312Sobrien#define Disp8 0x1000 /* 8 bit displacement */ 38377312Sobrien#define Disp16 0x2000 /* 16 bit displacement */ 38477312Sobrien#define Disp32 0x4000 /* 32 bit displacement */ 38577312Sobrien#define Disp32S 0x8000 /* 32 bit signed displacement */ 38677312Sobrien#define Disp64 0x10000 /* 64 bit displacement */ 38777312Sobrien /* specials */ 38877312Sobrien#define InOutPortReg 0x20000 /* register to hold in/out port addr = dx */ 38977312Sobrien#define ShiftCount 0x40000 /* register to hold shift cound = cl */ 39077312Sobrien#define Control 0x80000 /* Control register */ 39177312Sobrien#define Debug 0x100000 /* Debug register */ 39277312Sobrien#define Test 0x200000 /* Test register */ 39377312Sobrien#define FloatReg 0x400000 /* Float register */ 39477312Sobrien#define FloatAcc 0x800000 /* Float stack top %st(0) */ 39577312Sobrien#define SReg2 0x1000000 /* 2 bit segment register */ 39677312Sobrien#define SReg3 0x2000000 /* 3 bit segment register */ 39777312Sobrien#define Acc 0x4000000 /* Accumulator %al or %ax or %eax */ 39877312Sobrien#define JumpAbsolute 0x8000000 39977312Sobrien#define RegMMX 0x10000000 /* MMX register */ 40077312Sobrien#define RegXMM 0x20000000 /* XMM registers in PIII */ 40177312Sobrien#define EsSeg 0x40000000 /* String insn operand with fixed es segment */ 40277312Sobrien 40377312Sobrien /* InvMem is for instructions with a modrm byte that only allow a 40477312Sobrien general register encoding in the i.tm.mode and i.tm.regmem fields, 40577312Sobrien eg. control reg moves. They really ought to support a memory form, 40677312Sobrien but don't, so we add an InvMem flag to the register operand to 40777312Sobrien indicate that it should be encoded in the i.tm.regmem field. */ 40877312Sobrien#define InvMem 0x80000000 40977312Sobrien 41077312Sobrien#define Reg (Reg8|Reg16|Reg32|Reg64) /* gen'l register */ 41177312Sobrien#define WordReg (Reg16|Reg32|Reg64) 41277312Sobrien#define ImplicitRegister (InOutPortReg|ShiftCount|Acc|FloatAcc) 41377312Sobrien#define Imm (Imm8|Imm8S|Imm16|Imm32S|Imm32|Imm64) /* gen'l immediate */ 41477312Sobrien#define EncImm (Imm8|Imm16|Imm32|Imm32S) /* Encodable gen'l immediate */ 41577312Sobrien#define Disp (Disp8|Disp16|Disp32|Disp32S|Disp64) /* General displacement */ 41677312Sobrien#define AnyMem (Disp8|Disp16|Disp32|Disp32S|BaseIndex|InvMem) /* General memory */ 41777312Sobrien /* The following aliases are defined because the opcode table 41877312Sobrien carefully specifies the allowed memory types for each instruction. 41977312Sobrien At the moment we can only tell a memory reference size by the 42077312Sobrien instruction suffix, so there's not much point in defining Mem8, 42177312Sobrien Mem16, Mem32 and Mem64 opcode modifiers - We might as well just use 42277312Sobrien the suffix directly to check memory operands. */ 42377312Sobrien#define LLongMem AnyMem /* 64 bits (or more) */ 42477312Sobrien#define LongMem AnyMem /* 32 bit memory ref */ 42577312Sobrien#define ShortMem AnyMem /* 16 bit memory ref */ 42677312Sobrien#define WordMem AnyMem /* 16 or 32 bit memory ref */ 42777312Sobrien#define ByteMem AnyMem /* 8 bit memory ref */ 42833965Sjdp} 42933965Sjdptemplate; 43033965Sjdp 43133965Sjdp/* 43233965Sjdp 'templates' is for grouping together 'template' structures for opcodes 43333965Sjdp of the same name. This is only used for storing the insns in the grand 43433965Sjdp ole hash table of insns. 43533965Sjdp The templates themselves start at START and range up to (but not including) 43633965Sjdp END. 43733965Sjdp */ 43833965Sjdptypedef struct 43977312Sobrien{ 44077312Sobrien const template *start; 44177312Sobrien const template *end; 44277312Sobrien} 44377312Sobrientemplates; 44433965Sjdp 44533965Sjdp/* these are for register name --> number & type hash lookup */ 44633965Sjdptypedef struct 44777312Sobrien{ 44877312Sobrien char *reg_name; 44977312Sobrien unsigned int reg_type; 45077312Sobrien unsigned int reg_flags; 45177312Sobrien#define RegRex 0x1 /* Extended register. */ 45277312Sobrien#define RegRex64 0x2 /* Extended 8 bit register. */ 45377312Sobrien unsigned int reg_num; 45477312Sobrien} 45533965Sjdpreg_entry; 45633965Sjdp 45733965Sjdptypedef struct 45877312Sobrien{ 45977312Sobrien char *seg_name; 46077312Sobrien unsigned int seg_prefix; 46177312Sobrien} 46233965Sjdpseg_entry; 46333965Sjdp 46477312Sobrien/* 386 operand encoding bytes: see 386 book for details of this. */ 46533965Sjdptypedef struct 46677312Sobrien{ 46777312Sobrien unsigned int regmem; /* codes register or memory operand */ 46877312Sobrien unsigned int reg; /* codes register operand (or extended opcode) */ 46977312Sobrien unsigned int mode; /* how to interpret regmem & reg */ 47077312Sobrien} 47133965Sjdpmodrm_byte; 47233965Sjdp 47377312Sobrien/* x86-64 extension prefix. */ 47494546Sobrientypedef int rex_byte; 47594546Sobrien#define REX_OPCODE 0x40 47677312Sobrien 47794546Sobrien/* Indicates 64 bit operand size. */ 47894546Sobrien#define REX_MODE64 8 47994546Sobrien/* High extension to reg field of modrm byte. */ 48094546Sobrien#define REX_EXTX 4 48194546Sobrien/* High extension to SIB index field. */ 48294546Sobrien#define REX_EXTY 2 48394546Sobrien/* High extension to base field of modrm or SIB, or reg field of opcode. */ 48494546Sobrien#define REX_EXTZ 1 48594546Sobrien 48677312Sobrien/* 386 opcode byte to code indirect addressing. */ 48777312Sobrientypedef struct 48877312Sobrien{ 48977312Sobrien unsigned base; 49077312Sobrien unsigned index; 49177312Sobrien unsigned scale; 49277312Sobrien} 49360518Sobriensib_byte; 49433965Sjdp 49577312Sobrien/* x86 arch names and features */ 49677312Sobrientypedef struct 49777312Sobrien{ 49877312Sobrien const char *name; /* arch name */ 49977312Sobrien unsigned int flags; /* cpu feature flags */ 50077312Sobrien} 50177312Sobrienarch_entry; 50277312Sobrien 50333965Sjdp/* The name of the global offset table generated by the compiler. Allow 50477312Sobrien this to be overridden if need be. */ 50533965Sjdp#ifndef GLOBAL_OFFSET_TABLE_NAME 50633965Sjdp#define GLOBAL_OFFSET_TABLE_NAME "_GLOBAL_OFFSET_TABLE_" 50733965Sjdp#endif 50833965Sjdp 50933965Sjdp#ifdef BFD_ASSEMBLER 51033965Sjdpvoid i386_validate_fix PARAMS ((struct fix *)); 51133965Sjdp#define TC_VALIDATE_FIX(FIXP,SEGTYPE,SKIP) i386_validate_fix(FIXP) 51233965Sjdp#endif 51333965Sjdp 51433965Sjdp#endif /* TC_I386 */ 51533965Sjdp 51633965Sjdp#define md_operand(x) 51733965Sjdp 51833965Sjdpextern const struct relax_type md_relax_table[]; 51933965Sjdp#define TC_GENERIC_RELAX_TABLE md_relax_table 52033965Sjdp 52133965Sjdp#define md_do_align(n, fill, len, max, around) \ 52233965Sjdpif ((n) && !need_pass_2 \ 52333965Sjdp && (!(fill) || ((char)*(fill) == (char)0x90 && (len) == 1)) \ 52460518Sobrien && subseg_text_p (now_seg)) \ 52533965Sjdp { \ 52677312Sobrien frag_align_code ((n), (max)); \ 52733965Sjdp goto around; \ 52833965Sjdp } 52933965Sjdp 53077312Sobrien#define MAX_MEM_FOR_RS_ALIGN_CODE 15 53177312Sobrien 53233965Sjdpextern void i386_align_code PARAMS ((fragS *, int)); 53333965Sjdp 53433965Sjdp#define HANDLE_ALIGN(fragP) \ 53533965Sjdpif (fragP->fr_type == rs_align_code) \ 53633965Sjdp i386_align_code (fragP, (fragP->fr_next->fr_address \ 53733965Sjdp - fragP->fr_address \ 53833965Sjdp - fragP->fr_fix)); 53933965Sjdp 54033965Sjdpvoid i386_print_statistics PARAMS ((FILE *)); 54133965Sjdp#define tc_print_statistics i386_print_statistics 54233965Sjdp 54333965Sjdp#define md_number_to_chars number_to_chars_littleendian 54433965Sjdp 54533965Sjdp#ifdef SCO_ELF 54633965Sjdp#define tc_init_after_args() sco_id () 54733965Sjdpextern void sco_id PARAMS ((void)); 54833965Sjdp#endif 54933965Sjdp 55038891Sjdp#define DIFF_EXPR_OK /* foo-. gets turned into PC relative relocs */ 551