1/*-
2 * Copyright (c) 2006, 2008 Stanislav Sedov <stas@FreeBSD.org>.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
15 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
16 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
17 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
19 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
20 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
21 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
22 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
23 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24 *
25 * $FreeBSD: stable/10/usr.sbin/cpucontrol/amd.h 308761 2016-11-17 15:17:01Z avg $
26 */
27
28#ifndef AMD_H
29#define	AMD_H
30
31/*
32 * Prototypes.
33 */
34ucode_probe_t	amd_probe;
35ucode_update_t	amd_update;
36ucode_probe_t	amd10h_probe;
37ucode_update_t	amd10h_update;
38
39typedef struct amd_fw_header {
40	uint32_t	date;		/* Update creation date. */
41	uint32_t	xz0[2];
42	uint32_t	checksum;	/* ucode checksum. */
43	uint32_t	xz1[2];
44	uint32_t	signature;	/* Low byte of cpuid(0). */
45	uint32_t	magic;		/* 0x0Xaaaaaa */
46	uint32_t	xz2[8];
47} amd_fw_header_t;
48
49#define	AMD_MAGIC	0xaaaaaa
50
51/*
52 * AMD family 10h and later.
53 */
54typedef struct amd_10h_fw_header {
55	uint32_t	data_code;
56	uint32_t	patch_id;
57	uint16_t	mc_patch_data_id;
58	uint8_t		mc_patch_data_len;
59	uint8_t		init_flag;
60	uint32_t	mc_patch_data_checksum;
61	uint32_t	nb_dev_id;
62	uint32_t	sb_dev_id;
63	uint16_t	processor_rev_id;
64	uint8_t		nb_rev_id;
65	uint8_t		sb_rev_id;
66	uint8_t		bios_api_rev;
67	uint8_t		reserved1[3];
68	uint32_t	match_reg[8];
69} amd_10h_fw_header_t;
70
71typedef struct equiv_cpu_entry {
72	uint32_t	installed_cpu;
73	uint32_t	fixed_errata_mask;
74	uint32_t	fixed_errata_compare;
75	uint16_t	equiv_cpu;
76	uint16_t	res;
77} equiv_cpu_entry_t;
78
79typedef struct section_header {
80	uint32_t	type;
81	uint32_t	size;
82} section_header_t;
83
84typedef struct container_header {
85	uint32_t	magic;
86} container_header_t;
87
88#define	AMD_10H_MAGIC			0x414d44
89#define AMD_10H_EQUIV_TABLE_TYPE	0
90#define AMD_10H_uCODE_TYPE		1
91
92#endif /* !AMD_H */
93