1184610Salfred/*- 2184610Salfred * Copyright (c) 1997, 1998, 1999, 2000-2003 3184610Salfred * Bill Paul <wpaul@windriver.com>. All rights reserved. 4184610Salfred * 5184610Salfred * Redistribution and use in source and binary forms, with or without 6184610Salfred * modification, are permitted provided that the following conditions 7184610Salfred * are met: 8184610Salfred * 1. Redistributions of source code must retain the above copyright 9184610Salfred * notice, this list of conditions and the following disclaimer. 10184610Salfred * 2. Redistributions in binary form must reproduce the above copyright 11184610Salfred * notice, this list of conditions and the following disclaimer in the 12184610Salfred * documentation and/or other materials provided with the distribution. 13184610Salfred * 3. All advertising materials mentioning features or use of this software 14184610Salfred * must display the following acknowledgement: 15184610Salfred * This product includes software developed by Bill Paul. 16184610Salfred * 4. Neither the name of the author nor the names of any co-contributors 17184610Salfred * may be used to endorse or promote products derived from this software 18184610Salfred * without specific prior written permission. 19184610Salfred * 20184610Salfred * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 21184610Salfred * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22184610Salfred * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23184610Salfred * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 24184610Salfred * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25184610Salfred * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26184610Salfred * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27184610Salfred * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28184610Salfred * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29184610Salfred * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 30184610Salfred * THE POSSIBILITY OF SUCH DAMAGE. 31184610Salfred */ 32184610Salfred 33184610Salfred#include <sys/cdefs.h> 34184610Salfred__FBSDID("$FreeBSD$"); 35184610Salfred 36184610Salfred/* 37188412Sthompsa * ASIX Electronics AX88172/AX88178/AX88778 USB 2.0 ethernet driver. 38188412Sthompsa * Used in the LinkSys USB200M and various other adapters. 39184610Salfred * 40184610Salfred * Manuals available from: 41184610Salfred * http://www.asix.com.tw/datasheet/mac/Ax88172.PDF 42184610Salfred * Note: you need the manual for the AX88170 chip (USB 1.x ethernet 43184610Salfred * controller) to find the definitions for the RX control register. 44184610Salfred * http://www.asix.com.tw/datasheet/mac/Ax88170.PDF 45184610Salfred * 46184610Salfred * Written by Bill Paul <wpaul@windriver.com> 47184610Salfred * Senior Engineer 48184610Salfred * Wind River Systems 49184610Salfred */ 50184610Salfred 51184610Salfred/* 52184610Salfred * The AX88172 provides USB ethernet supports at 10 and 100Mbps. 53184610Salfred * It uses an external PHY (reference designs use a RealTek chip), 54184610Salfred * and has a 64-bit multicast hash filter. There is some information 55184610Salfred * missing from the manual which one needs to know in order to make 56184610Salfred * the chip function: 57184610Salfred * 58184610Salfred * - You must set bit 7 in the RX control register, otherwise the 59184610Salfred * chip won't receive any packets. 60184610Salfred * - You must initialize all 3 IPG registers, or you won't be able 61184610Salfred * to send any packets. 62184610Salfred * 63184610Salfred * Note that this device appears to only support loading the station 64184610Salfred * address via autload from the EEPROM (i.e. there's no way to manaully 65184610Salfred * set it). 66184610Salfred * 67184610Salfred * (Adam Weinberger wanted me to name this driver if_gir.c.) 68184610Salfred */ 69184610Salfred 70184610Salfred/* 71184610Salfred * Ax88178 and Ax88772 support backported from the OpenBSD driver. 72184610Salfred * 2007/02/12, J.R. Oldroyd, fbsd@opal.com 73184610Salfred * 74184610Salfred * Manual here: 75184610Salfred * http://www.asix.com.tw/FrootAttach/datasheet/AX88178_datasheet_Rev10.pdf 76184610Salfred * http://www.asix.com.tw/FrootAttach/datasheet/AX88772_datasheet_Rev10.pdf 77184610Salfred */ 78184610Salfred 79194677Sthompsa#include <sys/param.h> 80194677Sthompsa#include <sys/systm.h> 81226743Syongari#include <sys/bus.h> 82226743Syongari#include <sys/condvar.h> 83226743Syongari#include <sys/endian.h> 84194677Sthompsa#include <sys/kernel.h> 85226743Syongari#include <sys/lock.h> 86226743Syongari#include <sys/malloc.h> 87226743Syongari#include <sys/mbuf.h> 88194677Sthompsa#include <sys/module.h> 89194677Sthompsa#include <sys/mutex.h> 90226743Syongari#include <sys/socket.h> 91226743Syongari#include <sys/sockio.h> 92194677Sthompsa#include <sys/sysctl.h> 93194677Sthompsa#include <sys/sx.h> 94194677Sthompsa 95226743Syongari#include <net/if.h> 96226743Syongari#include <net/ethernet.h> 97226743Syongari#include <net/if_types.h> 98226743Syongari#include <net/if_media.h> 99226743Syongari#include <net/if_vlan_var.h> 100226743Syongari 101226743Syongari#include <dev/mii/mii.h> 102226743Syongari#include <dev/mii/miivar.h> 103226743Syongari 104194677Sthompsa#include <dev/usb/usb.h> 105194677Sthompsa#include <dev/usb/usbdi.h> 106194677Sthompsa#include <dev/usb/usbdi_util.h> 107188746Sthompsa#include "usbdevs.h" 108184610Salfred 109184610Salfred#define USB_DEBUG_VAR axe_debug 110194677Sthompsa#include <dev/usb/usb_debug.h> 111188942Sthompsa#include <dev/usb/usb_process.h> 112184610Salfred 113188942Sthompsa#include <dev/usb/net/usb_ethernet.h> 114188942Sthompsa#include <dev/usb/net/if_axereg.h> 115184610Salfred 116188412Sthompsa/* 117188412Sthompsa * AXE_178_MAX_FRAME_BURST 118188412Sthompsa * max frame burst size for Ax88178 and Ax88772 119188412Sthompsa * 0 2048 bytes 120188412Sthompsa * 1 4096 bytes 121188412Sthompsa * 2 8192 bytes 122188412Sthompsa * 3 16384 bytes 123188412Sthompsa * use the largest your system can handle without USB stalling. 124188412Sthompsa * 125188412Sthompsa * NB: 88772 parts appear to generate lots of input errors with 126188412Sthompsa * a 2K rx buffer and 8K is only slightly faster than 4K on an 127188412Sthompsa * EHCI port on a T42 so change at your own risk. 128188412Sthompsa */ 129188412Sthompsa#define AXE_178_MAX_FRAME_BURST 1 130184610Salfred 131226743Syongari#define AXE_CSUM_FEATURES (CSUM_IP | CSUM_TCP | CSUM_UDP) 132226743Syongari 133207077Sthompsa#ifdef USB_DEBUG 134184610Salfredstatic int axe_debug = 0; 135184610Salfred 136227309Sedstatic SYSCTL_NODE(_hw_usb, OID_AUTO, axe, CTLFLAG_RW, 0, "USB axe"); 137192502SthompsaSYSCTL_INT(_hw_usb_axe, OID_AUTO, debug, CTLFLAG_RW, &axe_debug, 0, 138184610Salfred "Debug level"); 139184610Salfred#endif 140184610Salfred 141184610Salfred/* 142184610Salfred * Various supported device vendors/products. 143184610Salfred */ 144223486Shselaskystatic const STRUCT_USB_HOST_ID axe_devs[] = { 145201028Sthompsa#define AXE_DEV(v,p,i) { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, i) } 146201028Sthompsa AXE_DEV(ABOCOM, UF200, 0), 147201028Sthompsa AXE_DEV(ACERCM, EP1427X2, 0), 148201028Sthompsa AXE_DEV(APPLE, ETHERNET, AXE_FLAG_772), 149201028Sthompsa AXE_DEV(ASIX, AX88172, 0), 150201028Sthompsa AXE_DEV(ASIX, AX88178, AXE_FLAG_178), 151201028Sthompsa AXE_DEV(ASIX, AX88772, AXE_FLAG_772), 152215969Syongari AXE_DEV(ASIX, AX88772A, AXE_FLAG_772A), 153224020Syongari AXE_DEV(ASIX, AX88772B, AXE_FLAG_772B), 154228637Skevlo AXE_DEV(ASIX, AX88772B_1, AXE_FLAG_772B), 155201028Sthompsa AXE_DEV(ATEN, UC210T, 0), 156201028Sthompsa AXE_DEV(BELKIN, F5D5055, AXE_FLAG_178), 157201028Sthompsa AXE_DEV(BILLIONTON, USB2AR, 0), 158215969Syongari AXE_DEV(CISCOLINKSYS, USB200MV2, AXE_FLAG_772A), 159201028Sthompsa AXE_DEV(COREGA, FETHER_USB2_TX, 0), 160201028Sthompsa AXE_DEV(DLINK, DUBE100, 0), 161201028Sthompsa AXE_DEV(DLINK, DUBE100B1, AXE_FLAG_772), 162246021Shselasky AXE_DEV(DLINK, DUBE100C1, AXE_FLAG_772B), 163201028Sthompsa AXE_DEV(GOODWAY, GWUSB2E, 0), 164201028Sthompsa AXE_DEV(IODATA, ETGUS2, AXE_FLAG_178), 165201028Sthompsa AXE_DEV(JVC, MP_PRX1, 0), 166252185Syongari AXE_DEV(LENOVO, ETHERNET, AXE_FLAG_772B), 167201028Sthompsa AXE_DEV(LINKSYS2, USB200M, 0), 168201028Sthompsa AXE_DEV(LINKSYS4, USB1000, AXE_FLAG_178), 169212980Ssanpei AXE_DEV(LOGITEC, LAN_GTJU2A, AXE_FLAG_178), 170201028Sthompsa AXE_DEV(MELCO, LUAU2KTX, 0), 171212980Ssanpei AXE_DEV(MELCO, LUA3U2AGT, AXE_FLAG_178), 172201028Sthompsa AXE_DEV(NETGEAR, FA120, 0), 173201028Sthompsa AXE_DEV(OQO, ETHER01PLUS, AXE_FLAG_772), 174201028Sthompsa AXE_DEV(PLANEX3, GU1000T, AXE_FLAG_178), 175201028Sthompsa AXE_DEV(SITECOM, LN029, 0), 176201028Sthompsa AXE_DEV(SITECOMEU, LN028, AXE_FLAG_178), 177201028Sthompsa AXE_DEV(SYSTEMTALKS, SGCX2UL, 0), 178201028Sthompsa#undef AXE_DEV 179184610Salfred}; 180184610Salfred 181184610Salfredstatic device_probe_t axe_probe; 182184610Salfredstatic device_attach_t axe_attach; 183184610Salfredstatic device_detach_t axe_detach; 184184610Salfred 185193045Sthompsastatic usb_callback_t axe_bulk_read_callback; 186193045Sthompsastatic usb_callback_t axe_bulk_write_callback; 187184610Salfred 188188412Sthompsastatic miibus_readreg_t axe_miibus_readreg; 189188412Sthompsastatic miibus_writereg_t axe_miibus_writereg; 190188412Sthompsastatic miibus_statchg_t axe_miibus_statchg; 191184610Salfred 192193045Sthompsastatic uether_fn_t axe_attach_post; 193193045Sthompsastatic uether_fn_t axe_init; 194193045Sthompsastatic uether_fn_t axe_stop; 195193045Sthompsastatic uether_fn_t axe_start; 196193045Sthompsastatic uether_fn_t axe_tick; 197193045Sthompsastatic uether_fn_t axe_setmulti; 198193045Sthompsastatic uether_fn_t axe_setpromisc; 199184610Salfred 200226743Syongaristatic int axe_attach_post_sub(struct usb_ether *); 201188412Sthompsastatic int axe_ifmedia_upd(struct ifnet *); 202188412Sthompsastatic void axe_ifmedia_sts(struct ifnet *, struct ifmediareq *); 203188412Sthompsastatic int axe_cmd(struct axe_softc *, int, int, int, void *); 204188412Sthompsastatic void axe_ax88178_init(struct axe_softc *); 205188412Sthompsastatic void axe_ax88772_init(struct axe_softc *); 206224020Syongaristatic void axe_ax88772_phywake(struct axe_softc *); 207215969Syongaristatic void axe_ax88772a_init(struct axe_softc *); 208224020Syongaristatic void axe_ax88772b_init(struct axe_softc *); 209186730Salfredstatic int axe_get_phyno(struct axe_softc *, int); 210226743Syongaristatic int axe_ioctl(struct ifnet *, u_long, caddr_t); 211226743Syongaristatic int axe_rx_frame(struct usb_ether *, struct usb_page_cache *, int); 212226743Syongaristatic int axe_rxeof(struct usb_ether *, struct usb_page_cache *, 213226743Syongari unsigned int offset, unsigned int, struct axe_csum_hdr *); 214226743Syongaristatic void axe_csum_cfg(struct usb_ether *); 215184610Salfred 216192984Sthompsastatic const struct usb_config axe_config[AXE_N_TRANSFER] = { 217184610Salfred 218187259Sthompsa [AXE_BULK_DT_WR] = { 219184610Salfred .type = UE_BULK, 220184610Salfred .endpoint = UE_ADDR_ANY, 221184610Salfred .direction = UE_DIR_OUT, 222216284Syongari .frames = 16, 223216284Syongari .bufsize = 16 * MCLBYTES, 224190734Sthompsa .flags = {.pipe_bof = 1,.force_short_xfer = 1,}, 225190734Sthompsa .callback = axe_bulk_write_callback, 226190734Sthompsa .timeout = 10000, /* 10 seconds */ 227184610Salfred }, 228184610Salfred 229187259Sthompsa [AXE_BULK_DT_RD] = { 230184610Salfred .type = UE_BULK, 231184610Salfred .endpoint = UE_ADDR_ANY, 232184610Salfred .direction = UE_DIR_IN, 233197566Sthompsa .bufsize = 16384, /* bytes */ 234190734Sthompsa .flags = {.pipe_bof = 1,.short_xfer_ok = 1,}, 235190734Sthompsa .callback = axe_bulk_read_callback, 236190734Sthompsa .timeout = 0, /* no timeout */ 237184610Salfred }, 238184610Salfred}; 239184610Salfred 240224020Syongaristatic const struct ax88772b_mfb ax88772b_mfb_table[] = { 241224020Syongari { 0x8000, 0x8001, 2048 }, 242224020Syongari { 0x8100, 0x8147, 4096}, 243224020Syongari { 0x8200, 0x81EB, 6144}, 244224020Syongari { 0x8300, 0x83D7, 8192}, 245224020Syongari { 0x8400, 0x851E, 16384}, 246224020Syongari { 0x8500, 0x8666, 20480}, 247224020Syongari { 0x8600, 0x87AE, 24576}, 248224020Syongari { 0x8700, 0x8A3D, 32768} 249224020Syongari}; 250224020Syongari 251184610Salfredstatic device_method_t axe_methods[] = { 252184610Salfred /* Device interface */ 253184610Salfred DEVMETHOD(device_probe, axe_probe), 254184610Salfred DEVMETHOD(device_attach, axe_attach), 255184610Salfred DEVMETHOD(device_detach, axe_detach), 256184610Salfred 257184610Salfred /* MII interface */ 258188412Sthompsa DEVMETHOD(miibus_readreg, axe_miibus_readreg), 259188412Sthompsa DEVMETHOD(miibus_writereg, axe_miibus_writereg), 260188412Sthompsa DEVMETHOD(miibus_statchg, axe_miibus_statchg), 261184610Salfred 262227843Smarius DEVMETHOD_END 263184610Salfred}; 264184610Salfred 265184610Salfredstatic driver_t axe_driver = { 266184610Salfred .name = "axe", 267184610Salfred .methods = axe_methods, 268184610Salfred .size = sizeof(struct axe_softc), 269184610Salfred}; 270184610Salfred 271184610Salfredstatic devclass_t axe_devclass; 272184610Salfred 273189275SthompsaDRIVER_MODULE(axe, uhub, axe_driver, axe_devclass, NULL, 0); 274184610SalfredDRIVER_MODULE(miibus, axe, miibus_driver, miibus_devclass, 0, 0); 275188942SthompsaMODULE_DEPEND(axe, uether, 1, 1, 1); 276188942SthompsaMODULE_DEPEND(axe, usb, 1, 1, 1); 277188412SthompsaMODULE_DEPEND(axe, ether, 1, 1, 1); 278188412SthompsaMODULE_DEPEND(axe, miibus, 1, 1, 1); 279212122SthompsaMODULE_VERSION(axe, 1); 280184610Salfred 281192984Sthompsastatic const struct usb_ether_methods axe_ue_methods = { 282188412Sthompsa .ue_attach_post = axe_attach_post, 283226743Syongari .ue_attach_post_sub = axe_attach_post_sub, 284188412Sthompsa .ue_start = axe_start, 285188412Sthompsa .ue_init = axe_init, 286188412Sthompsa .ue_stop = axe_stop, 287188412Sthompsa .ue_tick = axe_tick, 288188412Sthompsa .ue_setmulti = axe_setmulti, 289188412Sthompsa .ue_setpromisc = axe_setpromisc, 290188412Sthompsa .ue_mii_upd = axe_ifmedia_upd, 291188412Sthompsa .ue_mii_sts = axe_ifmedia_sts, 292188412Sthompsa}; 293188412Sthompsa 294188412Sthompsastatic int 295188412Sthompsaaxe_cmd(struct axe_softc *sc, int cmd, int index, int val, void *buf) 296184610Salfred{ 297192984Sthompsa struct usb_device_request req; 298193045Sthompsa usb_error_t err; 299184610Salfred 300188412Sthompsa AXE_LOCK_ASSERT(sc, MA_OWNED); 301188412Sthompsa 302184610Salfred req.bmRequestType = (AXE_CMD_IS_WRITE(cmd) ? 303184610Salfred UT_WRITE_VENDOR_DEVICE : 304184610Salfred UT_READ_VENDOR_DEVICE); 305184610Salfred req.bRequest = AXE_CMD_CMD(cmd); 306184610Salfred USETW(req.wValue, val); 307184610Salfred USETW(req.wIndex, index); 308188412Sthompsa USETW(req.wLength, AXE_CMD_LEN(cmd)); 309184610Salfred 310194228Sthompsa err = uether_do_request(&sc->sc_ue, &req, buf, 1000); 311184610Salfred 312188412Sthompsa return (err); 313184610Salfred} 314184610Salfred 315184610Salfredstatic int 316188412Sthompsaaxe_miibus_readreg(device_t dev, int phy, int reg) 317184610Salfred{ 318184610Salfred struct axe_softc *sc = device_get_softc(dev); 319184610Salfred uint16_t val; 320188412Sthompsa int locked; 321184610Salfred 322188412Sthompsa locked = mtx_owned(&sc->sc_mtx); 323188412Sthompsa if (!locked) 324188412Sthompsa AXE_LOCK(sc); 325186730Salfred 326188412Sthompsa axe_cmd(sc, AXE_CMD_MII_OPMODE_SW, 0, 0, NULL); 327188412Sthompsa axe_cmd(sc, AXE_CMD_MII_READ_REG, reg, phy, &val); 328188412Sthompsa axe_cmd(sc, AXE_CMD_MII_OPMODE_HW, 0, 0, NULL); 329184610Salfred 330184610Salfred val = le16toh(val); 331215968Syongari if (AXE_IS_772(sc) && reg == MII_BMSR) { 332186730Salfred /* 333186730Salfred * BMSR of AX88772 indicates that it supports extended 334186730Salfred * capability but the extended status register is 335186730Salfred * revered for embedded ethernet PHY. So clear the 336186730Salfred * extended capability bit of BMSR. 337186730Salfred */ 338186730Salfred val &= ~BMSR_EXTCAP; 339186730Salfred } 340184610Salfred 341188412Sthompsa if (!locked) 342188412Sthompsa AXE_UNLOCK(sc); 343184610Salfred return (val); 344184610Salfred} 345184610Salfred 346184610Salfredstatic int 347188412Sthompsaaxe_miibus_writereg(device_t dev, int phy, int reg, int val) 348184610Salfred{ 349184610Salfred struct axe_softc *sc = device_get_softc(dev); 350188412Sthompsa int locked; 351184610Salfred 352189522Sthompsa val = htole32(val); 353188412Sthompsa locked = mtx_owned(&sc->sc_mtx); 354188412Sthompsa if (!locked) 355188412Sthompsa AXE_LOCK(sc); 356184610Salfred 357188412Sthompsa axe_cmd(sc, AXE_CMD_MII_OPMODE_SW, 0, 0, NULL); 358188412Sthompsa axe_cmd(sc, AXE_CMD_MII_WRITE_REG, reg, phy, &val); 359188412Sthompsa axe_cmd(sc, AXE_CMD_MII_OPMODE_HW, 0, 0, NULL); 360188412Sthompsa 361188412Sthompsa if (!locked) 362188412Sthompsa AXE_UNLOCK(sc); 363184610Salfred return (0); 364184610Salfred} 365184610Salfred 366184610Salfredstatic void 367188412Sthompsaaxe_miibus_statchg(device_t dev) 368184610Salfred{ 369184610Salfred struct axe_softc *sc = device_get_softc(dev); 370184610Salfred struct mii_data *mii = GET_MII(sc); 371188553Sthompsa struct ifnet *ifp; 372184610Salfred uint16_t val; 373188412Sthompsa int err, locked; 374184610Salfred 375188412Sthompsa locked = mtx_owned(&sc->sc_mtx); 376188412Sthompsa if (!locked) 377188412Sthompsa AXE_LOCK(sc); 378184610Salfred 379194228Sthompsa ifp = uether_getifp(&sc->sc_ue); 380188553Sthompsa if (mii == NULL || ifp == NULL || 381188553Sthompsa (ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 382188553Sthompsa goto done; 383226743Syongari 384188553Sthompsa sc->sc_flags &= ~AXE_FLAG_LINK; 385188553Sthompsa if ((mii->mii_media_status & (IFM_ACTIVE | IFM_AVALID)) == 386188553Sthompsa (IFM_ACTIVE | IFM_AVALID)) { 387188553Sthompsa switch (IFM_SUBTYPE(mii->mii_media_active)) { 388188553Sthompsa case IFM_10_T: 389188553Sthompsa case IFM_100_TX: 390188553Sthompsa sc->sc_flags |= AXE_FLAG_LINK; 391188553Sthompsa break; 392188553Sthompsa case IFM_1000_T: 393188553Sthompsa if ((sc->sc_flags & AXE_FLAG_178) == 0) 394188553Sthompsa break; 395188553Sthompsa sc->sc_flags |= AXE_FLAG_LINK; 396188553Sthompsa break; 397188553Sthompsa default: 398188553Sthompsa break; 399188553Sthompsa } 400188553Sthompsa } 401226743Syongari 402188553Sthompsa /* Lost link, do nothing. */ 403188553Sthompsa if ((sc->sc_flags & AXE_FLAG_LINK) == 0) 404188553Sthompsa goto done; 405226743Syongari 406188553Sthompsa val = 0; 407226743Syongari if ((IFM_OPTIONS(mii->mii_media_active) & IFM_FDX) != 0) { 408188553Sthompsa val |= AXE_MEDIA_FULL_DUPLEX; 409226743Syongari if (AXE_IS_178_FAMILY(sc)) { 410226743Syongari if ((IFM_OPTIONS(mii->mii_media_active) & 411226743Syongari IFM_ETH_TXPAUSE) != 0) 412226743Syongari val |= AXE_178_MEDIA_TXFLOW_CONTROL_EN; 413226743Syongari if ((IFM_OPTIONS(mii->mii_media_active) & 414226743Syongari IFM_ETH_RXPAUSE) != 0) 415226743Syongari val |= AXE_178_MEDIA_RXFLOW_CONTROL_EN; 416226743Syongari } 417226743Syongari } 418215968Syongari if (AXE_IS_178_FAMILY(sc)) { 419186730Salfred val |= AXE_178_MEDIA_RX_EN | AXE_178_MEDIA_MAGIC; 420188553Sthompsa if ((sc->sc_flags & AXE_FLAG_178) != 0) 421188553Sthompsa val |= AXE_178_MEDIA_ENCK; 422184610Salfred switch (IFM_SUBTYPE(mii->mii_media_active)) { 423184610Salfred case IFM_1000_T: 424184610Salfred val |= AXE_178_MEDIA_GMII | AXE_178_MEDIA_ENCK; 425184610Salfred break; 426184610Salfred case IFM_100_TX: 427184610Salfred val |= AXE_178_MEDIA_100TX; 428184610Salfred break; 429184610Salfred case IFM_10_T: 430184610Salfred /* doesn't need to be handled */ 431184610Salfred break; 432184610Salfred } 433184610Salfred } 434188412Sthompsa err = axe_cmd(sc, AXE_CMD_WRITE_MEDIA, 0, val, NULL); 435188412Sthompsa if (err) 436188412Sthompsa device_printf(dev, "media change failed, error %d\n", err); 437188553Sthompsadone: 438188412Sthompsa if (!locked) 439188412Sthompsa AXE_UNLOCK(sc); 440184610Salfred} 441184610Salfred 442184610Salfred/* 443184610Salfred * Set media options. 444184610Salfred */ 445184610Salfredstatic int 446188412Sthompsaaxe_ifmedia_upd(struct ifnet *ifp) 447184610Salfred{ 448184610Salfred struct axe_softc *sc = ifp->if_softc; 449184610Salfred struct mii_data *mii = GET_MII(sc); 450221407Smarius struct mii_softc *miisc; 451188553Sthompsa int error; 452184610Salfred 453188412Sthompsa AXE_LOCK_ASSERT(sc, MA_OWNED); 454184610Salfred 455221407Smarius LIST_FOREACH(miisc, &mii->mii_phys, mii_list) 456221407Smarius PHY_RESET(miisc); 457188553Sthompsa error = mii_mediachg(mii); 458188553Sthompsa return (error); 459184610Salfred} 460184610Salfred 461184610Salfred/* 462184610Salfred * Report current media status. 463184610Salfred */ 464184610Salfredstatic void 465188412Sthompsaaxe_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr) 466184610Salfred{ 467184610Salfred struct axe_softc *sc = ifp->if_softc; 468188412Sthompsa struct mii_data *mii = GET_MII(sc); 469184610Salfred 470188412Sthompsa AXE_LOCK(sc); 471188412Sthompsa mii_pollstat(mii); 472188412Sthompsa ifmr->ifm_active = mii->mii_media_active; 473188412Sthompsa ifmr->ifm_status = mii->mii_media_status; 474226479Syongari AXE_UNLOCK(sc); 475184610Salfred} 476184610Salfred 477184610Salfredstatic void 478192984Sthompsaaxe_setmulti(struct usb_ether *ue) 479184610Salfred{ 480194228Sthompsa struct axe_softc *sc = uether_getsc(ue); 481194228Sthompsa struct ifnet *ifp = uether_getifp(ue); 482188412Sthompsa struct ifmultiaddr *ifma; 483188412Sthompsa uint32_t h = 0; 484184610Salfred uint16_t rxmode; 485188412Sthompsa uint8_t hashtbl[8] = { 0, 0, 0, 0, 0, 0, 0, 0 }; 486184610Salfred 487188412Sthompsa AXE_LOCK_ASSERT(sc, MA_OWNED); 488184610Salfred 489188412Sthompsa axe_cmd(sc, AXE_CMD_RXCTL_READ, 0, 0, &rxmode); 490184610Salfred rxmode = le16toh(rxmode); 491184610Salfred 492188412Sthompsa if (ifp->if_flags & (IFF_ALLMULTI | IFF_PROMISC)) { 493184610Salfred rxmode |= AXE_RXCMD_ALLMULTI; 494188412Sthompsa axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, rxmode, NULL); 495184610Salfred return; 496184610Salfred } 497184610Salfred rxmode &= ~AXE_RXCMD_ALLMULTI; 498184610Salfred 499195049Srwatson if_maddr_rlock(ifp); 500188412Sthompsa TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) 501188412Sthompsa { 502188412Sthompsa if (ifma->ifma_addr->sa_family != AF_LINK) 503188412Sthompsa continue; 504188412Sthompsa h = ether_crc32_be(LLADDR((struct sockaddr_dl *) 505188412Sthompsa ifma->ifma_addr), ETHER_ADDR_LEN) >> 26; 506188412Sthompsa hashtbl[h / 8] |= 1 << (h % 8); 507188412Sthompsa } 508195049Srwatson if_maddr_runlock(ifp); 509184610Salfred 510188412Sthompsa axe_cmd(sc, AXE_CMD_WRITE_MCAST, 0, 0, (void *)&hashtbl); 511188412Sthompsa axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, rxmode, NULL); 512184610Salfred} 513184610Salfred 514186730Salfredstatic int 515186730Salfredaxe_get_phyno(struct axe_softc *sc, int sel) 516186730Salfred{ 517188412Sthompsa int phyno; 518186730Salfred 519186730Salfred switch (AXE_PHY_TYPE(sc->sc_phyaddrs[sel])) { 520186730Salfred case PHY_TYPE_100_HOME: 521186730Salfred case PHY_TYPE_GIG: 522188412Sthompsa phyno = AXE_PHY_NO(sc->sc_phyaddrs[sel]); 523186730Salfred break; 524186730Salfred case PHY_TYPE_SPECIAL: 525186730Salfred /* FALLTHROUGH */ 526186730Salfred case PHY_TYPE_RSVD: 527186730Salfred /* FALLTHROUGH */ 528186730Salfred case PHY_TYPE_NON_SUP: 529186730Salfred /* FALLTHROUGH */ 530186730Salfred default: 531186730Salfred phyno = -1; 532186730Salfred break; 533186730Salfred } 534186730Salfred 535186730Salfred return (phyno); 536186730Salfred} 537186730Salfred 538212130Sthompsa#define AXE_GPIO_WRITE(x, y) do { \ 539212130Sthompsa axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, (x), NULL); \ 540212130Sthompsa uether_pause(ue, (y)); \ 541212130Sthompsa} while (0) 542212130Sthompsa 543184610Salfredstatic void 544188412Sthompsaaxe_ax88178_init(struct axe_softc *sc) 545184610Salfred{ 546212130Sthompsa struct usb_ether *ue; 547222581Syongari int gpio0, ledmode, phymode; 548212130Sthompsa uint16_t eeprom, val; 549184610Salfred 550212130Sthompsa ue = &sc->sc_ue; 551188412Sthompsa axe_cmd(sc, AXE_CMD_SROM_WR_ENABLE, 0, 0, NULL); 552184610Salfred /* XXX magic */ 553188412Sthompsa axe_cmd(sc, AXE_CMD_SROM_READ, 0, 0x0017, &eeprom); 554184610Salfred eeprom = le16toh(eeprom); 555188412Sthompsa axe_cmd(sc, AXE_CMD_SROM_WR_DISABLE, 0, 0, NULL); 556184610Salfred 557184610Salfred /* if EEPROM is invalid we have to use to GPIO0 */ 558184610Salfred if (eeprom == 0xffff) { 559212130Sthompsa phymode = AXE_PHY_MODE_MARVELL; 560184610Salfred gpio0 = 1; 561222581Syongari ledmode = 0; 562184610Salfred } else { 563212130Sthompsa phymode = eeprom & 0x7f; 564184610Salfred gpio0 = (eeprom & 0x80) ? 0 : 1; 565222581Syongari ledmode = eeprom >> 8; 566184610Salfred } 567184610Salfred 568212130Sthompsa if (bootverbose) 569215960Syongari device_printf(sc->sc_ue.ue_dev, 570215960Syongari "EEPROM data : 0x%04x, phymode : 0x%02x\n", eeprom, 571215960Syongari phymode); 572212130Sthompsa /* Program GPIOs depending on PHY hardware. */ 573212130Sthompsa switch (phymode) { 574212130Sthompsa case AXE_PHY_MODE_MARVELL: 575212130Sthompsa if (gpio0 == 1) { 576212130Sthompsa AXE_GPIO_WRITE(AXE_GPIO_RELOAD_EEPROM | AXE_GPIO0_EN, 577212130Sthompsa hz / 32); 578212130Sthompsa AXE_GPIO_WRITE(AXE_GPIO0_EN | AXE_GPIO2 | AXE_GPIO2_EN, 579212130Sthompsa hz / 32); 580212130Sthompsa AXE_GPIO_WRITE(AXE_GPIO0_EN | AXE_GPIO2_EN, hz / 4); 581212130Sthompsa AXE_GPIO_WRITE(AXE_GPIO0_EN | AXE_GPIO2 | AXE_GPIO2_EN, 582212130Sthompsa hz / 32); 583222581Syongari } else { 584212130Sthompsa AXE_GPIO_WRITE(AXE_GPIO_RELOAD_EEPROM | AXE_GPIO1 | 585222581Syongari AXE_GPIO1_EN, hz / 3); 586222581Syongari if (ledmode == 1) { 587222581Syongari AXE_GPIO_WRITE(AXE_GPIO1_EN, hz / 3); 588222581Syongari AXE_GPIO_WRITE(AXE_GPIO1 | AXE_GPIO1_EN, 589222581Syongari hz / 3); 590222581Syongari } else { 591222581Syongari AXE_GPIO_WRITE(AXE_GPIO1 | AXE_GPIO1_EN | 592222581Syongari AXE_GPIO2 | AXE_GPIO2_EN, hz / 32); 593222581Syongari AXE_GPIO_WRITE(AXE_GPIO1 | AXE_GPIO1_EN | 594222581Syongari AXE_GPIO2_EN, hz / 4); 595222581Syongari AXE_GPIO_WRITE(AXE_GPIO1 | AXE_GPIO1_EN | 596222581Syongari AXE_GPIO2 | AXE_GPIO2_EN, hz / 32); 597222581Syongari } 598222581Syongari } 599212130Sthompsa break; 600212130Sthompsa case AXE_PHY_MODE_CICADA: 601215960Syongari case AXE_PHY_MODE_CICADA_V2: 602215960Syongari case AXE_PHY_MODE_CICADA_V2_ASIX: 603212130Sthompsa if (gpio0 == 1) 604212130Sthompsa AXE_GPIO_WRITE(AXE_GPIO_RELOAD_EEPROM | AXE_GPIO0 | 605212130Sthompsa AXE_GPIO0_EN, hz / 32); 606212130Sthompsa else 607212130Sthompsa AXE_GPIO_WRITE(AXE_GPIO_RELOAD_EEPROM | AXE_GPIO1 | 608212130Sthompsa AXE_GPIO1_EN, hz / 32); 609212130Sthompsa break; 610212130Sthompsa case AXE_PHY_MODE_AGERE: 611212130Sthompsa AXE_GPIO_WRITE(AXE_GPIO_RELOAD_EEPROM | AXE_GPIO1 | 612212130Sthompsa AXE_GPIO1_EN, hz / 32); 613212130Sthompsa AXE_GPIO_WRITE(AXE_GPIO1 | AXE_GPIO1_EN | AXE_GPIO2 | 614212130Sthompsa AXE_GPIO2_EN, hz / 32); 615212130Sthompsa AXE_GPIO_WRITE(AXE_GPIO1 | AXE_GPIO1_EN | AXE_GPIO2_EN, hz / 4); 616212130Sthompsa AXE_GPIO_WRITE(AXE_GPIO1 | AXE_GPIO1_EN | AXE_GPIO2 | 617212130Sthompsa AXE_GPIO2_EN, hz / 32); 618212130Sthompsa break; 619212130Sthompsa case AXE_PHY_MODE_REALTEK_8211CL: 620212130Sthompsa case AXE_PHY_MODE_REALTEK_8211BN: 621212130Sthompsa case AXE_PHY_MODE_REALTEK_8251CL: 622212130Sthompsa val = gpio0 == 1 ? AXE_GPIO0 | AXE_GPIO0_EN : 623212130Sthompsa AXE_GPIO1 | AXE_GPIO1_EN; 624212130Sthompsa AXE_GPIO_WRITE(val, hz / 32); 625212130Sthompsa AXE_GPIO_WRITE(val | AXE_GPIO2 | AXE_GPIO2_EN, hz / 32); 626212130Sthompsa AXE_GPIO_WRITE(val | AXE_GPIO2_EN, hz / 4); 627212130Sthompsa AXE_GPIO_WRITE(val | AXE_GPIO2 | AXE_GPIO2_EN, hz / 32); 628212130Sthompsa if (phymode == AXE_PHY_MODE_REALTEK_8211CL) { 629212130Sthompsa axe_miibus_writereg(ue->ue_dev, sc->sc_phyno, 630212130Sthompsa 0x1F, 0x0005); 631212130Sthompsa axe_miibus_writereg(ue->ue_dev, sc->sc_phyno, 632212130Sthompsa 0x0C, 0x0000); 633212130Sthompsa val = axe_miibus_readreg(ue->ue_dev, sc->sc_phyno, 634212130Sthompsa 0x0001); 635212130Sthompsa axe_miibus_writereg(ue->ue_dev, sc->sc_phyno, 636212130Sthompsa 0x01, val | 0x0080); 637212130Sthompsa axe_miibus_writereg(ue->ue_dev, sc->sc_phyno, 638212130Sthompsa 0x1F, 0x0000); 639212130Sthompsa } 640212130Sthompsa break; 641212130Sthompsa default: 642212130Sthompsa /* Unknown PHY model or no need to program GPIOs. */ 643212130Sthompsa break; 644184610Salfred } 645184610Salfred 646184610Salfred /* soft reset */ 647188412Sthompsa axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, AXE_SW_RESET_CLEAR, NULL); 648212130Sthompsa uether_pause(ue, hz / 4); 649184610Salfred 650188412Sthompsa axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, 651184610Salfred AXE_SW_RESET_PRL | AXE_178_RESET_MAGIC, NULL); 652212130Sthompsa uether_pause(ue, hz / 4); 653186730Salfred /* Enable MII/GMII/RGMII interface to work with external PHY. */ 654188412Sthompsa axe_cmd(sc, AXE_CMD_SW_PHY_SELECT, 0, 0, NULL); 655212130Sthompsa uether_pause(ue, hz / 4); 656184610Salfred 657188412Sthompsa axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, 0, NULL); 658184610Salfred} 659184610Salfred 660184610Salfredstatic void 661188412Sthompsaaxe_ax88772_init(struct axe_softc *sc) 662184610Salfred{ 663188412Sthompsa axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, 0x00b0, NULL); 664194228Sthompsa uether_pause(&sc->sc_ue, hz / 16); 665184610Salfred 666186730Salfred if (sc->sc_phyno == AXE_772_PHY_NO_EPHY) { 667184610Salfred /* ask for the embedded PHY */ 668188412Sthompsa axe_cmd(sc, AXE_CMD_SW_PHY_SELECT, 0, 0x01, NULL); 669194228Sthompsa uether_pause(&sc->sc_ue, hz / 64); 670184610Salfred 671184610Salfred /* power down and reset state, pin reset state */ 672188412Sthompsa axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, 673184610Salfred AXE_SW_RESET_CLEAR, NULL); 674194228Sthompsa uether_pause(&sc->sc_ue, hz / 16); 675184610Salfred 676184610Salfred /* power down/reset state, pin operating state */ 677188412Sthompsa axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, 678184610Salfred AXE_SW_RESET_IPPD | AXE_SW_RESET_PRL, NULL); 679194228Sthompsa uether_pause(&sc->sc_ue, hz / 4); 680184610Salfred 681184610Salfred /* power up, reset */ 682188412Sthompsa axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, AXE_SW_RESET_PRL, NULL); 683184610Salfred 684184610Salfred /* power up, operating */ 685188412Sthompsa axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, 686184610Salfred AXE_SW_RESET_IPRL | AXE_SW_RESET_PRL, NULL); 687184610Salfred } else { 688184610Salfred /* ask for external PHY */ 689188412Sthompsa axe_cmd(sc, AXE_CMD_SW_PHY_SELECT, 0, 0x00, NULL); 690194228Sthompsa uether_pause(&sc->sc_ue, hz / 64); 691184610Salfred 692184610Salfred /* power down internal PHY */ 693188412Sthompsa axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, 694184610Salfred AXE_SW_RESET_IPPD | AXE_SW_RESET_PRL, NULL); 695184610Salfred } 696184610Salfred 697194228Sthompsa uether_pause(&sc->sc_ue, hz / 4); 698188412Sthompsa axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, 0, NULL); 699184610Salfred} 700184610Salfred 701184610Salfredstatic void 702224020Syongariaxe_ax88772_phywake(struct axe_softc *sc) 703215969Syongari{ 704215969Syongari struct usb_ether *ue; 705215969Syongari 706215969Syongari ue = &sc->sc_ue; 707215969Syongari if (sc->sc_phyno == AXE_772_PHY_NO_EPHY) { 708215969Syongari /* Manually select internal(embedded) PHY - MAC mode. */ 709215969Syongari axe_cmd(sc, AXE_CMD_SW_PHY_SELECT, 0, AXE_SW_PHY_SELECT_SS_ENB | 710215969Syongari AXE_SW_PHY_SELECT_EMBEDDED | AXE_SW_PHY_SELECT_SS_MII, 711215969Syongari NULL); 712215969Syongari uether_pause(&sc->sc_ue, hz / 32); 713215969Syongari } else { 714215969Syongari /* 715215969Syongari * Manually select external PHY - MAC mode. 716215969Syongari * Reverse MII/RMII is for AX88772A PHY mode. 717215969Syongari */ 718215969Syongari axe_cmd(sc, AXE_CMD_SW_PHY_SELECT, 0, AXE_SW_PHY_SELECT_SS_ENB | 719215969Syongari AXE_SW_PHY_SELECT_EXT | AXE_SW_PHY_SELECT_SS_MII, NULL); 720215969Syongari uether_pause(&sc->sc_ue, hz / 32); 721215969Syongari } 722215969Syongari /* Take PHY out of power down. */ 723215969Syongari axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, AXE_SW_RESET_IPPD | 724215969Syongari AXE_SW_RESET_IPRL, NULL); 725215969Syongari uether_pause(&sc->sc_ue, hz / 4); 726215969Syongari axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, AXE_SW_RESET_IPRL, NULL); 727215969Syongari uether_pause(&sc->sc_ue, hz); 728215969Syongari axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, AXE_SW_RESET_CLEAR, NULL); 729215969Syongari uether_pause(&sc->sc_ue, hz / 32); 730215969Syongari axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, AXE_SW_RESET_IPRL, NULL); 731215969Syongari uether_pause(&sc->sc_ue, hz / 32); 732224020Syongari} 733224020Syongari 734224020Syongaristatic void 735224020Syongariaxe_ax88772a_init(struct axe_softc *sc) 736224020Syongari{ 737224020Syongari struct usb_ether *ue; 738224020Syongari 739224020Syongari ue = &sc->sc_ue; 740224020Syongari /* Reload EEPROM. */ 741224020Syongari AXE_GPIO_WRITE(AXE_GPIO_RELOAD_EEPROM, hz / 32); 742224020Syongari axe_ax88772_phywake(sc); 743224020Syongari /* Stop MAC. */ 744215969Syongari axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, 0, NULL); 745215969Syongari} 746215969Syongari 747224020Syongaristatic void 748224020Syongariaxe_ax88772b_init(struct axe_softc *sc) 749224020Syongari{ 750224020Syongari struct usb_ether *ue; 751224020Syongari uint16_t eeprom; 752224020Syongari uint8_t *eaddr; 753224020Syongari int i; 754224020Syongari 755224020Syongari ue = &sc->sc_ue; 756224020Syongari /* Reload EEPROM. */ 757224020Syongari AXE_GPIO_WRITE(AXE_GPIO_RELOAD_EEPROM, hz / 32); 758224020Syongari /* 759224020Syongari * Save PHY power saving configuration(high byte) and 760224020Syongari * clear EEPROM checksum value(low byte). 761224020Syongari */ 762224020Syongari axe_cmd(sc, AXE_CMD_SROM_READ, 0, AXE_EEPROM_772B_PHY_PWRCFG, &eeprom); 763224020Syongari sc->sc_pwrcfg = le16toh(eeprom) & 0xFF00; 764224020Syongari 765224020Syongari /* 766224020Syongari * Auto-loaded default station address from internal ROM is 767224020Syongari * 00:00:00:00:00:00 such that an explicit access to EEPROM 768224020Syongari * is required to get real station address. 769224020Syongari */ 770224020Syongari eaddr = ue->ue_eaddr; 771224020Syongari for (i = 0; i < ETHER_ADDR_LEN / 2; i++) { 772224020Syongari axe_cmd(sc, AXE_CMD_SROM_READ, 0, AXE_EEPROM_772B_NODE_ID + i, 773224020Syongari &eeprom); 774224020Syongari eeprom = le16toh(eeprom); 775224020Syongari *eaddr++ = (uint8_t)(eeprom & 0xFF); 776224020Syongari *eaddr++ = (uint8_t)((eeprom >> 8) & 0xFF); 777224020Syongari } 778224020Syongari /* Wakeup PHY. */ 779224020Syongari axe_ax88772_phywake(sc); 780224020Syongari /* Stop MAC. */ 781224020Syongari axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, 0, NULL); 782224020Syongari} 783224020Syongari 784215969Syongari#undef AXE_GPIO_WRITE 785215969Syongari 786215969Syongaristatic void 787188412Sthompsaaxe_reset(struct axe_softc *sc) 788184610Salfred{ 789192984Sthompsa struct usb_config_descriptor *cd; 790193045Sthompsa usb_error_t err; 791184610Salfred 792194228Sthompsa cd = usbd_get_config_descriptor(sc->sc_ue.ue_udev); 793184610Salfred 794194228Sthompsa err = usbd_req_set_config(sc->sc_ue.ue_udev, &sc->sc_mtx, 795188412Sthompsa cd->bConfigurationValue); 796188412Sthompsa if (err) 797188412Sthompsa DPRINTF("reset failed (ignored)\n"); 798188412Sthompsa 799188412Sthompsa /* Wait a little while for the chip to get its brains in order. */ 800194228Sthompsa uether_pause(&sc->sc_ue, hz / 100); 801215966Syongari 802215966Syongari /* Reinitialize controller to achieve full reset. */ 803215966Syongari if (sc->sc_flags & AXE_FLAG_178) 804215966Syongari axe_ax88178_init(sc); 805215966Syongari else if (sc->sc_flags & AXE_FLAG_772) 806215966Syongari axe_ax88772_init(sc); 807215969Syongari else if (sc->sc_flags & AXE_FLAG_772A) 808215969Syongari axe_ax88772a_init(sc); 809224020Syongari else if (sc->sc_flags & AXE_FLAG_772B) 810224020Syongari axe_ax88772b_init(sc); 811188412Sthompsa} 812188412Sthompsa 813188412Sthompsastatic void 814192984Sthompsaaxe_attach_post(struct usb_ether *ue) 815188412Sthompsa{ 816194228Sthompsa struct axe_softc *sc = uether_getsc(ue); 817188412Sthompsa 818184610Salfred /* 819184610Salfred * Load PHY indexes first. Needed by axe_xxx_init(). 820184610Salfred */ 821188412Sthompsa axe_cmd(sc, AXE_CMD_READ_PHYID, 0, 0, sc->sc_phyaddrs); 822212130Sthompsa if (bootverbose) 823212130Sthompsa device_printf(sc->sc_ue.ue_dev, "PHYADDR 0x%02x:0x%02x\n", 824212130Sthompsa sc->sc_phyaddrs[0], sc->sc_phyaddrs[1]); 825186730Salfred sc->sc_phyno = axe_get_phyno(sc, AXE_PHY_SEL_PRI); 826186730Salfred if (sc->sc_phyno == -1) 827186730Salfred sc->sc_phyno = axe_get_phyno(sc, AXE_PHY_SEL_SEC); 828186730Salfred if (sc->sc_phyno == -1) { 829188412Sthompsa device_printf(sc->sc_ue.ue_dev, 830188412Sthompsa "no valid PHY address found, assuming PHY address 0\n"); 831186730Salfred sc->sc_phyno = 0; 832186730Salfred } 833184610Salfred 834224020Syongari /* Initialize controller and get station address. */ 835215968Syongari if (sc->sc_flags & AXE_FLAG_178) { 836188412Sthompsa axe_ax88178_init(sc); 837224020Syongari axe_cmd(sc, AXE_178_CMD_READ_NODEID, 0, 0, ue->ue_eaddr); 838215968Syongari } else if (sc->sc_flags & AXE_FLAG_772) { 839188412Sthompsa axe_ax88772_init(sc); 840224020Syongari axe_cmd(sc, AXE_178_CMD_READ_NODEID, 0, 0, ue->ue_eaddr); 841215969Syongari } else if (sc->sc_flags & AXE_FLAG_772A) { 842215969Syongari axe_ax88772a_init(sc); 843188412Sthompsa axe_cmd(sc, AXE_178_CMD_READ_NODEID, 0, 0, ue->ue_eaddr); 844224020Syongari } else if (sc->sc_flags & AXE_FLAG_772B) { 845224020Syongari axe_ax88772b_init(sc); 846224020Syongari } else 847188412Sthompsa axe_cmd(sc, AXE_172_CMD_READ_NODEID, 0, 0, ue->ue_eaddr); 848184610Salfred 849184610Salfred /* 850184610Salfred * Fetch IPG values. 851184610Salfred */ 852224020Syongari if (sc->sc_flags & (AXE_FLAG_772A | AXE_FLAG_772B)) { 853215969Syongari /* Set IPG values. */ 854215969Syongari sc->sc_ipgs[0] = 0x15; 855215969Syongari sc->sc_ipgs[1] = 0x16; 856215969Syongari sc->sc_ipgs[2] = 0x1A; 857215969Syongari } else 858215969Syongari axe_cmd(sc, AXE_CMD_READ_IPG012, 0, 0, sc->sc_ipgs); 859188412Sthompsa} 860184610Salfred 861226743Syongaristatic int 862226743Syongariaxe_attach_post_sub(struct usb_ether *ue) 863226743Syongari{ 864226743Syongari struct axe_softc *sc; 865226743Syongari struct ifnet *ifp; 866226743Syongari u_int adv_pause; 867226743Syongari int error; 868226743Syongari 869226743Syongari sc = uether_getsc(ue); 870226743Syongari ifp = ue->ue_ifp; 871226743Syongari ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 872226743Syongari ifp->if_start = uether_start; 873226743Syongari ifp->if_ioctl = axe_ioctl; 874226743Syongari ifp->if_init = uether_init; 875226743Syongari IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen); 876226743Syongari ifp->if_snd.ifq_drv_maxlen = ifqmaxlen; 877226743Syongari IFQ_SET_READY(&ifp->if_snd); 878226743Syongari 879226743Syongari if (AXE_IS_178_FAMILY(sc)) 880226743Syongari ifp->if_capabilities |= IFCAP_VLAN_MTU; 881226743Syongari if (sc->sc_flags & AXE_FLAG_772B) { 882226743Syongari ifp->if_capabilities |= IFCAP_TXCSUM | IFCAP_RXCSUM; 883226743Syongari ifp->if_hwassist = AXE_CSUM_FEATURES; 884226743Syongari /* 885226743Syongari * Checksum offloading of AX88772B also works with VLAN 886226743Syongari * tagged frames but there is no way to take advantage 887226743Syongari * of the feature because vlan(4) assumes 888226743Syongari * IFCAP_VLAN_HWTAGGING is prerequisite condition to 889226743Syongari * support checksum offloading with VLAN. VLAN hardware 890226743Syongari * tagging support of AX88772B is very limited so it's 891226743Syongari * not possible to announce IFCAP_VLAN_HWTAGGING. 892226743Syongari */ 893226743Syongari } 894226743Syongari ifp->if_capenable = ifp->if_capabilities; 895226743Syongari if (sc->sc_flags & (AXE_FLAG_772A | AXE_FLAG_772B | AXE_FLAG_178)) 896226743Syongari adv_pause = MIIF_DOPAUSE; 897226743Syongari else 898226743Syongari adv_pause = 0; 899226743Syongari mtx_lock(&Giant); 900226743Syongari error = mii_attach(ue->ue_dev, &ue->ue_miibus, ifp, 901226743Syongari uether_ifmedia_upd, ue->ue_methods->ue_mii_sts, 902226743Syongari BMSR_DEFCAPMASK, sc->sc_phyno, MII_OFFSET_ANY, adv_pause); 903226743Syongari mtx_unlock(&Giant); 904226743Syongari 905226743Syongari return (error); 906226743Syongari} 907226743Syongari 908188412Sthompsa/* 909188412Sthompsa * Probe for a AX88172 chip. 910188412Sthompsa */ 911188412Sthompsastatic int 912188412Sthompsaaxe_probe(device_t dev) 913188412Sthompsa{ 914192984Sthompsa struct usb_attach_arg *uaa = device_get_ivars(dev); 915184610Salfred 916192499Sthompsa if (uaa->usb_mode != USB_MODE_HOST) 917188412Sthompsa return (ENXIO); 918188412Sthompsa if (uaa->info.bConfigIndex != AXE_CONFIG_IDX) 919188412Sthompsa return (ENXIO); 920188412Sthompsa if (uaa->info.bIfaceIndex != AXE_IFACE_IDX) 921188412Sthompsa return (ENXIO); 922184610Salfred 923194228Sthompsa return (usbd_lookup_id_by_uaa(axe_devs, sizeof(axe_devs), uaa)); 924188412Sthompsa} 925184610Salfred 926188412Sthompsa/* 927188412Sthompsa * Attach the interface. Allocate softc structures, do ifmedia 928188412Sthompsa * setup and ethernet/BPF attach. 929188412Sthompsa */ 930188412Sthompsastatic int 931188412Sthompsaaxe_attach(device_t dev) 932188412Sthompsa{ 933192984Sthompsa struct usb_attach_arg *uaa = device_get_ivars(dev); 934188412Sthompsa struct axe_softc *sc = device_get_softc(dev); 935192984Sthompsa struct usb_ether *ue = &sc->sc_ue; 936188412Sthompsa uint8_t iface_index; 937188412Sthompsa int error; 938184610Salfred 939188412Sthompsa sc->sc_flags = USB_GET_DRIVER_INFO(uaa); 940184610Salfred 941194228Sthompsa device_set_usb_desc(dev); 942184610Salfred 943188412Sthompsa mtx_init(&sc->sc_mtx, device_get_nameunit(dev), NULL, MTX_DEF); 944184610Salfred 945188412Sthompsa iface_index = AXE_IFACE_IDX; 946194228Sthompsa error = usbd_transfer_setup(uaa->device, &iface_index, sc->sc_xfer, 947188412Sthompsa axe_config, AXE_N_TRANSFER, sc, &sc->sc_mtx); 948188412Sthompsa if (error) { 949199816Sthompsa device_printf(dev, "allocating USB transfers failed\n"); 950188412Sthompsa goto detach; 951188412Sthompsa } 952184610Salfred 953188412Sthompsa ue->ue_sc = sc; 954188412Sthompsa ue->ue_dev = dev; 955188412Sthompsa ue->ue_udev = uaa->device; 956188412Sthompsa ue->ue_mtx = &sc->sc_mtx; 957188412Sthompsa ue->ue_methods = &axe_ue_methods; 958184610Salfred 959194228Sthompsa error = uether_ifattach(ue); 960184610Salfred if (error) { 961188412Sthompsa device_printf(dev, "could not attach interface\n"); 962188412Sthompsa goto detach; 963184610Salfred } 964188412Sthompsa return (0); /* success */ 965184610Salfred 966188412Sthompsadetach: 967188412Sthompsa axe_detach(dev); 968188412Sthompsa return (ENXIO); /* failure */ 969184610Salfred} 970184610Salfred 971184610Salfredstatic int 972184610Salfredaxe_detach(device_t dev) 973184610Salfred{ 974184610Salfred struct axe_softc *sc = device_get_softc(dev); 975192984Sthompsa struct usb_ether *ue = &sc->sc_ue; 976184610Salfred 977194228Sthompsa usbd_transfer_unsetup(sc->sc_xfer, AXE_N_TRANSFER); 978194228Sthompsa uether_ifdetach(ue); 979184610Salfred mtx_destroy(&sc->sc_mtx); 980184610Salfred 981184610Salfred return (0); 982184610Salfred} 983184610Salfred 984184610Salfred#if (AXE_BULK_BUF_SIZE >= 0x10000) 985184610Salfred#error "Please update axe_bulk_read_callback()!" 986184610Salfred#endif 987184610Salfred 988184610Salfredstatic void 989194677Sthompsaaxe_bulk_read_callback(struct usb_xfer *xfer, usb_error_t error) 990184610Salfred{ 991194677Sthompsa struct axe_softc *sc = usbd_xfer_softc(xfer); 992192984Sthompsa struct usb_ether *ue = &sc->sc_ue; 993194677Sthompsa struct usb_page_cache *pc; 994194677Sthompsa int actlen; 995184610Salfred 996194677Sthompsa usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 997194677Sthompsa 998184610Salfred switch (USB_GET_STATE(xfer)) { 999184610Salfred case USB_ST_TRANSFERRED: 1000194677Sthompsa pc = usbd_xfer_get_frame(xfer, 0); 1001226743Syongari axe_rx_frame(ue, pc, actlen); 1002184610Salfred 1003188412Sthompsa /* FALLTHROUGH */ 1004184610Salfred case USB_ST_SETUP: 1005184610Salfredtr_setup: 1006194677Sthompsa usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer)); 1007194228Sthompsa usbd_transfer_submit(xfer); 1008194228Sthompsa uether_rxflush(ue); 1009184610Salfred return; 1010184610Salfred 1011184610Salfred default: /* Error */ 1012194677Sthompsa DPRINTF("bulk read error, %s\n", usbd_errstr(error)); 1013188412Sthompsa 1014194677Sthompsa if (error != USB_ERR_CANCELLED) { 1015184610Salfred /* try to clear stall first */ 1016194677Sthompsa usbd_xfer_set_stall(xfer); 1017188412Sthompsa goto tr_setup; 1018184610Salfred } 1019184610Salfred return; 1020184610Salfred 1021184610Salfred } 1022184610Salfred} 1023184610Salfred 1024226743Syongaristatic int 1025226743Syongariaxe_rx_frame(struct usb_ether *ue, struct usb_page_cache *pc, int actlen) 1026226743Syongari{ 1027226743Syongari struct axe_softc *sc; 1028226743Syongari struct axe_sframe_hdr hdr; 1029226743Syongari struct axe_csum_hdr csum_hdr; 1030226743Syongari int error, len, pos; 1031226743Syongari 1032226743Syongari sc = uether_getsc(ue); 1033226743Syongari pos = 0; 1034226743Syongari len = 0; 1035226743Syongari error = 0; 1036226743Syongari if ((sc->sc_flags & AXE_FLAG_STD_FRAME) != 0) { 1037226743Syongari while (pos < actlen) { 1038233774Shselasky if ((int)(pos + sizeof(hdr)) > actlen) { 1039226743Syongari /* too little data */ 1040226743Syongari error = EINVAL; 1041226743Syongari break; 1042226743Syongari } 1043226743Syongari usbd_copy_out(pc, pos, &hdr, sizeof(hdr)); 1044226743Syongari 1045226743Syongari if ((hdr.len ^ hdr.ilen) != sc->sc_lenmask) { 1046226743Syongari /* we lost sync */ 1047226743Syongari error = EINVAL; 1048226743Syongari break; 1049226743Syongari } 1050226743Syongari pos += sizeof(hdr); 1051226743Syongari len = le16toh(hdr.len); 1052226743Syongari if (pos + len > actlen) { 1053226743Syongari /* invalid length */ 1054226743Syongari error = EINVAL; 1055226743Syongari break; 1056226743Syongari } 1057226743Syongari axe_rxeof(ue, pc, pos, len, NULL); 1058226743Syongari pos += len + (len % 2); 1059226743Syongari } 1060226743Syongari } else if ((sc->sc_flags & AXE_FLAG_CSUM_FRAME) != 0) { 1061226743Syongari while (pos < actlen) { 1062233774Shselasky if ((int)(pos + sizeof(csum_hdr)) > actlen) { 1063226743Syongari /* too little data */ 1064226743Syongari error = EINVAL; 1065226743Syongari break; 1066226743Syongari } 1067226743Syongari usbd_copy_out(pc, pos, &csum_hdr, sizeof(csum_hdr)); 1068226743Syongari 1069226743Syongari csum_hdr.len = le16toh(csum_hdr.len); 1070226743Syongari csum_hdr.ilen = le16toh(csum_hdr.ilen); 1071226743Syongari csum_hdr.cstatus = le16toh(csum_hdr.cstatus); 1072226743Syongari if ((AXE_CSUM_RXBYTES(csum_hdr.len) ^ 1073226743Syongari AXE_CSUM_RXBYTES(csum_hdr.ilen)) != 1074226743Syongari sc->sc_lenmask) { 1075226743Syongari /* we lost sync */ 1076226743Syongari error = EINVAL; 1077226743Syongari break; 1078226743Syongari } 1079226743Syongari /* 1080226743Syongari * Get total transferred frame length including 1081226743Syongari * checksum header. The length should be multiple 1082226743Syongari * of 4. 1083226743Syongari */ 1084226743Syongari len = sizeof(csum_hdr) + AXE_CSUM_RXBYTES(csum_hdr.len); 1085226743Syongari len = (len + 3) & ~3; 1086226743Syongari if (pos + len > actlen) { 1087226743Syongari /* invalid length */ 1088226743Syongari error = EINVAL; 1089226743Syongari break; 1090226743Syongari } 1091226743Syongari axe_rxeof(ue, pc, pos + sizeof(csum_hdr), 1092226743Syongari AXE_CSUM_RXBYTES(csum_hdr.len), &csum_hdr); 1093226743Syongari pos += len; 1094226743Syongari } 1095226743Syongari } else 1096226743Syongari axe_rxeof(ue, pc, 0, actlen, NULL); 1097226743Syongari 1098226743Syongari if (error != 0) 1099226743Syongari ue->ue_ifp->if_ierrors++; 1100226743Syongari return (error); 1101226743Syongari} 1102226743Syongari 1103226743Syongaristatic int 1104226743Syongariaxe_rxeof(struct usb_ether *ue, struct usb_page_cache *pc, unsigned int offset, 1105226743Syongari unsigned int len, struct axe_csum_hdr *csum_hdr) 1106226743Syongari{ 1107226743Syongari struct ifnet *ifp = ue->ue_ifp; 1108226743Syongari struct mbuf *m; 1109226743Syongari 1110226743Syongari if (len < ETHER_HDR_LEN || len > MCLBYTES - ETHER_ALIGN) { 1111226743Syongari ifp->if_ierrors++; 1112226743Syongari return (EINVAL); 1113226743Syongari } 1114226743Syongari 1115243857Sglebius m = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR); 1116226743Syongari if (m == NULL) { 1117226743Syongari ifp->if_iqdrops++; 1118226743Syongari return (ENOMEM); 1119226743Syongari } 1120226743Syongari m->m_len = m->m_pkthdr.len = MCLBYTES; 1121226743Syongari m_adj(m, ETHER_ALIGN); 1122226743Syongari 1123226743Syongari usbd_copy_out(pc, offset, mtod(m, uint8_t *), len); 1124226743Syongari 1125226743Syongari ifp->if_ipackets++; 1126226743Syongari m->m_pkthdr.rcvif = ifp; 1127226743Syongari m->m_pkthdr.len = m->m_len = len; 1128226743Syongari 1129226743Syongari if (csum_hdr != NULL && csum_hdr->cstatus & AXE_CSUM_HDR_L3_TYPE_IPV4) { 1130226743Syongari if ((csum_hdr->cstatus & (AXE_CSUM_HDR_L4_CSUM_ERR | 1131226743Syongari AXE_CSUM_HDR_L3_CSUM_ERR)) == 0) { 1132226743Syongari m->m_pkthdr.csum_flags |= CSUM_IP_CHECKED | 1133226743Syongari CSUM_IP_VALID; 1134226743Syongari if ((csum_hdr->cstatus & AXE_CSUM_HDR_L4_TYPE_MASK) == 1135226743Syongari AXE_CSUM_HDR_L4_TYPE_TCP || 1136226743Syongari (csum_hdr->cstatus & AXE_CSUM_HDR_L4_TYPE_MASK) == 1137226743Syongari AXE_CSUM_HDR_L4_TYPE_UDP) { 1138226743Syongari m->m_pkthdr.csum_flags |= 1139226743Syongari CSUM_DATA_VALID | CSUM_PSEUDO_HDR; 1140226743Syongari m->m_pkthdr.csum_data = 0xffff; 1141226743Syongari } 1142226743Syongari } 1143226743Syongari } 1144226743Syongari 1145226743Syongari _IF_ENQUEUE(&ue->ue_rxq, m); 1146226743Syongari return (0); 1147226743Syongari} 1148226743Syongari 1149184610Salfred#if ((AXE_BULK_BUF_SIZE >= 0x10000) || (AXE_BULK_BUF_SIZE < (MCLBYTES+4))) 1150184610Salfred#error "Please update axe_bulk_write_callback()!" 1151184610Salfred#endif 1152184610Salfred 1153184610Salfredstatic void 1154194677Sthompsaaxe_bulk_write_callback(struct usb_xfer *xfer, usb_error_t error) 1155184610Salfred{ 1156194677Sthompsa struct axe_softc *sc = usbd_xfer_softc(xfer); 1157184610Salfred struct axe_sframe_hdr hdr; 1158194228Sthompsa struct ifnet *ifp = uether_getifp(&sc->sc_ue); 1159194677Sthompsa struct usb_page_cache *pc; 1160184610Salfred struct mbuf *m; 1161216284Syongari int nframes, pos; 1162184610Salfred 1163184610Salfred switch (USB_GET_STATE(xfer)) { 1164184610Salfred case USB_ST_TRANSFERRED: 1165184610Salfred DPRINTFN(11, "transfer complete\n"); 1166213424Syongari ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1167188412Sthompsa /* FALLTHROUGH */ 1168184610Salfred case USB_ST_SETUP: 1169188412Sthompsatr_setup: 1170213424Syongari if ((sc->sc_flags & AXE_FLAG_LINK) == 0 || 1171213424Syongari (ifp->if_drv_flags & IFF_DRV_OACTIVE) != 0) { 1172184610Salfred /* 1173213424Syongari * Don't send anything if there is no link or 1174213424Syongari * controller is busy. 1175184610Salfred */ 1176188412Sthompsa return; 1177184610Salfred } 1178184610Salfred 1179216284Syongari for (nframes = 0; nframes < 16 && 1180216284Syongari !IFQ_DRV_IS_EMPTY(&ifp->if_snd); nframes++) { 1181184610Salfred IFQ_DRV_DEQUEUE(&ifp->if_snd, m); 1182216284Syongari if (m == NULL) 1183216284Syongari break; 1184216284Syongari usbd_xfer_set_frame_offset(xfer, nframes * MCLBYTES, 1185216284Syongari nframes); 1186216284Syongari pos = 0; 1187216284Syongari pc = usbd_xfer_get_frame(xfer, nframes); 1188215968Syongari if (AXE_IS_178_FAMILY(sc)) { 1189184610Salfred hdr.len = htole16(m->m_pkthdr.len); 1190184610Salfred hdr.ilen = ~hdr.len; 1191226743Syongari /* 1192226743Syongari * If upper stack computed checksum, driver 1193226743Syongari * should tell controller not to insert 1194226743Syongari * computed checksum for checksum offloading 1195226743Syongari * enabled controller. 1196226743Syongari */ 1197226743Syongari if (ifp->if_capabilities & IFCAP_TXCSUM) { 1198226743Syongari if ((m->m_pkthdr.csum_flags & 1199226743Syongari AXE_CSUM_FEATURES) != 0) 1200226743Syongari hdr.len |= htole16( 1201226743Syongari AXE_TX_CSUM_PSEUDO_HDR); 1202226743Syongari else 1203226743Syongari hdr.len |= htole16( 1204226743Syongari AXE_TX_CSUM_DIS); 1205226743Syongari } 1206194677Sthompsa usbd_copy_in(pc, pos, &hdr, sizeof(hdr)); 1207184610Salfred pos += sizeof(hdr); 1208216284Syongari usbd_m_copy_in(pc, pos, m, 0, m->m_pkthdr.len); 1209216284Syongari pos += m->m_pkthdr.len; 1210216284Syongari if ((pos % 512) == 0) { 1211216284Syongari hdr.len = 0; 1212216284Syongari hdr.ilen = 0xffff; 1213216284Syongari usbd_copy_in(pc, pos, &hdr, 1214216284Syongari sizeof(hdr)); 1215216284Syongari pos += sizeof(hdr); 1216216284Syongari } 1217216284Syongari } else { 1218216284Syongari usbd_m_copy_in(pc, pos, m, 0, m->m_pkthdr.len); 1219216284Syongari pos += m->m_pkthdr.len; 1220184610Salfred } 1221184610Salfred 1222184610Salfred /* 1223213423Syongari * XXX 1224213423Syongari * Update TX packet counter here. This is not 1225213423Syongari * correct way but it seems that there is no way 1226213423Syongari * to know how many packets are sent at the end 1227213423Syongari * of transfer because controller combines 1228213423Syongari * multiple writes into single one if there is 1229213423Syongari * room in TX buffer of controller. 1230213423Syongari */ 1231213423Syongari ifp->if_opackets++; 1232213423Syongari 1233213423Syongari /* 1234188412Sthompsa * if there's a BPF listener, bounce a copy 1235188412Sthompsa * of this frame to him: 1236188412Sthompsa */ 1237184610Salfred BPF_MTAP(ifp, m); 1238184610Salfred 1239184610Salfred m_freem(m); 1240184610Salfred 1241216284Syongari /* Set frame length. */ 1242216284Syongari usbd_xfer_set_frame_len(xfer, nframes, pos); 1243184610Salfred } 1244216284Syongari if (nframes != 0) { 1245216284Syongari usbd_xfer_set_frames(xfer, nframes); 1246216284Syongari usbd_transfer_submit(xfer); 1247216284Syongari ifp->if_drv_flags |= IFF_DRV_OACTIVE; 1248216284Syongari } 1249184610Salfred return; 1250216284Syongari /* NOTREACHED */ 1251184610Salfred default: /* Error */ 1252184610Salfred DPRINTFN(11, "transfer error, %s\n", 1253194677Sthompsa usbd_errstr(error)); 1254184610Salfred 1255188412Sthompsa ifp->if_oerrors++; 1256213424Syongari ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1257188412Sthompsa 1258194677Sthompsa if (error != USB_ERR_CANCELLED) { 1259184610Salfred /* try to clear stall first */ 1260194677Sthompsa usbd_xfer_set_stall(xfer); 1261188412Sthompsa goto tr_setup; 1262184610Salfred } 1263184610Salfred return; 1264184610Salfred 1265184610Salfred } 1266184610Salfred} 1267184610Salfred 1268184610Salfredstatic void 1269192984Sthompsaaxe_tick(struct usb_ether *ue) 1270184610Salfred{ 1271194228Sthompsa struct axe_softc *sc = uether_getsc(ue); 1272184610Salfred struct mii_data *mii = GET_MII(sc); 1273184610Salfred 1274188412Sthompsa AXE_LOCK_ASSERT(sc, MA_OWNED); 1275188412Sthompsa 1276184610Salfred mii_tick(mii); 1277188553Sthompsa if ((sc->sc_flags & AXE_FLAG_LINK) == 0) { 1278188553Sthompsa axe_miibus_statchg(ue->ue_dev); 1279188553Sthompsa if ((sc->sc_flags & AXE_FLAG_LINK) != 0) 1280188553Sthompsa axe_start(ue); 1281186730Salfred } 1282184610Salfred} 1283184610Salfred 1284184610Salfredstatic void 1285192984Sthompsaaxe_start(struct usb_ether *ue) 1286184610Salfred{ 1287194228Sthompsa struct axe_softc *sc = uether_getsc(ue); 1288184610Salfred 1289188412Sthompsa /* 1290188412Sthompsa * start the USB transfers, if not already started: 1291188412Sthompsa */ 1292194228Sthompsa usbd_transfer_start(sc->sc_xfer[AXE_BULK_DT_RD]); 1293194228Sthompsa usbd_transfer_start(sc->sc_xfer[AXE_BULK_DT_WR]); 1294184610Salfred} 1295184610Salfred 1296184610Salfredstatic void 1297226743Syongariaxe_csum_cfg(struct usb_ether *ue) 1298226743Syongari{ 1299226743Syongari struct axe_softc *sc; 1300226743Syongari struct ifnet *ifp; 1301226743Syongari uint16_t csum1, csum2; 1302226743Syongari 1303226743Syongari sc = uether_getsc(ue); 1304226743Syongari AXE_LOCK_ASSERT(sc, MA_OWNED); 1305226743Syongari 1306226743Syongari if ((sc->sc_flags & AXE_FLAG_772B) != 0) { 1307226743Syongari ifp = uether_getifp(ue); 1308226743Syongari csum1 = 0; 1309226743Syongari csum2 = 0; 1310226743Syongari if ((ifp->if_capenable & IFCAP_TXCSUM) != 0) 1311226743Syongari csum1 |= AXE_TXCSUM_IP | AXE_TXCSUM_TCP | 1312226743Syongari AXE_TXCSUM_UDP; 1313226743Syongari axe_cmd(sc, AXE_772B_CMD_WRITE_TXCSUM, csum2, csum1, NULL); 1314226743Syongari csum1 = 0; 1315226743Syongari csum2 = 0; 1316226743Syongari if ((ifp->if_capenable & IFCAP_RXCSUM) != 0) 1317226743Syongari csum1 |= AXE_RXCSUM_IP | AXE_RXCSUM_IPVE | 1318226743Syongari AXE_RXCSUM_TCP | AXE_RXCSUM_UDP | AXE_RXCSUM_ICMP | 1319226743Syongari AXE_RXCSUM_IGMP; 1320226743Syongari axe_cmd(sc, AXE_772B_CMD_WRITE_RXCSUM, csum2, csum1, NULL); 1321226743Syongari } 1322226743Syongari} 1323226743Syongari 1324226743Syongaristatic void 1325192984Sthompsaaxe_init(struct usb_ether *ue) 1326184610Salfred{ 1327194228Sthompsa struct axe_softc *sc = uether_getsc(ue); 1328194228Sthompsa struct ifnet *ifp = uether_getifp(ue); 1329184610Salfred uint16_t rxmode; 1330184610Salfred 1331188412Sthompsa AXE_LOCK_ASSERT(sc, MA_OWNED); 1332184610Salfred 1333215963Syongari if ((ifp->if_drv_flags & IFF_DRV_RUNNING) != 0) 1334215963Syongari return; 1335215963Syongari 1336188412Sthompsa /* Cancel pending I/O */ 1337188412Sthompsa axe_stop(ue); 1338184610Salfred 1339215962Syongari axe_reset(sc); 1340215962Syongari 1341226743Syongari /* Set MAC address and transmitter IPG values. */ 1342226743Syongari if (AXE_IS_178_FAMILY(sc)) { 1343197567Sthompsa axe_cmd(sc, AXE_178_CMD_WRITE_NODEID, 0, 0, IF_LLADDR(ifp)); 1344188412Sthompsa axe_cmd(sc, AXE_178_CMD_WRITE_IPG012, sc->sc_ipgs[2], 1345184610Salfred (sc->sc_ipgs[1] << 8) | (sc->sc_ipgs[0]), NULL); 1346226743Syongari } else { 1347226743Syongari axe_cmd(sc, AXE_172_CMD_WRITE_NODEID, 0, 0, IF_LLADDR(ifp)); 1348188412Sthompsa axe_cmd(sc, AXE_172_CMD_WRITE_IPG0, 0, sc->sc_ipgs[0], NULL); 1349188412Sthompsa axe_cmd(sc, AXE_172_CMD_WRITE_IPG1, 0, sc->sc_ipgs[1], NULL); 1350188412Sthompsa axe_cmd(sc, AXE_172_CMD_WRITE_IPG2, 0, sc->sc_ipgs[2], NULL); 1351184610Salfred } 1352184610Salfred 1353226743Syongari if (AXE_IS_178_FAMILY(sc)) { 1354226743Syongari sc->sc_flags &= ~(AXE_FLAG_STD_FRAME | AXE_FLAG_CSUM_FRAME); 1355252143Syongari if ((sc->sc_flags & AXE_FLAG_772B) != 0 && 1356252143Syongari (ifp->if_capenable & IFCAP_RXCSUM) != 0) { 1357226743Syongari sc->sc_lenmask = AXE_CSUM_HDR_LEN_MASK; 1358252143Syongari sc->sc_flags |= AXE_FLAG_CSUM_FRAME; 1359252143Syongari } else { 1360226743Syongari sc->sc_lenmask = AXE_HDR_LEN_MASK; 1361226743Syongari sc->sc_flags |= AXE_FLAG_STD_FRAME; 1362252143Syongari } 1363226743Syongari } 1364226743Syongari 1365226743Syongari /* Configure TX/RX checksum offloading. */ 1366226743Syongari axe_csum_cfg(ue); 1367226743Syongari 1368226743Syongari if (sc->sc_flags & AXE_FLAG_772B) { 1369226743Syongari /* AX88772B uses different maximum frame burst configuration. */ 1370224020Syongari axe_cmd(sc, AXE_772B_CMD_RXCTL_WRITE_CFG, 1371224020Syongari ax88772b_mfb_table[AX88772B_MFB_16K].threshold, 1372224020Syongari ax88772b_mfb_table[AX88772B_MFB_16K].byte_cnt, NULL); 1373226743Syongari } 1374224020Syongari 1375224020Syongari /* Enable receiver, set RX mode. */ 1376184610Salfred rxmode = (AXE_RXCMD_MULTICAST | AXE_RXCMD_ENABLE); 1377215968Syongari if (AXE_IS_178_FAMILY(sc)) { 1378224020Syongari if (sc->sc_flags & AXE_FLAG_772B) { 1379224020Syongari /* 1380224020Syongari * Select RX header format type 1. Aligning IP 1381226743Syongari * header on 4 byte boundary is not needed when 1382226743Syongari * checksum offloading feature is not used 1383224020Syongari * because we always copy the received frame in 1384226743Syongari * RX handler. When RX checksum offloading is 1385226743Syongari * active, aligning IP header is required to 1386226743Syongari * reflect actual frame length including RX 1387226743Syongari * header size. 1388224020Syongari */ 1389224020Syongari rxmode |= AXE_772B_RXCMD_HDR_TYPE_1; 1390226743Syongari if ((ifp->if_capenable & IFCAP_RXCSUM) != 0) 1391226743Syongari rxmode |= AXE_772B_RXCMD_IPHDR_ALIGN; 1392224020Syongari } else { 1393224020Syongari /* 1394224020Syongari * Default Rx buffer size is too small to get 1395224020Syongari * maximum performance. 1396224020Syongari */ 1397224020Syongari rxmode |= AXE_178_RXCMD_MFB_16384; 1398224020Syongari } 1399184610Salfred } else { 1400184610Salfred rxmode |= AXE_172_RXCMD_UNICAST; 1401184610Salfred } 1402184610Salfred 1403184610Salfred /* If we want promiscuous mode, set the allframes bit. */ 1404188412Sthompsa if (ifp->if_flags & IFF_PROMISC) 1405184610Salfred rxmode |= AXE_RXCMD_PROMISC; 1406188412Sthompsa 1407188412Sthompsa if (ifp->if_flags & IFF_BROADCAST) 1408184610Salfred rxmode |= AXE_RXCMD_BROADCAST; 1409184610Salfred 1410188412Sthompsa axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, rxmode, NULL); 1411188412Sthompsa 1412184610Salfred /* Load the multicast filter. */ 1413188412Sthompsa axe_setmulti(ue); 1414184610Salfred 1415194677Sthompsa usbd_xfer_set_stall(sc->sc_xfer[AXE_BULK_DT_WR]); 1416184610Salfred 1417188412Sthompsa ifp->if_drv_flags |= IFF_DRV_RUNNING; 1418215964Syongari /* Switch to selected media. */ 1419215964Syongari axe_ifmedia_upd(ifp); 1420184610Salfred} 1421184610Salfred 1422184610Salfredstatic void 1423192984Sthompsaaxe_setpromisc(struct usb_ether *ue) 1424184610Salfred{ 1425194228Sthompsa struct axe_softc *sc = uether_getsc(ue); 1426194228Sthompsa struct ifnet *ifp = uether_getifp(ue); 1427184610Salfred uint16_t rxmode; 1428184610Salfred 1429188412Sthompsa axe_cmd(sc, AXE_CMD_RXCTL_READ, 0, 0, &rxmode); 1430184610Salfred 1431184610Salfred rxmode = le16toh(rxmode); 1432184610Salfred 1433188412Sthompsa if (ifp->if_flags & IFF_PROMISC) { 1434184610Salfred rxmode |= AXE_RXCMD_PROMISC; 1435184610Salfred } else { 1436184610Salfred rxmode &= ~AXE_RXCMD_PROMISC; 1437184610Salfred } 1438184610Salfred 1439188412Sthompsa axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, rxmode, NULL); 1440184610Salfred 1441188412Sthompsa axe_setmulti(ue); 1442184610Salfred} 1443184610Salfred 1444184610Salfredstatic void 1445192984Sthompsaaxe_stop(struct usb_ether *ue) 1446184610Salfred{ 1447194228Sthompsa struct axe_softc *sc = uether_getsc(ue); 1448194228Sthompsa struct ifnet *ifp = uether_getifp(ue); 1449184610Salfred 1450188412Sthompsa AXE_LOCK_ASSERT(sc, MA_OWNED); 1451184610Salfred 1452213424Syongari ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE); 1453186730Salfred sc->sc_flags &= ~AXE_FLAG_LINK; 1454184610Salfred 1455184610Salfred /* 1456184610Salfred * stop all the transfers, if not already stopped: 1457184610Salfred */ 1458194228Sthompsa usbd_transfer_stop(sc->sc_xfer[AXE_BULK_DT_WR]); 1459194228Sthompsa usbd_transfer_stop(sc->sc_xfer[AXE_BULK_DT_RD]); 1460184610Salfred} 1461226743Syongari 1462226743Syongaristatic int 1463226743Syongariaxe_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 1464226743Syongari{ 1465226743Syongari struct usb_ether *ue = ifp->if_softc; 1466226743Syongari struct axe_softc *sc; 1467226743Syongari struct ifreq *ifr; 1468226743Syongari int error, mask, reinit; 1469226743Syongari 1470226743Syongari sc = uether_getsc(ue); 1471226743Syongari ifr = (struct ifreq *)data; 1472226743Syongari error = 0; 1473226743Syongari reinit = 0; 1474226743Syongari if (cmd == SIOCSIFCAP) { 1475226743Syongari AXE_LOCK(sc); 1476226743Syongari mask = ifr->ifr_reqcap ^ ifp->if_capenable; 1477226743Syongari if ((mask & IFCAP_TXCSUM) != 0 && 1478226743Syongari (ifp->if_capabilities & IFCAP_TXCSUM) != 0) { 1479226743Syongari ifp->if_capenable ^= IFCAP_TXCSUM; 1480226743Syongari if ((ifp->if_capenable & IFCAP_TXCSUM) != 0) 1481226743Syongari ifp->if_hwassist |= AXE_CSUM_FEATURES; 1482226743Syongari else 1483226743Syongari ifp->if_hwassist &= ~AXE_CSUM_FEATURES; 1484226743Syongari reinit++; 1485226743Syongari } 1486226743Syongari if ((mask & IFCAP_RXCSUM) != 0 && 1487226743Syongari (ifp->if_capabilities & IFCAP_RXCSUM) != 0) { 1488226743Syongari ifp->if_capenable ^= IFCAP_RXCSUM; 1489226743Syongari reinit++; 1490226743Syongari } 1491226743Syongari if (reinit > 0 && ifp->if_drv_flags & IFF_DRV_RUNNING) 1492226743Syongari ifp->if_drv_flags &= ~IFF_DRV_RUNNING; 1493226743Syongari else 1494226743Syongari reinit = 0; 1495226743Syongari AXE_UNLOCK(sc); 1496226743Syongari if (reinit > 0) 1497226743Syongari uether_init(ue); 1498226743Syongari } else 1499226743Syongari error = uether_ioctl(ifp, cmd, data); 1500226743Syongari 1501226743Syongari return (error); 1502226743Syongari} 1503