1/* ********************************************************************* 2 * SB1250 Board Support Package 3 * 4 * SENTOSA Definitions File: sentosa.h 5 * 6 * This file contains I/O, chip select, and GPIO assignments 7 * for the BCM912500E checkout board. 8 * 9 * Author: Mitch Lichtenberg 10 * 11 ********************************************************************* 12 * 13 * Copyright 2000,2001,2002,2003 14 * Broadcom Corporation. All rights reserved. 15 * 16 * This software is furnished under license and may be used and 17 * copied only in accordance with the following terms and 18 * conditions. Subject to these conditions, you may download, 19 * copy, install, use, modify and distribute modified or unmodified 20 * copies of this software in source and/or binary form. No title 21 * or ownership is transferred hereby. 22 * 23 * 1) Any source code used, modified or distributed must reproduce 24 * and retain this copyright notice and list of conditions 25 * as they appear in the source file. 26 * 27 * 2) No right is granted to use any trade name, trademark, or 28 * logo of Broadcom Corporation. The "Broadcom Corporation" 29 * name may not be used to endorse or promote products derived 30 * from this software without the prior written permission of 31 * Broadcom Corporation. 32 * 33 * 3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR 34 * IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED 35 * WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR 36 * PURPOSE, OR NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT 37 * SHALL BROADCOM BE LIABLE FOR ANY DAMAGES WHATSOEVER, AND IN 38 * PARTICULAR, BROADCOM SHALL NOT BE LIABLE FOR DIRECT, INDIRECT, 39 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 40 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 41 * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 42 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 43 * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR 44 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE), EVEN IF ADVISED OF 45 * THE POSSIBILITY OF SUCH DAMAGE. 46 ********************************************************************* */ 47 48 49/* 50 * I/O Address assignments for the C3 board 51 * 52 * Summary of address map: 53 * 54 * Address Size CSel Description 55 * --------------- ---- ------ -------------------------------- 56 * 0x1FC00000 2MB CS0 Boot ROM 57 * 0x1F800000 2MB CS1 Alternate boot ROM 58 * CS2 Unused 59 * CS3 Unused 60 * CS4 Unused 61 * CS5 Unused 62 * CS6 Unused 63 * CS7 Unused 64 * 65 * GPIO assignments 66 * 67 * GPIO# Direction Description 68 * ------- --------- ------------------------------------------ 69 * GPIO0 Output Debug LED 70 * GPIO1 N/A Not used, routed to daughter card 71 * GPIO2 N/A Not used, routed to daughter card 72 * GPIO3 N/A Not used, routed to daughter card 73 * GPIO4 N/A Not used, routed to daughter card 74 * GPIO5 N/A Not used, routed to daughter card 75 * GPIO6 N/A Not used, routed to daughter card 76 * GPIO7 N/A Not used, routed to daughter card 77 * GPIO8 N/A Not used, routed to daughter card 78 * GPIO9 N/A Not used, routed to daughter card 79 * GPIO10 N/A Not used, routed to daughter card 80 * GPIO11 N/A Not used, routed to daughter card 81 * GPIO12 N/A Not used, routed to daughter card 82 * GPIO13 N/A Not used, routed to daughter card 83 * GPIO14 N/A Not used, routed to daughter card 84 * GPIO15 N/A Not used, routed to daughter card 85 */ 86 87/* ********************************************************************* 88 * Macros 89 ********************************************************************* */ 90 91#define MB (1024*1024) 92#define K64 65536 93#define NUM64K(x) (((x)+(K64-1))/K64) 94 95 96/* ********************************************************************* 97 * GPIO pins 98 ********************************************************************* */ 99 100#define GPIO_DEBUG_LED 0 101 102#define M_GPIO_DEBUG_LED _SB_MAKEMASK1(GPIO_DEBUG_LED) 103 104/* Leave bidirectional pins in "input" state at boot. */ 105 106#define GPIO_OUTPUT_MASK (M_GPIO_DEBUG_LED) 107#define GPIO_INTERRUPT_MASK (0) 108 109/* ********************************************************************* 110 * Generic Bus 111 ********************************************************************* */ 112 113/* 114 * Boot ROM: non-multiplexed, byte width, no parity, no ack 115 * XXX: These are the (very slow) default parameters. This can be sped up! 116 */ 117#define BOOTROM_CS 0 118#define BOOTROM_PHYS 0x1FC00000 /* address of boot ROM (CS0) */ 119#define BOOTROM_SIZE NUM64K(2*MB) /* size of boot ROM */ 120#define BOOTROM_TIMING0 V_IO_ALE_WIDTH(4) | \ 121 V_IO_ALE_TO_CS(2) | \ 122 V_IO_CS_WIDTH(24) | \ 123 V_IO_RDY_SMPLE(1) 124#define BOOTROM_TIMING1 V_IO_ALE_TO_WRITE(7) | \ 125 V_IO_WRITE_WIDTH(7) | \ 126 V_IO_IDLE_CYCLE(6) | \ 127 V_IO_CS_TO_OE(0) | \ 128 V_IO_OE_TO_CS(0) 129#define BOOTROM_CONFIG V_IO_WIDTH_SEL(K_IO_WIDTH_SEL_1) | M_IO_NONMUX 130 131/* 132 * Alternate Boot ROM: non-multiplexed, byte width, no parity, no ack 133 * XXX: These are the (very slow) default parameters. This can be sped up! 134 */ 135#define ALT_BOOTROM_CS 1 136#define ALT_BOOTROM_PHYS 0x1F800000 /* address of alternate boot ROM (CS1) */ 137#define ALT_BOOTROM_SIZE NUM64K(2*MB) /* size of alternate boot ROM */ 138#define ALT_BOOTROM_TIMING0 V_IO_ALE_WIDTH(4) | \ 139 V_IO_ALE_TO_CS(2) | \ 140 V_IO_CS_WIDTH(24) | \ 141 V_IO_RDY_SMPLE(1) 142#define ALT_BOOTROM_TIMING1 V_IO_ALE_TO_WRITE(7) | \ 143 V_IO_WRITE_WIDTH(7) | \ 144 V_IO_IDLE_CYCLE(6) | \ 145 V_IO_CS_TO_OE(0) | \ 146 V_IO_OE_TO_CS(0) 147#define ALT_BOOTROM_CONFIG V_IO_WIDTH_SEL(K_IO_WIDTH_SEL_1) | M_IO_NONMUX 148 149/* ********************************************************************* 150 * SMBus 151 ********************************************************************* */ 152 153#define TEMPSENSOR_SMBUS_CHAN 0 /* All Sentosa */ 154#define TEMPSENSOR_SMBUS_DEV 0x2A 155 156#define BIGEEPROM1_SMBUS_CHAN 1 /* only on Rev 2.0 Sentosa */ 157#define BIGEEPROM1_SMBUS_DEV 0x50 158 159#define X1240_SMBUS_CHAN 1 /* Only on Rev 1.0 Sentosa */ 160#define X1240_SMBUS_DEV 0x57 /* and some early 2.0 */ 161 162#define M41T81_SMBUS_CHAN 1 /* Only on rev 2.0 Sentosa */ 163#define M41T81_SMBUS_DEV 0x68 /* that does not have an X1240 */ 164 165 166/* ********************************************************************* 167 * Board revision numbers 168 ********************************************************************* */ 169 170/* Maps from SYSTEM_CFG register to actual board rev #'s */ 171 172#define SENTOSA_REV_1 0 173#define SENTOSA_REV_2 1 174#define SENTOSA_REV_3 2 175