1/* 2 * madgemc.c: Driver for the Madge Smart 16/4 MC16 MCA token ring card. 3 * 4 * Written 2000 by Adam Fritzler 5 * 6 * This software may be used and distributed according to the terms 7 * of the GNU General Public License, incorporated herein by reference. 8 * 9 * This driver module supports the following cards: 10 * - Madge Smart 16/4 Ringnode MC16 11 * - Madge Smart 16/4 Ringnode MC32 (??) 12 * 13 * Maintainer(s): 14 * AF Adam Fritzler mid@auk.cx 15 * 16 * Modification History: 17 * 16-Jan-00 AF Created 18 * 19 */ 20static const char version[] = "madgemc.c: v0.91 23/01/2000 by Adam Fritzler\n"; 21 22#include <linux/module.h> 23#include <linux/mca.h> 24#include <linux/kernel.h> 25#include <linux/sched.h> 26#include <linux/errno.h> 27#include <linux/pci.h> 28#include <linux/init.h> 29 30#include <asm/system.h> 31#include <asm/io.h> 32#include <asm/irq.h> 33 34#include <linux/netdevice.h> 35#include <linux/trdevice.h> 36#include "tms380tr.h" 37#include "madgemc.h" /* Madge-specific constants */ 38 39#define MADGEMC_IO_EXTENT 32 40#define MADGEMC_SIF_OFFSET 0x08 41 42struct madgemc_card { 43 struct net_device *dev; 44 45 /* 46 * These are read from the BIA ROM. 47 */ 48 unsigned int manid; 49 unsigned int cardtype; 50 unsigned int cardrev; 51 unsigned int ramsize; 52 53 /* 54 * These are read from the MCA POS registers. 55 */ 56 unsigned int burstmode:2; 57 unsigned int fairness:1; /* 0 = Fair, 1 = Unfair */ 58 unsigned int arblevel:4; 59 unsigned int ringspeed:2; /* 0 = 4mb, 1 = 16, 2 = Auto/none */ 60 unsigned int cabletype:1; /* 0 = RJ45, 1 = DB9 */ 61 62 struct madgemc_card *next; 63}; 64static struct madgemc_card *madgemc_card_list; 65 66 67int madgemc_probe(void); 68static int madgemc_open(struct net_device *dev); 69static int madgemc_close(struct net_device *dev); 70static int madgemc_chipset_init(struct net_device *dev); 71static void madgemc_read_rom(struct madgemc_card *card); 72static unsigned short madgemc_setnselout_pins(struct net_device *dev); 73static void madgemc_setcabletype(struct net_device *dev, int type); 74 75static int madgemc_mcaproc(char *buf, int slot, void *d); 76 77static void madgemc_setregpage(struct net_device *dev, int page); 78static void madgemc_setsifsel(struct net_device *dev, int val); 79static void madgemc_setint(struct net_device *dev, int val); 80 81static void madgemc_interrupt(int irq, void *dev_id, struct pt_regs *regs); 82 83/* 84 * These work around paging, however they dont guarentee you're on the 85 * right page. 86 */ 87#define SIFREADB(reg) (inb(dev->base_addr + ((reg<0x8)?reg:reg-0x8))) 88#define SIFWRITEB(val, reg) (outb(val, dev->base_addr + ((reg<0x8)?reg:reg-0x8))) 89#define SIFREADW(reg) (inw(dev->base_addr + ((reg<0x8)?reg:reg-0x8))) 90#define SIFWRITEW(val, reg) (outw(val, dev->base_addr + ((reg<0x8)?reg:reg-0x8))) 91 92/* 93 * Read a byte-length value from the register. 94 */ 95static unsigned short madgemc_sifreadb(struct net_device *dev, unsigned short reg) 96{ 97 unsigned short ret; 98 if (reg<0x8) 99 ret = SIFREADB(reg); 100 else { 101 madgemc_setregpage(dev, 1); 102 ret = SIFREADB(reg); 103 madgemc_setregpage(dev, 0); 104 } 105 return ret; 106} 107 108/* 109 * Write a byte-length value to a register. 110 */ 111static void madgemc_sifwriteb(struct net_device *dev, unsigned short val, unsigned short reg) 112{ 113 if (reg<0x8) 114 SIFWRITEB(val, reg); 115 else { 116 madgemc_setregpage(dev, 1); 117 SIFWRITEB(val, reg); 118 madgemc_setregpage(dev, 0); 119 } 120 return; 121} 122 123/* 124 * Read a word-length value from a register 125 */ 126static unsigned short madgemc_sifreadw(struct net_device *dev, unsigned short reg) 127{ 128 unsigned short ret; 129 if (reg<0x8) 130 ret = SIFREADW(reg); 131 else { 132 madgemc_setregpage(dev, 1); 133 ret = SIFREADW(reg); 134 madgemc_setregpage(dev, 0); 135 } 136 return ret; 137} 138 139/* 140 * Write a word-length value to a register. 141 */ 142static void madgemc_sifwritew(struct net_device *dev, unsigned short val, unsigned short reg) 143{ 144 if (reg<0x8) 145 SIFWRITEW(val, reg); 146 else { 147 madgemc_setregpage(dev, 1); 148 SIFWRITEW(val, reg); 149 madgemc_setregpage(dev, 0); 150 } 151 return; 152} 153 154 155 156int __init madgemc_probe(void) 157{ 158 static int versionprinted; 159 struct net_device *dev; 160 struct net_local *tp; 161 struct madgemc_card *card; 162 int i,slot = 0; 163 __u8 posreg[4]; 164 165 if (!MCA_bus) 166 return -1; 167 168 while (slot != MCA_NOTFOUND) { 169 /* 170 * Currently we only support the MC16/32 (MCA ID 002d) 171 */ 172 slot = mca_find_unused_adapter(0x002d, slot); 173 if (slot == MCA_NOTFOUND) 174 break; 175 176 /* 177 * If we get here, we have an adapter. 178 */ 179 if (versionprinted++ == 0) 180 printk("%s", version); 181 182 if ((dev = init_trdev(NULL, 0))==NULL) { 183 printk("madgemc: unable to allocate dev space\n"); 184 return -1; 185 } 186 dev->dma = 0; 187 188 /* 189 * Fetch MCA config registers 190 */ 191 for(i=0;i<4;i++) 192 posreg[i] = mca_read_stored_pos(slot, i+2); 193 194 card = kmalloc(sizeof(struct madgemc_card), GFP_KERNEL); 195 if (card==NULL) { 196 printk("madgemc: unable to allocate card struct\n"); 197 return -1; 198 } 199 card->dev = dev; 200 201 /* 202 * Parse configuration information. This all comes 203 * directly from the publicly available @002d.ADF. 204 * Get it from Madge or your local ADF library. 205 */ 206 207 /* 208 * Base address 209 */ 210 dev->base_addr = 0x0a20 + 211 ((posreg[2] & MC16_POS2_ADDR2)?0x0400:0) + 212 ((posreg[0] & MC16_POS0_ADDR1)?0x1000:0) + 213 ((posreg[3] & MC16_POS3_ADDR3)?0x2000:0); 214 215 /* 216 * Interrupt line 217 */ 218 switch(posreg[0] >> 6) { /* upper two bits */ 219 case 0x1: dev->irq = 3; break; 220 case 0x2: dev->irq = 9; break; /* IRQ 2 = IRQ 9 */ 221 case 0x3: dev->irq = 10; break; 222 default: dev->irq = 0; break; 223 } 224 225 if (dev->irq == 0) { 226 printk("%s: invalid IRQ\n", dev->name); 227 goto getout; 228 } 229 230 request_region(dev->base_addr, MADGEMC_IO_EXTENT, "madgemc"); 231 dev->base_addr += MADGEMC_SIF_OFFSET; 232 233 /* 234 * Arbitration Level 235 */ 236 card->arblevel = ((posreg[0] >> 1) & 0x7) + 8; 237 238 /* 239 * Burst mode and Fairness 240 */ 241 card->burstmode = ((posreg[2] >> 6) & 0x3); 242 card->fairness = ((posreg[2] >> 4) & 0x1); 243 244 /* 245 * Ring Speed 246 */ 247 if ((posreg[1] >> 2)&0x1) 248 card->ringspeed = 2; /* not selected */ 249 else if ((posreg[2] >> 5) & 0x1) 250 card->ringspeed = 1; /* 16Mb */ 251 else 252 card->ringspeed = 0; /* 4Mb */ 253 254 /* 255 * Cable type 256 */ 257 if ((posreg[1] >> 6)&0x1) 258 card->cabletype = 1; /* STP/DB9 */ 259 else 260 card->cabletype = 0; /* UTP/RJ-45 */ 261 262 263 /* 264 * ROM Info. This requires us to actually twiddle 265 * bits on the card, so we must ensure above that 266 * the base address is free of conflict (request_region above). 267 */ 268 madgemc_read_rom(card); 269 270 if (card->manid != 0x4d) { /* something went wrong */ 271 printk(KERN_INFO "%s: Madge MC ROM read failed (unknown manufacturer ID %02x)\n", dev->name, card->manid); 272 goto getout; 273 } 274 275 if ((card->cardtype != 0x08) && (card->cardtype != 0x0d)) { 276 printk(KERN_INFO "%s: Madge MC ROM read failed (unknown card ID %02x)\n", dev->name, card->cardtype); 277 goto getout; 278 } 279 280 /* All cards except Rev 0 and 1 MC16's have 256kb of RAM */ 281 if ((card->cardtype == 0x08) && (card->cardrev <= 0x01)) 282 card->ramsize = 128; 283 else 284 card->ramsize = 256; 285 286 printk("%s: %s Rev %d at 0x%04lx IRQ %d\n", 287 dev->name, 288 (card->cardtype == 0x08)?MADGEMC16_CARDNAME: 289 MADGEMC32_CARDNAME, card->cardrev, 290 dev->base_addr, dev->irq); 291 292 if (card->cardtype == 0x0d) 293 printk("%s: Warning: MC32 support is experimental and highly untested\n", dev->name); 294 295 if (card->ringspeed==2) { /* Unknown */ 296 printk("%s: Warning: Ring speed not set in POS -- Please run the reference disk and set it!\n", dev->name); 297 card->ringspeed = 1; /* default to 16mb */ 298 } 299 300 printk("%s: RAM Size: %dKB\n", dev->name, card->ramsize); 301 302 printk("%s: Ring Speed: %dMb/sec on %s\n", dev->name, 303 (card->ringspeed)?16:4, 304 card->cabletype?"STP/DB9":"UTP/RJ-45"); 305 printk("%s: Arbitration Level: %d\n", dev->name, 306 card->arblevel); 307 308 printk("%s: Burst Mode: ", dev->name); 309 switch(card->burstmode) { 310 case 0: printk("Cycle steal"); break; 311 case 1: printk("Limited burst"); break; 312 case 2: printk("Delayed release"); break; 313 case 3: printk("Immediate release"); break; 314 } 315 printk(" (%s)\n", (card->fairness)?"Unfair":"Fair"); 316 317 318 /* 319 * Enable SIF before we assign the interrupt handler, 320 * just in case we get spurious interrupts that need 321 * handling. 322 */ 323 outb(0, dev->base_addr + MC_CONTROL_REG0); /* sanity */ 324 madgemc_setsifsel(dev, 1); 325 if(request_irq(dev->irq, madgemc_interrupt, SA_SHIRQ, 326 "madgemc", dev)) 327 goto getout; 328 329 madgemc_chipset_init(dev); /* enables interrupts! */ 330 madgemc_setcabletype(dev, card->cabletype); 331 332 /* Setup MCA structures */ 333 mca_set_adapter_name(slot, (card->cardtype == 0x08)?MADGEMC16_CARDNAME:MADGEMC32_CARDNAME); 334 mca_set_adapter_procfn(slot, madgemc_mcaproc, dev); 335 mca_mark_as_used(slot); 336 337 printk("%s: Ring Station Address: ", dev->name); 338 printk("%2.2x", dev->dev_addr[0]); 339 for (i = 1; i < 6; i++) 340 printk(":%2.2x", dev->dev_addr[i]); 341 printk("\n"); 342 343 if (tmsdev_init(dev, ISA_MAX_ADDRESS, NULL)) { 344 printk("%s: unable to get memory for dev->priv.\n", 345 dev->name); 346 return -1; 347 } 348 tp = (struct net_local *)dev->priv; 349 350 /* 351 * The MC16 is physically a 32bit card. However, Madge 352 * insists on calling it 16bit, so I'll assume here that 353 * they know what they're talking about. Cut off DMA 354 * at 16mb. 355 */ 356 tp->setnselout = madgemc_setnselout_pins; 357 tp->sifwriteb = madgemc_sifwriteb; 358 tp->sifreadb = madgemc_sifreadb; 359 tp->sifwritew = madgemc_sifwritew; 360 tp->sifreadw = madgemc_sifreadw; 361 tp->DataRate = (card->ringspeed)?SPEED_16:SPEED_4; 362 363 memcpy(tp->ProductID, "Madge MCA 16/4 ", PROD_ID_SIZE + 1); 364 365 dev->open = madgemc_open; 366 dev->stop = madgemc_close; 367 368 if (register_trdev(dev) == 0) { 369 /* Enlist in the card list */ 370 card->next = madgemc_card_list; 371 madgemc_card_list = card; 372 } else { 373 printk("madgemc: register_trdev() returned non-zero.\n"); 374 375 kfree(card); 376 tmsdev_term(dev); 377 kfree(dev); 378 return -1; 379 } 380 381 slot++; 382 continue; /* successful, try to find another */ 383 384 getout: 385 release_region(dev->base_addr-MADGEMC_SIF_OFFSET, 386 MADGEMC_IO_EXTENT); 387 kfree(card); 388 kfree(dev); /* release_trdev? */ 389 slot++; 390 } 391 392 if (madgemc_card_list) 393 return 0; 394 return -1; 395} 396 397/* 398 * Handle interrupts generated by the card 399 * 400 * The MicroChannel Madge cards need slightly more handling 401 * after an interrupt than other TMS380 cards do. 402 * 403 * First we must make sure it was this card that generated the 404 * interrupt (since interrupt sharing is allowed). Then, 405 * because we're using level-triggered interrupts (as is 406 * standard on MCA), we must toggle the interrupt line 407 * on the card in order to claim and acknowledge the interrupt. 408 * Once that is done, the interrupt should be handlable in 409 * the normal tms380tr_interrupt() routine. 410 * 411 * There's two ways we can check to see if the interrupt is ours, 412 * both with their own disadvantages... 413 * 414 * 1) Read in the SIFSTS register from the TMS controller. This 415 * is guarenteed to be accurate, however, there's a fairly 416 * large performance penalty for doing so: the Madge chips 417 * must request the register from the Eagle, the Eagle must 418 * read them from its internal bus, and then take the route 419 * back out again, for a 16bit read. 420 * 421 * 2) Use the MC_CONTROL_REG0_SINTR bit from the Madge ASICs. 422 * The major disadvantage here is that the accuracy of the 423 * bit is in question. However, it cuts out the extra read 424 * cycles it takes to read the Eagle's SIF, as its only an 425 * 8bit read, and theoretically the Madge bit is directly 426 * connected to the interrupt latch coming out of the Eagle 427 * hardware (that statement is not verified). 428 * 429 * I can't determine which of these methods has the best win. For now, 430 * we make a compromise. Use the Madge way for the first interrupt, 431 * which should be the fast-path, and then once we hit the first 432 * interrupt, keep on trying using the SIF method until we've 433 * exhausted all contiguous interrupts. 434 * 435 */ 436static void madgemc_interrupt(int irq, void *dev_id, struct pt_regs *regs) 437{ 438 int pending,reg1; 439 struct net_device *dev; 440 441 if (!dev_id) { 442 printk("madgemc_interrupt: was not passed a dev_id!\n"); 443 return; 444 } 445 446 dev = (struct net_device *)dev_id; 447 448 /* Make sure its really us. -- the Madge way */ 449 pending = inb(dev->base_addr + MC_CONTROL_REG0); 450 if (!(pending & MC_CONTROL_REG0_SINTR)) 451 return; /* not our interrupt */ 452 453 /* 454 * Since we're level-triggered, we may miss the rising edge 455 * of the next interrupt while we're off handling this one, 456 * so keep checking until the SIF verifies that it has nothing 457 * left for us to do. 458 */ 459 pending = STS_SYSTEM_IRQ; 460 do { 461 if (pending & STS_SYSTEM_IRQ) { 462 463 /* Toggle the interrupt to reset the latch on card */ 464 reg1 = inb(dev->base_addr + MC_CONTROL_REG1); 465 outb(reg1 ^ MC_CONTROL_REG1_SINTEN, 466 dev->base_addr + MC_CONTROL_REG1); 467 outb(reg1, dev->base_addr + MC_CONTROL_REG1); 468 469 /* Continue handling as normal */ 470 tms380tr_interrupt(irq, dev_id, regs); 471 472 pending = SIFREADW(SIFSTS); /* restart - the SIF way */ 473 474 } else 475 return; 476 } while (1); 477 478 return; /* not reachable */ 479} 480 481/* 482 * Set the card to the prefered ring speed. 483 * 484 * Unlike newer cards, the MC16/32 have their speed selection 485 * circuit connected to the Madge ASICs and not to the TMS380 486 * NSELOUT pins. Set the ASIC bits correctly here, and return 487 * zero to leave the TMS NSELOUT bits unaffected. 488 * 489 */ 490unsigned short madgemc_setnselout_pins(struct net_device *dev) 491{ 492 unsigned char reg1; 493 struct net_local *tp = (struct net_local *)dev->priv; 494 495 reg1 = inb(dev->base_addr + MC_CONTROL_REG1); 496 497 if(tp->DataRate == SPEED_16) 498 reg1 |= MC_CONTROL_REG1_SPEED_SEL; /* add for 16mb */ 499 else if (reg1 & MC_CONTROL_REG1_SPEED_SEL) 500 reg1 ^= MC_CONTROL_REG1_SPEED_SEL; /* remove for 4mb */ 501 outb(reg1, dev->base_addr + MC_CONTROL_REG1); 502 503 return 0; /* no change */ 504} 505 506/* 507 * Set the register page. This equates to the SRSX line 508 * on the TMS380Cx6. 509 * 510 * Register selection is normally done via three contiguous 511 * bits. However, some boards (such as the MC16/32) use only 512 * two bits, plus a seperate bit in the glue chip. This 513 * sets the SRSX bit (the top bit). See page 4-17 in the 514 * Yellow Book for which registers are affected. 515 * 516 */ 517static void madgemc_setregpage(struct net_device *dev, int page) 518{ 519 static int reg1; 520 521 reg1 = inb(dev->base_addr + MC_CONTROL_REG1); 522 if ((page == 0) && (reg1 & MC_CONTROL_REG1_SRSX)) { 523 outb(reg1 ^ MC_CONTROL_REG1_SRSX, 524 dev->base_addr + MC_CONTROL_REG1); 525 } 526 else if (page == 1) { 527 outb(reg1 | MC_CONTROL_REG1_SRSX, 528 dev->base_addr + MC_CONTROL_REG1); 529 } 530 reg1 = inb(dev->base_addr + MC_CONTROL_REG1); 531 532 return; 533} 534 535/* 536 * The SIF registers are not mapped into register space by default 537 * Set this to 1 to map them, 0 to map the BIA ROM. 538 * 539 */ 540static void madgemc_setsifsel(struct net_device *dev, int val) 541{ 542 unsigned int reg0; 543 544 reg0 = inb(dev->base_addr + MC_CONTROL_REG0); 545 if ((val == 0) && (reg0 & MC_CONTROL_REG0_SIFSEL)) { 546 outb(reg0 ^ MC_CONTROL_REG0_SIFSEL, 547 dev->base_addr + MC_CONTROL_REG0); 548 } else if (val == 1) { 549 outb(reg0 | MC_CONTROL_REG0_SIFSEL, 550 dev->base_addr + MC_CONTROL_REG0); 551 } 552 reg0 = inb(dev->base_addr + MC_CONTROL_REG0); 553 554 return; 555} 556 557/* 558 * Enable SIF interrupts 559 * 560 * This does not enable interrupts in the SIF, but rather 561 * enables SIF interrupts to be passed onto the host. 562 * 563 */ 564static void madgemc_setint(struct net_device *dev, int val) 565{ 566 unsigned int reg1; 567 568 reg1 = inb(dev->base_addr + MC_CONTROL_REG1); 569 if ((val == 0) && (reg1 & MC_CONTROL_REG1_SINTEN)) { 570 outb(reg1 ^ MC_CONTROL_REG1_SINTEN, 571 dev->base_addr + MC_CONTROL_REG1); 572 } else if (val == 1) { 573 outb(reg1 | MC_CONTROL_REG1_SINTEN, 574 dev->base_addr + MC_CONTROL_REG1); 575 } 576 577 return; 578} 579 580/* 581 * Cable type is set via control register 7. Bit zero high 582 * for UTP, low for STP. 583 */ 584static void madgemc_setcabletype(struct net_device *dev, int type) 585{ 586 outb((type==0)?MC_CONTROL_REG7_CABLEUTP:MC_CONTROL_REG7_CABLESTP, 587 dev->base_addr + MC_CONTROL_REG7); 588} 589 590/* 591 * Enable the functions of the Madge chipset needed for 592 * full working order. 593 */ 594static int madgemc_chipset_init(struct net_device *dev) 595{ 596 outb(0, dev->base_addr + MC_CONTROL_REG1); /* pull SRESET low */ 597 tms380tr_wait(100); /* wait for card to reset */ 598 599 /* bring back into normal operating mode */ 600 outb(MC_CONTROL_REG1_NSRESET, dev->base_addr + MC_CONTROL_REG1); 601 602 /* map SIF registers */ 603 madgemc_setsifsel(dev, 1); 604 605 /* enable SIF interrupts */ 606 madgemc_setint(dev, 1); 607 608 return 0; 609} 610 611/* 612 * Disable the board, and put back into power-up state. 613 */ 614void madgemc_chipset_close(struct net_device *dev) 615{ 616 /* disable interrupts */ 617 madgemc_setint(dev, 0); 618 /* unmap SIF registers */ 619 madgemc_setsifsel(dev, 0); 620 621 return; 622} 623 624/* 625 * Read the card type (MC16 or MC32) from the card. 626 * 627 * The configuration registers are stored in two seperate 628 * pages. Pages are flipped by clearing bit 3 of CONTROL_REG0 (PAGE) 629 * for page zero, or setting bit 3 for page one. 630 * 631 * Page zero contains the following data: 632 * Byte 0: Manufacturer ID (0x4D -- ASCII "M") 633 * Byte 1: Card type: 634 * 0x08 for MC16 635 * 0x0D for MC32 636 * Byte 2: Card revision 637 * Byte 3: Mirror of POS config register 0 638 * Byte 4: Mirror of POS 1 639 * Byte 5: Mirror of POS 2 640 * 641 * Page one contains the following data: 642 * Byte 0: Unused 643 * Byte 1-6: BIA, MSB to LSB. 644 * 645 * Note that to read the BIA, we must unmap the SIF registers 646 * by clearing bit 2 of CONTROL_REG0 (SIFSEL), as the data 647 * will reside in the same logical location. For this reason, 648 * _never_ read the BIA while the Eagle processor is running! 649 * The SIF will be completely inaccessible until the BIA operation 650 * is complete. 651 * 652 */ 653static void madgemc_read_rom(struct madgemc_card *card) 654{ 655 unsigned long ioaddr; 656 unsigned char reg0, reg1, tmpreg0, i; 657 658 ioaddr = card->dev->base_addr; 659 660 reg0 = inb(ioaddr + MC_CONTROL_REG0); 661 reg1 = inb(ioaddr + MC_CONTROL_REG1); 662 663 /* Switch to page zero and unmap SIF */ 664 tmpreg0 = reg0 & ~(MC_CONTROL_REG0_PAGE + MC_CONTROL_REG0_SIFSEL); 665 outb(tmpreg0, ioaddr + MC_CONTROL_REG0); 666 667 card->manid = inb(ioaddr + MC_ROM_MANUFACTURERID); 668 card->cardtype = inb(ioaddr + MC_ROM_ADAPTERID); 669 card->cardrev = inb(ioaddr + MC_ROM_REVISION); 670 671 /* Switch to rom page one */ 672 outb(tmpreg0 | MC_CONTROL_REG0_PAGE, ioaddr + MC_CONTROL_REG0); 673 674 /* Read BIA */ 675 card->dev->addr_len = 6; 676 for (i = 0; i < 6; i++) 677 card->dev->dev_addr[i] = inb(ioaddr + MC_ROM_BIA_START + i); 678 679 /* Restore original register values */ 680 outb(reg0, ioaddr + MC_CONTROL_REG0); 681 outb(reg1, ioaddr + MC_CONTROL_REG1); 682 683 return; 684} 685 686static int madgemc_open(struct net_device *dev) 687{ 688 /* 689 * Go ahead and reinitialize the chipset again, just to 690 * make sure we didn't get left in a bad state. 691 */ 692 madgemc_chipset_init(dev); 693 tms380tr_open(dev); 694 MOD_INC_USE_COUNT; 695 return 0; 696} 697 698static int madgemc_close(struct net_device *dev) 699{ 700 tms380tr_close(dev); 701 madgemc_chipset_close(dev); 702 MOD_DEC_USE_COUNT; 703 return 0; 704} 705 706/* 707 * Give some details available from /proc/mca/slotX 708 */ 709static int madgemc_mcaproc(char *buf, int slot, void *d) 710{ 711 struct net_device *dev = (struct net_device *)d; 712 struct madgemc_card *curcard = madgemc_card_list; 713 int len = 0; 714 715 while (curcard) { /* search for card struct */ 716 if (curcard->dev == dev) 717 break; 718 curcard = curcard->next; 719 } 720 len += sprintf(buf+len, "-------\n"); 721 if (curcard) { 722 struct net_local *tp = (struct net_local *)dev->priv; 723 int i; 724 725 len += sprintf(buf+len, "Card Revision: %d\n", curcard->cardrev); 726 len += sprintf(buf+len, "RAM Size: %dkb\n", curcard->ramsize); 727 len += sprintf(buf+len, "Cable type: %s\n", (curcard->cabletype)?"STP/DB9":"UTP/RJ-45"); 728 len += sprintf(buf+len, "Configured ring speed: %dMb/sec\n", (curcard->ringspeed)?16:4); 729 len += sprintf(buf+len, "Running ring speed: %dMb/sec\n", (tp->DataRate==SPEED_16)?16:4); 730 len += sprintf(buf+len, "Device: %s\n", dev->name); 731 len += sprintf(buf+len, "IO Port: 0x%04lx\n", dev->base_addr); 732 len += sprintf(buf+len, "IRQ: %d\n", dev->irq); 733 len += sprintf(buf+len, "Arbitration Level: %d\n", curcard->arblevel); 734 len += sprintf(buf+len, "Burst Mode: "); 735 switch(curcard->burstmode) { 736 case 0: len += sprintf(buf+len, "Cycle steal"); break; 737 case 1: len += sprintf(buf+len, "Limited burst"); break; 738 case 2: len += sprintf(buf+len, "Delayed release"); break; 739 case 3: len += sprintf(buf+len, "Immediate release"); break; 740 } 741 len += sprintf(buf+len, " (%s)\n", (curcard->fairness)?"Unfair":"Fair"); 742 743 len += sprintf(buf+len, "Ring Station Address: "); 744 len += sprintf(buf+len, "%2.2x", dev->dev_addr[0]); 745 for (i = 1; i < 6; i++) 746 len += sprintf(buf+len, " %2.2x", dev->dev_addr[i]); 747 len += sprintf(buf+len, "\n"); 748 } else 749 len += sprintf(buf+len, "Card not configured\n"); 750 751 return len; 752} 753 754#ifdef MODULE 755 756int init_module(void) 757{ 758 /* Probe for cards. */ 759 if (madgemc_probe()) { 760 printk(KERN_NOTICE "madgemc.c: No cards found.\n"); 761 } 762 /* lock_tms380_module(); */ 763 return (0); 764} 765 766void cleanup_module(void) 767{ 768 struct net_device *dev; 769 struct madgemc_card *this_card; 770 771 while (madgemc_card_list) { 772 dev = madgemc_card_list->dev; 773 unregister_trdev(dev); 774 release_region(dev->base_addr-MADGEMC_SIF_OFFSET, MADGEMC_IO_EXTENT); 775 free_irq(dev->irq, dev); 776 tmsdev_term(dev); 777 kfree(dev); 778 this_card = madgemc_card_list; 779 madgemc_card_list = this_card->next; 780 kfree(this_card); 781 } 782 /* unlock_tms380_module(); */ 783} 784#endif /* MODULE */ 785 786MODULE_LICENSE("GPL"); 787 788 789/* 790 * Local variables: 791 * compile-command: "gcc -DMODVERSIONS -DMODULE -D__KERNEL__ -Wall -Wstrict-prototypes -O6 -fomit-frame-pointer -I/usr/src/linux/drivers/net/tokenring/ -c madgemc.c" 792 * alt-compile-command: "gcc -DMODULE -D__KERNEL__ -Wall -Wstrict-prototypes -O6 -fomit-frame-pointer -I/usr/src/linux/drivers/net/tokenring/ -c madgemc.c" 793 * c-set-style "K&R" 794 * c-indent-level: 8 795 * c-basic-offset: 8 796 * tab-width: 8 797 * End: 798 */ 799 800