1#include <linux/kernel.h>
2#include <linux/mmzone.h>
3#include <linux/spinlock.h>
4#include <linux/smp.h>
5#include <asm/atomic.h>
6#include <asm/sn/types.h>
7#include <asm/sn/addrs.h>
8#include <asm/sn/nmi.h>
9#include <asm/sn/arch.h>
10#include <asm/sn/sn0/hub.h>
11
12#define NODE_NUM_CPUS(n)	CPUS_PER_NODE
13
14#define CNODEID_NONE (cnodeid_t)-1
15#define enter_panic_mode()	spin_lock(&nmi_lock)
16
17typedef unsigned long machreg_t;
18
19spinlock_t nmi_lock = SPIN_LOCK_UNLOCKED;
20
21/*
22 * Lets see what else we need to do here. Set up sp, gp?
23 */
24void nmi_dump(void)
25{
26	void cont_nmi_dump(void);
27
28	cont_nmi_dump();
29}
30
31void install_cpu_nmi_handler(int slice)
32{
33	nmi_t *nmi_addr;
34
35	nmi_addr = (nmi_t *)NMI_ADDR(get_nasid(), slice);
36	if (nmi_addr->call_addr)
37		return;
38	nmi_addr->magic = NMI_MAGIC;
39	nmi_addr->call_addr = (void *)nmi_dump;
40	nmi_addr->call_addr_c =
41		(void *)(~((unsigned long)(nmi_addr->call_addr)));
42	nmi_addr->call_parm = 0;
43}
44
45/*
46 * Copy the cpu registers which have been saved in the IP27prom format
47 * into the eframe format for the node under consideration.
48 */
49
50void
51nmi_cpu_eframe_save(nasid_t nasid,
52		    int	    slice)
53{
54	int 		i, numberof_nmi_cpu_regs;
55	machreg_t	*prom_format;
56
57	/* Get the total number of registers being saved by the prom */
58	numberof_nmi_cpu_regs = sizeof(struct reg_struct) / sizeof(machreg_t);
59
60	/* Get the pointer to the current cpu's register set. */
61	prom_format =
62	    (machreg_t *)(TO_UNCAC(TO_NODE(nasid, IP27_NMI_KREGS_OFFSET)) +
63			  slice * IP27_NMI_KREGS_CPU_SIZE);
64
65	printk("NMI nasid %d: slice %d\n", nasid, slice);
66	for (i = 0; i < numberof_nmi_cpu_regs; i++)
67		printk("0x%lx  ", prom_format[i]);
68	printk("\n\n");
69}
70
71/*
72 * Copy the cpu registers which have been saved in the IP27prom format
73 * into the eframe format for the node under consideration.
74 */
75void
76nmi_node_eframe_save(cnodeid_t  cnode)
77{
78	int		cpu;
79	nasid_t		nasid;
80
81	/* Make sure that we have a valid node */
82	if (cnode == CNODEID_NONE)
83		return;
84
85	nasid = COMPACT_TO_NASID_NODEID(cnode);
86	if (nasid == INVALID_NASID)
87		return;
88
89	/* Save the registers into eframe for each cpu */
90	for(cpu = 0; cpu < NODE_NUM_CPUS(cnode); cpu++)
91		nmi_cpu_eframe_save(nasid, cpu);
92}
93
94/*
95 * Save the nmi cpu registers for all cpus in the system.
96 */
97void
98nmi_eframes_save(void)
99{
100	cnodeid_t	cnode;
101
102	for(cnode = 0 ; cnode < numnodes; cnode++)
103		nmi_node_eframe_save(cnode);
104}
105
106void
107cont_nmi_dump(void)
108{
109#ifndef REAL_NMI_SIGNAL
110	static atomic_t nmied_cpus = ATOMIC_INIT(0);
111
112	atomic_inc(&nmied_cpus);
113#endif
114	/*
115	 * Use enter_panic_mode to allow only 1 cpu to proceed
116	 */
117	enter_panic_mode();
118
119#ifdef REAL_NMI_SIGNAL
120	/*
121	 * Wait up to 15 seconds for the other cpus to respond to the NMI.
122	 * If a cpu has not responded after 10 sec, send it 1 additional NMI.
123	 * This is for 2 reasons:
124	 *	- sometimes a MMSC fail to NMI all cpus.
125	 *	- on 512p SN0 system, the MMSC will only send NMIs to
126	 *	  half the cpus. Unfortunately, we dont know which cpus may be
127	 *	  NMIed - it depends on how the site chooses to configure.
128	 *
129	 * Note: it has been measure that it takes the MMSC up to 2.3 secs to
130	 * send NMIs to all cpus on a 256p system.
131	 */
132	for (i=0; i < 1500; i++) {
133		for (node=0; node < numnodes; node++)
134			if (NODEPDA(node)->dump_count == 0)
135				break;
136		if (node == numnodes)
137			break;
138		if (i == 1000) {
139			for (node=0; node < numnodes; node++)
140				if (NODEPDA(node)->dump_count == 0) {
141					cpu = CNODE_TO_CPU_BASE(node);
142					for (n=0; n < CNODE_NUM_CPUS(node); cpu++, n++) {
143						CPUMASK_SETB(nmied_cpus, cpu);
144						/*
145						 * cputonasid, cputoslice
146						 * needs kernel cpuid
147						 */
148						SEND_NMI((cputonasid(cpu)), (cputoslice(cpu)));
149					}
150				}
151
152		}
153		udelay(10000);
154	}
155#else
156	while (atomic_read(&nmied_cpus) != smp_num_cpus);
157#endif
158
159	/*
160	 * Save the nmi cpu registers for all cpu in the eframe format.
161	 */
162	nmi_eframes_save();
163	LOCAL_HUB_S(NI_PORT_RESET, NPR_PORTRESET | NPR_LOCALRESET);
164}
165