Searched refs:RegMaskSlots (Results 1 - 3 of 3) sorted by relevance

/freebsd-10.1-release/contrib/llvm/lib/CodeGen/
H A DInterferenceCache.cpp131 ArrayRef<SlotIndex> RegMaskSlots; local
163 RegMaskSlots = LIS->getRegMaskSlotsInBlock(MBBNum);
166 for (unsigned i = 0, e = RegMaskSlots.size();
167 i != e && RegMaskSlots[i] < Limit; ++i)
170 BI->First = RegMaskSlots[i];
223 for (unsigned i = RegMaskSlots.size();
224 i && RegMaskSlots[i-1].getDeadSlot() > Limit; --i)
228 BI->Last = RegMaskSlots[i-1].getDeadSlot();
H A DLiveIntervalAnalysis.cpp94 RegMaskSlots.clear();
154 for (unsigned i = 0, e = RegMaskSlots.size(); i != e; ++i)
155 OS << ' ' << RegMaskSlots[i]; local
206 RMB.first = RegMaskSlots.size();
212 RegMaskSlots.push_back(Indexes->getInstructionIndex(MI).getRegSlot());
216 RMB.second = RegMaskSlots.size() - RMB.first;
665 // Start with a binary search of RegMaskSlots to find a starting point.
961 std::lower_bound(LIS.RegMaskSlots.begin(), LIS.RegMaskSlots.end(),
963 assert(RI != LIS.RegMaskSlots
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/freebsd-10.1-release/contrib/llvm/include/llvm/CodeGen/
H A DLiveIntervalAnalysis.h67 /// RegMaskSlots - Sorted list of instructions with register mask operands.
70 SmallVector<SlotIndex, 8> RegMaskSlots; member in class:llvm::LiveIntervals
72 /// RegMaskBits - This vector is parallel to RegMaskSlots, it holds a
82 /// improve locality when searching in RegMaskSlots.
87 /// RegMaskSlots and RegMaskBits arrays.
227 RegMaskBlocks.push_back(std::make_pair(RegMaskSlots.size(), 0));
324 ArrayRef<SlotIndex> getRegMaskSlots() const { return RegMaskSlots; }
391 /// Compute RegMaskSlots and RegMaskBits.

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