Searched refs:isSub (Results 1 - 10 of 10) sorted by relevance
| /freebsd-10.0-release/contrib/llvm/lib/Target/ARM/ |
| H A D | Thumb2InstrInfo.cpp | 217 bool isSub = NumBytes < 0;
218 if (isSub) NumBytes = -NumBytes;
242 if (isSub) {
275 Opc = isSub ? ARM::tSUBspi : ARM::tADDspi;
283 Opc = isSub ? ARM::t2SUBri : ARM::t2ADDri;
296 Opc = isSub ? ARM::t2SUBri : ARM::t2ADDri;
300 Opc = isSub ? ARM::t2SUBri12 : ARM::t2ADDri12;
429 bool isSub = false;
455 isSub = true;
474 unsigned NewOpc = isSub
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| H A D | Thumb1RegisterInfo.cpp | 101 bool isSub = false; local
107 isSub = true;
129 int Opc = (isSub) ? ARM::tSUBrr : (isHigh ? ARM::tADDhirr : ARM::tADDrr);
134 if (DestReg == ARM::SP || isSub)
174 bool isSub = NumBytes < 0; local
176 if (isSub) Bytes = -NumBytes;
190 Opc = isSub ? ARM::tSUBspi : ARM::tADDspi;
192 } else if (!isSub && BaseReg == ARM::SP) {
212 Opc = isSub ? ARM::tSUBspi : ARM::tADDspi;
217 Opc = isSub
307 bool isSub = Imm < 0; local
[all...] |
| H A D | ARMBaseInstrInfo.cpp | 166 bool isSub = ARM_AM::getAM2Op(OffImm) == ARM_AM::sub; local
174 get(isSub ? ARM::SUBri : ARM::ADDri), WBReg)
181 get(isSub ? ARM::SUBrsi : ARM::ADDrsi), WBReg)
186 get(isSub ? ARM::SUBrr : ARM::ADDrr), WBReg)
192 bool isSub = ARM_AM::getAM3Op(OffImm) == ARM_AM::sub; local
197 get(isSub ? ARM::SUBri : ARM::ADDri), WBReg)
202 get(isSub ? ARM::SUBrr : ARM::ADDrr), WBReg)
1806 bool isSub = NumBytes < 0; local
1807 if (isSub) NumBytes = -NumBytes;
1820 unsigned Opc = isSub
2426 bool isSub = ARM_AM::getAM2Op(ShOpVal) == ARM_AM::sub; local
2442 bool isSub = ARM_AM::getAM2Op(ShOpVal) == ARM_AM::sub; local
2470 bool isSub = ARM_AM::getAM2Op(ShOpVal) == ARM_AM::sub; local
2483 bool isSub = ARM_AM::getAM2Op(ShOpVal) == ARM_AM::sub; local
2535 bool isSub = ARM_AM::getAM2Op(ShOpVal) == ARM_AM::sub; local
3159 bool isSub = ARM_AM::getAM2Op(ShOpVal) == ARM_AM::sub; local
[all...] |
| H A D | ARMISelLowering.cpp | 7185 bool isSub = ARM_AM::getAM2Op(Offset) == ARM_AM::sub; local
7187 if (isSub)
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| /freebsd-10.0-release/contrib/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMAddressingModes.h | 410 bool isSub = Opc == sub;
411 return Imm12 | ((int)isSub << 12) | (SO << 13) | (IdxMode << 16) ;
444 bool isSub = Opc == sub;
445 return ((int)isSub << 8) | Offset | (IdxMode << 9);
493 bool isSub = Opc == sub;
494 return ((int)isSub << 8) | Offset;
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| /freebsd-10.0-release/contrib/llvm/lib/Target/X86/ |
| H A D | X86FrameLowering.cpp | 150 bool isSub = NumBytes < 0; local
151 uint64_t Offset = isSub ? -NumBytes : NumBytes;
156 Opc = isSub
167 unsigned Reg = isSub
171 Opc = isSub
175 .addReg(Reg, getDefRegState(!isSub) | getUndefRegState(isSub));
176 if (isSub)
187 StackPtr, false, isSub ? -ThisVal : ThisVal);
195 if (isSub)
[all...] |
| /freebsd-10.0-release/contrib/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombine.h | 369 bool isSub, Instruction &I);
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| H A D | InstCombineAndOrXor.cpp | 334 /// where isSub determines whether the operator is a sub. If we can fold one of
344 ConstantInt *Mask, bool isSub,
384 if (isSub)
343 FoldLogicalPlusAnd(Value *LHS, Value *RHS, ConstantInt *Mask, bool isSub, Instruction &I) argument
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| /freebsd-10.0-release/contrib/llvm/lib/Target/ARM/InstPrinter/ |
| H A D | ARMInstPrinter.cpp | 1043 bool isSub = OffImm < 0;
1047 if (isSub) {
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| /freebsd-10.0-release/contrib/llvm/tools/clang/lib/CodeGen/ |
| H A D | CGExprScalar.cpp | 2360 bool isSub=false) {
2380 return buildFMulAdd(LHSBinOp, op.RHS, CGF, Builder, false, isSub);
2387 return buildFMulAdd(RHSBinOp, op.LHS, CGF, Builder, isSub, false);
2358 tryEmitFMulAdd(const BinOpInfo &op, const CodeGenFunction &CGF, CGBuilderTy &Builder, bool isSub=false) argument
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