| /broadcom-cfe-1.4.2/build/broadcom/tiny/ |
| H A D | tiny_init.S | 93 # Some CSWARM boards have the SER0 enable bit when
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| /broadcom-cfe-1.4.2/cfe/arch/mips/board/bcm91125cpci/src/ |
| H A D | bcm91125cpci_init.S | 106 # Some BCM91125CPCI boards have the SER0 enable bit when
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| /broadcom-cfe-1.4.2/cfe/arch/mips/board/sentosa/src/ |
| H A D | ui_sentosa.c | 148 int enable; local
151 enable = !cmd_sw_isset(cmd, "-off");
152 if (enable) {
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| /broadcom-cfe-1.4.2/cfe/arch/mips/board/swarm/src/ |
| H A D | ui_swarm.c | 169 int enable; local
172 enable = !cmd_sw_isset(cmd, "-off");
173 if (enable) {
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| H A D | swarm_init.S | 89 * mode, we muck with the SCD to enable uni mode and do a
209 # Some CSWARM boards have the SER0 enable bit when
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| /broadcom-cfe-1.4.2/cfe/include/ |
| H A D | cfe_spi.h | 58 int (*enable)(cfe_spi_channel_t *chan,uint8_t slave); member in struct:cfe_spi_s
78 #define SPI_ENABLE(chan,slave) (chan)->ops->enable(chan,slave)
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| /broadcom-cfe-1.4.2/cfe/arch/mips/board/lausanne/src/ |
| H A D | lausanne_init.S | 109 # Some CSWARM boards have the SER0 enable bit when
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| H A D | ui_lausanne.c | 184 int enable; local
187 enable = !cmd_sw_isset(cmd, "-off");
188 if (enable) {
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| /broadcom-cfe-1.4.2/cfe/arch/mips/cpu/bcm1480/include/ |
| H A D | bcm1480_hsp_utils.h | 336 Function called to enable/disable hardward to generate
342 @param b_enable - enable (1) or disable(0) sync-flood
362 uint32_t enable);
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| /broadcom-cfe-1.4.2/cfe/arch/mips/board/bcm91280e/src/ |
| H A D | ui_bcm91280e.c | 220 int enable; local
223 enable = !cmd_sw_isset(cmd, "-off");
224 if (enable) {
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| /broadcom-cfe-1.4.2/cfe/arch/mips/chipset/bcmsb/src/ |
| H A D | sb_pci_machdep.c | 61 void pci_ext_arb_set(int enable);
62 void pci_ext_clk_set(int enable);
215 /* enable bridge to PCI and PCI memory accesses, including
235 pci_ext_arb_set (int enable) argument
237 _ext_arb = enable;
242 pci_ext_clk_set (int enable) argument
244 _ext_clk = enable;
261 ctrl = M_PCICTL_OE; /* enable reset output */
264 ctrl = M_PCICTL_OE | M_PCICTL_CE;/* enable the tristate drivers */
266 ctrl |= M_PCICTL_CO; /* enable th
[all...] |
| /broadcom-cfe-1.4.2/cfe/arch/mips/chipset/sibyte/src/ |
| H A D | ui_pmcmds.c | 1164 uint32_t enable = 0; local
1180 enable = 0x1 << i;
1181 reg_val = operand | (((uint64_t) enable) << 32);
1194 enable = 0x0001;
1199 enable = (enable << 1) | 0x1;
1202 reg_val = V_BCM1480_HR_ENABLE(enable) |
1241 enable = 0x1;
1244 if ((i & enable) == path)
1251 enable
1307 uint32_t enable = 0; local
[all...] |
| H A D | ui_ccncmds.c | 29 extern void ht_ccn_enable(unsigned int node, unsigned int port, int enable);
497 /* The following command can be issued multiple times to enable all
618 cmd_addcmd("ccn enable",
622 "ccn enable [node]",
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| /broadcom-cfe-1.4.2/cfe/arch/mips/cpu/bcm1480/src/ |
| H A D | bcm1480_l2cache.S | 210 # XXX is this necessary for global enable/disable operations?
264 # XXX is this necessary for global enable/disable operations?
450 # re-enable ECC errors in each channel as appropriate
465 # re-enable ECC errors in global config as appropriate
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| H A D | bcm1480_hsp_utils.c | 555 /* enable the calendar */
613 * Do the RX SPI4 config register. Be sure to enable divide-by-4 mode
789 uint32_t hsp_ht_enable_sync_flood_on_errors(uint32_t port, uint32_t enable);
791 uint32_t hsp_ht_enable_sync_flood_on_errors(uint32_t port, uint32_t enable) argument
799 if (enable)
813 if (enable)
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| H A D | bcm1480_pci_machdep.c | 517 /* PCI: enable bridge to PCI and PCI memory accesses, including
556 /* PCI: enable bus-side access */
623 /* PCI: enable bus-side access */
807 /* HT: enable a split Low Access Range. */
815 /* Clear reset to enable programming of BARs. */
832 /* HT: enable bridge to internal bus */
1616 /* Program and enable our Full Access Bar */
1711 void ht_ccn_enable(unsigned int node, unsigned int port, int enable);
1725 ht_ccn_enable(unsigned int node, unsigned int port, int enable)
1733 if (enable)
1724 ht_ccn_enable(unsigned int node, unsigned int port, int enable) argument
[all...] |
| /broadcom-cfe-1.4.2/cfe/arch/mips/cpu/sb1250/src/ |
| H A D | sb1250_l2cache.S | 196 # XXX is this necessary for global enable/disable operations?
244 # XXX is this necessary for global enable/disable operations?
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| /broadcom-cfe-1.4.2/cfe/arch/ppc/chipset/mpc824x/src/ |
| H A D | dev_tulip.c | 1020 srom_set_enable(tulip_softc *sc, int enable) argument
1025 unsigned int bits = (enable ? 0x3F : 0x00);
1033 /* Send the enable command to the SROM */
3394 void tulip_srom_enable(void *softc, int enable);
3420 tulip_srom_enable(void *softc, int enable)
3426 xprintf("%s: SROM enable not supported\n", tulip_devname(sc));
3434 srom_set_enable(sc, enable);
3419 tulip_srom_enable(void *softc, int enable) argument
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