Searched refs:NOCSINTLV (Results 1 - 9 of 9) sorted by relevance

/broadcom-cfe-1.4.2/cfe/arch/mips/board/bcm91280e/include/
H A Dbsp_config.h126 * NOCSINTLV
131 #define CFG_DRAM_CSINTERLEAVE NOCSINTLV /* Max is 4 CS interleave */
/broadcom-cfe-1.4.2/cfe/arch/mips/board/bcm91480ht/include/
H A Dbsp_config.h122 * NOCSINTLV
127 #define CFG_DRAM_CSINTERLEAVE NOCSINTLV /* Max is 4 CS interleave */
/broadcom-cfe-1.4.2/cfe/arch/mips/board/sentosa/src/
H A Dsentosa_init.S293 DRAM_CHAN_CFG2(MC_CHAN0, DRT10(5,0), DRT10(2,5), FCRAM, CLOSED, BLKSIZE32, NOCSINTLV, CFG_DRAM_ECC, 0)
314 DRAM_CHAN_CFG2(MC_CHAN1, DRT10(5,0), DRT10(2,5), FCRAM, CLOSED, BLKSIZE32, NOCSINTLV, CFG_DRAM_ECC, 0)
/broadcom-cfe-1.4.2/cfe/arch/mips/cpu/sb1250/include/
H A Dsb1250_draminit.h287 #define NOCSINTLV 0 /* Chip select interleave values */ macro
/broadcom-cfe-1.4.2/cfe/arch/mips/cpu/bcm1480/include/
H A Dbcm1480_draminit.h333 #define NOCSINTLV 0 macro
/broadcom-cfe-1.4.2/cfe/hosttools/
H A Dmemconfig1480.c781 init->cfg.cfg_intlv_cs = NOCSINTLV;
869 init->cfg.cfg_intlv_cs = NOCSINTLV;
H A Dmemconfig.c727 init->cfg.cfg_intlv_cs = NOCSINTLV;
/broadcom-cfe-1.4.2/cfe/arch/mips/cpu/sb1250/src/
H A Dsb1250_draminit.c1323 DRAM_CHAN_CFG(MC_CHAN0, 80, JEDEC, CASCHECK, BLKSIZE32, NOCSINTLV, ECCDISABLE, 0),
1344 DRAM_CHAN_CFG(MC_CHAN0, 80, JEDEC, CASCHECK, BLKSIZE32, NOCSINTLV, ECCDISABLE, 0),
/broadcom-cfe-1.4.2/cfe/arch/mips/cpu/bcm1480/src/
H A Dbcm1480_draminit.c3846 if ( (d->mc[mcidx].cfgcsint > NOCSINTLV) &&
3877 if (d->mc[mcidx].csint > NOCSINTLV)

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