Searched refs:CFG_DRAM_MIN_tMEMCLK (Results 1 - 3 of 3) sorted by relevance

/broadcom-cfe-1.4.2/cfe/arch/mips/board/lausanne/include/
H A Dbsp_config.h110 #define CFG_DRAM_MIN_tMEMCLK DRT10(8,1) /* 8.1 ns (124Mhz) */ macro
/broadcom-cfe-1.4.2/cfe/arch/mips/board/swarm/include/
H A Dbsp_config.h110 #define CFG_DRAM_MIN_tMEMCLK DRT10(5,0) macro
/broadcom-cfe-1.4.2/cfe/arch/mips/cpu/sb1250/src/
H A Dsb1250_draminit.c309 #ifndef CFG_DRAM_MIN_tMEMCLK
310 #define CFG_DRAM_MIN_tMEMCLK DRT10(8,0) /* 8 ns, 125Mhz */ macro
1371 DRAM_CHAN_CFG(MC_CHAN0, CFG_DRAM_MIN_tMEMCLK, DRAM_TYPE_SPD, CASCHECK, CFG_DRAM_BLOCK_SIZE, CFG_DRAM_CSINTERLEAVE, CFG_DRAM_ECC, 0),
1380 DRAM_CHAN_CFG(MC_CHAN1, CFG_DRAM_MIN_tMEMCLK, DRAM_TYPE_SPD, CASCHECK, CFG_DRAM_BLOCK_SIZE, CFG_DRAM_CSINTERLEAVE, CFG_DRAM_ECC, 0),
1405 DRAM_CHAN_CFG(MC_CHAN1, CFG_DRAM_MIN_tMEMCLK, DRAM_TYPE_SPD, CASCHECK, CFG_DRAM_BLOCK_SIZE, CFG_DRAM_CSINTERLEAVE, CFG_DRAM_ECC, 0),

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