Searched refs:C0_WATCHLO (Results 1 - 6 of 6) sorted by relevance
| /broadcom-cfe-1.4.2/cfe/arch/mips/cpu/bcm1480/src/ |
| H A D | sb1_cpuinit.S | 217 mtc0 zero,C0_WATCHLO # Clear out the watch regs.
234 mtc0 zero,C0_WATCHLO,0 # Watch registers.
236 mtc0 zero,C0_WATCHLO,1
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| /broadcom-cfe-1.4.2/cfe/arch/mips/cpu/sb1250/src/ |
| H A D | sb1_cpuinit.S | 216 mtc0 zero,C0_WATCHLO # Clear out the watch regs.
233 mtc0 zero,C0_WATCHLO,0 # Watch registers.
235 mtc0 zero,C0_WATCHLO,1
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| /broadcom-cfe-1.4.2/cfe/arch/mips/cpu/bcmcore/src/ |
| H A D | bcmcore_cpuinit.S | 147 mtc0 zero,C0_WATCHLO # Watch registers.
168 mtc0 zero,C0_WATCHLO # Watch registers.
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| /broadcom-cfe-1.4.2/cfe/arch/mips/chipset/sibyte/include/ |
| H A D | sbmips.h | 244 #define C0_WATCHLO $18 /* CP0: WatchpointLo */ macro
283 #define C0_WATCHLO 18 /* CP0: WatchpointLo */ macro
457 _cp0_get_reg_u64 (watchlo, C0_WATCHLO, 0)
458 _cp0_set_reg_u64 (watchlo, C0_WATCHLO, 0)
461 _cp0_get_reg_u64 (watchlo1, C0_WATCHLO, 1)
462 _cp0_set_reg_u64 (watchlo1, C0_WATCHLO, 1)
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| /broadcom-cfe-1.4.2/cfe/arch/mips/cpu/bcmcore/include/ |
| H A D | sbmips32.h | 191 #define C0_WATCHLO $18 /* CP0: WatchpointLo */ macro
221 #define C0_WATCHLO 18 /* CP0: WatchpointLo */ macro
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| /broadcom-cfe-1.4.2/cfe/verif/ |
| H A D | vapi.S | 425 LSAVECP0(C0_WATCHLO,49)
794 SAVECP0(C0_WATCHLO,49)
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Completed in 98 milliseconds