Searched refs:channel (Results 126 - 150 of 166) sorted by relevance

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/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/contrib/ath_hal/ar9300/
H A Dar9300_recv_ds.c193 rxs->rs_channel = AH_PRIVATE(ah)->ah_curchan->channel;
H A Dar9300_paprd.c78 ar9300_set_target_power_from_eeprom(ah, ichan->channel, target_power_val_t2);
96 AH_PAPRD_GET_SCALE_FACTOR(paprd_scale_factor, eep, is_2g, ichan->channel);
124 "TGT PWR 0x%08x\n", __func__, __LINE__, ichan->channel,
195 __func__, __LINE__, ichan->channel,
418 "%s: invalid channel %u/0x%x; not marked as 2GHz or 5GHz\n",
419 __func__, chan->channel, chan->channel_flags);
430 "%s: invalid channel %u/0x%x; not marked as "
432 chan->channel, chan->channel_flags);
470 if (ichan->channel >= UPPER_5G_SUB_BANDSTART) {
474 } else if (ichan->channel >
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H A Dar9300_spectral.c457 ar9300_noise_floor_get(ah, chan->channel, ichain);
459 ar9300_noise_floor_power_get(ah, chan->channel, ichain);
/haiku/src/kits/media/legacy/
H A DOldMediaModule.cpp88 BEventStream::SeekToTime(BMediaChannel *channel, argument
/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/dev/ath/ath_hal/
H A Dah_regdomain.c84 * with shared properties - max tx power, max antenna gain, channel width,
85 * channel spacing, DFS requirements and passive scanning requirements.
89 * or more frequency band entries for each of the channel modes
524 /* channel not supported by hardware, skip it */
537 * 5G HT40 channels require 40Mhz channel separation.
569 * be allowed to use channel 144 (pri or sec overlap.)
576 * Don't start the 5GHz channel list at 5120MHz.
578 * Unfortunately (sigh) the HT40 channel creation
581 * HT40 channel, and everything goes messed up from there.
624 "%s: too many channels for channel tabl
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H A Dah_internal.h157 * has to pre-populate the per-channel list with nominal values.
186 * Internal per-channel state. These are found
190 uint16_t channel; /* h/w frequency, NB: may be mapped */ member in struct:__anon108
203 uint16_t mainSpur; /* cached spur value for this channel */
212 /* channel requires noise floor check */
401 const struct ieee80211_channel *ah_curchan;/* operating channel */
437 * Channel survey history - current channel only.
439 HAL_CHANNEL_SURVEY ah_chansurvey; /* channel survey */
554 #define IS_CHAN_5GHZ(_c) ((_c)->channel > 4900)
698 * Return the test group for the specific channel base
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/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/dev/ath/ath_hal/ar5212/
H A Dar2316.c88 * Take the MHz channel value and set the Channel value
114 "%s: invalid channel %u MHz\n",
124 /* Enable channel spreading for channel 14 */
144 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel %u MHz\n",
359 ar2316getGainBoundariesAndPdadcsForPowers(struct ath_hal *ah, uint16_t channel, argument
387 GetLowerUpperIndex(channel, pRawDataset->pChannels,
420 channel, pRawDataset->pChannels[idxL], pRawDataset->pChannels[idxR],
538 chan->channel, pRawDataset, pdGainOverlap_t2,
668 /* Make sure the channel i
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H A Dar2317.c79 * Take the MHz channel value and set the Channel value
101 /* Enable channel spreading for channel 14 */
121 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel %u MHz\n",
336 ar2317getGainBoundariesAndPdadcsForPowers(struct ath_hal *ah, uint16_t channel, argument
365 GetLowerUpperIndex(channel, pRawDataset->pChannels,
398 channel, pRawDataset->pChannels[idxL], pRawDataset->pChannels[idxR],
516 chan->channel, pRawDataset, pdGainOverlap_t2,
648 /* Make sure the channel is in the range of the TP values
H A Dar5413.c75 * Take the MHz channel value and set the Channel value
101 "%s: invalid channel %u MHz\n",
111 /* Enable channel spreading for channel 14 */
136 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel %u MHz\n",
210 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel flags 0x%x\n",
396 ar5413getGainBoundariesAndPdadcsForPowers(struct ath_hal *ah, uint16_t channel, argument
424 GetLowerUpperIndex(channel, pRawDataset->pChannels,
457 channel, pRawDataset->pChannels[idxL], pRawDataset->pChannels[idxR],
708 /* Make sure the channel i
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H A Dar2413.c75 * Take the MHz channel value and set the Channel value
101 "%s: invalid channel %u MHz\n",
111 /* Enable channel spreading for channel 14 */
136 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel %u MHz\n",
353 ar2413getGainBoundariesAndPdadcsForPowers(struct ath_hal *ah, uint16_t channel, argument
381 GetLowerUpperIndex(channel, pRawDataset->pChannels,
414 channel, pRawDataset->pChannels[idxL], pRawDataset->pChannels[idxR],
663 /* Make sure the channel is in the range of the TP values
H A Dar2425.c82 * Take the MHz channel value and set the Channel value
105 // Enable channel spreading for channel 14
131 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel %u MHz\n",
355 ar2425getGainBoundariesAndPdadcsForPowers(struct ath_hal *ah, uint16_t channel, argument
388 GetLowerUpperIndex(channel, pRawDataset->pChannels,
421 channel, pRawDataset->pChannels[idxL], pRawDataset->pChannels[idxR],
625 /* Make sure the channel is in the range of the TP values
H A Dar5212_reset.c59 static uint16_t ar5212GetMaxEdgePower(uint16_t channel,
87 /* On channel change, don't reset the PCU registers */
116 * a HW Reset during channel change.
156 * Map public channel to private.
177 /* Preserve certain DMA hardware registers on a channel change */
203 /* Blank the channel survey statistics */
212 /* If the channel change is across the same mode - perform a fast channel change */
215 * Fast channel change can only be used when:
216 * -channel chang
2492 ar5212GetMaxEdgePower(uint16_t channel, const RD_EDGES_POWER *pRdEdgesPower) argument
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/haiku/src/apps/tv/
H A DMainWin.cpp80 // this limits possible channel count to 0xeffff = 983039
181 fChannelMenu->AddItem(new BMenuItem(B_TRANSLATE("Next channel"),
183 fChannelMenu->AddItem(new BMenuItem(B_TRANSLATE("Previous channel"),
292 fChannelMenu->AddItem(new BMenuItem(B_TRANSLATE("Next channel"),
294 fChannelMenu->AddItem(new BMenuItem(B_TRANSLATE("Previous channel"),
335 int channel = fController->CurrentChannel(); local
336 printf("MainWin::SetChannelMenuMarker: channel %d\n", channel);
344 int index = (channel < 0) ? 0 : channel
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/haiku/src/add-ons/accelerants/intel_extreme/
H A DPorts.cpp842 aux_channel channel = _DpAuxChannel(); local
843 TRACE("%s: %s DpAuxChannel: 0x%x\n", __func__, PortName(), channel);
845 || (gInfo->shared_info->pch_info != INTEL_PCH_NONE && channel == AUX_CH_A)) {
846 channelControl = DP_AUX_CH_CTL(channel);
848 channelData[i] = DP_AUX_CH_DATA(channel, i);
850 channelControl = PCH_DP_AUX_CH_CTL(channel);
852 channelData[i] = PCH_DP_AUX_CH_DATA(channel, i);
863 ERROR("%s: %s AUX channel is busy!\n", __func__, PortName());
877 if (channel != AUX_CH_A)
880 if (gInfo->shared_info->pch_info == INTEL_PCH_LPT && channel !
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/haiku/src/add-ons/kernel/drivers/audio/usb/
H A DAudioControlInterface.h318 uint32 channel, uint32 channels);
/haiku/src/add-ons/kernel/drivers/network/wlan/idualwifi7260/dev/pci/
H A Dif_iwmvar.h363 struct ieee80211_channel *channel; member in struct:iwm_phy_ctxt
364 uint8_t sco; /* 40 MHz secondary channel offset */
502 /* Task for HT 20/40 MHz channel width updates. */
H A Dif_iwmreg.h211 #define IWM_CSR_FH_INT_BIT_RX_CHNL1 (1 << 17) /* Rx channel 1 */
212 #define IWM_CSR_FH_INT_BIT_RX_CHNL0 (1 << 16) /* Rx channel 0 */
213 #define IWM_CSR_FH_INT_BIT_TX_CHNL1 (1 << 1) /* Tx channel 1 */
214 #define IWM_CSR_FH_INT_BIT_TX_CHNL0 (1 << 0) /* Tx channel 0 */
848 * channel in DS parameter set element in probe requests.
854 * @IWM_UCODE_TLV_CAPA_TDLS_CHANNEL_SWITCH: supports TDLS channel switching
1228 * device. A queue maps to only one (selectable by driver) Tx DMA channel,
1229 * but one DMA channel may take input from several queues.
1455 * queue, and only one Rx DMA/FIFO channel. Also unlike Tx, which can
1550 * Rx Config Reg for channel
3074 uint8_t channel; member in struct:iwm_fw_channel_info_v1
3089 uint32_t channel; member in struct:iwm_fw_channel_info
3230 uint16_t channel; member in struct:iwm_rx_phy_info
3355 uint8_t channel; member in struct:iwm_rx_mpdu_desc_v1
5517 uint8_t channel; member in struct:iwm_scan_results_notif
5873 struct iwm_scan_umac_chan_param channel; member in struct:iwm_scan_req_umac::__anon48::__anon49
5884 struct iwm_scan_umac_chan_param channel; member in struct:iwm_scan_req_umac::__anon48::__anon50
5898 struct iwm_scan_umac_chan_param channel; member in struct:iwm_scan_req_umac::__anon48::__anon51
5913 struct iwm_scan_umac_chan_param channel; member in struct:iwm_scan_req_umac::__anon48::__anon52
5928 struct iwm_scan_umac_chan_param channel; member in struct:iwm_scan_req_umac::__anon48::__anon53
5982 uint8_t channel; member in struct:iwm_scan_offload_profile_match
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/haiku/src/add-ons/kernel/drivers/audio/emuxki/
H A Demuxki.h152 * Emu10k1 play channel params
362 emuxki_channel *channel[EMU_NUMCHAN]; member in struct:_emuxki_dev
/haiku/src/add-ons/kernel/drivers/network/wlan/iaxwifi200/dev/pci/
H A Dif_iwxreg.h633 #define IWX_CSR_FH_INT_BIT_RX_CHNL1 (1 << 17) /* Rx channel 1 */
634 #define IWX_CSR_FH_INT_BIT_RX_CHNL0 (1 << 16) /* Rx channel 0 */
635 #define IWX_CSR_FH_INT_BIT_TX_CHNL1 (1 << 1) /* Tx channel 1 */
636 #define IWX_CSR_FH_INT_BIT_TX_CHNL0 (1 << 0) /* Tx channel 0 */
837 * Bits 31:30: Enable the SRAM DMA channel.
1295 * channel in DS parameter set element in probe requests.
1301 * @IWX_UCODE_TLV_CAPA_TDLS_CHANNEL_SWITCH: supports TDLS channel switching
2127 * channel flags in NVM
2128 * @IWX_NVM_CHANNEL_VALID: channel is usable for this SKU/geo
2129 * @IWX_NVM_CHANNEL_IBSS: usable as an IBSS channel
3329 uint8_t channel; member in struct:iwx_fw_channel_info_v1
3344 uint32_t channel; member in struct:iwx_fw_channel_info
3520 uint16_t channel; member in struct:iwx_rx_phy_info
3648 uint8_t channel; member in struct:iwx_rx_mpdu_desc_v3
3684 uint8_t channel; member in struct:iwx_rx_mpdu_desc_v1
6501 uint8_t channel; member in struct:iwx_scan_results_notif
6913 struct iwx_scan_umac_chan_param channel; member in struct:iwx_scan_req_umac::__anon50::__anon51
6924 struct iwx_scan_umac_chan_param channel; member in struct:iwx_scan_req_umac::__anon50::__anon52
6938 struct iwx_scan_umac_chan_param channel; member in struct:iwx_scan_req_umac::__anon50::__anon53
6953 struct iwx_scan_umac_chan_param channel; member in struct:iwx_scan_req_umac::__anon50::__anon54
6968 struct iwx_scan_umac_chan_param channel; member in struct:iwx_scan_req_umac::__anon50::__anon55
7141 uint8_t channel; member in struct:iwx_scan_offload_profile_match
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H A Dif_iwx.c3069 struct ieee80211_channel *channel; local
3090 /* net80211 cannot handle 6 GHz channel numbers yet */
3099 channel = &ic->ic_channels[hw_value];
3102 channel->ic_freq = 0;
3103 channel->ic_flags = 0;
3109 channel->ic_flags
3116 channel->ic_flags =
3119 channel->ic_freq = ieee80211_ieee2mhz(hw_value, flags);
3122 channel->ic_flags |= IEEE80211_CHAN_PASSIVE;
3125 channel
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H A Dif_iwxvar.h327 struct ieee80211_channel *channel; member in struct:iwx_phy_ctxt
328 uint8_t sco; /* 40 MHz secondary channel offset */
653 /* Task for HT 20/40 MHz channel width updates. */
/haiku/src/add-ons/media/media-add-ons/radeon/
H A DRadeonProducer.cpp255 for (int channel = 0; channel <= 125; channel++) {
257 sprintf(buffer, "%d", channel);
258 tuner->AddItem(channel, buffer);
/haiku/src/add-ons/kernel/drivers/network/wlan/marvell88w8335/dev/malo/
H A Dif_malo.h253 uint8_t cur_channel; /* channel # */
433 uint8_t channel; /* channel # pkt received on */ member in struct:malo_rxdesc
H A Dif_malohal.c682 cmd->cur_channel = chan->channel;
696 uint8_t chan = c->channel;
/haiku/src/add-ons/kernel/drivers/network/wlan/marvell88w8363/dev/mwl/
H A Dmwlhal.h114 uint16_t freq; /* channel center */
115 uint8_t ieee; /* channel number */
191 uint32_t channel; member in struct:__anon1220
330 * Initiate an 802.11h-based channel switch. The CSA ie
396 * Set the transmit power for the specified channel; the power
494 * Set the current channel.

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