| /freebsd-10.1-release/contrib/llvm/lib/CodeGen/ |
| H A D | LiveStackAnalysis.cpp | 58 LiveStacks::getOrCreateInterval(int Slot, const TargetRegisterClass *RC) { argument
80 const TargetRegisterClass *RC = getIntervalRegClass(Slot); local
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| H A D | AggressiveAntiDepBreaker.h | 45 const TargetRegisterClass *RC; member in struct:llvm::AggressiveAntiDepState::__anon2221
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| H A D | RegisterClassInfo.cpp | 154 const TargetRegisterClass *RC local
[all...] |
| H A D | CriticalAntiDepBreaker.cpp | 592 const TargetRegisterClass *RC = AntiDepReg != 0 ? Classes[AntiDepReg] : 0; local
359 findSuitableFreeRegister(RegRefIter RegRefBegin, RegRefIter RegRefEnd, unsigned AntiDepReg, unsigned LastNewReg, const TargetRegisterClass *RC, SmallVectorImpl<unsigned> &Forbid) argument
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| H A D | LocalStackSlotAllocation.cpp | 342 const TargetRegisterClass *RC = TRI->getPointerRegClass(*MF); local
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| H A D | MachineRegisterInfo.cpp | 46 MachineRegisterInfo::setRegClass(unsigned Reg, const TargetRegisterClass *RC) { argument
52 constrainRegClass(unsigned Reg, const TargetRegisterClass *RC, unsigned MinNumRegs) argument
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| H A D | RegisterScavenging.cpp | 271 BitVector RegScavenger::getRegsAvailable(const TargetRegisterClass *RC) { argument
361 unsigned RegScavenger::scavengeRegister(const TargetRegisterClass *RC, argument
[all...] |
| /freebsd-10.1-release/contrib/llvm/lib/Target/R600/ |
| H A D | SIRegisterInfo.cpp | 36 unsigned SIRegisterInfo::getRegPressureLimit(const TargetRegisterClass *RC, argument
119 getSubRegClass( const TargetRegisterClass *RC, unsigned SubIdx) const argument
[all...] |
| H A D | SIFixSGPRCopies.cpp | 142 const TargetRegisterClass *RC = MRI.getRegClass(Reg); local
164 const TargetRegisterClass *RC = TRI->getPhysRegClass(Reg); local
222 const TargetRegisterClass *RC = inferRegClassFromDef(TRI, MRI, Reg, local
227 const TargetRegisterClass *RC = inferRegClassFromUses(TRI, MRI, Reg, local
[all...] |
| /freebsd-10.1-release/contrib/llvm/lib/Target/ARM/ |
| H A D | Thumb1InstrInfo.cpp | 52 storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned SrcReg, bool isKill, int FI, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument
80 loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned DestReg, int FI, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument
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| H A D | Thumb2InstrInfo.cpp | 127 storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned SrcReg, bool isKill, int FI, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument
170 loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned DestReg, int FI, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument
[all...] |
| /freebsd-10.1-release/contrib/llvm/lib/Target/Mips/ |
| H A D | MipsInstrInfo.h | 86 storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument
94 loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned DestReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument
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| H A D | MipsMachineFunction.cpp | 84 const TargetRegisterClass *RC; local
102 const TargetRegisterClass *RC; local
110 const TargetRegisterClass *RC = ST.isABI_N64() ? local
[all...] |
| H A D | Mips16RegisterInfo.cpp | 61 saveScavengerRegister(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, MachineBasicBlock::iterator &UseMI, const TargetRegisterClass *RC, unsigned Reg) const argument
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| H A D | MipsRegisterInfo.cpp | 57 MipsRegisterInfo::getRegPressureLimit(const TargetRegisterClass *RC, argument
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| H A D | MipsSERegisterInfo.cpp | 144 const TargetRegisterClass *RC = local
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| /freebsd-10.1-release/contrib/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXRegisterInfo.cpp | 29 std::string getNVPTXRegClassName(TargetRegisterClass const *RC) { argument
51 std::string getNVPTXRegClassStr(TargetRegisterClass const *RC) { argument
[all...] |
| /freebsd-10.1-release/contrib/llvm/utils/TableGen/ |
| H A D | FastISelEmitter.cpp | 36 const CodeGenRegisterClass *RC; member in struct:__anon3855::InstructionMemo
[all...] |
| /freebsd-10.1-release/crypto/openssl/crypto/whrlpool/ |
| H A D | wp_block.c | 461 #define RC (&(Cx.q[256*N])) macro
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| /freebsd-10.1-release/contrib/llvm/include/llvm/CodeGen/ |
| H A D | RegisterClassInfo.h | 120 getMinCost(const TargetRegisterClass *RC) argument
128 getLastCostChange(const TargetRegisterClass *RC) argument
[all...] |
| /freebsd-10.1-release/contrib/llvm/lib/Target/MSP430/ |
| H A D | MSP430InstrInfo.cpp | 37 storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned SrcReg, bool isKill, int FrameIdx, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument
65 loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned DestReg, int FrameIdx, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument
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| /freebsd-10.1-release/contrib/llvm/include/llvm/IR/ |
| H A D | InlineAsm.h | 254 static unsigned getFlagWordForRegClass(unsigned InputFlag, unsigned RC) { argument
293 static bool hasRegClassConstraint(unsigned Flag, unsigned &RC) { argument
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| /freebsd-10.1-release/contrib/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | InstrEmitter.cpp | 134 const TargetRegisterClass *RC = 0; local
221 const TargetRegisterClass *RC = local
291 const TargetRegisterClass *RC = local
[all...] |
| H A D | ResourcePriorityQueue.cpp | 370 const TargetRegisterClass *RC = *I; local
377 const TargetRegisterClass *RC = *I; local
490 const TargetRegisterClass *RC local
501 const TargetRegisterClass *RC = TLI->getRegClassFor(VT); local
[all...] |
| H A D | ScheduleDAGSDNodes.cpp | 127 const TargetRegisterClass *RC = local
|