Lines Matching defs:rm

339     modrm_byte rm;
2756 x->rm.mode, x->rm.reg, x->rm.regmem);
3167 gas_assert (i.rm.mode == 3);
3170 xchg = i.rm.regmem;
3171 i.rm.regmem = i.rm.reg;
3172 i.rm.reg = xchg;
6380 i.rm.mode = 3;
6386 destination in the i.rm.reg field. */
6390 i.rm.reg = i.op[dest].regs->reg_num;
6391 i.rm.regmem = i.op[source].regs->reg_num;
6403 i.rm.reg = i.op[source].regs->reg_num;
6404 i.rm.regmem = i.op[dest].regs->reg_num;
6443 i.rm.regmem = ESCAPE_TO_TWO_BYTE_ADDRESSING;
6476 i.rm.mode = 0;
6495 i.rm.regmem = ESCAPE_TO_TWO_BYTE_ADDRESSING;
6504 i.rm.regmem = NO_BASE_REGISTER_16;
6509 i.rm.regmem = NO_BASE_REGISTER;
6523 i.rm.regmem = ESCAPE_TO_TWO_BYTE_ADDRESSING;
6549 i.rm.regmem = NO_BASE_REGISTER;
6567 i.rm.regmem = 7;
6569 i.rm.regmem = i.index_reg->reg_num - 6;
6575 i.rm.regmem = 6;
6587 i.rm.regmem = i.index_reg->reg_num - 6 + 2;
6590 i.rm.regmem = i.base_reg->reg_num - 6 + 4;
6592 i.rm.mode = mode_from_disp_size (i.types[op]);
6612 i.rm.regmem = i.base_reg->reg_num;
6636 in i.rm.regmem ie. ESCAPE_TO_TWO_BYTE_ADDRESSING.
6648 i.rm.regmem = ESCAPE_TO_TWO_BYTE_ADDRESSING;
6656 i.rm.mode = 0;
6669 i.rm.mode = mode_from_disp_size (i.types[op]);
6709 i.rm.reg = i.op[2].regs->reg_num;
6713 /* ModRM.rm and VEX.B encodes the other source. */
6716 i.rm.mode = 3;
6719 i.rm.regmem = i.op[1].regs->reg_num;
6721 i.rm.regmem = i.op[0].regs->reg_num;
6732 i.rm.mode = 3;
6733 i.rm.regmem = i.op[1].regs->reg_num;
6738 /* Fill in i.rm.reg or i.rm.regmem field with register operand
6741 registers are coded into the i.rm.reg field. */
6839 i.rm.regmem = i.op[op].regs->reg_num;
6847 i.rm.reg = i.op[op].regs->reg_num;
6855 /* Now, if no memory operand has set i.rm.mode = 0, 1, 2 we
6859 i.rm.mode = 3;
6862 /* Fill in i.rm.reg field with extension opcode (if any). */
6864 i.rm.reg = i.tm.extension_opcode;
7271 FRAG_APPEND_1_CHAR ((i.rm.regmem << 0
7272 | i.rm.reg << 3
7273 | i.rm.mode << 6));
7274 /* If i.rm.regmem == ESP (4)
7275 && i.rm.mode != (Register mode)
7278 if (i.rm.regmem == ESCAPE_TO_TWO_BYTE_ADDRESSING
7279 && i.rm.mode != 3
7442 && i.rm.mode == 0
7443 && i.rm.regmem == 5))
7444 && (i.rm.mode == 2
7445 || (i.rm.mode == 0 && i.rm.regmem == 5))
7448 && (i.rm.reg == 2 || i.rm.reg == 4))