#
d678a59d |
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18-May-2024 |
Tom Rini <trini@konsulko.com> |
Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"" When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"' I failed to notice that b4 noticed it was based on next and so took that as the base commit and merged that part of next to master. This reverts commit c8ffd1356d42223cbb8c86280a083cc3c93e6426, reversing changes made to 2ee6f3a5f7550de3599faef9704e166e5dcace35. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com> |
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7938ac65 |
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01-May-2024 |
Tom Rini <trini@konsulko.com> |
mmc: Remove <common.h> and add needed includes Remove <common.h> from this driver directory and when needed add missing include files directly. Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Peter Robinson <pbrobinson@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com> |
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d379bcbf |
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30-Oct-2023 |
Samuel Holland <samuel@sholland.org> |
sunxi: mmc: Sort compatible strings numerically commit 95168d77d391 ("sunxi: add Allwinner R528/T113 SoC support") added the new entry out of order. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> |
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43b573df |
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30-Oct-2023 |
Samuel Holland <samuel@sholland.org> |
sunxi: mmc: Move header to the driver directory The MMC controller driver is (and ought to be) the only user of these register definitions. Put them in a header next to the driver to remove the dependency on a specific ARM platform's headers. Due to the sunxi_mmc_init() prototype, the file was not renamed. None of the register definitions were changed. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> |
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95168d77 |
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06-Sep-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add Allwinner R528/T113 SoC support This adds the remaining code bits to teach U-Boot about Allwinner's newest SoC generation. This was introduced with the RISC-V based Allwinner D1 SoC, which actually shares a die with the ARM cores versions called R528 (BGA, without DRAM) and T113s (QFP, with embedded DRAM). This adds the new Kconfig stanza, using the two newly introduced symbols for the new SoC generation and pincontroller. It also adds the new symbols to the relavent code places, to set all the hardcoded bits directly. We need one DT override: The ARM core version of the DT specifies the CPUX watchdog as "reserved", which means it won't be recognised by U-Boot. Override this in our generic sunxi-u-boot.dtsi, to let U-Boot pick up this watchdog, so that the generic reset driver will work. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
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4a9e89a3 |
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05-Oct-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: introduce NCAT2 generation model Allwinner seems to typically stick to a common MMIO memory map for several SoCs, but from time to time does some breaking changes, which also introduce new generations of some peripherals. The last time this happened with the H6, which apart from re-organising the base addresses also changed the clock controller significantly. We added a CONFIG_SUN50I_GEN_H6 symbol back then to mark SoCs sharing those traits. Now the Allwinner D1 changes the memory map again, and also extends the pincontroller, among other peripherals. To mark this generation of SoCs, add a CONFIG_SUNXI_GEN_NCAT2 symbol, this name is reportedly used in the Allwinner BSP code, and prevents us from inventing our own name. Add this new symbol to some guards that were already checking for the H6 generation, since many features are shared between the two (like the renovated clock controller). This paves the way to introduce a first user of this generation. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Samuel Holland <samuel@sholland.org> |
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207ed0a3 |
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06-Sep-2022 |
Andre Przywara <andre.przywara@arm.com> |
pinctrl: sunxi: remove GPIO_EXTRA_HEADER U-Boot's generic GPIO_EXTRA_HEADER is a convenience symbol to allow code to more easily include platform specific GPIO headers. This should not be needed in a DM world anymore, since the generic GPIO framework handles that nicely. For Allwinner boards we still need to deal with non-DM GPIO in the SPL, but this should become the exception, not the rule. Make this more obvious by removing the definition of GPIO_EXTRA_HEADER, and just force every legacy user of platform specific GPIO to include the new sunxi_gpio.h header explicitly. Everyone doing so should feel ashamed and should find a way to avoid it from now on. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Samuel Holland <samuel@sholland.org> |
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ba16b531 |
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13-Jul-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: mmc: group non-DM specific functions As the SPL code for sunxi boards does not use the driver model, we have two mmc_ops structures, one for DM, one for non-DM. The actual hardware access code is shared, with the respective callback functions using that common code. To make this more obvious and easier to read, reorder the functions to group them: we first have the common code, then the non-DM bits, and the proper DM implementation at the end. Also document this structure in the comment at the beginning of the file. No functional change intended. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Samuel Holland <samuel@sholland.org> Tested-by: Samuel Holland <samuel@sholland.org> |
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5db81f1c |
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13-Jul-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: mmc: ignore card detect in SPL The sunxi MMC code does not use the DM in the SPL, as we don't have a device tree available that early, also no space for it. This also means we cannot access the card-detect GPIO information from there, so we have Kconfig symbols called CONFIG_MMCx_CD_PIN, which each board has to define. This is a burden, also requires extra GPIO code in the SPL. As the SPL is the natural successor of the BootROM (from which we are loaded), we can actually ignore the CD pin completely, as this is what the BootROM does as well: CD GPIOs are board specific, but the BootROM is not, so accesses the MMC devices anyway. Also, as we must have been loaded from an MMC device when reaching this code, there must have been a card in the slot. Remove the card detect code from the non-DM implementation of the sunxi MMC driver, to get rid of this unneeded code. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Samuel Holland <samuel@sholland.org> Tested-by: Samuel Holland <samuel@sholland.org> |
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fb6f6701 |
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20-Oct-2021 |
Samuel Holland <samuel@sholland.org> |
mmc: sunxi: Use DM_GPIO flags to set pull-up Now that the sunxi_gpio driver handles pull-up/down via the driver model, pin configuration does not need a platform-specific function. Signed-off-by: Samuel Holland <samuel@sholland.org> Tested-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
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c846fe43 |
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22-Jul-2021 |
Icenowy Zheng <icenowy@sipeed.com> |
mmc: sunxi: conditionally include MMC2 initialization code Allwinner R329 has no MMC2. Only include the code of MMC2 if the base address of it is defined. Signed-off-by: Icenowy Zheng <icenowy@sipeed.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
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42508461 |
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11-Sep-2021 |
Samuel Holland <samuel@sholland.org> |
sunxi: Clean up inclusions of asm/arch/gpio.h As part of migrating to DM_GPIO and DM_PINCTRL, eventually we will remove the asm/arch/gpio.h header. In preparation, clean up the various files that include it. Some files did not contain any GPIO code at all, so this header was completely unused. A few files contained only legacy platform-specific GPIO code for setting up pin muxes. They were left unchanged, as that code will be completely removed by the DM_PINCTRL migration. The remaining files contain some combination of DM_GPIO and legacy GPIO code. For those, switch to including asm/gpio.h (if it wasn't included already). Right now, this header provides both sets of functions, because ARCH_SUNXI selects GPIO_EXTRA_HEADER. This will still be the right header to include once the DM_GPIO migration is complete and GPIO_EXTRA_HEADER is no longer needed. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
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0b508ca8 |
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03-Sep-2021 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: mmc: A20: Fix MMC optimisation Some SoCs (as seen on A20) seem to misreport the MMC FIFO level if the FIFO is completely full: the level size reads as zero, but the FIFO_FULL bit is set. We won't do a single iteration of the read loop in this case, so will be stuck forever. Check for this situation and use a safe minimal FIFO size instead when we hit this case. This fixes MMC boot on A20 devices after the MMC FIFO optimisation (9faae5457f52). Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> |
#
ac62dadb |
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21-Apr-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Use mmc_of_parse() At the moment the Allwinner MMC driver parses the bus-width and non-removable DT properties itself, in the probe() routine. There is actually a generic function provided by the MMC framework doing this job, also it parses more generic properties like broken-cd and advanced transfer modes. Drop our own code and call mmc_of_parse() instead, to get all new features for free. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> |
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9faae545 |
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05-May-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Increase MMIO FIFO read performance To avoid the complexity of DMA operations (with chained descriptors), we use repeated MMIO reads and writes to the SD_FIFO_REG, which allows us to drain or fill the MMC data buffer FIFO very easily. However those MMIO accesses are somewhat costly, so this limits our MMC performance, to between 17 and 22 MB/s, but down to 9.5 MB/s on the H6 (partly due to the lower AHB1 frequency). As it turns out we read the FIFO status register after *every* word we read or write, which effectively doubles the number of MMIO accesses, thus effectively more than halving our performance. To avoid this overhead, we can make use of the FIFO level bits, which are in the very same FIFO status registers. So for a read request, we now can collect as many words as the FIFO level originally indicated, and only then need to update the status register. We don't know for sure the size of the FIFO (and it seems to differ across SoCs anyway), so writing is more fragile, which is why we still use the old method for that. If we find a minimum FIFO size available on all SoCs, we could use that, in a later optimisation. This patch increases the eMMC read speed on a Pine64-LTS from about 22MB/s to 44 MB/s. SD card reads don't gain that much, but with 23 MB/s we now reach the practical limit for 3.3V SD cards. On the H6 we double our transfer speed, from 9.5 MB/s to 19.7 MB/s. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
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b5dd39c9 |
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05-May-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Cleanup and fix self-calibration code Newer SoCs have a self calibration feature, which avoids us writing hard coded phase delay values into the controller. Consolidate the code by avoiding unnecessary #ifdefs, and also enabling the feature for all those newer SoCs. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
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f85c0912 |
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05-May-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Cleanup "new timing mode" selection Among the SoCs using the "new timing mode", only the A83T needs to explicitly switch to that mode. By just defining the symbol for that one odd A83T bit to 0 for any other SoCs, we can always OR that in, and save the confusing nested #ifdefs. Clean up the also confusing new_mode setting on the way. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> |
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937ee31e |
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05-May-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Fix MMC clock parent selection Most Allwinner SoCs which use the so called "new timing mode" in their MMC controllers actually use the double-rate PLL6/PERIPH0 clock as their parent input clock. This is interestingly enough compensated by a hidden "by 2" post-divider in the mod clock, so the divider and actual output rate stay the same. Even though for the H6 and H616 (but only for them!) we use the doubled input clock for the divider computation, we never accounted for the implicit post-divider, so the clock was only half the speed on those SoCs. This didn't really matter so far, as our slow MMIO routine limits the transfer speed anyway, but we will fix this soon. Clean up the code around that selection, to always use the normal PLL6 (PERIPH0(1x)) clock as an input. As the rate and divider are the same, that makes no difference. Explain the hardware differences in a comment. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
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ca496baf |
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29-Apr-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Fix warnings with CONFIG_PHYS_64BIT When enabling PHYS_64BIT on 32-bit platforms, we get two warnings about pointer casts in sunxi_mmc.c. Those are related to MMIO addresses, which are always below 1GB on all Allwinner SoCs, so there is no problem with anything having more than 32 bits. Add the proper casts to make it compile cleanly. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> |
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f4826fb1 |
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18-Dec-2020 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Avoid #ifdefs in delay and width setup The delay and bus-width setup are slightly different across the Allwinner SoC generations, and we covered this so far with some preprocessor conditionals. Use the more readable IS_ENABLE() instead. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> |
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0237b304 |
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11-Jan-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Refactor mod clock register offset So far the only difference between the various Allwinner MMC controller we are concerned about is the mod clock register offset. This is actually not directly related to the MMC controller IP, but an integration choice, dependent on the SoC this appears in. To avoid becoming trapped with some compatible fallback strings, let's remove the whole struct sunxi_mmc_variant, and replace this with a SoC based choice, which we can derive from the CONFIG_MACH_SUNx_y symbols. This will later simplify H616 support. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> |
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aaebb900 |
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11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@gmail.com> |
mmc: sunxi: Replace H6 ifdefs with H6 gen macro It turns out that several SoCs share same mmc configuration as H6. In order to lower ifdef clutter replace H6 specific macro with common one. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
c69cda25 |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org> |
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caa4daa2 |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org> |
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41575d8e |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org> |
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c05ed00a |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
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f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
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4233698d |
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18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com> |
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c57572eb |
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29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
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3c8c7da6 |
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21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> |
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9e233382 |
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29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
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a1925a64 |
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29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
e8f37f42 |
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09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime |
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0e21a2ff |
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09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
629d267a |
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09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic |
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2a8882ec |
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09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic |
#
20940ef2 |
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05-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
mmc: sunxi: add support for automatic delay calibration A64 and H6 support automatic delay calibration and Linux driver uses it instead of hardcoded delays. Add support for it to u-boot driver. Fixes eMMC instability on Pinebook Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Tested-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Cc: Vagrant Cascadian <vagrant@debian.org> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
42956f1b |
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21-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: add MMC support for H6 The Allwinner H6 SoC has 3 MMC controllers like the ones in A64, with the MMC2 come with the capability to do crypto by EMCE. Add MMC support for H6. EMCE support is not added yet. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> |
#
979b239b |
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29-Jun-2018 |
Adam Sampson <ats@offog.org> |
dm: mmc: sunxi: Add A10/A20 compatible strings Commit dd27918c2252 ("dm: mmc: sunxi: Add support for driver model") only added the allwinner,sun5i-a13-mmc compatible string for this driver. The DM initialisation code here also works with (at least) A10 and A20, so add the appropriate compatible strings as per Linux 4.17's driver. Tested on A10 Cubieboard and A20 pcDuino3 Nano with CONFIG_DM_MMC. (A20 worked already, because sun7i-a20.dtsi specifies both the A13 and A20 strings.) Signed-off-by: Adam Sampson <ats@offog.org> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jteki@openedev.com> |
#
83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
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5ff8e548 |
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20-Mar-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
sunxi: improve throughput in the sunxi_mmc driver Throughput tests have shown the sunxi_mmc driver to take over 10s to read 10MB from a fast eMMC device due to excessive delays in polling loops. This commit restructures the main polling loops to use get_timer(...) to determine whether a (millisecond) timeout has expired. We choose not to use the wait_bit function, as we don't need interruptability with ctrl-c and have at least one case where two bits (one for an error condition and another one for completion) need to be read and using wait_bit would have not added to the clarity. The observed speedup in testing on a A31 is greater than 10x (e.g. a 10MB write decreases from 9.302s to 0.884s). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Tested-by: Mylène Josserand <mylene.josserand@bootlin.com> Acked-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
4744d81c |
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27-Mar-2018 |
Stefan Mavrodiev <stefan@olimex.com> |
sunxi: mmc: Fix phase delays U-boot driver for sunxi-mmc uses PLL6, unlike linux kernel where PLL5 is used, with clock rates respectively 600MHz and 768MHz. Thus there are different phase degree steps - 24 for the kernel and 30 for u-boot. In the kernel driver the phase is set 90 deg for output and 120 for sample. Dividing by 30 will result values 3 and 4. Those are the values set in the u-boot driver. However, the condition defining delays is wrong. MMC core driver requests clock of 52MHz, sunxi-driver sets clock of 50MHz, but phase is set 30 deg for output and 120 deg for sample. Apparently this works for most cards. On A20-SOM204-EVB-eMMC there is eMMC card (KLMAG2GEND) which complains about it. Maybe there is other boards with similar problem? So the fix is to match delays for both u-boot and kernel. Signed-off-by: Stefan Mavrodiev <stefan@olimex.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
8be4e61d |
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01-Feb-2018 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
mmc: sunxi: support cd-inverted With CONFIG_DM_MMC the BananaPi does not detect SD cards. The sunxi device trees use the cd-inverted property to indicate that the card detect is inverted. This property is documented in Linux kernel devicetree/bindings/mmc/mmc.txt The property is not marked as deprecated. A similar patch was posted by Tuomas but is in status "Changes Requested". https://patchwork.ozlabs.org/patch/850377/ This patch is a stripped down version of his patch. Suggested-by: Tuomas Tynkkynen <tuomas@tuxera.com> Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
8a647fc3 |
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31-Aug-2017 |
Chen-Yu Tsai <wens@csie.org> |
mmc: sunxi: Only update timing mode bit when enabling new timing mode When enabling the new mmc timing mode, we inadvertently clear all the remaining bits in the new timing mode register. The bits cleared include a default phase delay on the output clock. The BSP kernel states that the default values are supposed to be used. Clearing them results in decreased performance or transfer errors on some boards. Fixes: de9b1771c3b6 ("mmc: sunxi: Support new mode") Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
ead3697d |
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23-Aug-2017 |
Maxime Ripard <maxime.ripard@free-electrons.com> |
mmc: sunxi: fix legacy MMC initialisation The driver-model rework changed, among other things, the way the private data were moved around. It now uses the private field in the struct mmc. However, the mmc_create argument was changed in the process to always pass the array we used to have to store our private structures. The basically means that all the MMC driver instances will now have the private data of the first instance, which obviously doesn't work very well. Pass the proper pointer to mmc_create. Fixes: 034e226bc77e ("dm: mmc: sunxi: Pass private data around explicitly") Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Tested-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
de9b1771 |
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22-Aug-2017 |
Maxime Ripard <maxime.ripard@free-electrons.com> |
mmc: sunxi: Support new mode Almost all of the newer Allwinner SoCs have a new operating mode for the eMMC clocks that needs to be enabled in both the clock and the MMC controller. Details about that mode are sparse, and the name itself (new mode vs old mode) doesn't give much details, but it seems that the it changes the sampling of the MMC clock. One side effect is also that it divides the parent clock rate by 2. Add support for it through a Kconfig option. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
dd27918c |
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04-Jul-2017 |
Simon Glass <sjg@chromium.org> |
dm: mmc: sunxi: Add support for driver model Add a driver-model version of this driver which mostly uses the existing code. The old code can be removed once all boards are switched over. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
ec73d960 |
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04-Jul-2017 |
Simon Glass <sjg@chromium.org> |
dm: mmc: sunxi: Drop mmc_clk_io_on() This function has #ifdefs in it which we want to avoid for driver model. Instead we should use different compatible strings and the .data field. It also uses the MMC device number which is not available in driver model except through aliases. Move the function's into its caller so that the driver-model version can do things its own way. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
034e226b |
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04-Jul-2017 |
Simon Glass <sjg@chromium.org> |
dm: mmc: sunxi: Pass private data around explicitly At present the driver-private data is obtained in various functions by various means. With driver model this is provided automatically. Without driver model it comes from a C array declared at the top of the file. Adjust internal functions so that they are passed the private data as a parameter, allowing the caller to obtain it using either means. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
3f5af12a |
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04-Jul-2017 |
Simon Glass <sjg@chromium.org> |
dm: mmc: sunxi: Rename mmchost to priv Use the driver-model naming convention for this structure. It is data private to the driver so the local variable should be called 'priv'. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
e3c794e2 |
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04-Jul-2017 |
Simon Glass <sjg@chromium.org> |
dm: mmc: sunxi: Rename struct sunxi_mmc_host to sunxi_mmc_priv Use the driver-model naming convention for this structure. It is data private to the driver. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
07b0b9c0 |
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29-Dec-2016 |
Jaehoon Chung <jh80.chung@samsung.com> |
mmc: change the set_ios return type from void to int To maintain consistency, set_ios type of legacy mmc_ops changed to int. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> |
#
fb013184 |
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04-Nov-2016 |
Maxime Ripard <maxime.ripard@free-electrons.com> |
mmc: sunxi: Enable 8bits bus width for sun8i The sun8i SoCs also have a 8 bits capable MMC2 controller. Enable the support for those too. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Hans de Goede <hdegoede@redhat.com> |
#
915ffa52 |
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19-Jul-2016 |
Jaehoon Chung <jh80.chung@samsung.com> |
mmc: use the generic error number Use the generic error number instead of specific error number. If use the generic error number, it can debug more easier. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ef36d9ae |
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09-Jul-2016 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Use BROM stored boot_media value to determine our boot-source Now that we know that the BROM stores a value indicating the boot-source at the beginning of SRAM, use that instead of trying to recreate the BROM's boot probing. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
26c0c157 |
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07-Jul-2016 |
Tobias Doerffel <tobias.doerffel@ed-chemnitz.de> |
sunxi: mmc: increase status register polling rate for data transfers With a recent bunch of SD3.0 cards in our A20-based board we experienced data transfer rates of about 250 KiB/s instead of 10 MiB/s with previous cards from the same vendor (both 4 GB/class 10). By increasing status register polling rate from 1 kHz to 1 MHz we were able to reach the original transfer rates again. With the old cards we now even reach about 16 MiB/s. Signed-off-by: Tobias Doerffel <tobias.doerffel@ed-chemnitz.de> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
d96ebc46 |
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29-Mar-2016 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: Add support for Allwinner A64 SoCs The Allwinner A64 SoC is used in the Pine64. This patch adds all bits necessary to compile U-Boot for it running in AArch64 mode. Unfortunately SPL is not ready yet due to legal problems, so we need to boot using the binary boot0 for now. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> [agraf: remove SPL code, move to AArch64] Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
0ea5a04f |
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29-Mar-2016 |
Alexander Graf <agraf@csgraf.de> |
sunxi: Explicitly cast u32 pointer conversions Some parts of the sunxi code cast explicitly between u32 values and pointers. This is not a problem in practice, because all 64bit SoCs today only use the lower 32 bits for their phyical address space. But we need to make sure that the compiler is sure this is not an accident as well. Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
7c4213f6 |
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07-Dec-2015 |
Stephen Warren <swarren@nvidia.com> |
block: pass block dev not num to read/write/erase() This will allow the implementation to make use of data in the block_dev structure beyond the base device number. This will be useful so that eMMC block devices can encompass the HW partition ID rather than treating this out-of-band. Equally, the existence of the priv field is crying out for this patch to exist. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
be90974c |
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23-Sep-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Fix clk-delay settings In recent allwinner kernel sources the mmc/sdio clk-delay settings have been slightly tweaked, and for sun9i they are completely different then what we are using. This commit brings us in sync with what allwinner does, fixing problems accessing sdcards on some A33 devices (and likely others). For pre sun9i hardware this makes the following changes: -At 400Khz change the sample delay from 7 to 0 (first introduced in A31 sdk) -At 50 Mhz change the sample delay from 5 to 4 (first introduced in A23 sdk) -Above 50 MHz change the out delay from 2 to 1 (first introduced in A20 sdk) Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
28f69b9a |
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29-Aug-2015 |
Yousong Zhou <yszhou4tech@gmail.com> |
sunxi: mmc: set transfer timeout according to byte_cnt. Originally a timeout value of 2 seconds was used regardless of the size of data to be transfered. This prevented slow devices from working correctly while there was no much gain for faster devices, e.g. it takes 3708ms for a transfer of uImage of size 1899008 bytes. Signed-off-by: Yousong Zhou <yszhou4tech@gmail.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
645c48f5 |
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29-May-2015 |
Daniel Kochmański <dkochmanski@turtle-solutions.eu> |
sunxi: Create helper function veryfing valid boot signature on MMC This patch extracts checking for valid SD card "eGON.BT0" signature from `board_mmc_init` into function `sunxi_mmc_has_egon_boot_signature`. Buffer for mmc sector is allocated and freed at runtime. `panic` is triggered on malloc failure. Signed-off-by: Daniel Kochmański <dkochmanski@turtle-solutions.eu> CC: Roy Spliet <r.spliet@ultimaker.com> Cc: Ian Campbell <ijc@hellion.org.uk> [hdegoede@redhat.com: Small bugfix to make it work for devs other then mmc0] Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
1c09fa38 |
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30-May-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Enable pull-up on card-detect gpio pin On some boards we need to enable the internal pull-up te reliable detect that no card is inserted. Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
ff7e9cfc |
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05-May-2015 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-mmc
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#
5a20397b |
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23-Mar-2015 |
Rob Herring <robh@kernel.org> |
mmc: remove the MMC_MODE_HC flag High capacity support is not a host capability, but a device capability that is queried via the OCR. The flag in the operating conditions request argument can just be set unconditionally. This matches the Linux implementation. [panto] Hand merged and renumbering MMC_MODE_DDR_52MHz. Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com> Cc: Pantelis Antoniou <pantelis.antoniou@konsulko.com> |
#
90641f82 |
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22-Apr-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Fix card-detect gpio handling to work with the driver-model The driver-model gpio functions may return another value then -1 as error, make the sunxi mmc code properly handle this. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
44d8ae5b |
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06-Apr-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Introduce a hidden SUNXI_GEN_SUNxI Kconfig bool sun6i and newer (derived) SoCs such as the sun8i-a23, sun8i-a33 and sun9i have a various things in common, like having separate ahb reset control registers, the SID living inside the pmic, custom pmic busses, new style watchdog, etc. This commit introduces a new hidden SUNXI_GEN_SUN6I Kconfig bool which can be used to check for these features avoiding the need for an ever growing list of "#if defined CONFIG_MACH_SUN?I" conditionals as we add support for more "new style" sunxi SoCs. Note that this commit changes the behavior of the gmac and hdmi code for sun8i and the upcoming sun9i devices. This does not matter as sun8i does not have gmac nor hdmi, and sun9i has new hardware-blocks for these so the old code will not work there. Also this is intentional as if a sun8i / sun9i variant which does use the old hwblocks shows up then the GEN_SUN6I code paths will be the right ones to use. For completeness this also adds a SUNXI_GEN_SUN4I bool for A10/A13/A20. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
1de32b8a |
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19-Feb-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Always declare High Capacity capability High Capacity (e)MMC cards work fine on sun4i / sun5i, and not having this capability set causes u-boot to not recognize the eMMC on an Utoo P66 A13 tablet, so always set it thereby fixing this. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
5abdb156 |
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31-Jan-2015 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: mmc: Add 'sunxi_' prefix to the static functions This results in a much more readable callgraph, because now they can't be confused with the function having exactly the same name in the generic mmc code. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
daf22636 |
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14-Jan-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Add support for sun9i (A80) The clocks on the A80 are hooked up slightly different, add support for this. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
5b8d7fb4 |
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15-Jan-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Use a realistic timeout when sending a mmc command Wait 1 second for the sdcard to respond, rather then waiting for 0xfffff milliseconds. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
b0c4ae1a |
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19-Dec-2014 |
Axel Lin <axel.lin@ingics.com> |
mmc: sunxi: Fix misuse of gpio_direction_input() It does not make sense to make gpio_direction_input() return the gpio input status. The return value of gpio_direction_input() is inconsistent if CONFIG_DM_GPIO is defined. And we don't need to call gpio_direction_input() int sunxi_mmc_getcd(). Just init the gpio once in mmc_resource_init() is enough. Signed-off-by: Axel Lin <axel.lin@ingics.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Ian Campbell <ijc@hellion.org.uk> |
#
fc3a8325 |
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07-Dec-2014 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Properly setup mod-clk and clock sampling phases The sunxi mmc controller has both an internal clock divider, as well as the divider in the mod0-clk for the mmc controller. The internal divider cannot be used, as it conflicts with the setting of clock sampling phases which is done in the mod0-clk, so it must be set to 0 (divide by 1). For some reason while the kernel has had this correct from day one, the u-boot sunxi mmc code has been using a fixed mod0-clk and setting its internal divider depending on the desired speed. This is something which we've inherited from the original Allwinner u-boot sources, but while this has been fixed in Allwinner's own u-boot code at least for the A23 and later upstream u-boot was still doing this wrong. This commit fixes this, thereby also fixing mmc support not working reliable on the A23 (which seems more sensitive to this) and possible also fixes some other sunxi mmc issues. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
967325fe |
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31-Oct-2014 |
Hans de Goede <hdegoede@redhat.com> |
dm: sunxi: Request card detect gpio This is necessary for the device-model enabled builds to work properly. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
ed41e62f |
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24-Oct-2014 |
Ian Campbell <ijc@hellion.org.uk> |
sunxi: Use CONFIG_MACH_SUN?I from Kconfig instead of CONFIG_SUN?I Mostly automatic with: sed -i -e 's/CONFIG_\(SUN[45678]I\)/CONFIG_MACH_\1/g' $(git grep -l CONFIG_SUN[45678]I) followed by removing the relevant #defines from include/configs/sun?i.h by hand. Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
e637b30b |
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22-Oct-2014 |
Chen-Yu Tsai <wens@csie.org> |
mmc: sunxi: Add support for sun8i (A23) The Allwinner A23 SoC has reset controls like the A31 (sun6i). The FIFO address is also the same as sun6i. Re-use code added for sun6i. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
e79c7c88 |
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02-Oct-2014 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: When we've both mmc0 and mmc2, detect from which one we're booting sunxi SOCs can boot from both mmc0 and mmc2, detect from which one we're booting, and make that one "mmc dev 0" so that a single u-boot binary can be used for both the onboard eMMC and for external sdcards. When we're booting from mmc2, we make it dev 0 because that is where the SPL will load the tertiary payload (the actual u-boot binary in our case) from, see: common/spl/spl_mmc.c, which has dev 0 hardcoded everywhere. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
cd82113a |
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02-Oct-2014 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Add mmc card-detect functionality Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
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1d1bd42e |
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03-Oct-2014 |
Hans de Goede <hdegoede@redhat.com> |
ARM: sunxi-mmc: Add mmc support for sun6i / A31 The mmc hardware on sun6i has an extra reset control that needs to be de-asserted prior to usage. Also the FIFO address is different. Signed-off-by: Hans de Goede <hdegoede@redhat.com> [wens@csie.org: use setbits_le32 for reset control, drop obsolete changes, rewrite different FIFO address handling, add commit message] Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
a3e8c220 |
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22-Sep-2014 |
Wills Wang <wills.wang.open@gmail.com> |
mmc: sunxi: add SDHC support for sun6i/sun7i/sun8i Allwinner A20/A23/A31's SD/MMC host support SDHC High Capacity feature. Signed-off-by: Wills Wang <wills.wang.open@gmail.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
b6ae6765 |
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09-Jun-2014 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Remove mmc DMA support The DMA code in sunxi_mmc.c is broken. mmc_trans_data_by_dma() allocates the dma descriptors on the stack, and then exits while the dma transfer is in progress, so the dma engine is reading stack memory which at that point may be re-used. So far we've gotten away with this by luck, but recent u-boot changes have shifted the stack start address by 16 bytes, which combined with dma alignment now exposes this problem. Since we end up just busy waiting for the dma engine anyway, this commit fixes things by simply removing the dma code, resulting in smaller bug-free code. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
e24ea55c |
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05-May-2014 |
Ian Campbell <ijc@hellion.org.uk> |
sunxi: mmc support On Mon, 2014-05-05 at 14:18 +0200, Stefan Roese wrote: > > + case 1: > > +#if CONFIG_MMC1_PG > Are you sure that this is correct and shouldn't be: > > +#ifdef CONFIG_MMC1_PG > > ? It's "correct" in so far as it works (the boards.cfg config stuff #defines things to 1), but I think you are right that it isn't the preferred style. But... > A quick scan through this patch series shows that this define > is not set at all. Perhaps its outdated? Or is it used to support > some other sunxi SoC? Not sure, perhaps it should be removed for > now. ...I had thought that it was to support some other board which wasn't being upstreamed right now, so eventually useful and harmless for now, but I've just checked and it isn't actually used by any of the boards in u-boot-sunxi.git. So rather than fix it to use #ifdef lets drop it. Rather than resend the entire series, here is v5.1 of this patch. > Other than this please add my: > > Reviewed-by: Stefan Roese <sr@denx.de> Thanks! 8<--------------------------------- >From 20704e35a41664de5f516ed0e02981ac06085102 Mon Sep 17 00:00:00 2001 From: Ian Campbell <ijc@hellion.org.uk> Date: Fri, 7 Mar 2014 04:29:39 +0000 Subject: [PATCH v5.1 7/8] sunxi: mmc support This adds support for the MMC controller on the Allwinner A20 (sun7i) processor. Signed-off-by: Henrik Nordstrom <henrik@henriknordstrom.net> Signed-off-by: Luke Leighton <lkcl@lkcl.net> Signed-off-by: Oliver Schinagl <oliver@schinagl.nl> Signed-off-by: Wills Wang <wills.wang.open@gmail.com> Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Stefan Roese <sr@denx.de> Cc: Tom Cubie <Mr.hipboi@gmail.com> Cc: Aaron Maoye <leafy.myeh@allwinnertech.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Reviewed-by: Tom Rini <trini@ti.com> |
#
7938ac65 |
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01-May-2024 |
Tom Rini <trini@konsulko.com> |
mmc: Remove <common.h> and add needed includes Remove <common.h> from this driver directory and when needed add missing include files directly. Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Peter Robinson <pbrobinson@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
d379bcbf |
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30-Oct-2023 |
Samuel Holland <samuel@sholland.org> |
sunxi: mmc: Sort compatible strings numerically commit 95168d77d391 ("sunxi: add Allwinner R528/T113 SoC support") added the new entry out of order. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> |
#
43b573df |
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30-Oct-2023 |
Samuel Holland <samuel@sholland.org> |
sunxi: mmc: Move header to the driver directory The MMC controller driver is (and ought to be) the only user of these register definitions. Put them in a header next to the driver to remove the dependency on a specific ARM platform's headers. Due to the sunxi_mmc_init() prototype, the file was not renamed. None of the register definitions were changed. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> |
#
95168d77 |
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06-Sep-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add Allwinner R528/T113 SoC support This adds the remaining code bits to teach U-Boot about Allwinner's newest SoC generation. This was introduced with the RISC-V based Allwinner D1 SoC, which actually shares a die with the ARM cores versions called R528 (BGA, without DRAM) and T113s (QFP, with embedded DRAM). This adds the new Kconfig stanza, using the two newly introduced symbols for the new SoC generation and pincontroller. It also adds the new symbols to the relavent code places, to set all the hardcoded bits directly. We need one DT override: The ARM core version of the DT specifies the CPUX watchdog as "reserved", which means it won't be recognised by U-Boot. Override this in our generic sunxi-u-boot.dtsi, to let U-Boot pick up this watchdog, so that the generic reset driver will work. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
4a9e89a3 |
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05-Oct-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: introduce NCAT2 generation model Allwinner seems to typically stick to a common MMIO memory map for several SoCs, but from time to time does some breaking changes, which also introduce new generations of some peripherals. The last time this happened with the H6, which apart from re-organising the base addresses also changed the clock controller significantly. We added a CONFIG_SUN50I_GEN_H6 symbol back then to mark SoCs sharing those traits. Now the Allwinner D1 changes the memory map again, and also extends the pincontroller, among other peripherals. To mark this generation of SoCs, add a CONFIG_SUNXI_GEN_NCAT2 symbol, this name is reportedly used in the Allwinner BSP code, and prevents us from inventing our own name. Add this new symbol to some guards that were already checking for the H6 generation, since many features are shared between the two (like the renovated clock controller). This paves the way to introduce a first user of this generation. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Samuel Holland <samuel@sholland.org> |
#
207ed0a3 |
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06-Sep-2022 |
Andre Przywara <andre.przywara@arm.com> |
pinctrl: sunxi: remove GPIO_EXTRA_HEADER U-Boot's generic GPIO_EXTRA_HEADER is a convenience symbol to allow code to more easily include platform specific GPIO headers. This should not be needed in a DM world anymore, since the generic GPIO framework handles that nicely. For Allwinner boards we still need to deal with non-DM GPIO in the SPL, but this should become the exception, not the rule. Make this more obvious by removing the definition of GPIO_EXTRA_HEADER, and just force every legacy user of platform specific GPIO to include the new sunxi_gpio.h header explicitly. Everyone doing so should feel ashamed and should find a way to avoid it from now on. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Samuel Holland <samuel@sholland.org> |
#
ba16b531 |
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13-Jul-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: mmc: group non-DM specific functions As the SPL code for sunxi boards does not use the driver model, we have two mmc_ops structures, one for DM, one for non-DM. The actual hardware access code is shared, with the respective callback functions using that common code. To make this more obvious and easier to read, reorder the functions to group them: we first have the common code, then the non-DM bits, and the proper DM implementation at the end. Also document this structure in the comment at the beginning of the file. No functional change intended. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Samuel Holland <samuel@sholland.org> Tested-by: Samuel Holland <samuel@sholland.org> |
#
5db81f1c |
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13-Jul-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: mmc: ignore card detect in SPL The sunxi MMC code does not use the DM in the SPL, as we don't have a device tree available that early, also no space for it. This also means we cannot access the card-detect GPIO information from there, so we have Kconfig symbols called CONFIG_MMCx_CD_PIN, which each board has to define. This is a burden, also requires extra GPIO code in the SPL. As the SPL is the natural successor of the BootROM (from which we are loaded), we can actually ignore the CD pin completely, as this is what the BootROM does as well: CD GPIOs are board specific, but the BootROM is not, so accesses the MMC devices anyway. Also, as we must have been loaded from an MMC device when reaching this code, there must have been a card in the slot. Remove the card detect code from the non-DM implementation of the sunxi MMC driver, to get rid of this unneeded code. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Samuel Holland <samuel@sholland.org> Tested-by: Samuel Holland <samuel@sholland.org> |
#
fb6f6701 |
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20-Oct-2021 |
Samuel Holland <samuel@sholland.org> |
mmc: sunxi: Use DM_GPIO flags to set pull-up Now that the sunxi_gpio driver handles pull-up/down via the driver model, pin configuration does not need a platform-specific function. Signed-off-by: Samuel Holland <samuel@sholland.org> Tested-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
c846fe43 |
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22-Jul-2021 |
Icenowy Zheng <icenowy@sipeed.com> |
mmc: sunxi: conditionally include MMC2 initialization code Allwinner R329 has no MMC2. Only include the code of MMC2 if the base address of it is defined. Signed-off-by: Icenowy Zheng <icenowy@sipeed.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
42508461 |
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11-Sep-2021 |
Samuel Holland <samuel@sholland.org> |
sunxi: Clean up inclusions of asm/arch/gpio.h As part of migrating to DM_GPIO and DM_PINCTRL, eventually we will remove the asm/arch/gpio.h header. In preparation, clean up the various files that include it. Some files did not contain any GPIO code at all, so this header was completely unused. A few files contained only legacy platform-specific GPIO code for setting up pin muxes. They were left unchanged, as that code will be completely removed by the DM_PINCTRL migration. The remaining files contain some combination of DM_GPIO and legacy GPIO code. For those, switch to including asm/gpio.h (if it wasn't included already). Right now, this header provides both sets of functions, because ARCH_SUNXI selects GPIO_EXTRA_HEADER. This will still be the right header to include once the DM_GPIO migration is complete and GPIO_EXTRA_HEADER is no longer needed. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
0b508ca8 |
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03-Sep-2021 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: mmc: A20: Fix MMC optimisation Some SoCs (as seen on A20) seem to misreport the MMC FIFO level if the FIFO is completely full: the level size reads as zero, but the FIFO_FULL bit is set. We won't do a single iteration of the read loop in this case, so will be stuck forever. Check for this situation and use a safe minimal FIFO size instead when we hit this case. This fixes MMC boot on A20 devices after the MMC FIFO optimisation (9faae5457f52). Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> |
#
ac62dadb |
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21-Apr-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Use mmc_of_parse() At the moment the Allwinner MMC driver parses the bus-width and non-removable DT properties itself, in the probe() routine. There is actually a generic function provided by the MMC framework doing this job, also it parses more generic properties like broken-cd and advanced transfer modes. Drop our own code and call mmc_of_parse() instead, to get all new features for free. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> |
#
9faae545 |
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05-May-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Increase MMIO FIFO read performance To avoid the complexity of DMA operations (with chained descriptors), we use repeated MMIO reads and writes to the SD_FIFO_REG, which allows us to drain or fill the MMC data buffer FIFO very easily. However those MMIO accesses are somewhat costly, so this limits our MMC performance, to between 17 and 22 MB/s, but down to 9.5 MB/s on the H6 (partly due to the lower AHB1 frequency). As it turns out we read the FIFO status register after *every* word we read or write, which effectively doubles the number of MMIO accesses, thus effectively more than halving our performance. To avoid this overhead, we can make use of the FIFO level bits, which are in the very same FIFO status registers. So for a read request, we now can collect as many words as the FIFO level originally indicated, and only then need to update the status register. We don't know for sure the size of the FIFO (and it seems to differ across SoCs anyway), so writing is more fragile, which is why we still use the old method for that. If we find a minimum FIFO size available on all SoCs, we could use that, in a later optimisation. This patch increases the eMMC read speed on a Pine64-LTS from about 22MB/s to 44 MB/s. SD card reads don't gain that much, but with 23 MB/s we now reach the practical limit for 3.3V SD cards. On the H6 we double our transfer speed, from 9.5 MB/s to 19.7 MB/s. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
b5dd39c9 |
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05-May-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Cleanup and fix self-calibration code Newer SoCs have a self calibration feature, which avoids us writing hard coded phase delay values into the controller. Consolidate the code by avoiding unnecessary #ifdefs, and also enabling the feature for all those newer SoCs. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
f85c0912 |
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05-May-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Cleanup "new timing mode" selection Among the SoCs using the "new timing mode", only the A83T needs to explicitly switch to that mode. By just defining the symbol for that one odd A83T bit to 0 for any other SoCs, we can always OR that in, and save the confusing nested #ifdefs. Clean up the also confusing new_mode setting on the way. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> |
#
937ee31e |
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05-May-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Fix MMC clock parent selection Most Allwinner SoCs which use the so called "new timing mode" in their MMC controllers actually use the double-rate PLL6/PERIPH0 clock as their parent input clock. This is interestingly enough compensated by a hidden "by 2" post-divider in the mod clock, so the divider and actual output rate stay the same. Even though for the H6 and H616 (but only for them!) we use the doubled input clock for the divider computation, we never accounted for the implicit post-divider, so the clock was only half the speed on those SoCs. This didn't really matter so far, as our slow MMIO routine limits the transfer speed anyway, but we will fix this soon. Clean up the code around that selection, to always use the normal PLL6 (PERIPH0(1x)) clock as an input. As the rate and divider are the same, that makes no difference. Explain the hardware differences in a comment. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
ca496baf |
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29-Apr-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Fix warnings with CONFIG_PHYS_64BIT When enabling PHYS_64BIT on 32-bit platforms, we get two warnings about pointer casts in sunxi_mmc.c. Those are related to MMIO addresses, which are always below 1GB on all Allwinner SoCs, so there is no problem with anything having more than 32 bits. Add the proper casts to make it compile cleanly. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> |
#
f4826fb1 |
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18-Dec-2020 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Avoid #ifdefs in delay and width setup The delay and bus-width setup are slightly different across the Allwinner SoC generations, and we covered this so far with some preprocessor conditionals. Use the more readable IS_ENABLE() instead. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> |
#
0237b304 |
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11-Jan-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Refactor mod clock register offset So far the only difference between the various Allwinner MMC controller we are concerned about is the mod clock register offset. This is actually not directly related to the MMC controller IP, but an integration choice, dependent on the SoC this appears in. To avoid becoming trapped with some compatible fallback strings, let's remove the whole struct sunxi_mmc_variant, and replace this with a SoC based choice, which we can derive from the CONFIG_MACH_SUNx_y symbols. This will later simplify H616 support. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> |
#
aaebb900 |
|
11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@gmail.com> |
mmc: sunxi: Replace H6 ifdefs with H6 gen macro It turns out that several SoCs share same mmc configuration as H6. In order to lower ifdef clutter replace H6 specific macro with common one. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
c69cda25 |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
caa4daa2 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
41575d8e |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
c05ed00a |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com> |
#
c57572eb |
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29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> |
#
9e233382 |
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29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
a1925a64 |
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29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
e8f37f42 |
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09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime |
#
0e21a2ff |
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09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
629d267a |
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09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic |
#
2a8882ec |
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09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic |
#
20940ef2 |
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05-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
mmc: sunxi: add support for automatic delay calibration A64 and H6 support automatic delay calibration and Linux driver uses it instead of hardcoded delays. Add support for it to u-boot driver. Fixes eMMC instability on Pinebook Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Tested-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Cc: Vagrant Cascadian <vagrant@debian.org> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
42956f1b |
|
21-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: add MMC support for H6 The Allwinner H6 SoC has 3 MMC controllers like the ones in A64, with the MMC2 come with the capability to do crypto by EMCE. Add MMC support for H6. EMCE support is not added yet. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> |
#
979b239b |
|
29-Jun-2018 |
Adam Sampson <ats@offog.org> |
dm: mmc: sunxi: Add A10/A20 compatible strings Commit dd27918c2252 ("dm: mmc: sunxi: Add support for driver model") only added the allwinner,sun5i-a13-mmc compatible string for this driver. The DM initialisation code here also works with (at least) A10 and A20, so add the appropriate compatible strings as per Linux 4.17's driver. Tested on A10 Cubieboard and A20 pcDuino3 Nano with CONFIG_DM_MMC. (A20 worked already, because sun7i-a20.dtsi specifies both the A13 and A20 strings.) Signed-off-by: Adam Sampson <ats@offog.org> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jteki@openedev.com> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
5ff8e548 |
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20-Mar-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
sunxi: improve throughput in the sunxi_mmc driver Throughput tests have shown the sunxi_mmc driver to take over 10s to read 10MB from a fast eMMC device due to excessive delays in polling loops. This commit restructures the main polling loops to use get_timer(...) to determine whether a (millisecond) timeout has expired. We choose not to use the wait_bit function, as we don't need interruptability with ctrl-c and have at least one case where two bits (one for an error condition and another one for completion) need to be read and using wait_bit would have not added to the clarity. The observed speedup in testing on a A31 is greater than 10x (e.g. a 10MB write decreases from 9.302s to 0.884s). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Tested-by: Mylène Josserand <mylene.josserand@bootlin.com> Acked-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
4744d81c |
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27-Mar-2018 |
Stefan Mavrodiev <stefan@olimex.com> |
sunxi: mmc: Fix phase delays U-boot driver for sunxi-mmc uses PLL6, unlike linux kernel where PLL5 is used, with clock rates respectively 600MHz and 768MHz. Thus there are different phase degree steps - 24 for the kernel and 30 for u-boot. In the kernel driver the phase is set 90 deg for output and 120 for sample. Dividing by 30 will result values 3 and 4. Those are the values set in the u-boot driver. However, the condition defining delays is wrong. MMC core driver requests clock of 52MHz, sunxi-driver sets clock of 50MHz, but phase is set 30 deg for output and 120 deg for sample. Apparently this works for most cards. On A20-SOM204-EVB-eMMC there is eMMC card (KLMAG2GEND) which complains about it. Maybe there is other boards with similar problem? So the fix is to match delays for both u-boot and kernel. Signed-off-by: Stefan Mavrodiev <stefan@olimex.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
8be4e61d |
|
01-Feb-2018 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
mmc: sunxi: support cd-inverted With CONFIG_DM_MMC the BananaPi does not detect SD cards. The sunxi device trees use the cd-inverted property to indicate that the card detect is inverted. This property is documented in Linux kernel devicetree/bindings/mmc/mmc.txt The property is not marked as deprecated. A similar patch was posted by Tuomas but is in status "Changes Requested". https://patchwork.ozlabs.org/patch/850377/ This patch is a stripped down version of his patch. Suggested-by: Tuomas Tynkkynen <tuomas@tuxera.com> Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
8a647fc3 |
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31-Aug-2017 |
Chen-Yu Tsai <wens@csie.org> |
mmc: sunxi: Only update timing mode bit when enabling new timing mode When enabling the new mmc timing mode, we inadvertently clear all the remaining bits in the new timing mode register. The bits cleared include a default phase delay on the output clock. The BSP kernel states that the default values are supposed to be used. Clearing them results in decreased performance or transfer errors on some boards. Fixes: de9b1771c3b6 ("mmc: sunxi: Support new mode") Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
ead3697d |
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23-Aug-2017 |
Maxime Ripard <maxime.ripard@free-electrons.com> |
mmc: sunxi: fix legacy MMC initialisation The driver-model rework changed, among other things, the way the private data were moved around. It now uses the private field in the struct mmc. However, the mmc_create argument was changed in the process to always pass the array we used to have to store our private structures. The basically means that all the MMC driver instances will now have the private data of the first instance, which obviously doesn't work very well. Pass the proper pointer to mmc_create. Fixes: 034e226bc77e ("dm: mmc: sunxi: Pass private data around explicitly") Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Tested-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
de9b1771 |
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22-Aug-2017 |
Maxime Ripard <maxime.ripard@free-electrons.com> |
mmc: sunxi: Support new mode Almost all of the newer Allwinner SoCs have a new operating mode for the eMMC clocks that needs to be enabled in both the clock and the MMC controller. Details about that mode are sparse, and the name itself (new mode vs old mode) doesn't give much details, but it seems that the it changes the sampling of the MMC clock. One side effect is also that it divides the parent clock rate by 2. Add support for it through a Kconfig option. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
dd27918c |
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04-Jul-2017 |
Simon Glass <sjg@chromium.org> |
dm: mmc: sunxi: Add support for driver model Add a driver-model version of this driver which mostly uses the existing code. The old code can be removed once all boards are switched over. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
ec73d960 |
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04-Jul-2017 |
Simon Glass <sjg@chromium.org> |
dm: mmc: sunxi: Drop mmc_clk_io_on() This function has #ifdefs in it which we want to avoid for driver model. Instead we should use different compatible strings and the .data field. It also uses the MMC device number which is not available in driver model except through aliases. Move the function's into its caller so that the driver-model version can do things its own way. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
034e226b |
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04-Jul-2017 |
Simon Glass <sjg@chromium.org> |
dm: mmc: sunxi: Pass private data around explicitly At present the driver-private data is obtained in various functions by various means. With driver model this is provided automatically. Without driver model it comes from a C array declared at the top of the file. Adjust internal functions so that they are passed the private data as a parameter, allowing the caller to obtain it using either means. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
3f5af12a |
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04-Jul-2017 |
Simon Glass <sjg@chromium.org> |
dm: mmc: sunxi: Rename mmchost to priv Use the driver-model naming convention for this structure. It is data private to the driver so the local variable should be called 'priv'. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
e3c794e2 |
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04-Jul-2017 |
Simon Glass <sjg@chromium.org> |
dm: mmc: sunxi: Rename struct sunxi_mmc_host to sunxi_mmc_priv Use the driver-model naming convention for this structure. It is data private to the driver. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
07b0b9c0 |
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29-Dec-2016 |
Jaehoon Chung <jh80.chung@samsung.com> |
mmc: change the set_ios return type from void to int To maintain consistency, set_ios type of legacy mmc_ops changed to int. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> |
#
fb013184 |
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04-Nov-2016 |
Maxime Ripard <maxime.ripard@free-electrons.com> |
mmc: sunxi: Enable 8bits bus width for sun8i The sun8i SoCs also have a 8 bits capable MMC2 controller. Enable the support for those too. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Hans de Goede <hdegoede@redhat.com> |
#
915ffa52 |
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19-Jul-2016 |
Jaehoon Chung <jh80.chung@samsung.com> |
mmc: use the generic error number Use the generic error number instead of specific error number. If use the generic error number, it can debug more easier. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ef36d9ae |
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09-Jul-2016 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Use BROM stored boot_media value to determine our boot-source Now that we know that the BROM stores a value indicating the boot-source at the beginning of SRAM, use that instead of trying to recreate the BROM's boot probing. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
26c0c157 |
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07-Jul-2016 |
Tobias Doerffel <tobias.doerffel@ed-chemnitz.de> |
sunxi: mmc: increase status register polling rate for data transfers With a recent bunch of SD3.0 cards in our A20-based board we experienced data transfer rates of about 250 KiB/s instead of 10 MiB/s with previous cards from the same vendor (both 4 GB/class 10). By increasing status register polling rate from 1 kHz to 1 MHz we were able to reach the original transfer rates again. With the old cards we now even reach about 16 MiB/s. Signed-off-by: Tobias Doerffel <tobias.doerffel@ed-chemnitz.de> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
d96ebc46 |
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29-Mar-2016 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: Add support for Allwinner A64 SoCs The Allwinner A64 SoC is used in the Pine64. This patch adds all bits necessary to compile U-Boot for it running in AArch64 mode. Unfortunately SPL is not ready yet due to legal problems, so we need to boot using the binary boot0 for now. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> [agraf: remove SPL code, move to AArch64] Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
0ea5a04f |
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29-Mar-2016 |
Alexander Graf <agraf@csgraf.de> |
sunxi: Explicitly cast u32 pointer conversions Some parts of the sunxi code cast explicitly between u32 values and pointers. This is not a problem in practice, because all 64bit SoCs today only use the lower 32 bits for their phyical address space. But we need to make sure that the compiler is sure this is not an accident as well. Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
7c4213f6 |
|
07-Dec-2015 |
Stephen Warren <swarren@nvidia.com> |
block: pass block dev not num to read/write/erase() This will allow the implementation to make use of data in the block_dev structure beyond the base device number. This will be useful so that eMMC block devices can encompass the HW partition ID rather than treating this out-of-band. Equally, the existence of the priv field is crying out for this patch to exist. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
be90974c |
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23-Sep-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Fix clk-delay settings In recent allwinner kernel sources the mmc/sdio clk-delay settings have been slightly tweaked, and for sun9i they are completely different then what we are using. This commit brings us in sync with what allwinner does, fixing problems accessing sdcards on some A33 devices (and likely others). For pre sun9i hardware this makes the following changes: -At 400Khz change the sample delay from 7 to 0 (first introduced in A31 sdk) -At 50 Mhz change the sample delay from 5 to 4 (first introduced in A23 sdk) -Above 50 MHz change the out delay from 2 to 1 (first introduced in A20 sdk) Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
28f69b9a |
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29-Aug-2015 |
Yousong Zhou <yszhou4tech@gmail.com> |
sunxi: mmc: set transfer timeout according to byte_cnt. Originally a timeout value of 2 seconds was used regardless of the size of data to be transfered. This prevented slow devices from working correctly while there was no much gain for faster devices, e.g. it takes 3708ms for a transfer of uImage of size 1899008 bytes. Signed-off-by: Yousong Zhou <yszhou4tech@gmail.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
645c48f5 |
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29-May-2015 |
Daniel Kochmański <dkochmanski@turtle-solutions.eu> |
sunxi: Create helper function veryfing valid boot signature on MMC This patch extracts checking for valid SD card "eGON.BT0" signature from `board_mmc_init` into function `sunxi_mmc_has_egon_boot_signature`. Buffer for mmc sector is allocated and freed at runtime. `panic` is triggered on malloc failure. Signed-off-by: Daniel Kochmański <dkochmanski@turtle-solutions.eu> CC: Roy Spliet <r.spliet@ultimaker.com> Cc: Ian Campbell <ijc@hellion.org.uk> [hdegoede@redhat.com: Small bugfix to make it work for devs other then mmc0] Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
1c09fa38 |
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30-May-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Enable pull-up on card-detect gpio pin On some boards we need to enable the internal pull-up te reliable detect that no card is inserted. Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
ff7e9cfc |
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05-May-2015 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-mmc
|
#
5a20397b |
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23-Mar-2015 |
Rob Herring <robh@kernel.org> |
mmc: remove the MMC_MODE_HC flag High capacity support is not a host capability, but a device capability that is queried via the OCR. The flag in the operating conditions request argument can just be set unconditionally. This matches the Linux implementation. [panto] Hand merged and renumbering MMC_MODE_DDR_52MHz. Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com> Cc: Pantelis Antoniou <pantelis.antoniou@konsulko.com> |
#
90641f82 |
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22-Apr-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Fix card-detect gpio handling to work with the driver-model The driver-model gpio functions may return another value then -1 as error, make the sunxi mmc code properly handle this. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
44d8ae5b |
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06-Apr-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Introduce a hidden SUNXI_GEN_SUNxI Kconfig bool sun6i and newer (derived) SoCs such as the sun8i-a23, sun8i-a33 and sun9i have a various things in common, like having separate ahb reset control registers, the SID living inside the pmic, custom pmic busses, new style watchdog, etc. This commit introduces a new hidden SUNXI_GEN_SUN6I Kconfig bool which can be used to check for these features avoiding the need for an ever growing list of "#if defined CONFIG_MACH_SUN?I" conditionals as we add support for more "new style" sunxi SoCs. Note that this commit changes the behavior of the gmac and hdmi code for sun8i and the upcoming sun9i devices. This does not matter as sun8i does not have gmac nor hdmi, and sun9i has new hardware-blocks for these so the old code will not work there. Also this is intentional as if a sun8i / sun9i variant which does use the old hwblocks shows up then the GEN_SUN6I code paths will be the right ones to use. For completeness this also adds a SUNXI_GEN_SUN4I bool for A10/A13/A20. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
1de32b8a |
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19-Feb-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Always declare High Capacity capability High Capacity (e)MMC cards work fine on sun4i / sun5i, and not having this capability set causes u-boot to not recognize the eMMC on an Utoo P66 A13 tablet, so always set it thereby fixing this. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
5abdb156 |
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31-Jan-2015 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: mmc: Add 'sunxi_' prefix to the static functions This results in a much more readable callgraph, because now they can't be confused with the function having exactly the same name in the generic mmc code. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
daf22636 |
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14-Jan-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Add support for sun9i (A80) The clocks on the A80 are hooked up slightly different, add support for this. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
5b8d7fb4 |
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15-Jan-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Use a realistic timeout when sending a mmc command Wait 1 second for the sdcard to respond, rather then waiting for 0xfffff milliseconds. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
b0c4ae1a |
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19-Dec-2014 |
Axel Lin <axel.lin@ingics.com> |
mmc: sunxi: Fix misuse of gpio_direction_input() It does not make sense to make gpio_direction_input() return the gpio input status. The return value of gpio_direction_input() is inconsistent if CONFIG_DM_GPIO is defined. And we don't need to call gpio_direction_input() int sunxi_mmc_getcd(). Just init the gpio once in mmc_resource_init() is enough. Signed-off-by: Axel Lin <axel.lin@ingics.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Ian Campbell <ijc@hellion.org.uk> |
#
fc3a8325 |
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07-Dec-2014 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Properly setup mod-clk and clock sampling phases The sunxi mmc controller has both an internal clock divider, as well as the divider in the mod0-clk for the mmc controller. The internal divider cannot be used, as it conflicts with the setting of clock sampling phases which is done in the mod0-clk, so it must be set to 0 (divide by 1). For some reason while the kernel has had this correct from day one, the u-boot sunxi mmc code has been using a fixed mod0-clk and setting its internal divider depending on the desired speed. This is something which we've inherited from the original Allwinner u-boot sources, but while this has been fixed in Allwinner's own u-boot code at least for the A23 and later upstream u-boot was still doing this wrong. This commit fixes this, thereby also fixing mmc support not working reliable on the A23 (which seems more sensitive to this) and possible also fixes some other sunxi mmc issues. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
967325fe |
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31-Oct-2014 |
Hans de Goede <hdegoede@redhat.com> |
dm: sunxi: Request card detect gpio This is necessary for the device-model enabled builds to work properly. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
ed41e62f |
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24-Oct-2014 |
Ian Campbell <ijc@hellion.org.uk> |
sunxi: Use CONFIG_MACH_SUN?I from Kconfig instead of CONFIG_SUN?I Mostly automatic with: sed -i -e 's/CONFIG_\(SUN[45678]I\)/CONFIG_MACH_\1/g' $(git grep -l CONFIG_SUN[45678]I) followed by removing the relevant #defines from include/configs/sun?i.h by hand. Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
e637b30b |
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22-Oct-2014 |
Chen-Yu Tsai <wens@csie.org> |
mmc: sunxi: Add support for sun8i (A23) The Allwinner A23 SoC has reset controls like the A31 (sun6i). The FIFO address is also the same as sun6i. Re-use code added for sun6i. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
e79c7c88 |
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02-Oct-2014 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: When we've both mmc0 and mmc2, detect from which one we're booting sunxi SOCs can boot from both mmc0 and mmc2, detect from which one we're booting, and make that one "mmc dev 0" so that a single u-boot binary can be used for both the onboard eMMC and for external sdcards. When we're booting from mmc2, we make it dev 0 because that is where the SPL will load the tertiary payload (the actual u-boot binary in our case) from, see: common/spl/spl_mmc.c, which has dev 0 hardcoded everywhere. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
cd82113a |
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02-Oct-2014 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Add mmc card-detect functionality Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
1d1bd42e |
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03-Oct-2014 |
Hans de Goede <hdegoede@redhat.com> |
ARM: sunxi-mmc: Add mmc support for sun6i / A31 The mmc hardware on sun6i has an extra reset control that needs to be de-asserted prior to usage. Also the FIFO address is different. Signed-off-by: Hans de Goede <hdegoede@redhat.com> [wens@csie.org: use setbits_le32 for reset control, drop obsolete changes, rewrite different FIFO address handling, add commit message] Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
a3e8c220 |
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22-Sep-2014 |
Wills Wang <wills.wang.open@gmail.com> |
mmc: sunxi: add SDHC support for sun6i/sun7i/sun8i Allwinner A20/A23/A31's SD/MMC host support SDHC High Capacity feature. Signed-off-by: Wills Wang <wills.wang.open@gmail.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
b6ae6765 |
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09-Jun-2014 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Remove mmc DMA support The DMA code in sunxi_mmc.c is broken. mmc_trans_data_by_dma() allocates the dma descriptors on the stack, and then exits while the dma transfer is in progress, so the dma engine is reading stack memory which at that point may be re-used. So far we've gotten away with this by luck, but recent u-boot changes have shifted the stack start address by 16 bytes, which combined with dma alignment now exposes this problem. Since we end up just busy waiting for the dma engine anyway, this commit fixes things by simply removing the dma code, resulting in smaller bug-free code. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
e24ea55c |
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05-May-2014 |
Ian Campbell <ijc@hellion.org.uk> |
sunxi: mmc support On Mon, 2014-05-05 at 14:18 +0200, Stefan Roese wrote: > > + case 1: > > +#if CONFIG_MMC1_PG > Are you sure that this is correct and shouldn't be: > > +#ifdef CONFIG_MMC1_PG > > ? It's "correct" in so far as it works (the boards.cfg config stuff #defines things to 1), but I think you are right that it isn't the preferred style. But... > A quick scan through this patch series shows that this define > is not set at all. Perhaps its outdated? Or is it used to support > some other sunxi SoC? Not sure, perhaps it should be removed for > now. ...I had thought that it was to support some other board which wasn't being upstreamed right now, so eventually useful and harmless for now, but I've just checked and it isn't actually used by any of the boards in u-boot-sunxi.git. So rather than fix it to use #ifdef lets drop it. Rather than resend the entire series, here is v5.1 of this patch. > Other than this please add my: > > Reviewed-by: Stefan Roese <sr@denx.de> Thanks! 8<--------------------------------- >From 20704e35a41664de5f516ed0e02981ac06085102 Mon Sep 17 00:00:00 2001 From: Ian Campbell <ijc@hellion.org.uk> Date: Fri, 7 Mar 2014 04:29:39 +0000 Subject: [PATCH v5.1 7/8] sunxi: mmc support This adds support for the MMC controller on the Allwinner A20 (sun7i) processor. Signed-off-by: Henrik Nordstrom <henrik@henriknordstrom.net> Signed-off-by: Luke Leighton <lkcl@lkcl.net> Signed-off-by: Oliver Schinagl <oliver@schinagl.nl> Signed-off-by: Wills Wang <wills.wang.open@gmail.com> Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Stefan Roese <sr@denx.de> Cc: Tom Cubie <Mr.hipboi@gmail.com> Cc: Aaron Maoye <leafy.myeh@allwinnertech.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Reviewed-by: Tom Rini <trini@ti.com> |
#
d379bcbf |
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30-Oct-2023 |
Samuel Holland <samuel@sholland.org> |
sunxi: mmc: Sort compatible strings numerically commit 95168d77d391 ("sunxi: add Allwinner R528/T113 SoC support") added the new entry out of order. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> |
#
43b573df |
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30-Oct-2023 |
Samuel Holland <samuel@sholland.org> |
sunxi: mmc: Move header to the driver directory The MMC controller driver is (and ought to be) the only user of these register definitions. Put them in a header next to the driver to remove the dependency on a specific ARM platform's headers. Due to the sunxi_mmc_init() prototype, the file was not renamed. None of the register definitions were changed. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> |
#
95168d77 |
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06-Sep-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add Allwinner R528/T113 SoC support This adds the remaining code bits to teach U-Boot about Allwinner's newest SoC generation. This was introduced with the RISC-V based Allwinner D1 SoC, which actually shares a die with the ARM cores versions called R528 (BGA, without DRAM) and T113s (QFP, with embedded DRAM). This adds the new Kconfig stanza, using the two newly introduced symbols for the new SoC generation and pincontroller. It also adds the new symbols to the relavent code places, to set all the hardcoded bits directly. We need one DT override: The ARM core version of the DT specifies the CPUX watchdog as "reserved", which means it won't be recognised by U-Boot. Override this in our generic sunxi-u-boot.dtsi, to let U-Boot pick up this watchdog, so that the generic reset driver will work. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
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4a9e89a3 |
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05-Oct-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: introduce NCAT2 generation model Allwinner seems to typically stick to a common MMIO memory map for several SoCs, but from time to time does some breaking changes, which also introduce new generations of some peripherals. The last time this happened with the H6, which apart from re-organising the base addresses also changed the clock controller significantly. We added a CONFIG_SUN50I_GEN_H6 symbol back then to mark SoCs sharing those traits. Now the Allwinner D1 changes the memory map again, and also extends the pincontroller, among other peripherals. To mark this generation of SoCs, add a CONFIG_SUNXI_GEN_NCAT2 symbol, this name is reportedly used in the Allwinner BSP code, and prevents us from inventing our own name. Add this new symbol to some guards that were already checking for the H6 generation, since many features are shared between the two (like the renovated clock controller). This paves the way to introduce a first user of this generation. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Samuel Holland <samuel@sholland.org> |
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207ed0a3 |
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06-Sep-2022 |
Andre Przywara <andre.przywara@arm.com> |
pinctrl: sunxi: remove GPIO_EXTRA_HEADER U-Boot's generic GPIO_EXTRA_HEADER is a convenience symbol to allow code to more easily include platform specific GPIO headers. This should not be needed in a DM world anymore, since the generic GPIO framework handles that nicely. For Allwinner boards we still need to deal with non-DM GPIO in the SPL, but this should become the exception, not the rule. Make this more obvious by removing the definition of GPIO_EXTRA_HEADER, and just force every legacy user of platform specific GPIO to include the new sunxi_gpio.h header explicitly. Everyone doing so should feel ashamed and should find a way to avoid it from now on. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Samuel Holland <samuel@sholland.org> |
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ba16b531 |
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13-Jul-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: mmc: group non-DM specific functions As the SPL code for sunxi boards does not use the driver model, we have two mmc_ops structures, one for DM, one for non-DM. The actual hardware access code is shared, with the respective callback functions using that common code. To make this more obvious and easier to read, reorder the functions to group them: we first have the common code, then the non-DM bits, and the proper DM implementation at the end. Also document this structure in the comment at the beginning of the file. No functional change intended. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Samuel Holland <samuel@sholland.org> Tested-by: Samuel Holland <samuel@sholland.org> |
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5db81f1c |
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13-Jul-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: mmc: ignore card detect in SPL The sunxi MMC code does not use the DM in the SPL, as we don't have a device tree available that early, also no space for it. This also means we cannot access the card-detect GPIO information from there, so we have Kconfig symbols called CONFIG_MMCx_CD_PIN, which each board has to define. This is a burden, also requires extra GPIO code in the SPL. As the SPL is the natural successor of the BootROM (from which we are loaded), we can actually ignore the CD pin completely, as this is what the BootROM does as well: CD GPIOs are board specific, but the BootROM is not, so accesses the MMC devices anyway. Also, as we must have been loaded from an MMC device when reaching this code, there must have been a card in the slot. Remove the card detect code from the non-DM implementation of the sunxi MMC driver, to get rid of this unneeded code. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Samuel Holland <samuel@sholland.org> Tested-by: Samuel Holland <samuel@sholland.org> |
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fb6f6701 |
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20-Oct-2021 |
Samuel Holland <samuel@sholland.org> |
mmc: sunxi: Use DM_GPIO flags to set pull-up Now that the sunxi_gpio driver handles pull-up/down via the driver model, pin configuration does not need a platform-specific function. Signed-off-by: Samuel Holland <samuel@sholland.org> Tested-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
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c846fe43 |
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22-Jul-2021 |
Icenowy Zheng <icenowy@sipeed.com> |
mmc: sunxi: conditionally include MMC2 initialization code Allwinner R329 has no MMC2. Only include the code of MMC2 if the base address of it is defined. Signed-off-by: Icenowy Zheng <icenowy@sipeed.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
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42508461 |
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11-Sep-2021 |
Samuel Holland <samuel@sholland.org> |
sunxi: Clean up inclusions of asm/arch/gpio.h As part of migrating to DM_GPIO and DM_PINCTRL, eventually we will remove the asm/arch/gpio.h header. In preparation, clean up the various files that include it. Some files did not contain any GPIO code at all, so this header was completely unused. A few files contained only legacy platform-specific GPIO code for setting up pin muxes. They were left unchanged, as that code will be completely removed by the DM_PINCTRL migration. The remaining files contain some combination of DM_GPIO and legacy GPIO code. For those, switch to including asm/gpio.h (if it wasn't included already). Right now, this header provides both sets of functions, because ARCH_SUNXI selects GPIO_EXTRA_HEADER. This will still be the right header to include once the DM_GPIO migration is complete and GPIO_EXTRA_HEADER is no longer needed. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
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0b508ca8 |
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03-Sep-2021 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: mmc: A20: Fix MMC optimisation Some SoCs (as seen on A20) seem to misreport the MMC FIFO level if the FIFO is completely full: the level size reads as zero, but the FIFO_FULL bit is set. We won't do a single iteration of the read loop in this case, so will be stuck forever. Check for this situation and use a safe minimal FIFO size instead when we hit this case. This fixes MMC boot on A20 devices after the MMC FIFO optimisation (9faae5457f52). Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> |
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ac62dadb |
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21-Apr-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Use mmc_of_parse() At the moment the Allwinner MMC driver parses the bus-width and non-removable DT properties itself, in the probe() routine. There is actually a generic function provided by the MMC framework doing this job, also it parses more generic properties like broken-cd and advanced transfer modes. Drop our own code and call mmc_of_parse() instead, to get all new features for free. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> |
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9faae545 |
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05-May-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Increase MMIO FIFO read performance To avoid the complexity of DMA operations (with chained descriptors), we use repeated MMIO reads and writes to the SD_FIFO_REG, which allows us to drain or fill the MMC data buffer FIFO very easily. However those MMIO accesses are somewhat costly, so this limits our MMC performance, to between 17 and 22 MB/s, but down to 9.5 MB/s on the H6 (partly due to the lower AHB1 frequency). As it turns out we read the FIFO status register after *every* word we read or write, which effectively doubles the number of MMIO accesses, thus effectively more than halving our performance. To avoid this overhead, we can make use of the FIFO level bits, which are in the very same FIFO status registers. So for a read request, we now can collect as many words as the FIFO level originally indicated, and only then need to update the status register. We don't know for sure the size of the FIFO (and it seems to differ across SoCs anyway), so writing is more fragile, which is why we still use the old method for that. If we find a minimum FIFO size available on all SoCs, we could use that, in a later optimisation. This patch increases the eMMC read speed on a Pine64-LTS from about 22MB/s to 44 MB/s. SD card reads don't gain that much, but with 23 MB/s we now reach the practical limit for 3.3V SD cards. On the H6 we double our transfer speed, from 9.5 MB/s to 19.7 MB/s. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
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b5dd39c9 |
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05-May-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Cleanup and fix self-calibration code Newer SoCs have a self calibration feature, which avoids us writing hard coded phase delay values into the controller. Consolidate the code by avoiding unnecessary #ifdefs, and also enabling the feature for all those newer SoCs. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
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f85c0912 |
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05-May-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Cleanup "new timing mode" selection Among the SoCs using the "new timing mode", only the A83T needs to explicitly switch to that mode. By just defining the symbol for that one odd A83T bit to 0 for any other SoCs, we can always OR that in, and save the confusing nested #ifdefs. Clean up the also confusing new_mode setting on the way. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> |
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937ee31e |
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05-May-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Fix MMC clock parent selection Most Allwinner SoCs which use the so called "new timing mode" in their MMC controllers actually use the double-rate PLL6/PERIPH0 clock as their parent input clock. This is interestingly enough compensated by a hidden "by 2" post-divider in the mod clock, so the divider and actual output rate stay the same. Even though for the H6 and H616 (but only for them!) we use the doubled input clock for the divider computation, we never accounted for the implicit post-divider, so the clock was only half the speed on those SoCs. This didn't really matter so far, as our slow MMIO routine limits the transfer speed anyway, but we will fix this soon. Clean up the code around that selection, to always use the normal PLL6 (PERIPH0(1x)) clock as an input. As the rate and divider are the same, that makes no difference. Explain the hardware differences in a comment. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
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ca496baf |
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29-Apr-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Fix warnings with CONFIG_PHYS_64BIT When enabling PHYS_64BIT on 32-bit platforms, we get two warnings about pointer casts in sunxi_mmc.c. Those are related to MMIO addresses, which are always below 1GB on all Allwinner SoCs, so there is no problem with anything having more than 32 bits. Add the proper casts to make it compile cleanly. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> |
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f4826fb1 |
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18-Dec-2020 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Avoid #ifdefs in delay and width setup The delay and bus-width setup are slightly different across the Allwinner SoC generations, and we covered this so far with some preprocessor conditionals. Use the more readable IS_ENABLE() instead. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> |
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0237b304 |
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11-Jan-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Refactor mod clock register offset So far the only difference between the various Allwinner MMC controller we are concerned about is the mod clock register offset. This is actually not directly related to the MMC controller IP, but an integration choice, dependent on the SoC this appears in. To avoid becoming trapped with some compatible fallback strings, let's remove the whole struct sunxi_mmc_variant, and replace this with a SoC based choice, which we can derive from the CONFIG_MACH_SUNx_y symbols. This will later simplify H616 support. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> |
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aaebb900 |
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11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@gmail.com> |
mmc: sunxi: Replace H6 ifdefs with H6 gen macro It turns out that several SoCs share same mmc configuration as H6. In order to lower ifdef clutter replace H6 specific macro with common one. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
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c69cda25 |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org> |
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caa4daa2 |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org> |
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41575d8e |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org> |
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c05ed00a |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
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f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
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4233698d |
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18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com> |
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c57572eb |
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29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
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3c8c7da6 |
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21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> |
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9e233382 |
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29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
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a1925a64 |
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29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
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e8f37f42 |
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09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime |
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0e21a2ff |
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09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com> |
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629d267a |
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09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic |
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2a8882ec |
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09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic |
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20940ef2 |
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05-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
mmc: sunxi: add support for automatic delay calibration A64 and H6 support automatic delay calibration and Linux driver uses it instead of hardcoded delays. Add support for it to u-boot driver. Fixes eMMC instability on Pinebook Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Tested-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Cc: Vagrant Cascadian <vagrant@debian.org> Reviewed-by: Jagan Teki <jagan@openedev.com> |
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42956f1b |
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21-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: add MMC support for H6 The Allwinner H6 SoC has 3 MMC controllers like the ones in A64, with the MMC2 come with the capability to do crypto by EMCE. Add MMC support for H6. EMCE support is not added yet. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> |
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979b239b |
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29-Jun-2018 |
Adam Sampson <ats@offog.org> |
dm: mmc: sunxi: Add A10/A20 compatible strings Commit dd27918c2252 ("dm: mmc: sunxi: Add support for driver model") only added the allwinner,sun5i-a13-mmc compatible string for this driver. The DM initialisation code here also works with (at least) A10 and A20, so add the appropriate compatible strings as per Linux 4.17's driver. Tested on A10 Cubieboard and A20 pcDuino3 Nano with CONFIG_DM_MMC. (A20 worked already, because sun7i-a20.dtsi specifies both the A13 and A20 strings.) Signed-off-by: Adam Sampson <ats@offog.org> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jteki@openedev.com> |
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83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
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5ff8e548 |
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20-Mar-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
sunxi: improve throughput in the sunxi_mmc driver Throughput tests have shown the sunxi_mmc driver to take over 10s to read 10MB from a fast eMMC device due to excessive delays in polling loops. This commit restructures the main polling loops to use get_timer(...) to determine whether a (millisecond) timeout has expired. We choose not to use the wait_bit function, as we don't need interruptability with ctrl-c and have at least one case where two bits (one for an error condition and another one for completion) need to be read and using wait_bit would have not added to the clarity. The observed speedup in testing on a A31 is greater than 10x (e.g. a 10MB write decreases from 9.302s to 0.884s). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Tested-by: Mylène Josserand <mylene.josserand@bootlin.com> Acked-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
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4744d81c |
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27-Mar-2018 |
Stefan Mavrodiev <stefan@olimex.com> |
sunxi: mmc: Fix phase delays U-boot driver for sunxi-mmc uses PLL6, unlike linux kernel where PLL5 is used, with clock rates respectively 600MHz and 768MHz. Thus there are different phase degree steps - 24 for the kernel and 30 for u-boot. In the kernel driver the phase is set 90 deg for output and 120 for sample. Dividing by 30 will result values 3 and 4. Those are the values set in the u-boot driver. However, the condition defining delays is wrong. MMC core driver requests clock of 52MHz, sunxi-driver sets clock of 50MHz, but phase is set 30 deg for output and 120 deg for sample. Apparently this works for most cards. On A20-SOM204-EVB-eMMC there is eMMC card (KLMAG2GEND) which complains about it. Maybe there is other boards with similar problem? So the fix is to match delays for both u-boot and kernel. Signed-off-by: Stefan Mavrodiev <stefan@olimex.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
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8be4e61d |
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01-Feb-2018 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
mmc: sunxi: support cd-inverted With CONFIG_DM_MMC the BananaPi does not detect SD cards. The sunxi device trees use the cd-inverted property to indicate that the card detect is inverted. This property is documented in Linux kernel devicetree/bindings/mmc/mmc.txt The property is not marked as deprecated. A similar patch was posted by Tuomas but is in status "Changes Requested". https://patchwork.ozlabs.org/patch/850377/ This patch is a stripped down version of his patch. Suggested-by: Tuomas Tynkkynen <tuomas@tuxera.com> Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
8a647fc3 |
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31-Aug-2017 |
Chen-Yu Tsai <wens@csie.org> |
mmc: sunxi: Only update timing mode bit when enabling new timing mode When enabling the new mmc timing mode, we inadvertently clear all the remaining bits in the new timing mode register. The bits cleared include a default phase delay on the output clock. The BSP kernel states that the default values are supposed to be used. Clearing them results in decreased performance or transfer errors on some boards. Fixes: de9b1771c3b6 ("mmc: sunxi: Support new mode") Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
ead3697d |
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23-Aug-2017 |
Maxime Ripard <maxime.ripard@free-electrons.com> |
mmc: sunxi: fix legacy MMC initialisation The driver-model rework changed, among other things, the way the private data were moved around. It now uses the private field in the struct mmc. However, the mmc_create argument was changed in the process to always pass the array we used to have to store our private structures. The basically means that all the MMC driver instances will now have the private data of the first instance, which obviously doesn't work very well. Pass the proper pointer to mmc_create. Fixes: 034e226bc77e ("dm: mmc: sunxi: Pass private data around explicitly") Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Tested-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
de9b1771 |
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22-Aug-2017 |
Maxime Ripard <maxime.ripard@free-electrons.com> |
mmc: sunxi: Support new mode Almost all of the newer Allwinner SoCs have a new operating mode for the eMMC clocks that needs to be enabled in both the clock and the MMC controller. Details about that mode are sparse, and the name itself (new mode vs old mode) doesn't give much details, but it seems that the it changes the sampling of the MMC clock. One side effect is also that it divides the parent clock rate by 2. Add support for it through a Kconfig option. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
dd27918c |
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04-Jul-2017 |
Simon Glass <sjg@chromium.org> |
dm: mmc: sunxi: Add support for driver model Add a driver-model version of this driver which mostly uses the existing code. The old code can be removed once all boards are switched over. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
ec73d960 |
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04-Jul-2017 |
Simon Glass <sjg@chromium.org> |
dm: mmc: sunxi: Drop mmc_clk_io_on() This function has #ifdefs in it which we want to avoid for driver model. Instead we should use different compatible strings and the .data field. It also uses the MMC device number which is not available in driver model except through aliases. Move the function's into its caller so that the driver-model version can do things its own way. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
034e226b |
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04-Jul-2017 |
Simon Glass <sjg@chromium.org> |
dm: mmc: sunxi: Pass private data around explicitly At present the driver-private data is obtained in various functions by various means. With driver model this is provided automatically. Without driver model it comes from a C array declared at the top of the file. Adjust internal functions so that they are passed the private data as a parameter, allowing the caller to obtain it using either means. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
3f5af12a |
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04-Jul-2017 |
Simon Glass <sjg@chromium.org> |
dm: mmc: sunxi: Rename mmchost to priv Use the driver-model naming convention for this structure. It is data private to the driver so the local variable should be called 'priv'. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
e3c794e2 |
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04-Jul-2017 |
Simon Glass <sjg@chromium.org> |
dm: mmc: sunxi: Rename struct sunxi_mmc_host to sunxi_mmc_priv Use the driver-model naming convention for this structure. It is data private to the driver. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
07b0b9c0 |
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29-Dec-2016 |
Jaehoon Chung <jh80.chung@samsung.com> |
mmc: change the set_ios return type from void to int To maintain consistency, set_ios type of legacy mmc_ops changed to int. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> |
#
fb013184 |
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04-Nov-2016 |
Maxime Ripard <maxime.ripard@free-electrons.com> |
mmc: sunxi: Enable 8bits bus width for sun8i The sun8i SoCs also have a 8 bits capable MMC2 controller. Enable the support for those too. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Hans de Goede <hdegoede@redhat.com> |
#
915ffa52 |
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19-Jul-2016 |
Jaehoon Chung <jh80.chung@samsung.com> |
mmc: use the generic error number Use the generic error number instead of specific error number. If use the generic error number, it can debug more easier. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ef36d9ae |
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09-Jul-2016 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Use BROM stored boot_media value to determine our boot-source Now that we know that the BROM stores a value indicating the boot-source at the beginning of SRAM, use that instead of trying to recreate the BROM's boot probing. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
26c0c157 |
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07-Jul-2016 |
Tobias Doerffel <tobias.doerffel@ed-chemnitz.de> |
sunxi: mmc: increase status register polling rate for data transfers With a recent bunch of SD3.0 cards in our A20-based board we experienced data transfer rates of about 250 KiB/s instead of 10 MiB/s with previous cards from the same vendor (both 4 GB/class 10). By increasing status register polling rate from 1 kHz to 1 MHz we were able to reach the original transfer rates again. With the old cards we now even reach about 16 MiB/s. Signed-off-by: Tobias Doerffel <tobias.doerffel@ed-chemnitz.de> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
d96ebc46 |
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29-Mar-2016 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: Add support for Allwinner A64 SoCs The Allwinner A64 SoC is used in the Pine64. This patch adds all bits necessary to compile U-Boot for it running in AArch64 mode. Unfortunately SPL is not ready yet due to legal problems, so we need to boot using the binary boot0 for now. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> [agraf: remove SPL code, move to AArch64] Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
0ea5a04f |
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29-Mar-2016 |
Alexander Graf <agraf@csgraf.de> |
sunxi: Explicitly cast u32 pointer conversions Some parts of the sunxi code cast explicitly between u32 values and pointers. This is not a problem in practice, because all 64bit SoCs today only use the lower 32 bits for their phyical address space. But we need to make sure that the compiler is sure this is not an accident as well. Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
7c4213f6 |
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07-Dec-2015 |
Stephen Warren <swarren@nvidia.com> |
block: pass block dev not num to read/write/erase() This will allow the implementation to make use of data in the block_dev structure beyond the base device number. This will be useful so that eMMC block devices can encompass the HW partition ID rather than treating this out-of-band. Equally, the existence of the priv field is crying out for this patch to exist. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
be90974c |
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23-Sep-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Fix clk-delay settings In recent allwinner kernel sources the mmc/sdio clk-delay settings have been slightly tweaked, and for sun9i they are completely different then what we are using. This commit brings us in sync with what allwinner does, fixing problems accessing sdcards on some A33 devices (and likely others). For pre sun9i hardware this makes the following changes: -At 400Khz change the sample delay from 7 to 0 (first introduced in A31 sdk) -At 50 Mhz change the sample delay from 5 to 4 (first introduced in A23 sdk) -Above 50 MHz change the out delay from 2 to 1 (first introduced in A20 sdk) Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
28f69b9a |
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29-Aug-2015 |
Yousong Zhou <yszhou4tech@gmail.com> |
sunxi: mmc: set transfer timeout according to byte_cnt. Originally a timeout value of 2 seconds was used regardless of the size of data to be transfered. This prevented slow devices from working correctly while there was no much gain for faster devices, e.g. it takes 3708ms for a transfer of uImage of size 1899008 bytes. Signed-off-by: Yousong Zhou <yszhou4tech@gmail.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
645c48f5 |
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29-May-2015 |
Daniel Kochmański <dkochmanski@turtle-solutions.eu> |
sunxi: Create helper function veryfing valid boot signature on MMC This patch extracts checking for valid SD card "eGON.BT0" signature from `board_mmc_init` into function `sunxi_mmc_has_egon_boot_signature`. Buffer for mmc sector is allocated and freed at runtime. `panic` is triggered on malloc failure. Signed-off-by: Daniel Kochmański <dkochmanski@turtle-solutions.eu> CC: Roy Spliet <r.spliet@ultimaker.com> Cc: Ian Campbell <ijc@hellion.org.uk> [hdegoede@redhat.com: Small bugfix to make it work for devs other then mmc0] Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
1c09fa38 |
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30-May-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Enable pull-up on card-detect gpio pin On some boards we need to enable the internal pull-up te reliable detect that no card is inserted. Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
ff7e9cfc |
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05-May-2015 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-mmc
|
#
5a20397b |
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23-Mar-2015 |
Rob Herring <robh@kernel.org> |
mmc: remove the MMC_MODE_HC flag High capacity support is not a host capability, but a device capability that is queried via the OCR. The flag in the operating conditions request argument can just be set unconditionally. This matches the Linux implementation. [panto] Hand merged and renumbering MMC_MODE_DDR_52MHz. Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com> Cc: Pantelis Antoniou <pantelis.antoniou@konsulko.com> |
#
90641f82 |
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22-Apr-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Fix card-detect gpio handling to work with the driver-model The driver-model gpio functions may return another value then -1 as error, make the sunxi mmc code properly handle this. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
44d8ae5b |
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06-Apr-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Introduce a hidden SUNXI_GEN_SUNxI Kconfig bool sun6i and newer (derived) SoCs such as the sun8i-a23, sun8i-a33 and sun9i have a various things in common, like having separate ahb reset control registers, the SID living inside the pmic, custom pmic busses, new style watchdog, etc. This commit introduces a new hidden SUNXI_GEN_SUN6I Kconfig bool which can be used to check for these features avoiding the need for an ever growing list of "#if defined CONFIG_MACH_SUN?I" conditionals as we add support for more "new style" sunxi SoCs. Note that this commit changes the behavior of the gmac and hdmi code for sun8i and the upcoming sun9i devices. This does not matter as sun8i does not have gmac nor hdmi, and sun9i has new hardware-blocks for these so the old code will not work there. Also this is intentional as if a sun8i / sun9i variant which does use the old hwblocks shows up then the GEN_SUN6I code paths will be the right ones to use. For completeness this also adds a SUNXI_GEN_SUN4I bool for A10/A13/A20. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
1de32b8a |
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19-Feb-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Always declare High Capacity capability High Capacity (e)MMC cards work fine on sun4i / sun5i, and not having this capability set causes u-boot to not recognize the eMMC on an Utoo P66 A13 tablet, so always set it thereby fixing this. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
5abdb156 |
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31-Jan-2015 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: mmc: Add 'sunxi_' prefix to the static functions This results in a much more readable callgraph, because now they can't be confused with the function having exactly the same name in the generic mmc code. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
daf22636 |
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14-Jan-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Add support for sun9i (A80) The clocks on the A80 are hooked up slightly different, add support for this. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
5b8d7fb4 |
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15-Jan-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Use a realistic timeout when sending a mmc command Wait 1 second for the sdcard to respond, rather then waiting for 0xfffff milliseconds. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
b0c4ae1a |
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19-Dec-2014 |
Axel Lin <axel.lin@ingics.com> |
mmc: sunxi: Fix misuse of gpio_direction_input() It does not make sense to make gpio_direction_input() return the gpio input status. The return value of gpio_direction_input() is inconsistent if CONFIG_DM_GPIO is defined. And we don't need to call gpio_direction_input() int sunxi_mmc_getcd(). Just init the gpio once in mmc_resource_init() is enough. Signed-off-by: Axel Lin <axel.lin@ingics.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Ian Campbell <ijc@hellion.org.uk> |
#
fc3a8325 |
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07-Dec-2014 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Properly setup mod-clk and clock sampling phases The sunxi mmc controller has both an internal clock divider, as well as the divider in the mod0-clk for the mmc controller. The internal divider cannot be used, as it conflicts with the setting of clock sampling phases which is done in the mod0-clk, so it must be set to 0 (divide by 1). For some reason while the kernel has had this correct from day one, the u-boot sunxi mmc code has been using a fixed mod0-clk and setting its internal divider depending on the desired speed. This is something which we've inherited from the original Allwinner u-boot sources, but while this has been fixed in Allwinner's own u-boot code at least for the A23 and later upstream u-boot was still doing this wrong. This commit fixes this, thereby also fixing mmc support not working reliable on the A23 (which seems more sensitive to this) and possible also fixes some other sunxi mmc issues. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
967325fe |
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31-Oct-2014 |
Hans de Goede <hdegoede@redhat.com> |
dm: sunxi: Request card detect gpio This is necessary for the device-model enabled builds to work properly. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
ed41e62f |
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24-Oct-2014 |
Ian Campbell <ijc@hellion.org.uk> |
sunxi: Use CONFIG_MACH_SUN?I from Kconfig instead of CONFIG_SUN?I Mostly automatic with: sed -i -e 's/CONFIG_\(SUN[45678]I\)/CONFIG_MACH_\1/g' $(git grep -l CONFIG_SUN[45678]I) followed by removing the relevant #defines from include/configs/sun?i.h by hand. Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
e637b30b |
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22-Oct-2014 |
Chen-Yu Tsai <wens@csie.org> |
mmc: sunxi: Add support for sun8i (A23) The Allwinner A23 SoC has reset controls like the A31 (sun6i). The FIFO address is also the same as sun6i. Re-use code added for sun6i. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
e79c7c88 |
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02-Oct-2014 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: When we've both mmc0 and mmc2, detect from which one we're booting sunxi SOCs can boot from both mmc0 and mmc2, detect from which one we're booting, and make that one "mmc dev 0" so that a single u-boot binary can be used for both the onboard eMMC and for external sdcards. When we're booting from mmc2, we make it dev 0 because that is where the SPL will load the tertiary payload (the actual u-boot binary in our case) from, see: common/spl/spl_mmc.c, which has dev 0 hardcoded everywhere. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
cd82113a |
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02-Oct-2014 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Add mmc card-detect functionality Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
1d1bd42e |
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03-Oct-2014 |
Hans de Goede <hdegoede@redhat.com> |
ARM: sunxi-mmc: Add mmc support for sun6i / A31 The mmc hardware on sun6i has an extra reset control that needs to be de-asserted prior to usage. Also the FIFO address is different. Signed-off-by: Hans de Goede <hdegoede@redhat.com> [wens@csie.org: use setbits_le32 for reset control, drop obsolete changes, rewrite different FIFO address handling, add commit message] Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
a3e8c220 |
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22-Sep-2014 |
Wills Wang <wills.wang.open@gmail.com> |
mmc: sunxi: add SDHC support for sun6i/sun7i/sun8i Allwinner A20/A23/A31's SD/MMC host support SDHC High Capacity feature. Signed-off-by: Wills Wang <wills.wang.open@gmail.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
b6ae6765 |
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09-Jun-2014 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Remove mmc DMA support The DMA code in sunxi_mmc.c is broken. mmc_trans_data_by_dma() allocates the dma descriptors on the stack, and then exits while the dma transfer is in progress, so the dma engine is reading stack memory which at that point may be re-used. So far we've gotten away with this by luck, but recent u-boot changes have shifted the stack start address by 16 bytes, which combined with dma alignment now exposes this problem. Since we end up just busy waiting for the dma engine anyway, this commit fixes things by simply removing the dma code, resulting in smaller bug-free code. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
e24ea55c |
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05-May-2014 |
Ian Campbell <ijc@hellion.org.uk> |
sunxi: mmc support On Mon, 2014-05-05 at 14:18 +0200, Stefan Roese wrote: > > + case 1: > > +#if CONFIG_MMC1_PG > Are you sure that this is correct and shouldn't be: > > +#ifdef CONFIG_MMC1_PG > > ? It's "correct" in so far as it works (the boards.cfg config stuff #defines things to 1), but I think you are right that it isn't the preferred style. But... > A quick scan through this patch series shows that this define > is not set at all. Perhaps its outdated? Or is it used to support > some other sunxi SoC? Not sure, perhaps it should be removed for > now. ...I had thought that it was to support some other board which wasn't being upstreamed right now, so eventually useful and harmless for now, but I've just checked and it isn't actually used by any of the boards in u-boot-sunxi.git. So rather than fix it to use #ifdef lets drop it. Rather than resend the entire series, here is v5.1 of this patch. > Other than this please add my: > > Reviewed-by: Stefan Roese <sr@denx.de> Thanks! 8<--------------------------------- >From 20704e35a41664de5f516ed0e02981ac06085102 Mon Sep 17 00:00:00 2001 From: Ian Campbell <ijc@hellion.org.uk> Date: Fri, 7 Mar 2014 04:29:39 +0000 Subject: [PATCH v5.1 7/8] sunxi: mmc support This adds support for the MMC controller on the Allwinner A20 (sun7i) processor. Signed-off-by: Henrik Nordstrom <henrik@henriknordstrom.net> Signed-off-by: Luke Leighton <lkcl@lkcl.net> Signed-off-by: Oliver Schinagl <oliver@schinagl.nl> Signed-off-by: Wills Wang <wills.wang.open@gmail.com> Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Stefan Roese <sr@denx.de> Cc: Tom Cubie <Mr.hipboi@gmail.com> Cc: Aaron Maoye <leafy.myeh@allwinnertech.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Reviewed-by: Tom Rini <trini@ti.com> |
#
95168d77 |
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06-Sep-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: add Allwinner R528/T113 SoC support This adds the remaining code bits to teach U-Boot about Allwinner's newest SoC generation. This was introduced with the RISC-V based Allwinner D1 SoC, which actually shares a die with the ARM cores versions called R528 (BGA, without DRAM) and T113s (QFP, with embedded DRAM). This adds the new Kconfig stanza, using the two newly introduced symbols for the new SoC generation and pincontroller. It also adds the new symbols to the relavent code places, to set all the hardcoded bits directly. We need one DT override: The ARM core version of the DT specifies the CPUX watchdog as "reserved", which means it won't be recognised by U-Boot. Override this in our generic sunxi-u-boot.dtsi, to let U-Boot pick up this watchdog, so that the generic reset driver will work. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
4a9e89a3 |
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05-Oct-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: introduce NCAT2 generation model Allwinner seems to typically stick to a common MMIO memory map for several SoCs, but from time to time does some breaking changes, which also introduce new generations of some peripherals. The last time this happened with the H6, which apart from re-organising the base addresses also changed the clock controller significantly. We added a CONFIG_SUN50I_GEN_H6 symbol back then to mark SoCs sharing those traits. Now the Allwinner D1 changes the memory map again, and also extends the pincontroller, among other peripherals. To mark this generation of SoCs, add a CONFIG_SUNXI_GEN_NCAT2 symbol, this name is reportedly used in the Allwinner BSP code, and prevents us from inventing our own name. Add this new symbol to some guards that were already checking for the H6 generation, since many features are shared between the two (like the renovated clock controller). This paves the way to introduce a first user of this generation. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Samuel Holland <samuel@sholland.org> |
#
207ed0a3 |
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06-Sep-2022 |
Andre Przywara <andre.przywara@arm.com> |
pinctrl: sunxi: remove GPIO_EXTRA_HEADER U-Boot's generic GPIO_EXTRA_HEADER is a convenience symbol to allow code to more easily include platform specific GPIO headers. This should not be needed in a DM world anymore, since the generic GPIO framework handles that nicely. For Allwinner boards we still need to deal with non-DM GPIO in the SPL, but this should become the exception, not the rule. Make this more obvious by removing the definition of GPIO_EXTRA_HEADER, and just force every legacy user of platform specific GPIO to include the new sunxi_gpio.h header explicitly. Everyone doing so should feel ashamed and should find a way to avoid it from now on. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Samuel Holland <samuel@sholland.org> |
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ba16b531 |
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13-Jul-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: mmc: group non-DM specific functions As the SPL code for sunxi boards does not use the driver model, we have two mmc_ops structures, one for DM, one for non-DM. The actual hardware access code is shared, with the respective callback functions using that common code. To make this more obvious and easier to read, reorder the functions to group them: we first have the common code, then the non-DM bits, and the proper DM implementation at the end. Also document this structure in the comment at the beginning of the file. No functional change intended. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Samuel Holland <samuel@sholland.org> Tested-by: Samuel Holland <samuel@sholland.org> |
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5db81f1c |
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13-Jul-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: mmc: ignore card detect in SPL The sunxi MMC code does not use the DM in the SPL, as we don't have a device tree available that early, also no space for it. This also means we cannot access the card-detect GPIO information from there, so we have Kconfig symbols called CONFIG_MMCx_CD_PIN, which each board has to define. This is a burden, also requires extra GPIO code in the SPL. As the SPL is the natural successor of the BootROM (from which we are loaded), we can actually ignore the CD pin completely, as this is what the BootROM does as well: CD GPIOs are board specific, but the BootROM is not, so accesses the MMC devices anyway. Also, as we must have been loaded from an MMC device when reaching this code, there must have been a card in the slot. Remove the card detect code from the non-DM implementation of the sunxi MMC driver, to get rid of this unneeded code. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Samuel Holland <samuel@sholland.org> Tested-by: Samuel Holland <samuel@sholland.org> |
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fb6f6701 |
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20-Oct-2021 |
Samuel Holland <samuel@sholland.org> |
mmc: sunxi: Use DM_GPIO flags to set pull-up Now that the sunxi_gpio driver handles pull-up/down via the driver model, pin configuration does not need a platform-specific function. Signed-off-by: Samuel Holland <samuel@sholland.org> Tested-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
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c846fe43 |
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22-Jul-2021 |
Icenowy Zheng <icenowy@sipeed.com> |
mmc: sunxi: conditionally include MMC2 initialization code Allwinner R329 has no MMC2. Only include the code of MMC2 if the base address of it is defined. Signed-off-by: Icenowy Zheng <icenowy@sipeed.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
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42508461 |
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11-Sep-2021 |
Samuel Holland <samuel@sholland.org> |
sunxi: Clean up inclusions of asm/arch/gpio.h As part of migrating to DM_GPIO and DM_PINCTRL, eventually we will remove the asm/arch/gpio.h header. In preparation, clean up the various files that include it. Some files did not contain any GPIO code at all, so this header was completely unused. A few files contained only legacy platform-specific GPIO code for setting up pin muxes. They were left unchanged, as that code will be completely removed by the DM_PINCTRL migration. The remaining files contain some combination of DM_GPIO and legacy GPIO code. For those, switch to including asm/gpio.h (if it wasn't included already). Right now, this header provides both sets of functions, because ARCH_SUNXI selects GPIO_EXTRA_HEADER. This will still be the right header to include once the DM_GPIO migration is complete and GPIO_EXTRA_HEADER is no longer needed. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
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0b508ca8 |
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03-Sep-2021 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: mmc: A20: Fix MMC optimisation Some SoCs (as seen on A20) seem to misreport the MMC FIFO level if the FIFO is completely full: the level size reads as zero, but the FIFO_FULL bit is set. We won't do a single iteration of the read loop in this case, so will be stuck forever. Check for this situation and use a safe minimal FIFO size instead when we hit this case. This fixes MMC boot on A20 devices after the MMC FIFO optimisation (9faae5457f52). Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> |
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ac62dadb |
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21-Apr-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Use mmc_of_parse() At the moment the Allwinner MMC driver parses the bus-width and non-removable DT properties itself, in the probe() routine. There is actually a generic function provided by the MMC framework doing this job, also it parses more generic properties like broken-cd and advanced transfer modes. Drop our own code and call mmc_of_parse() instead, to get all new features for free. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> |
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9faae545 |
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05-May-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Increase MMIO FIFO read performance To avoid the complexity of DMA operations (with chained descriptors), we use repeated MMIO reads and writes to the SD_FIFO_REG, which allows us to drain or fill the MMC data buffer FIFO very easily. However those MMIO accesses are somewhat costly, so this limits our MMC performance, to between 17 and 22 MB/s, but down to 9.5 MB/s on the H6 (partly due to the lower AHB1 frequency). As it turns out we read the FIFO status register after *every* word we read or write, which effectively doubles the number of MMIO accesses, thus effectively more than halving our performance. To avoid this overhead, we can make use of the FIFO level bits, which are in the very same FIFO status registers. So for a read request, we now can collect as many words as the FIFO level originally indicated, and only then need to update the status register. We don't know for sure the size of the FIFO (and it seems to differ across SoCs anyway), so writing is more fragile, which is why we still use the old method for that. If we find a minimum FIFO size available on all SoCs, we could use that, in a later optimisation. This patch increases the eMMC read speed on a Pine64-LTS from about 22MB/s to 44 MB/s. SD card reads don't gain that much, but with 23 MB/s we now reach the practical limit for 3.3V SD cards. On the H6 we double our transfer speed, from 9.5 MB/s to 19.7 MB/s. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
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b5dd39c9 |
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05-May-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Cleanup and fix self-calibration code Newer SoCs have a self calibration feature, which avoids us writing hard coded phase delay values into the controller. Consolidate the code by avoiding unnecessary #ifdefs, and also enabling the feature for all those newer SoCs. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
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f85c0912 |
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05-May-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Cleanup "new timing mode" selection Among the SoCs using the "new timing mode", only the A83T needs to explicitly switch to that mode. By just defining the symbol for that one odd A83T bit to 0 for any other SoCs, we can always OR that in, and save the confusing nested #ifdefs. Clean up the also confusing new_mode setting on the way. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> |
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937ee31e |
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05-May-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Fix MMC clock parent selection Most Allwinner SoCs which use the so called "new timing mode" in their MMC controllers actually use the double-rate PLL6/PERIPH0 clock as their parent input clock. This is interestingly enough compensated by a hidden "by 2" post-divider in the mod clock, so the divider and actual output rate stay the same. Even though for the H6 and H616 (but only for them!) we use the doubled input clock for the divider computation, we never accounted for the implicit post-divider, so the clock was only half the speed on those SoCs. This didn't really matter so far, as our slow MMIO routine limits the transfer speed anyway, but we will fix this soon. Clean up the code around that selection, to always use the normal PLL6 (PERIPH0(1x)) clock as an input. As the rate and divider are the same, that makes no difference. Explain the hardware differences in a comment. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
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ca496baf |
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29-Apr-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Fix warnings with CONFIG_PHYS_64BIT When enabling PHYS_64BIT on 32-bit platforms, we get two warnings about pointer casts in sunxi_mmc.c. Those are related to MMIO addresses, which are always below 1GB on all Allwinner SoCs, so there is no problem with anything having more than 32 bits. Add the proper casts to make it compile cleanly. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> |
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f4826fb1 |
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18-Dec-2020 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Avoid #ifdefs in delay and width setup The delay and bus-width setup are slightly different across the Allwinner SoC generations, and we covered this so far with some preprocessor conditionals. Use the more readable IS_ENABLE() instead. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> |
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0237b304 |
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11-Jan-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Refactor mod clock register offset So far the only difference between the various Allwinner MMC controller we are concerned about is the mod clock register offset. This is actually not directly related to the MMC controller IP, but an integration choice, dependent on the SoC this appears in. To avoid becoming trapped with some compatible fallback strings, let's remove the whole struct sunxi_mmc_variant, and replace this with a SoC based choice, which we can derive from the CONFIG_MACH_SUNx_y symbols. This will later simplify H616 support. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> |
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aaebb900 |
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11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@gmail.com> |
mmc: sunxi: Replace H6 ifdefs with H6 gen macro It turns out that several SoCs share same mmc configuration as H6. In order to lower ifdef clutter replace H6 specific macro with common one. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
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c69cda25 |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org> |
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caa4daa2 |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org> |
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41575d8e |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org> |
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c05ed00a |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
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f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
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4233698d |
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18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com> |
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c57572eb |
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29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
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3c8c7da6 |
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21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> |
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9e233382 |
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29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
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a1925a64 |
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29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
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e8f37f42 |
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09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime |
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0e21a2ff |
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09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com> |
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629d267a |
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09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic |
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2a8882ec |
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09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic |
#
20940ef2 |
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05-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
mmc: sunxi: add support for automatic delay calibration A64 and H6 support automatic delay calibration and Linux driver uses it instead of hardcoded delays. Add support for it to u-boot driver. Fixes eMMC instability on Pinebook Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Tested-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Cc: Vagrant Cascadian <vagrant@debian.org> Reviewed-by: Jagan Teki <jagan@openedev.com> |
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42956f1b |
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21-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: add MMC support for H6 The Allwinner H6 SoC has 3 MMC controllers like the ones in A64, with the MMC2 come with the capability to do crypto by EMCE. Add MMC support for H6. EMCE support is not added yet. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> |
#
979b239b |
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29-Jun-2018 |
Adam Sampson <ats@offog.org> |
dm: mmc: sunxi: Add A10/A20 compatible strings Commit dd27918c2252 ("dm: mmc: sunxi: Add support for driver model") only added the allwinner,sun5i-a13-mmc compatible string for this driver. The DM initialisation code here also works with (at least) A10 and A20, so add the appropriate compatible strings as per Linux 4.17's driver. Tested on A10 Cubieboard and A20 pcDuino3 Nano with CONFIG_DM_MMC. (A20 worked already, because sun7i-a20.dtsi specifies both the A13 and A20 strings.) Signed-off-by: Adam Sampson <ats@offog.org> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jteki@openedev.com> |
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83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
5ff8e548 |
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20-Mar-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
sunxi: improve throughput in the sunxi_mmc driver Throughput tests have shown the sunxi_mmc driver to take over 10s to read 10MB from a fast eMMC device due to excessive delays in polling loops. This commit restructures the main polling loops to use get_timer(...) to determine whether a (millisecond) timeout has expired. We choose not to use the wait_bit function, as we don't need interruptability with ctrl-c and have at least one case where two bits (one for an error condition and another one for completion) need to be read and using wait_bit would have not added to the clarity. The observed speedup in testing on a A31 is greater than 10x (e.g. a 10MB write decreases from 9.302s to 0.884s). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Tested-by: Mylène Josserand <mylene.josserand@bootlin.com> Acked-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
4744d81c |
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27-Mar-2018 |
Stefan Mavrodiev <stefan@olimex.com> |
sunxi: mmc: Fix phase delays U-boot driver for sunxi-mmc uses PLL6, unlike linux kernel where PLL5 is used, with clock rates respectively 600MHz and 768MHz. Thus there are different phase degree steps - 24 for the kernel and 30 for u-boot. In the kernel driver the phase is set 90 deg for output and 120 for sample. Dividing by 30 will result values 3 and 4. Those are the values set in the u-boot driver. However, the condition defining delays is wrong. MMC core driver requests clock of 52MHz, sunxi-driver sets clock of 50MHz, but phase is set 30 deg for output and 120 deg for sample. Apparently this works for most cards. On A20-SOM204-EVB-eMMC there is eMMC card (KLMAG2GEND) which complains about it. Maybe there is other boards with similar problem? So the fix is to match delays for both u-boot and kernel. Signed-off-by: Stefan Mavrodiev <stefan@olimex.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
8be4e61d |
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01-Feb-2018 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
mmc: sunxi: support cd-inverted With CONFIG_DM_MMC the BananaPi does not detect SD cards. The sunxi device trees use the cd-inverted property to indicate that the card detect is inverted. This property is documented in Linux kernel devicetree/bindings/mmc/mmc.txt The property is not marked as deprecated. A similar patch was posted by Tuomas but is in status "Changes Requested". https://patchwork.ozlabs.org/patch/850377/ This patch is a stripped down version of his patch. Suggested-by: Tuomas Tynkkynen <tuomas@tuxera.com> Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
8a647fc3 |
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31-Aug-2017 |
Chen-Yu Tsai <wens@csie.org> |
mmc: sunxi: Only update timing mode bit when enabling new timing mode When enabling the new mmc timing mode, we inadvertently clear all the remaining bits in the new timing mode register. The bits cleared include a default phase delay on the output clock. The BSP kernel states that the default values are supposed to be used. Clearing them results in decreased performance or transfer errors on some boards. Fixes: de9b1771c3b6 ("mmc: sunxi: Support new mode") Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
ead3697d |
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23-Aug-2017 |
Maxime Ripard <maxime.ripard@free-electrons.com> |
mmc: sunxi: fix legacy MMC initialisation The driver-model rework changed, among other things, the way the private data were moved around. It now uses the private field in the struct mmc. However, the mmc_create argument was changed in the process to always pass the array we used to have to store our private structures. The basically means that all the MMC driver instances will now have the private data of the first instance, which obviously doesn't work very well. Pass the proper pointer to mmc_create. Fixes: 034e226bc77e ("dm: mmc: sunxi: Pass private data around explicitly") Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Tested-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
de9b1771 |
|
22-Aug-2017 |
Maxime Ripard <maxime.ripard@free-electrons.com> |
mmc: sunxi: Support new mode Almost all of the newer Allwinner SoCs have a new operating mode for the eMMC clocks that needs to be enabled in both the clock and the MMC controller. Details about that mode are sparse, and the name itself (new mode vs old mode) doesn't give much details, but it seems that the it changes the sampling of the MMC clock. One side effect is also that it divides the parent clock rate by 2. Add support for it through a Kconfig option. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
dd27918c |
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04-Jul-2017 |
Simon Glass <sjg@chromium.org> |
dm: mmc: sunxi: Add support for driver model Add a driver-model version of this driver which mostly uses the existing code. The old code can be removed once all boards are switched over. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
ec73d960 |
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04-Jul-2017 |
Simon Glass <sjg@chromium.org> |
dm: mmc: sunxi: Drop mmc_clk_io_on() This function has #ifdefs in it which we want to avoid for driver model. Instead we should use different compatible strings and the .data field. It also uses the MMC device number which is not available in driver model except through aliases. Move the function's into its caller so that the driver-model version can do things its own way. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
034e226b |
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04-Jul-2017 |
Simon Glass <sjg@chromium.org> |
dm: mmc: sunxi: Pass private data around explicitly At present the driver-private data is obtained in various functions by various means. With driver model this is provided automatically. Without driver model it comes from a C array declared at the top of the file. Adjust internal functions so that they are passed the private data as a parameter, allowing the caller to obtain it using either means. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
3f5af12a |
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04-Jul-2017 |
Simon Glass <sjg@chromium.org> |
dm: mmc: sunxi: Rename mmchost to priv Use the driver-model naming convention for this structure. It is data private to the driver so the local variable should be called 'priv'. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
e3c794e2 |
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04-Jul-2017 |
Simon Glass <sjg@chromium.org> |
dm: mmc: sunxi: Rename struct sunxi_mmc_host to sunxi_mmc_priv Use the driver-model naming convention for this structure. It is data private to the driver. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
07b0b9c0 |
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29-Dec-2016 |
Jaehoon Chung <jh80.chung@samsung.com> |
mmc: change the set_ios return type from void to int To maintain consistency, set_ios type of legacy mmc_ops changed to int. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> |
#
fb013184 |
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04-Nov-2016 |
Maxime Ripard <maxime.ripard@free-electrons.com> |
mmc: sunxi: Enable 8bits bus width for sun8i The sun8i SoCs also have a 8 bits capable MMC2 controller. Enable the support for those too. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Hans de Goede <hdegoede@redhat.com> |
#
915ffa52 |
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19-Jul-2016 |
Jaehoon Chung <jh80.chung@samsung.com> |
mmc: use the generic error number Use the generic error number instead of specific error number. If use the generic error number, it can debug more easier. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ef36d9ae |
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09-Jul-2016 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Use BROM stored boot_media value to determine our boot-source Now that we know that the BROM stores a value indicating the boot-source at the beginning of SRAM, use that instead of trying to recreate the BROM's boot probing. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
26c0c157 |
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07-Jul-2016 |
Tobias Doerffel <tobias.doerffel@ed-chemnitz.de> |
sunxi: mmc: increase status register polling rate for data transfers With a recent bunch of SD3.0 cards in our A20-based board we experienced data transfer rates of about 250 KiB/s instead of 10 MiB/s with previous cards from the same vendor (both 4 GB/class 10). By increasing status register polling rate from 1 kHz to 1 MHz we were able to reach the original transfer rates again. With the old cards we now even reach about 16 MiB/s. Signed-off-by: Tobias Doerffel <tobias.doerffel@ed-chemnitz.de> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
d96ebc46 |
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29-Mar-2016 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: Add support for Allwinner A64 SoCs The Allwinner A64 SoC is used in the Pine64. This patch adds all bits necessary to compile U-Boot for it running in AArch64 mode. Unfortunately SPL is not ready yet due to legal problems, so we need to boot using the binary boot0 for now. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> [agraf: remove SPL code, move to AArch64] Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
0ea5a04f |
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29-Mar-2016 |
Alexander Graf <agraf@csgraf.de> |
sunxi: Explicitly cast u32 pointer conversions Some parts of the sunxi code cast explicitly between u32 values and pointers. This is not a problem in practice, because all 64bit SoCs today only use the lower 32 bits for their phyical address space. But we need to make sure that the compiler is sure this is not an accident as well. Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
7c4213f6 |
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07-Dec-2015 |
Stephen Warren <swarren@nvidia.com> |
block: pass block dev not num to read/write/erase() This will allow the implementation to make use of data in the block_dev structure beyond the base device number. This will be useful so that eMMC block devices can encompass the HW partition ID rather than treating this out-of-band. Equally, the existence of the priv field is crying out for this patch to exist. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
be90974c |
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23-Sep-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Fix clk-delay settings In recent allwinner kernel sources the mmc/sdio clk-delay settings have been slightly tweaked, and for sun9i they are completely different then what we are using. This commit brings us in sync with what allwinner does, fixing problems accessing sdcards on some A33 devices (and likely others). For pre sun9i hardware this makes the following changes: -At 400Khz change the sample delay from 7 to 0 (first introduced in A31 sdk) -At 50 Mhz change the sample delay from 5 to 4 (first introduced in A23 sdk) -Above 50 MHz change the out delay from 2 to 1 (first introduced in A20 sdk) Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
28f69b9a |
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29-Aug-2015 |
Yousong Zhou <yszhou4tech@gmail.com> |
sunxi: mmc: set transfer timeout according to byte_cnt. Originally a timeout value of 2 seconds was used regardless of the size of data to be transfered. This prevented slow devices from working correctly while there was no much gain for faster devices, e.g. it takes 3708ms for a transfer of uImage of size 1899008 bytes. Signed-off-by: Yousong Zhou <yszhou4tech@gmail.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
645c48f5 |
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29-May-2015 |
Daniel Kochmański <dkochmanski@turtle-solutions.eu> |
sunxi: Create helper function veryfing valid boot signature on MMC This patch extracts checking for valid SD card "eGON.BT0" signature from `board_mmc_init` into function `sunxi_mmc_has_egon_boot_signature`. Buffer for mmc sector is allocated and freed at runtime. `panic` is triggered on malloc failure. Signed-off-by: Daniel Kochmański <dkochmanski@turtle-solutions.eu> CC: Roy Spliet <r.spliet@ultimaker.com> Cc: Ian Campbell <ijc@hellion.org.uk> [hdegoede@redhat.com: Small bugfix to make it work for devs other then mmc0] Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
1c09fa38 |
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30-May-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Enable pull-up on card-detect gpio pin On some boards we need to enable the internal pull-up te reliable detect that no card is inserted. Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
ff7e9cfc |
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05-May-2015 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-mmc
|
#
5a20397b |
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23-Mar-2015 |
Rob Herring <robh@kernel.org> |
mmc: remove the MMC_MODE_HC flag High capacity support is not a host capability, but a device capability that is queried via the OCR. The flag in the operating conditions request argument can just be set unconditionally. This matches the Linux implementation. [panto] Hand merged and renumbering MMC_MODE_DDR_52MHz. Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com> Cc: Pantelis Antoniou <pantelis.antoniou@konsulko.com> |
#
90641f82 |
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22-Apr-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Fix card-detect gpio handling to work with the driver-model The driver-model gpio functions may return another value then -1 as error, make the sunxi mmc code properly handle this. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
44d8ae5b |
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06-Apr-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Introduce a hidden SUNXI_GEN_SUNxI Kconfig bool sun6i and newer (derived) SoCs such as the sun8i-a23, sun8i-a33 and sun9i have a various things in common, like having separate ahb reset control registers, the SID living inside the pmic, custom pmic busses, new style watchdog, etc. This commit introduces a new hidden SUNXI_GEN_SUN6I Kconfig bool which can be used to check for these features avoiding the need for an ever growing list of "#if defined CONFIG_MACH_SUN?I" conditionals as we add support for more "new style" sunxi SoCs. Note that this commit changes the behavior of the gmac and hdmi code for sun8i and the upcoming sun9i devices. This does not matter as sun8i does not have gmac nor hdmi, and sun9i has new hardware-blocks for these so the old code will not work there. Also this is intentional as if a sun8i / sun9i variant which does use the old hwblocks shows up then the GEN_SUN6I code paths will be the right ones to use. For completeness this also adds a SUNXI_GEN_SUN4I bool for A10/A13/A20. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
1de32b8a |
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19-Feb-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Always declare High Capacity capability High Capacity (e)MMC cards work fine on sun4i / sun5i, and not having this capability set causes u-boot to not recognize the eMMC on an Utoo P66 A13 tablet, so always set it thereby fixing this. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
5abdb156 |
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31-Jan-2015 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: mmc: Add 'sunxi_' prefix to the static functions This results in a much more readable callgraph, because now they can't be confused with the function having exactly the same name in the generic mmc code. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
daf22636 |
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14-Jan-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Add support for sun9i (A80) The clocks on the A80 are hooked up slightly different, add support for this. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
5b8d7fb4 |
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15-Jan-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Use a realistic timeout when sending a mmc command Wait 1 second for the sdcard to respond, rather then waiting for 0xfffff milliseconds. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
b0c4ae1a |
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19-Dec-2014 |
Axel Lin <axel.lin@ingics.com> |
mmc: sunxi: Fix misuse of gpio_direction_input() It does not make sense to make gpio_direction_input() return the gpio input status. The return value of gpio_direction_input() is inconsistent if CONFIG_DM_GPIO is defined. And we don't need to call gpio_direction_input() int sunxi_mmc_getcd(). Just init the gpio once in mmc_resource_init() is enough. Signed-off-by: Axel Lin <axel.lin@ingics.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Ian Campbell <ijc@hellion.org.uk> |
#
fc3a8325 |
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07-Dec-2014 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Properly setup mod-clk and clock sampling phases The sunxi mmc controller has both an internal clock divider, as well as the divider in the mod0-clk for the mmc controller. The internal divider cannot be used, as it conflicts with the setting of clock sampling phases which is done in the mod0-clk, so it must be set to 0 (divide by 1). For some reason while the kernel has had this correct from day one, the u-boot sunxi mmc code has been using a fixed mod0-clk and setting its internal divider depending on the desired speed. This is something which we've inherited from the original Allwinner u-boot sources, but while this has been fixed in Allwinner's own u-boot code at least for the A23 and later upstream u-boot was still doing this wrong. This commit fixes this, thereby also fixing mmc support not working reliable on the A23 (which seems more sensitive to this) and possible also fixes some other sunxi mmc issues. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
967325fe |
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31-Oct-2014 |
Hans de Goede <hdegoede@redhat.com> |
dm: sunxi: Request card detect gpio This is necessary for the device-model enabled builds to work properly. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
ed41e62f |
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24-Oct-2014 |
Ian Campbell <ijc@hellion.org.uk> |
sunxi: Use CONFIG_MACH_SUN?I from Kconfig instead of CONFIG_SUN?I Mostly automatic with: sed -i -e 's/CONFIG_\(SUN[45678]I\)/CONFIG_MACH_\1/g' $(git grep -l CONFIG_SUN[45678]I) followed by removing the relevant #defines from include/configs/sun?i.h by hand. Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
e637b30b |
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22-Oct-2014 |
Chen-Yu Tsai <wens@csie.org> |
mmc: sunxi: Add support for sun8i (A23) The Allwinner A23 SoC has reset controls like the A31 (sun6i). The FIFO address is also the same as sun6i. Re-use code added for sun6i. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
e79c7c88 |
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02-Oct-2014 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: When we've both mmc0 and mmc2, detect from which one we're booting sunxi SOCs can boot from both mmc0 and mmc2, detect from which one we're booting, and make that one "mmc dev 0" so that a single u-boot binary can be used for both the onboard eMMC and for external sdcards. When we're booting from mmc2, we make it dev 0 because that is where the SPL will load the tertiary payload (the actual u-boot binary in our case) from, see: common/spl/spl_mmc.c, which has dev 0 hardcoded everywhere. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
cd82113a |
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02-Oct-2014 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Add mmc card-detect functionality Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
1d1bd42e |
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03-Oct-2014 |
Hans de Goede <hdegoede@redhat.com> |
ARM: sunxi-mmc: Add mmc support for sun6i / A31 The mmc hardware on sun6i has an extra reset control that needs to be de-asserted prior to usage. Also the FIFO address is different. Signed-off-by: Hans de Goede <hdegoede@redhat.com> [wens@csie.org: use setbits_le32 for reset control, drop obsolete changes, rewrite different FIFO address handling, add commit message] Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
a3e8c220 |
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22-Sep-2014 |
Wills Wang <wills.wang.open@gmail.com> |
mmc: sunxi: add SDHC support for sun6i/sun7i/sun8i Allwinner A20/A23/A31's SD/MMC host support SDHC High Capacity feature. Signed-off-by: Wills Wang <wills.wang.open@gmail.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
b6ae6765 |
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09-Jun-2014 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Remove mmc DMA support The DMA code in sunxi_mmc.c is broken. mmc_trans_data_by_dma() allocates the dma descriptors on the stack, and then exits while the dma transfer is in progress, so the dma engine is reading stack memory which at that point may be re-used. So far we've gotten away with this by luck, but recent u-boot changes have shifted the stack start address by 16 bytes, which combined with dma alignment now exposes this problem. Since we end up just busy waiting for the dma engine anyway, this commit fixes things by simply removing the dma code, resulting in smaller bug-free code. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
e24ea55c |
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05-May-2014 |
Ian Campbell <ijc@hellion.org.uk> |
sunxi: mmc support On Mon, 2014-05-05 at 14:18 +0200, Stefan Roese wrote: > > + case 1: > > +#if CONFIG_MMC1_PG > Are you sure that this is correct and shouldn't be: > > +#ifdef CONFIG_MMC1_PG > > ? It's "correct" in so far as it works (the boards.cfg config stuff #defines things to 1), but I think you are right that it isn't the preferred style. But... > A quick scan through this patch series shows that this define > is not set at all. Perhaps its outdated? Or is it used to support > some other sunxi SoC? Not sure, perhaps it should be removed for > now. ...I had thought that it was to support some other board which wasn't being upstreamed right now, so eventually useful and harmless for now, but I've just checked and it isn't actually used by any of the boards in u-boot-sunxi.git. So rather than fix it to use #ifdef lets drop it. Rather than resend the entire series, here is v5.1 of this patch. > Other than this please add my: > > Reviewed-by: Stefan Roese <sr@denx.de> Thanks! 8<--------------------------------- >From 20704e35a41664de5f516ed0e02981ac06085102 Mon Sep 17 00:00:00 2001 From: Ian Campbell <ijc@hellion.org.uk> Date: Fri, 7 Mar 2014 04:29:39 +0000 Subject: [PATCH v5.1 7/8] sunxi: mmc support This adds support for the MMC controller on the Allwinner A20 (sun7i) processor. Signed-off-by: Henrik Nordstrom <henrik@henriknordstrom.net> Signed-off-by: Luke Leighton <lkcl@lkcl.net> Signed-off-by: Oliver Schinagl <oliver@schinagl.nl> Signed-off-by: Wills Wang <wills.wang.open@gmail.com> Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Stefan Roese <sr@denx.de> Cc: Tom Cubie <Mr.hipboi@gmail.com> Cc: Aaron Maoye <leafy.myeh@allwinnertech.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Reviewed-by: Tom Rini <trini@ti.com> |
#
ba16b531 |
|
13-Jul-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: mmc: group non-DM specific functions As the SPL code for sunxi boards does not use the driver model, we have two mmc_ops structures, one for DM, one for non-DM. The actual hardware access code is shared, with the respective callback functions using that common code. To make this more obvious and easier to read, reorder the functions to group them: we first have the common code, then the non-DM bits, and the proper DM implementation at the end. Also document this structure in the comment at the beginning of the file. No functional change intended. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Samuel Holland <samuel@sholland.org> Tested-by: Samuel Holland <samuel@sholland.org> |
#
5db81f1c |
|
13-Jul-2022 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: mmc: ignore card detect in SPL The sunxi MMC code does not use the DM in the SPL, as we don't have a device tree available that early, also no space for it. This also means we cannot access the card-detect GPIO information from there, so we have Kconfig symbols called CONFIG_MMCx_CD_PIN, which each board has to define. This is a burden, also requires extra GPIO code in the SPL. As the SPL is the natural successor of the BootROM (from which we are loaded), we can actually ignore the CD pin completely, as this is what the BootROM does as well: CD GPIOs are board specific, but the BootROM is not, so accesses the MMC devices anyway. Also, as we must have been loaded from an MMC device when reaching this code, there must have been a card in the slot. Remove the card detect code from the non-DM implementation of the sunxi MMC driver, to get rid of this unneeded code. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Samuel Holland <samuel@sholland.org> Tested-by: Samuel Holland <samuel@sholland.org> |
#
fb6f6701 |
|
20-Oct-2021 |
Samuel Holland <samuel@sholland.org> |
mmc: sunxi: Use DM_GPIO flags to set pull-up Now that the sunxi_gpio driver handles pull-up/down via the driver model, pin configuration does not need a platform-specific function. Signed-off-by: Samuel Holland <samuel@sholland.org> Tested-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
c846fe43 |
|
22-Jul-2021 |
Icenowy Zheng <icenowy@sipeed.com> |
mmc: sunxi: conditionally include MMC2 initialization code Allwinner R329 has no MMC2. Only include the code of MMC2 if the base address of it is defined. Signed-off-by: Icenowy Zheng <icenowy@sipeed.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
42508461 |
|
11-Sep-2021 |
Samuel Holland <samuel@sholland.org> |
sunxi: Clean up inclusions of asm/arch/gpio.h As part of migrating to DM_GPIO and DM_PINCTRL, eventually we will remove the asm/arch/gpio.h header. In preparation, clean up the various files that include it. Some files did not contain any GPIO code at all, so this header was completely unused. A few files contained only legacy platform-specific GPIO code for setting up pin muxes. They were left unchanged, as that code will be completely removed by the DM_PINCTRL migration. The remaining files contain some combination of DM_GPIO and legacy GPIO code. For those, switch to including asm/gpio.h (if it wasn't included already). Right now, this header provides both sets of functions, because ARCH_SUNXI selects GPIO_EXTRA_HEADER. This will still be the right header to include once the DM_GPIO migration is complete and GPIO_EXTRA_HEADER is no longer needed. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
0b508ca8 |
|
03-Sep-2021 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: mmc: A20: Fix MMC optimisation Some SoCs (as seen on A20) seem to misreport the MMC FIFO level if the FIFO is completely full: the level size reads as zero, but the FIFO_FULL bit is set. We won't do a single iteration of the read loop in this case, so will be stuck forever. Check for this situation and use a safe minimal FIFO size instead when we hit this case. This fixes MMC boot on A20 devices after the MMC FIFO optimisation (9faae5457f52). Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> |
#
ac62dadb |
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21-Apr-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Use mmc_of_parse() At the moment the Allwinner MMC driver parses the bus-width and non-removable DT properties itself, in the probe() routine. There is actually a generic function provided by the MMC framework doing this job, also it parses more generic properties like broken-cd and advanced transfer modes. Drop our own code and call mmc_of_parse() instead, to get all new features for free. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> |
#
9faae545 |
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05-May-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Increase MMIO FIFO read performance To avoid the complexity of DMA operations (with chained descriptors), we use repeated MMIO reads and writes to the SD_FIFO_REG, which allows us to drain or fill the MMC data buffer FIFO very easily. However those MMIO accesses are somewhat costly, so this limits our MMC performance, to between 17 and 22 MB/s, but down to 9.5 MB/s on the H6 (partly due to the lower AHB1 frequency). As it turns out we read the FIFO status register after *every* word we read or write, which effectively doubles the number of MMIO accesses, thus effectively more than halving our performance. To avoid this overhead, we can make use of the FIFO level bits, which are in the very same FIFO status registers. So for a read request, we now can collect as many words as the FIFO level originally indicated, and only then need to update the status register. We don't know for sure the size of the FIFO (and it seems to differ across SoCs anyway), so writing is more fragile, which is why we still use the old method for that. If we find a minimum FIFO size available on all SoCs, we could use that, in a later optimisation. This patch increases the eMMC read speed on a Pine64-LTS from about 22MB/s to 44 MB/s. SD card reads don't gain that much, but with 23 MB/s we now reach the practical limit for 3.3V SD cards. On the H6 we double our transfer speed, from 9.5 MB/s to 19.7 MB/s. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
b5dd39c9 |
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05-May-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Cleanup and fix self-calibration code Newer SoCs have a self calibration feature, which avoids us writing hard coded phase delay values into the controller. Consolidate the code by avoiding unnecessary #ifdefs, and also enabling the feature for all those newer SoCs. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
f85c0912 |
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05-May-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Cleanup "new timing mode" selection Among the SoCs using the "new timing mode", only the A83T needs to explicitly switch to that mode. By just defining the symbol for that one odd A83T bit to 0 for any other SoCs, we can always OR that in, and save the confusing nested #ifdefs. Clean up the also confusing new_mode setting on the way. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> |
#
937ee31e |
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05-May-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Fix MMC clock parent selection Most Allwinner SoCs which use the so called "new timing mode" in their MMC controllers actually use the double-rate PLL6/PERIPH0 clock as their parent input clock. This is interestingly enough compensated by a hidden "by 2" post-divider in the mod clock, so the divider and actual output rate stay the same. Even though for the H6 and H616 (but only for them!) we use the doubled input clock for the divider computation, we never accounted for the implicit post-divider, so the clock was only half the speed on those SoCs. This didn't really matter so far, as our slow MMIO routine limits the transfer speed anyway, but we will fix this soon. Clean up the code around that selection, to always use the normal PLL6 (PERIPH0(1x)) clock as an input. As the rate and divider are the same, that makes no difference. Explain the hardware differences in a comment. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
ca496baf |
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29-Apr-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Fix warnings with CONFIG_PHYS_64BIT When enabling PHYS_64BIT on 32-bit platforms, we get two warnings about pointer casts in sunxi_mmc.c. Those are related to MMIO addresses, which are always below 1GB on all Allwinner SoCs, so there is no problem with anything having more than 32 bits. Add the proper casts to make it compile cleanly. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> |
#
f4826fb1 |
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18-Dec-2020 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Avoid #ifdefs in delay and width setup The delay and bus-width setup are slightly different across the Allwinner SoC generations, and we covered this so far with some preprocessor conditionals. Use the more readable IS_ENABLE() instead. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> |
#
0237b304 |
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11-Jan-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Refactor mod clock register offset So far the only difference between the various Allwinner MMC controller we are concerned about is the mod clock register offset. This is actually not directly related to the MMC controller IP, but an integration choice, dependent on the SoC this appears in. To avoid becoming trapped with some compatible fallback strings, let's remove the whole struct sunxi_mmc_variant, and replace this with a SoC based choice, which we can derive from the CONFIG_MACH_SUNx_y symbols. This will later simplify H616 support. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> |
#
aaebb900 |
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11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@gmail.com> |
mmc: sunxi: Replace H6 ifdefs with H6 gen macro It turns out that several SoCs share same mmc configuration as H6. In order to lower ifdef clutter replace H6 specific macro with common one. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
c69cda25 |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
caa4daa2 |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
41575d8e |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
c05ed00a |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
4233698d |
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18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com> |
#
c57572eb |
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29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
3c8c7da6 |
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21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> |
#
9e233382 |
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29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
a1925a64 |
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29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
e8f37f42 |
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09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime |
#
0e21a2ff |
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09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
629d267a |
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09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic |
#
2a8882ec |
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09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic |
#
20940ef2 |
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05-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
mmc: sunxi: add support for automatic delay calibration A64 and H6 support automatic delay calibration and Linux driver uses it instead of hardcoded delays. Add support for it to u-boot driver. Fixes eMMC instability on Pinebook Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Tested-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Cc: Vagrant Cascadian <vagrant@debian.org> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
42956f1b |
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21-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: add MMC support for H6 The Allwinner H6 SoC has 3 MMC controllers like the ones in A64, with the MMC2 come with the capability to do crypto by EMCE. Add MMC support for H6. EMCE support is not added yet. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> |
#
979b239b |
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29-Jun-2018 |
Adam Sampson <ats@offog.org> |
dm: mmc: sunxi: Add A10/A20 compatible strings Commit dd27918c2252 ("dm: mmc: sunxi: Add support for driver model") only added the allwinner,sun5i-a13-mmc compatible string for this driver. The DM initialisation code here also works with (at least) A10 and A20, so add the appropriate compatible strings as per Linux 4.17's driver. Tested on A10 Cubieboard and A20 pcDuino3 Nano with CONFIG_DM_MMC. (A20 worked already, because sun7i-a20.dtsi specifies both the A13 and A20 strings.) Signed-off-by: Adam Sampson <ats@offog.org> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jteki@openedev.com> |
#
83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
5ff8e548 |
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20-Mar-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
sunxi: improve throughput in the sunxi_mmc driver Throughput tests have shown the sunxi_mmc driver to take over 10s to read 10MB from a fast eMMC device due to excessive delays in polling loops. This commit restructures the main polling loops to use get_timer(...) to determine whether a (millisecond) timeout has expired. We choose not to use the wait_bit function, as we don't need interruptability with ctrl-c and have at least one case where two bits (one for an error condition and another one for completion) need to be read and using wait_bit would have not added to the clarity. The observed speedup in testing on a A31 is greater than 10x (e.g. a 10MB write decreases from 9.302s to 0.884s). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Tested-by: Mylène Josserand <mylene.josserand@bootlin.com> Acked-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
4744d81c |
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27-Mar-2018 |
Stefan Mavrodiev <stefan@olimex.com> |
sunxi: mmc: Fix phase delays U-boot driver for sunxi-mmc uses PLL6, unlike linux kernel where PLL5 is used, with clock rates respectively 600MHz and 768MHz. Thus there are different phase degree steps - 24 for the kernel and 30 for u-boot. In the kernel driver the phase is set 90 deg for output and 120 for sample. Dividing by 30 will result values 3 and 4. Those are the values set in the u-boot driver. However, the condition defining delays is wrong. MMC core driver requests clock of 52MHz, sunxi-driver sets clock of 50MHz, but phase is set 30 deg for output and 120 deg for sample. Apparently this works for most cards. On A20-SOM204-EVB-eMMC there is eMMC card (KLMAG2GEND) which complains about it. Maybe there is other boards with similar problem? So the fix is to match delays for both u-boot and kernel. Signed-off-by: Stefan Mavrodiev <stefan@olimex.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
8be4e61d |
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01-Feb-2018 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
mmc: sunxi: support cd-inverted With CONFIG_DM_MMC the BananaPi does not detect SD cards. The sunxi device trees use the cd-inverted property to indicate that the card detect is inverted. This property is documented in Linux kernel devicetree/bindings/mmc/mmc.txt The property is not marked as deprecated. A similar patch was posted by Tuomas but is in status "Changes Requested". https://patchwork.ozlabs.org/patch/850377/ This patch is a stripped down version of his patch. Suggested-by: Tuomas Tynkkynen <tuomas@tuxera.com> Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
8a647fc3 |
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31-Aug-2017 |
Chen-Yu Tsai <wens@csie.org> |
mmc: sunxi: Only update timing mode bit when enabling new timing mode When enabling the new mmc timing mode, we inadvertently clear all the remaining bits in the new timing mode register. The bits cleared include a default phase delay on the output clock. The BSP kernel states that the default values are supposed to be used. Clearing them results in decreased performance or transfer errors on some boards. Fixes: de9b1771c3b6 ("mmc: sunxi: Support new mode") Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
ead3697d |
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23-Aug-2017 |
Maxime Ripard <maxime.ripard@free-electrons.com> |
mmc: sunxi: fix legacy MMC initialisation The driver-model rework changed, among other things, the way the private data were moved around. It now uses the private field in the struct mmc. However, the mmc_create argument was changed in the process to always pass the array we used to have to store our private structures. The basically means that all the MMC driver instances will now have the private data of the first instance, which obviously doesn't work very well. Pass the proper pointer to mmc_create. Fixes: 034e226bc77e ("dm: mmc: sunxi: Pass private data around explicitly") Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Tested-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
de9b1771 |
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22-Aug-2017 |
Maxime Ripard <maxime.ripard@free-electrons.com> |
mmc: sunxi: Support new mode Almost all of the newer Allwinner SoCs have a new operating mode for the eMMC clocks that needs to be enabled in both the clock and the MMC controller. Details about that mode are sparse, and the name itself (new mode vs old mode) doesn't give much details, but it seems that the it changes the sampling of the MMC clock. One side effect is also that it divides the parent clock rate by 2. Add support for it through a Kconfig option. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
dd27918c |
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04-Jul-2017 |
Simon Glass <sjg@chromium.org> |
dm: mmc: sunxi: Add support for driver model Add a driver-model version of this driver which mostly uses the existing code. The old code can be removed once all boards are switched over. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
ec73d960 |
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04-Jul-2017 |
Simon Glass <sjg@chromium.org> |
dm: mmc: sunxi: Drop mmc_clk_io_on() This function has #ifdefs in it which we want to avoid for driver model. Instead we should use different compatible strings and the .data field. It also uses the MMC device number which is not available in driver model except through aliases. Move the function's into its caller so that the driver-model version can do things its own way. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
034e226b |
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04-Jul-2017 |
Simon Glass <sjg@chromium.org> |
dm: mmc: sunxi: Pass private data around explicitly At present the driver-private data is obtained in various functions by various means. With driver model this is provided automatically. Without driver model it comes from a C array declared at the top of the file. Adjust internal functions so that they are passed the private data as a parameter, allowing the caller to obtain it using either means. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
3f5af12a |
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04-Jul-2017 |
Simon Glass <sjg@chromium.org> |
dm: mmc: sunxi: Rename mmchost to priv Use the driver-model naming convention for this structure. It is data private to the driver so the local variable should be called 'priv'. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
e3c794e2 |
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04-Jul-2017 |
Simon Glass <sjg@chromium.org> |
dm: mmc: sunxi: Rename struct sunxi_mmc_host to sunxi_mmc_priv Use the driver-model naming convention for this structure. It is data private to the driver. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
07b0b9c0 |
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29-Dec-2016 |
Jaehoon Chung <jh80.chung@samsung.com> |
mmc: change the set_ios return type from void to int To maintain consistency, set_ios type of legacy mmc_ops changed to int. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> |
#
fb013184 |
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04-Nov-2016 |
Maxime Ripard <maxime.ripard@free-electrons.com> |
mmc: sunxi: Enable 8bits bus width for sun8i The sun8i SoCs also have a 8 bits capable MMC2 controller. Enable the support for those too. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Hans de Goede <hdegoede@redhat.com> |
#
915ffa52 |
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19-Jul-2016 |
Jaehoon Chung <jh80.chung@samsung.com> |
mmc: use the generic error number Use the generic error number instead of specific error number. If use the generic error number, it can debug more easier. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ef36d9ae |
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09-Jul-2016 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Use BROM stored boot_media value to determine our boot-source Now that we know that the BROM stores a value indicating the boot-source at the beginning of SRAM, use that instead of trying to recreate the BROM's boot probing. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
26c0c157 |
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07-Jul-2016 |
Tobias Doerffel <tobias.doerffel@ed-chemnitz.de> |
sunxi: mmc: increase status register polling rate for data transfers With a recent bunch of SD3.0 cards in our A20-based board we experienced data transfer rates of about 250 KiB/s instead of 10 MiB/s with previous cards from the same vendor (both 4 GB/class 10). By increasing status register polling rate from 1 kHz to 1 MHz we were able to reach the original transfer rates again. With the old cards we now even reach about 16 MiB/s. Signed-off-by: Tobias Doerffel <tobias.doerffel@ed-chemnitz.de> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
d96ebc46 |
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29-Mar-2016 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: Add support for Allwinner A64 SoCs The Allwinner A64 SoC is used in the Pine64. This patch adds all bits necessary to compile U-Boot for it running in AArch64 mode. Unfortunately SPL is not ready yet due to legal problems, so we need to boot using the binary boot0 for now. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> [agraf: remove SPL code, move to AArch64] Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
0ea5a04f |
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29-Mar-2016 |
Alexander Graf <agraf@csgraf.de> |
sunxi: Explicitly cast u32 pointer conversions Some parts of the sunxi code cast explicitly between u32 values and pointers. This is not a problem in practice, because all 64bit SoCs today only use the lower 32 bits for their phyical address space. But we need to make sure that the compiler is sure this is not an accident as well. Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
7c4213f6 |
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07-Dec-2015 |
Stephen Warren <swarren@nvidia.com> |
block: pass block dev not num to read/write/erase() This will allow the implementation to make use of data in the block_dev structure beyond the base device number. This will be useful so that eMMC block devices can encompass the HW partition ID rather than treating this out-of-band. Equally, the existence of the priv field is crying out for this patch to exist. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
be90974c |
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23-Sep-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Fix clk-delay settings In recent allwinner kernel sources the mmc/sdio clk-delay settings have been slightly tweaked, and for sun9i they are completely different then what we are using. This commit brings us in sync with what allwinner does, fixing problems accessing sdcards on some A33 devices (and likely others). For pre sun9i hardware this makes the following changes: -At 400Khz change the sample delay from 7 to 0 (first introduced in A31 sdk) -At 50 Mhz change the sample delay from 5 to 4 (first introduced in A23 sdk) -Above 50 MHz change the out delay from 2 to 1 (first introduced in A20 sdk) Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
28f69b9a |
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29-Aug-2015 |
Yousong Zhou <yszhou4tech@gmail.com> |
sunxi: mmc: set transfer timeout according to byte_cnt. Originally a timeout value of 2 seconds was used regardless of the size of data to be transfered. This prevented slow devices from working correctly while there was no much gain for faster devices, e.g. it takes 3708ms for a transfer of uImage of size 1899008 bytes. Signed-off-by: Yousong Zhou <yszhou4tech@gmail.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
645c48f5 |
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29-May-2015 |
Daniel Kochmański <dkochmanski@turtle-solutions.eu> |
sunxi: Create helper function veryfing valid boot signature on MMC This patch extracts checking for valid SD card "eGON.BT0" signature from `board_mmc_init` into function `sunxi_mmc_has_egon_boot_signature`. Buffer for mmc sector is allocated and freed at runtime. `panic` is triggered on malloc failure. Signed-off-by: Daniel Kochmański <dkochmanski@turtle-solutions.eu> CC: Roy Spliet <r.spliet@ultimaker.com> Cc: Ian Campbell <ijc@hellion.org.uk> [hdegoede@redhat.com: Small bugfix to make it work for devs other then mmc0] Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
1c09fa38 |
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30-May-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Enable pull-up on card-detect gpio pin On some boards we need to enable the internal pull-up te reliable detect that no card is inserted. Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
ff7e9cfc |
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05-May-2015 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-mmc
|
#
5a20397b |
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23-Mar-2015 |
Rob Herring <robh@kernel.org> |
mmc: remove the MMC_MODE_HC flag High capacity support is not a host capability, but a device capability that is queried via the OCR. The flag in the operating conditions request argument can just be set unconditionally. This matches the Linux implementation. [panto] Hand merged and renumbering MMC_MODE_DDR_52MHz. Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com> Cc: Pantelis Antoniou <pantelis.antoniou@konsulko.com> |
#
90641f82 |
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22-Apr-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Fix card-detect gpio handling to work with the driver-model The driver-model gpio functions may return another value then -1 as error, make the sunxi mmc code properly handle this. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
44d8ae5b |
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06-Apr-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Introduce a hidden SUNXI_GEN_SUNxI Kconfig bool sun6i and newer (derived) SoCs such as the sun8i-a23, sun8i-a33 and sun9i have a various things in common, like having separate ahb reset control registers, the SID living inside the pmic, custom pmic busses, new style watchdog, etc. This commit introduces a new hidden SUNXI_GEN_SUN6I Kconfig bool which can be used to check for these features avoiding the need for an ever growing list of "#if defined CONFIG_MACH_SUN?I" conditionals as we add support for more "new style" sunxi SoCs. Note that this commit changes the behavior of the gmac and hdmi code for sun8i and the upcoming sun9i devices. This does not matter as sun8i does not have gmac nor hdmi, and sun9i has new hardware-blocks for these so the old code will not work there. Also this is intentional as if a sun8i / sun9i variant which does use the old hwblocks shows up then the GEN_SUN6I code paths will be the right ones to use. For completeness this also adds a SUNXI_GEN_SUN4I bool for A10/A13/A20. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
1de32b8a |
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19-Feb-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Always declare High Capacity capability High Capacity (e)MMC cards work fine on sun4i / sun5i, and not having this capability set causes u-boot to not recognize the eMMC on an Utoo P66 A13 tablet, so always set it thereby fixing this. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
5abdb156 |
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31-Jan-2015 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: mmc: Add 'sunxi_' prefix to the static functions This results in a much more readable callgraph, because now they can't be confused with the function having exactly the same name in the generic mmc code. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
daf22636 |
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14-Jan-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Add support for sun9i (A80) The clocks on the A80 are hooked up slightly different, add support for this. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
5b8d7fb4 |
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15-Jan-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Use a realistic timeout when sending a mmc command Wait 1 second for the sdcard to respond, rather then waiting for 0xfffff milliseconds. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
b0c4ae1a |
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19-Dec-2014 |
Axel Lin <axel.lin@ingics.com> |
mmc: sunxi: Fix misuse of gpio_direction_input() It does not make sense to make gpio_direction_input() return the gpio input status. The return value of gpio_direction_input() is inconsistent if CONFIG_DM_GPIO is defined. And we don't need to call gpio_direction_input() int sunxi_mmc_getcd(). Just init the gpio once in mmc_resource_init() is enough. Signed-off-by: Axel Lin <axel.lin@ingics.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Ian Campbell <ijc@hellion.org.uk> |
#
fc3a8325 |
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07-Dec-2014 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Properly setup mod-clk and clock sampling phases The sunxi mmc controller has both an internal clock divider, as well as the divider in the mod0-clk for the mmc controller. The internal divider cannot be used, as it conflicts with the setting of clock sampling phases which is done in the mod0-clk, so it must be set to 0 (divide by 1). For some reason while the kernel has had this correct from day one, the u-boot sunxi mmc code has been using a fixed mod0-clk and setting its internal divider depending on the desired speed. This is something which we've inherited from the original Allwinner u-boot sources, but while this has been fixed in Allwinner's own u-boot code at least for the A23 and later upstream u-boot was still doing this wrong. This commit fixes this, thereby also fixing mmc support not working reliable on the A23 (which seems more sensitive to this) and possible also fixes some other sunxi mmc issues. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
967325fe |
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31-Oct-2014 |
Hans de Goede <hdegoede@redhat.com> |
dm: sunxi: Request card detect gpio This is necessary for the device-model enabled builds to work properly. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
ed41e62f |
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24-Oct-2014 |
Ian Campbell <ijc@hellion.org.uk> |
sunxi: Use CONFIG_MACH_SUN?I from Kconfig instead of CONFIG_SUN?I Mostly automatic with: sed -i -e 's/CONFIG_\(SUN[45678]I\)/CONFIG_MACH_\1/g' $(git grep -l CONFIG_SUN[45678]I) followed by removing the relevant #defines from include/configs/sun?i.h by hand. Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
e637b30b |
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22-Oct-2014 |
Chen-Yu Tsai <wens@csie.org> |
mmc: sunxi: Add support for sun8i (A23) The Allwinner A23 SoC has reset controls like the A31 (sun6i). The FIFO address is also the same as sun6i. Re-use code added for sun6i. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
e79c7c88 |
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02-Oct-2014 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: When we've both mmc0 and mmc2, detect from which one we're booting sunxi SOCs can boot from both mmc0 and mmc2, detect from which one we're booting, and make that one "mmc dev 0" so that a single u-boot binary can be used for both the onboard eMMC and for external sdcards. When we're booting from mmc2, we make it dev 0 because that is where the SPL will load the tertiary payload (the actual u-boot binary in our case) from, see: common/spl/spl_mmc.c, which has dev 0 hardcoded everywhere. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
cd82113a |
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02-Oct-2014 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Add mmc card-detect functionality Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
1d1bd42e |
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03-Oct-2014 |
Hans de Goede <hdegoede@redhat.com> |
ARM: sunxi-mmc: Add mmc support for sun6i / A31 The mmc hardware on sun6i has an extra reset control that needs to be de-asserted prior to usage. Also the FIFO address is different. Signed-off-by: Hans de Goede <hdegoede@redhat.com> [wens@csie.org: use setbits_le32 for reset control, drop obsolete changes, rewrite different FIFO address handling, add commit message] Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
a3e8c220 |
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22-Sep-2014 |
Wills Wang <wills.wang.open@gmail.com> |
mmc: sunxi: add SDHC support for sun6i/sun7i/sun8i Allwinner A20/A23/A31's SD/MMC host support SDHC High Capacity feature. Signed-off-by: Wills Wang <wills.wang.open@gmail.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
b6ae6765 |
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09-Jun-2014 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Remove mmc DMA support The DMA code in sunxi_mmc.c is broken. mmc_trans_data_by_dma() allocates the dma descriptors on the stack, and then exits while the dma transfer is in progress, so the dma engine is reading stack memory which at that point may be re-used. So far we've gotten away with this by luck, but recent u-boot changes have shifted the stack start address by 16 bytes, which combined with dma alignment now exposes this problem. Since we end up just busy waiting for the dma engine anyway, this commit fixes things by simply removing the dma code, resulting in smaller bug-free code. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
e24ea55c |
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05-May-2014 |
Ian Campbell <ijc@hellion.org.uk> |
sunxi: mmc support On Mon, 2014-05-05 at 14:18 +0200, Stefan Roese wrote: > > + case 1: > > +#if CONFIG_MMC1_PG > Are you sure that this is correct and shouldn't be: > > +#ifdef CONFIG_MMC1_PG > > ? It's "correct" in so far as it works (the boards.cfg config stuff #defines things to 1), but I think you are right that it isn't the preferred style. But... > A quick scan through this patch series shows that this define > is not set at all. Perhaps its outdated? Or is it used to support > some other sunxi SoC? Not sure, perhaps it should be removed for > now. ...I had thought that it was to support some other board which wasn't being upstreamed right now, so eventually useful and harmless for now, but I've just checked and it isn't actually used by any of the boards in u-boot-sunxi.git. So rather than fix it to use #ifdef lets drop it. Rather than resend the entire series, here is v5.1 of this patch. > Other than this please add my: > > Reviewed-by: Stefan Roese <sr@denx.de> Thanks! 8<--------------------------------- >From 20704e35a41664de5f516ed0e02981ac06085102 Mon Sep 17 00:00:00 2001 From: Ian Campbell <ijc@hellion.org.uk> Date: Fri, 7 Mar 2014 04:29:39 +0000 Subject: [PATCH v5.1 7/8] sunxi: mmc support This adds support for the MMC controller on the Allwinner A20 (sun7i) processor. Signed-off-by: Henrik Nordstrom <henrik@henriknordstrom.net> Signed-off-by: Luke Leighton <lkcl@lkcl.net> Signed-off-by: Oliver Schinagl <oliver@schinagl.nl> Signed-off-by: Wills Wang <wills.wang.open@gmail.com> Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Stefan Roese <sr@denx.de> Cc: Tom Cubie <Mr.hipboi@gmail.com> Cc: Aaron Maoye <leafy.myeh@allwinnertech.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Reviewed-by: Tom Rini <trini@ti.com> |
#
fb6f6701 |
|
20-Oct-2021 |
Samuel Holland <samuel@sholland.org> |
mmc: sunxi: Use DM_GPIO flags to set pull-up Now that the sunxi_gpio driver handles pull-up/down via the driver model, pin configuration does not need a platform-specific function. Signed-off-by: Samuel Holland <samuel@sholland.org> Tested-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
c846fe43 |
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22-Jul-2021 |
Icenowy Zheng <icenowy@sipeed.com> |
mmc: sunxi: conditionally include MMC2 initialization code Allwinner R329 has no MMC2. Only include the code of MMC2 if the base address of it is defined. Signed-off-by: Icenowy Zheng <icenowy@sipeed.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
42508461 |
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11-Sep-2021 |
Samuel Holland <samuel@sholland.org> |
sunxi: Clean up inclusions of asm/arch/gpio.h As part of migrating to DM_GPIO and DM_PINCTRL, eventually we will remove the asm/arch/gpio.h header. In preparation, clean up the various files that include it. Some files did not contain any GPIO code at all, so this header was completely unused. A few files contained only legacy platform-specific GPIO code for setting up pin muxes. They were left unchanged, as that code will be completely removed by the DM_PINCTRL migration. The remaining files contain some combination of DM_GPIO and legacy GPIO code. For those, switch to including asm/gpio.h (if it wasn't included already). Right now, this header provides both sets of functions, because ARCH_SUNXI selects GPIO_EXTRA_HEADER. This will still be the right header to include once the DM_GPIO migration is complete and GPIO_EXTRA_HEADER is no longer needed. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
0b508ca8 |
|
03-Sep-2021 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: mmc: A20: Fix MMC optimisation Some SoCs (as seen on A20) seem to misreport the MMC FIFO level if the FIFO is completely full: the level size reads as zero, but the FIFO_FULL bit is set. We won't do a single iteration of the read loop in this case, so will be stuck forever. Check for this situation and use a safe minimal FIFO size instead when we hit this case. This fixes MMC boot on A20 devices after the MMC FIFO optimisation (9faae5457f52). Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> |
#
ac62dadb |
|
21-Apr-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Use mmc_of_parse() At the moment the Allwinner MMC driver parses the bus-width and non-removable DT properties itself, in the probe() routine. There is actually a generic function provided by the MMC framework doing this job, also it parses more generic properties like broken-cd and advanced transfer modes. Drop our own code and call mmc_of_parse() instead, to get all new features for free. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> |
#
9faae545 |
|
05-May-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Increase MMIO FIFO read performance To avoid the complexity of DMA operations (with chained descriptors), we use repeated MMIO reads and writes to the SD_FIFO_REG, which allows us to drain or fill the MMC data buffer FIFO very easily. However those MMIO accesses are somewhat costly, so this limits our MMC performance, to between 17 and 22 MB/s, but down to 9.5 MB/s on the H6 (partly due to the lower AHB1 frequency). As it turns out we read the FIFO status register after *every* word we read or write, which effectively doubles the number of MMIO accesses, thus effectively more than halving our performance. To avoid this overhead, we can make use of the FIFO level bits, which are in the very same FIFO status registers. So for a read request, we now can collect as many words as the FIFO level originally indicated, and only then need to update the status register. We don't know for sure the size of the FIFO (and it seems to differ across SoCs anyway), so writing is more fragile, which is why we still use the old method for that. If we find a minimum FIFO size available on all SoCs, we could use that, in a later optimisation. This patch increases the eMMC read speed on a Pine64-LTS from about 22MB/s to 44 MB/s. SD card reads don't gain that much, but with 23 MB/s we now reach the practical limit for 3.3V SD cards. On the H6 we double our transfer speed, from 9.5 MB/s to 19.7 MB/s. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
b5dd39c9 |
|
05-May-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Cleanup and fix self-calibration code Newer SoCs have a self calibration feature, which avoids us writing hard coded phase delay values into the controller. Consolidate the code by avoiding unnecessary #ifdefs, and also enabling the feature for all those newer SoCs. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
f85c0912 |
|
05-May-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Cleanup "new timing mode" selection Among the SoCs using the "new timing mode", only the A83T needs to explicitly switch to that mode. By just defining the symbol for that one odd A83T bit to 0 for any other SoCs, we can always OR that in, and save the confusing nested #ifdefs. Clean up the also confusing new_mode setting on the way. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> |
#
937ee31e |
|
05-May-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Fix MMC clock parent selection Most Allwinner SoCs which use the so called "new timing mode" in their MMC controllers actually use the double-rate PLL6/PERIPH0 clock as their parent input clock. This is interestingly enough compensated by a hidden "by 2" post-divider in the mod clock, so the divider and actual output rate stay the same. Even though for the H6 and H616 (but only for them!) we use the doubled input clock for the divider computation, we never accounted for the implicit post-divider, so the clock was only half the speed on those SoCs. This didn't really matter so far, as our slow MMIO routine limits the transfer speed anyway, but we will fix this soon. Clean up the code around that selection, to always use the normal PLL6 (PERIPH0(1x)) clock as an input. As the rate and divider are the same, that makes no difference. Explain the hardware differences in a comment. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
ca496baf |
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29-Apr-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Fix warnings with CONFIG_PHYS_64BIT When enabling PHYS_64BIT on 32-bit platforms, we get two warnings about pointer casts in sunxi_mmc.c. Those are related to MMIO addresses, which are always below 1GB on all Allwinner SoCs, so there is no problem with anything having more than 32 bits. Add the proper casts to make it compile cleanly. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> |
#
f4826fb1 |
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18-Dec-2020 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Avoid #ifdefs in delay and width setup The delay and bus-width setup are slightly different across the Allwinner SoC generations, and we covered this so far with some preprocessor conditionals. Use the more readable IS_ENABLE() instead. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> |
#
0237b304 |
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11-Jan-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Refactor mod clock register offset So far the only difference between the various Allwinner MMC controller we are concerned about is the mod clock register offset. This is actually not directly related to the MMC controller IP, but an integration choice, dependent on the SoC this appears in. To avoid becoming trapped with some compatible fallback strings, let's remove the whole struct sunxi_mmc_variant, and replace this with a SoC based choice, which we can derive from the CONFIG_MACH_SUNx_y symbols. This will later simplify H616 support. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> |
#
aaebb900 |
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11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@gmail.com> |
mmc: sunxi: Replace H6 ifdefs with H6 gen macro It turns out that several SoCs share same mmc configuration as H6. In order to lower ifdef clutter replace H6 specific macro with common one. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
c69cda25 |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
caa4daa2 |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
41575d8e |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
c05ed00a |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
4233698d |
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18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com> |
#
c57572eb |
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29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
3c8c7da6 |
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21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> |
#
9e233382 |
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29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
a1925a64 |
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29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
e8f37f42 |
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09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime |
#
0e21a2ff |
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09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
629d267a |
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09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic |
#
2a8882ec |
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09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic |
#
20940ef2 |
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05-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
mmc: sunxi: add support for automatic delay calibration A64 and H6 support automatic delay calibration and Linux driver uses it instead of hardcoded delays. Add support for it to u-boot driver. Fixes eMMC instability on Pinebook Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Tested-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Cc: Vagrant Cascadian <vagrant@debian.org> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
42956f1b |
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21-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: add MMC support for H6 The Allwinner H6 SoC has 3 MMC controllers like the ones in A64, with the MMC2 come with the capability to do crypto by EMCE. Add MMC support for H6. EMCE support is not added yet. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> |
#
979b239b |
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29-Jun-2018 |
Adam Sampson <ats@offog.org> |
dm: mmc: sunxi: Add A10/A20 compatible strings Commit dd27918c2252 ("dm: mmc: sunxi: Add support for driver model") only added the allwinner,sun5i-a13-mmc compatible string for this driver. The DM initialisation code here also works with (at least) A10 and A20, so add the appropriate compatible strings as per Linux 4.17's driver. Tested on A10 Cubieboard and A20 pcDuino3 Nano with CONFIG_DM_MMC. (A20 worked already, because sun7i-a20.dtsi specifies both the A13 and A20 strings.) Signed-off-by: Adam Sampson <ats@offog.org> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jteki@openedev.com> |
#
83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
5ff8e548 |
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20-Mar-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
sunxi: improve throughput in the sunxi_mmc driver Throughput tests have shown the sunxi_mmc driver to take over 10s to read 10MB from a fast eMMC device due to excessive delays in polling loops. This commit restructures the main polling loops to use get_timer(...) to determine whether a (millisecond) timeout has expired. We choose not to use the wait_bit function, as we don't need interruptability with ctrl-c and have at least one case where two bits (one for an error condition and another one for completion) need to be read and using wait_bit would have not added to the clarity. The observed speedup in testing on a A31 is greater than 10x (e.g. a 10MB write decreases from 9.302s to 0.884s). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Tested-by: Mylène Josserand <mylene.josserand@bootlin.com> Acked-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
4744d81c |
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27-Mar-2018 |
Stefan Mavrodiev <stefan@olimex.com> |
sunxi: mmc: Fix phase delays U-boot driver for sunxi-mmc uses PLL6, unlike linux kernel where PLL5 is used, with clock rates respectively 600MHz and 768MHz. Thus there are different phase degree steps - 24 for the kernel and 30 for u-boot. In the kernel driver the phase is set 90 deg for output and 120 for sample. Dividing by 30 will result values 3 and 4. Those are the values set in the u-boot driver. However, the condition defining delays is wrong. MMC core driver requests clock of 52MHz, sunxi-driver sets clock of 50MHz, but phase is set 30 deg for output and 120 deg for sample. Apparently this works for most cards. On A20-SOM204-EVB-eMMC there is eMMC card (KLMAG2GEND) which complains about it. Maybe there is other boards with similar problem? So the fix is to match delays for both u-boot and kernel. Signed-off-by: Stefan Mavrodiev <stefan@olimex.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
8be4e61d |
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01-Feb-2018 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
mmc: sunxi: support cd-inverted With CONFIG_DM_MMC the BananaPi does not detect SD cards. The sunxi device trees use the cd-inverted property to indicate that the card detect is inverted. This property is documented in Linux kernel devicetree/bindings/mmc/mmc.txt The property is not marked as deprecated. A similar patch was posted by Tuomas but is in status "Changes Requested". https://patchwork.ozlabs.org/patch/850377/ This patch is a stripped down version of his patch. Suggested-by: Tuomas Tynkkynen <tuomas@tuxera.com> Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
8a647fc3 |
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31-Aug-2017 |
Chen-Yu Tsai <wens@csie.org> |
mmc: sunxi: Only update timing mode bit when enabling new timing mode When enabling the new mmc timing mode, we inadvertently clear all the remaining bits in the new timing mode register. The bits cleared include a default phase delay on the output clock. The BSP kernel states that the default values are supposed to be used. Clearing them results in decreased performance or transfer errors on some boards. Fixes: de9b1771c3b6 ("mmc: sunxi: Support new mode") Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
ead3697d |
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23-Aug-2017 |
Maxime Ripard <maxime.ripard@free-electrons.com> |
mmc: sunxi: fix legacy MMC initialisation The driver-model rework changed, among other things, the way the private data were moved around. It now uses the private field in the struct mmc. However, the mmc_create argument was changed in the process to always pass the array we used to have to store our private structures. The basically means that all the MMC driver instances will now have the private data of the first instance, which obviously doesn't work very well. Pass the proper pointer to mmc_create. Fixes: 034e226bc77e ("dm: mmc: sunxi: Pass private data around explicitly") Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Tested-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
de9b1771 |
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22-Aug-2017 |
Maxime Ripard <maxime.ripard@free-electrons.com> |
mmc: sunxi: Support new mode Almost all of the newer Allwinner SoCs have a new operating mode for the eMMC clocks that needs to be enabled in both the clock and the MMC controller. Details about that mode are sparse, and the name itself (new mode vs old mode) doesn't give much details, but it seems that the it changes the sampling of the MMC clock. One side effect is also that it divides the parent clock rate by 2. Add support for it through a Kconfig option. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
dd27918c |
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04-Jul-2017 |
Simon Glass <sjg@chromium.org> |
dm: mmc: sunxi: Add support for driver model Add a driver-model version of this driver which mostly uses the existing code. The old code can be removed once all boards are switched over. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
ec73d960 |
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04-Jul-2017 |
Simon Glass <sjg@chromium.org> |
dm: mmc: sunxi: Drop mmc_clk_io_on() This function has #ifdefs in it which we want to avoid for driver model. Instead we should use different compatible strings and the .data field. It also uses the MMC device number which is not available in driver model except through aliases. Move the function's into its caller so that the driver-model version can do things its own way. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
034e226b |
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04-Jul-2017 |
Simon Glass <sjg@chromium.org> |
dm: mmc: sunxi: Pass private data around explicitly At present the driver-private data is obtained in various functions by various means. With driver model this is provided automatically. Without driver model it comes from a C array declared at the top of the file. Adjust internal functions so that they are passed the private data as a parameter, allowing the caller to obtain it using either means. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
3f5af12a |
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04-Jul-2017 |
Simon Glass <sjg@chromium.org> |
dm: mmc: sunxi: Rename mmchost to priv Use the driver-model naming convention for this structure. It is data private to the driver so the local variable should be called 'priv'. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
e3c794e2 |
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04-Jul-2017 |
Simon Glass <sjg@chromium.org> |
dm: mmc: sunxi: Rename struct sunxi_mmc_host to sunxi_mmc_priv Use the driver-model naming convention for this structure. It is data private to the driver. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
07b0b9c0 |
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29-Dec-2016 |
Jaehoon Chung <jh80.chung@samsung.com> |
mmc: change the set_ios return type from void to int To maintain consistency, set_ios type of legacy mmc_ops changed to int. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> |
#
fb013184 |
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04-Nov-2016 |
Maxime Ripard <maxime.ripard@free-electrons.com> |
mmc: sunxi: Enable 8bits bus width for sun8i The sun8i SoCs also have a 8 bits capable MMC2 controller. Enable the support for those too. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Hans de Goede <hdegoede@redhat.com> |
#
915ffa52 |
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19-Jul-2016 |
Jaehoon Chung <jh80.chung@samsung.com> |
mmc: use the generic error number Use the generic error number instead of specific error number. If use the generic error number, it can debug more easier. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ef36d9ae |
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09-Jul-2016 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Use BROM stored boot_media value to determine our boot-source Now that we know that the BROM stores a value indicating the boot-source at the beginning of SRAM, use that instead of trying to recreate the BROM's boot probing. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
26c0c157 |
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07-Jul-2016 |
Tobias Doerffel <tobias.doerffel@ed-chemnitz.de> |
sunxi: mmc: increase status register polling rate for data transfers With a recent bunch of SD3.0 cards in our A20-based board we experienced data transfer rates of about 250 KiB/s instead of 10 MiB/s with previous cards from the same vendor (both 4 GB/class 10). By increasing status register polling rate from 1 kHz to 1 MHz we were able to reach the original transfer rates again. With the old cards we now even reach about 16 MiB/s. Signed-off-by: Tobias Doerffel <tobias.doerffel@ed-chemnitz.de> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
d96ebc46 |
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29-Mar-2016 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: Add support for Allwinner A64 SoCs The Allwinner A64 SoC is used in the Pine64. This patch adds all bits necessary to compile U-Boot for it running in AArch64 mode. Unfortunately SPL is not ready yet due to legal problems, so we need to boot using the binary boot0 for now. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> [agraf: remove SPL code, move to AArch64] Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
0ea5a04f |
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29-Mar-2016 |
Alexander Graf <agraf@csgraf.de> |
sunxi: Explicitly cast u32 pointer conversions Some parts of the sunxi code cast explicitly between u32 values and pointers. This is not a problem in practice, because all 64bit SoCs today only use the lower 32 bits for their phyical address space. But we need to make sure that the compiler is sure this is not an accident as well. Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
7c4213f6 |
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07-Dec-2015 |
Stephen Warren <swarren@nvidia.com> |
block: pass block dev not num to read/write/erase() This will allow the implementation to make use of data in the block_dev structure beyond the base device number. This will be useful so that eMMC block devices can encompass the HW partition ID rather than treating this out-of-band. Equally, the existence of the priv field is crying out for this patch to exist. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
be90974c |
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23-Sep-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Fix clk-delay settings In recent allwinner kernel sources the mmc/sdio clk-delay settings have been slightly tweaked, and for sun9i they are completely different then what we are using. This commit brings us in sync with what allwinner does, fixing problems accessing sdcards on some A33 devices (and likely others). For pre sun9i hardware this makes the following changes: -At 400Khz change the sample delay from 7 to 0 (first introduced in A31 sdk) -At 50 Mhz change the sample delay from 5 to 4 (first introduced in A23 sdk) -Above 50 MHz change the out delay from 2 to 1 (first introduced in A20 sdk) Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
28f69b9a |
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29-Aug-2015 |
Yousong Zhou <yszhou4tech@gmail.com> |
sunxi: mmc: set transfer timeout according to byte_cnt. Originally a timeout value of 2 seconds was used regardless of the size of data to be transfered. This prevented slow devices from working correctly while there was no much gain for faster devices, e.g. it takes 3708ms for a transfer of uImage of size 1899008 bytes. Signed-off-by: Yousong Zhou <yszhou4tech@gmail.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
645c48f5 |
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29-May-2015 |
Daniel Kochmański <dkochmanski@turtle-solutions.eu> |
sunxi: Create helper function veryfing valid boot signature on MMC This patch extracts checking for valid SD card "eGON.BT0" signature from `board_mmc_init` into function `sunxi_mmc_has_egon_boot_signature`. Buffer for mmc sector is allocated and freed at runtime. `panic` is triggered on malloc failure. Signed-off-by: Daniel Kochmański <dkochmanski@turtle-solutions.eu> CC: Roy Spliet <r.spliet@ultimaker.com> Cc: Ian Campbell <ijc@hellion.org.uk> [hdegoede@redhat.com: Small bugfix to make it work for devs other then mmc0] Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
1c09fa38 |
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30-May-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Enable pull-up on card-detect gpio pin On some boards we need to enable the internal pull-up te reliable detect that no card is inserted. Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
ff7e9cfc |
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05-May-2015 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-mmc
|
#
5a20397b |
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23-Mar-2015 |
Rob Herring <robh@kernel.org> |
mmc: remove the MMC_MODE_HC flag High capacity support is not a host capability, but a device capability that is queried via the OCR. The flag in the operating conditions request argument can just be set unconditionally. This matches the Linux implementation. [panto] Hand merged and renumbering MMC_MODE_DDR_52MHz. Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com> Cc: Pantelis Antoniou <pantelis.antoniou@konsulko.com> |
#
90641f82 |
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22-Apr-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Fix card-detect gpio handling to work with the driver-model The driver-model gpio functions may return another value then -1 as error, make the sunxi mmc code properly handle this. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
44d8ae5b |
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06-Apr-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Introduce a hidden SUNXI_GEN_SUNxI Kconfig bool sun6i and newer (derived) SoCs such as the sun8i-a23, sun8i-a33 and sun9i have a various things in common, like having separate ahb reset control registers, the SID living inside the pmic, custom pmic busses, new style watchdog, etc. This commit introduces a new hidden SUNXI_GEN_SUN6I Kconfig bool which can be used to check for these features avoiding the need for an ever growing list of "#if defined CONFIG_MACH_SUN?I" conditionals as we add support for more "new style" sunxi SoCs. Note that this commit changes the behavior of the gmac and hdmi code for sun8i and the upcoming sun9i devices. This does not matter as sun8i does not have gmac nor hdmi, and sun9i has new hardware-blocks for these so the old code will not work there. Also this is intentional as if a sun8i / sun9i variant which does use the old hwblocks shows up then the GEN_SUN6I code paths will be the right ones to use. For completeness this also adds a SUNXI_GEN_SUN4I bool for A10/A13/A20. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
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1de32b8a |
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19-Feb-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Always declare High Capacity capability High Capacity (e)MMC cards work fine on sun4i / sun5i, and not having this capability set causes u-boot to not recognize the eMMC on an Utoo P66 A13 tablet, so always set it thereby fixing this. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
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5abdb156 |
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31-Jan-2015 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: mmc: Add 'sunxi_' prefix to the static functions This results in a much more readable callgraph, because now they can't be confused with the function having exactly the same name in the generic mmc code. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
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daf22636 |
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14-Jan-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Add support for sun9i (A80) The clocks on the A80 are hooked up slightly different, add support for this. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
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5b8d7fb4 |
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15-Jan-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Use a realistic timeout when sending a mmc command Wait 1 second for the sdcard to respond, rather then waiting for 0xfffff milliseconds. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
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b0c4ae1a |
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19-Dec-2014 |
Axel Lin <axel.lin@ingics.com> |
mmc: sunxi: Fix misuse of gpio_direction_input() It does not make sense to make gpio_direction_input() return the gpio input status. The return value of gpio_direction_input() is inconsistent if CONFIG_DM_GPIO is defined. And we don't need to call gpio_direction_input() int sunxi_mmc_getcd(). Just init the gpio once in mmc_resource_init() is enough. Signed-off-by: Axel Lin <axel.lin@ingics.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Ian Campbell <ijc@hellion.org.uk> |
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fc3a8325 |
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07-Dec-2014 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Properly setup mod-clk and clock sampling phases The sunxi mmc controller has both an internal clock divider, as well as the divider in the mod0-clk for the mmc controller. The internal divider cannot be used, as it conflicts with the setting of clock sampling phases which is done in the mod0-clk, so it must be set to 0 (divide by 1). For some reason while the kernel has had this correct from day one, the u-boot sunxi mmc code has been using a fixed mod0-clk and setting its internal divider depending on the desired speed. This is something which we've inherited from the original Allwinner u-boot sources, but while this has been fixed in Allwinner's own u-boot code at least for the A23 and later upstream u-boot was still doing this wrong. This commit fixes this, thereby also fixing mmc support not working reliable on the A23 (which seems more sensitive to this) and possible also fixes some other sunxi mmc issues. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
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967325fe |
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31-Oct-2014 |
Hans de Goede <hdegoede@redhat.com> |
dm: sunxi: Request card detect gpio This is necessary for the device-model enabled builds to work properly. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Simon Glass <sjg@chromium.org> |
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ed41e62f |
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24-Oct-2014 |
Ian Campbell <ijc@hellion.org.uk> |
sunxi: Use CONFIG_MACH_SUN?I from Kconfig instead of CONFIG_SUN?I Mostly automatic with: sed -i -e 's/CONFIG_\(SUN[45678]I\)/CONFIG_MACH_\1/g' $(git grep -l CONFIG_SUN[45678]I) followed by removing the relevant #defines from include/configs/sun?i.h by hand. Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
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e637b30b |
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22-Oct-2014 |
Chen-Yu Tsai <wens@csie.org> |
mmc: sunxi: Add support for sun8i (A23) The Allwinner A23 SoC has reset controls like the A31 (sun6i). The FIFO address is also the same as sun6i. Re-use code added for sun6i. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
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e79c7c88 |
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02-Oct-2014 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: When we've both mmc0 and mmc2, detect from which one we're booting sunxi SOCs can boot from both mmc0 and mmc2, detect from which one we're booting, and make that one "mmc dev 0" so that a single u-boot binary can be used for both the onboard eMMC and for external sdcards. When we're booting from mmc2, we make it dev 0 because that is where the SPL will load the tertiary payload (the actual u-boot binary in our case) from, see: common/spl/spl_mmc.c, which has dev 0 hardcoded everywhere. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
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cd82113a |
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02-Oct-2014 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Add mmc card-detect functionality Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
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1d1bd42e |
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03-Oct-2014 |
Hans de Goede <hdegoede@redhat.com> |
ARM: sunxi-mmc: Add mmc support for sun6i / A31 The mmc hardware on sun6i has an extra reset control that needs to be de-asserted prior to usage. Also the FIFO address is different. Signed-off-by: Hans de Goede <hdegoede@redhat.com> [wens@csie.org: use setbits_le32 for reset control, drop obsolete changes, rewrite different FIFO address handling, add commit message] Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
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a3e8c220 |
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22-Sep-2014 |
Wills Wang <wills.wang.open@gmail.com> |
mmc: sunxi: add SDHC support for sun6i/sun7i/sun8i Allwinner A20/A23/A31's SD/MMC host support SDHC High Capacity feature. Signed-off-by: Wills Wang <wills.wang.open@gmail.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
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b6ae6765 |
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09-Jun-2014 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Remove mmc DMA support The DMA code in sunxi_mmc.c is broken. mmc_trans_data_by_dma() allocates the dma descriptors on the stack, and then exits while the dma transfer is in progress, so the dma engine is reading stack memory which at that point may be re-used. So far we've gotten away with this by luck, but recent u-boot changes have shifted the stack start address by 16 bytes, which combined with dma alignment now exposes this problem. Since we end up just busy waiting for the dma engine anyway, this commit fixes things by simply removing the dma code, resulting in smaller bug-free code. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
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e24ea55c |
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05-May-2014 |
Ian Campbell <ijc@hellion.org.uk> |
sunxi: mmc support On Mon, 2014-05-05 at 14:18 +0200, Stefan Roese wrote: > > + case 1: > > +#if CONFIG_MMC1_PG > Are you sure that this is correct and shouldn't be: > > +#ifdef CONFIG_MMC1_PG > > ? It's "correct" in so far as it works (the boards.cfg config stuff #defines things to 1), but I think you are right that it isn't the preferred style. But... > A quick scan through this patch series shows that this define > is not set at all. Perhaps its outdated? Or is it used to support > some other sunxi SoC? Not sure, perhaps it should be removed for > now. ...I had thought that it was to support some other board which wasn't being upstreamed right now, so eventually useful and harmless for now, but I've just checked and it isn't actually used by any of the boards in u-boot-sunxi.git. So rather than fix it to use #ifdef lets drop it. Rather than resend the entire series, here is v5.1 of this patch. > Other than this please add my: > > Reviewed-by: Stefan Roese <sr@denx.de> Thanks! 8<--------------------------------- >From 20704e35a41664de5f516ed0e02981ac06085102 Mon Sep 17 00:00:00 2001 From: Ian Campbell <ijc@hellion.org.uk> Date: Fri, 7 Mar 2014 04:29:39 +0000 Subject: [PATCH v5.1 7/8] sunxi: mmc support This adds support for the MMC controller on the Allwinner A20 (sun7i) processor. Signed-off-by: Henrik Nordstrom <henrik@henriknordstrom.net> Signed-off-by: Luke Leighton <lkcl@lkcl.net> Signed-off-by: Oliver Schinagl <oliver@schinagl.nl> Signed-off-by: Wills Wang <wills.wang.open@gmail.com> Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Stefan Roese <sr@denx.de> Cc: Tom Cubie <Mr.hipboi@gmail.com> Cc: Aaron Maoye <leafy.myeh@allwinnertech.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Reviewed-by: Tom Rini <trini@ti.com> |
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c846fe43 |
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22-Jul-2021 |
Icenowy Zheng <icenowy@sipeed.com> |
mmc: sunxi: conditionally include MMC2 initialization code Allwinner R329 has no MMC2. Only include the code of MMC2 if the base address of it is defined. Signed-off-by: Icenowy Zheng <icenowy@sipeed.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
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42508461 |
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11-Sep-2021 |
Samuel Holland <samuel@sholland.org> |
sunxi: Clean up inclusions of asm/arch/gpio.h As part of migrating to DM_GPIO and DM_PINCTRL, eventually we will remove the asm/arch/gpio.h header. In preparation, clean up the various files that include it. Some files did not contain any GPIO code at all, so this header was completely unused. A few files contained only legacy platform-specific GPIO code for setting up pin muxes. They were left unchanged, as that code will be completely removed by the DM_PINCTRL migration. The remaining files contain some combination of DM_GPIO and legacy GPIO code. For those, switch to including asm/gpio.h (if it wasn't included already). Right now, this header provides both sets of functions, because ARCH_SUNXI selects GPIO_EXTRA_HEADER. This will still be the right header to include once the DM_GPIO migration is complete and GPIO_EXTRA_HEADER is no longer needed. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
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0b508ca8 |
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03-Sep-2021 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: mmc: A20: Fix MMC optimisation Some SoCs (as seen on A20) seem to misreport the MMC FIFO level if the FIFO is completely full: the level size reads as zero, but the FIFO_FULL bit is set. We won't do a single iteration of the read loop in this case, so will be stuck forever. Check for this situation and use a safe minimal FIFO size instead when we hit this case. This fixes MMC boot on A20 devices after the MMC FIFO optimisation (9faae5457f52). Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> |
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ac62dadb |
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21-Apr-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Use mmc_of_parse() At the moment the Allwinner MMC driver parses the bus-width and non-removable DT properties itself, in the probe() routine. There is actually a generic function provided by the MMC framework doing this job, also it parses more generic properties like broken-cd and advanced transfer modes. Drop our own code and call mmc_of_parse() instead, to get all new features for free. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> |
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9faae545 |
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05-May-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Increase MMIO FIFO read performance To avoid the complexity of DMA operations (with chained descriptors), we use repeated MMIO reads and writes to the SD_FIFO_REG, which allows us to drain or fill the MMC data buffer FIFO very easily. However those MMIO accesses are somewhat costly, so this limits our MMC performance, to between 17 and 22 MB/s, but down to 9.5 MB/s on the H6 (partly due to the lower AHB1 frequency). As it turns out we read the FIFO status register after *every* word we read or write, which effectively doubles the number of MMIO accesses, thus effectively more than halving our performance. To avoid this overhead, we can make use of the FIFO level bits, which are in the very same FIFO status registers. So for a read request, we now can collect as many words as the FIFO level originally indicated, and only then need to update the status register. We don't know for sure the size of the FIFO (and it seems to differ across SoCs anyway), so writing is more fragile, which is why we still use the old method for that. If we find a minimum FIFO size available on all SoCs, we could use that, in a later optimisation. This patch increases the eMMC read speed on a Pine64-LTS from about 22MB/s to 44 MB/s. SD card reads don't gain that much, but with 23 MB/s we now reach the practical limit for 3.3V SD cards. On the H6 we double our transfer speed, from 9.5 MB/s to 19.7 MB/s. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
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b5dd39c9 |
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05-May-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Cleanup and fix self-calibration code Newer SoCs have a self calibration feature, which avoids us writing hard coded phase delay values into the controller. Consolidate the code by avoiding unnecessary #ifdefs, and also enabling the feature for all those newer SoCs. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
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f85c0912 |
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05-May-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Cleanup "new timing mode" selection Among the SoCs using the "new timing mode", only the A83T needs to explicitly switch to that mode. By just defining the symbol for that one odd A83T bit to 0 for any other SoCs, we can always OR that in, and save the confusing nested #ifdefs. Clean up the also confusing new_mode setting on the way. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> |
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937ee31e |
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05-May-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Fix MMC clock parent selection Most Allwinner SoCs which use the so called "new timing mode" in their MMC controllers actually use the double-rate PLL6/PERIPH0 clock as their parent input clock. This is interestingly enough compensated by a hidden "by 2" post-divider in the mod clock, so the divider and actual output rate stay the same. Even though for the H6 and H616 (but only for them!) we use the doubled input clock for the divider computation, we never accounted for the implicit post-divider, so the clock was only half the speed on those SoCs. This didn't really matter so far, as our slow MMIO routine limits the transfer speed anyway, but we will fix this soon. Clean up the code around that selection, to always use the normal PLL6 (PERIPH0(1x)) clock as an input. As the rate and divider are the same, that makes no difference. Explain the hardware differences in a comment. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
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ca496baf |
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29-Apr-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Fix warnings with CONFIG_PHYS_64BIT When enabling PHYS_64BIT on 32-bit platforms, we get two warnings about pointer casts in sunxi_mmc.c. Those are related to MMIO addresses, which are always below 1GB on all Allwinner SoCs, so there is no problem with anything having more than 32 bits. Add the proper casts to make it compile cleanly. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> |
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f4826fb1 |
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18-Dec-2020 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Avoid #ifdefs in delay and width setup The delay and bus-width setup are slightly different across the Allwinner SoC generations, and we covered this so far with some preprocessor conditionals. Use the more readable IS_ENABLE() instead. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> |
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0237b304 |
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11-Jan-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Refactor mod clock register offset So far the only difference between the various Allwinner MMC controller we are concerned about is the mod clock register offset. This is actually not directly related to the MMC controller IP, but an integration choice, dependent on the SoC this appears in. To avoid becoming trapped with some compatible fallback strings, let's remove the whole struct sunxi_mmc_variant, and replace this with a SoC based choice, which we can derive from the CONFIG_MACH_SUNx_y symbols. This will later simplify H616 support. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> |
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aaebb900 |
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11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@gmail.com> |
mmc: sunxi: Replace H6 ifdefs with H6 gen macro It turns out that several SoCs share same mmc configuration as H6. In order to lower ifdef clutter replace H6 specific macro with common one. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
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c69cda25 |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org> |
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caa4daa2 |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org> |
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41575d8e |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org> |
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c05ed00a |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
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f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
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4233698d |
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18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com> |
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c57572eb |
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29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
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3c8c7da6 |
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21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> |
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9e233382 |
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29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
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a1925a64 |
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29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
e8f37f42 |
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09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime |
#
0e21a2ff |
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09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com> |
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629d267a |
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09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic |
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2a8882ec |
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09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic |
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20940ef2 |
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05-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
mmc: sunxi: add support for automatic delay calibration A64 and H6 support automatic delay calibration and Linux driver uses it instead of hardcoded delays. Add support for it to u-boot driver. Fixes eMMC instability on Pinebook Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Tested-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Cc: Vagrant Cascadian <vagrant@debian.org> Reviewed-by: Jagan Teki <jagan@openedev.com> |
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42956f1b |
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21-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: add MMC support for H6 The Allwinner H6 SoC has 3 MMC controllers like the ones in A64, with the MMC2 come with the capability to do crypto by EMCE. Add MMC support for H6. EMCE support is not added yet. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> |
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979b239b |
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29-Jun-2018 |
Adam Sampson <ats@offog.org> |
dm: mmc: sunxi: Add A10/A20 compatible strings Commit dd27918c2252 ("dm: mmc: sunxi: Add support for driver model") only added the allwinner,sun5i-a13-mmc compatible string for this driver. The DM initialisation code here also works with (at least) A10 and A20, so add the appropriate compatible strings as per Linux 4.17's driver. Tested on A10 Cubieboard and A20 pcDuino3 Nano with CONFIG_DM_MMC. (A20 worked already, because sun7i-a20.dtsi specifies both the A13 and A20 strings.) Signed-off-by: Adam Sampson <ats@offog.org> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jteki@openedev.com> |
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83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
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5ff8e548 |
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20-Mar-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
sunxi: improve throughput in the sunxi_mmc driver Throughput tests have shown the sunxi_mmc driver to take over 10s to read 10MB from a fast eMMC device due to excessive delays in polling loops. This commit restructures the main polling loops to use get_timer(...) to determine whether a (millisecond) timeout has expired. We choose not to use the wait_bit function, as we don't need interruptability with ctrl-c and have at least one case where two bits (one for an error condition and another one for completion) need to be read and using wait_bit would have not added to the clarity. The observed speedup in testing on a A31 is greater than 10x (e.g. a 10MB write decreases from 9.302s to 0.884s). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Tested-by: Mylène Josserand <mylene.josserand@bootlin.com> Acked-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
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4744d81c |
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27-Mar-2018 |
Stefan Mavrodiev <stefan@olimex.com> |
sunxi: mmc: Fix phase delays U-boot driver for sunxi-mmc uses PLL6, unlike linux kernel where PLL5 is used, with clock rates respectively 600MHz and 768MHz. Thus there are different phase degree steps - 24 for the kernel and 30 for u-boot. In the kernel driver the phase is set 90 deg for output and 120 for sample. Dividing by 30 will result values 3 and 4. Those are the values set in the u-boot driver. However, the condition defining delays is wrong. MMC core driver requests clock of 52MHz, sunxi-driver sets clock of 50MHz, but phase is set 30 deg for output and 120 deg for sample. Apparently this works for most cards. On A20-SOM204-EVB-eMMC there is eMMC card (KLMAG2GEND) which complains about it. Maybe there is other boards with similar problem? So the fix is to match delays for both u-boot and kernel. Signed-off-by: Stefan Mavrodiev <stefan@olimex.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
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8be4e61d |
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01-Feb-2018 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
mmc: sunxi: support cd-inverted With CONFIG_DM_MMC the BananaPi does not detect SD cards. The sunxi device trees use the cd-inverted property to indicate that the card detect is inverted. This property is documented in Linux kernel devicetree/bindings/mmc/mmc.txt The property is not marked as deprecated. A similar patch was posted by Tuomas but is in status "Changes Requested". https://patchwork.ozlabs.org/patch/850377/ This patch is a stripped down version of his patch. Suggested-by: Tuomas Tynkkynen <tuomas@tuxera.com> Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
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8a647fc3 |
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31-Aug-2017 |
Chen-Yu Tsai <wens@csie.org> |
mmc: sunxi: Only update timing mode bit when enabling new timing mode When enabling the new mmc timing mode, we inadvertently clear all the remaining bits in the new timing mode register. The bits cleared include a default phase delay on the output clock. The BSP kernel states that the default values are supposed to be used. Clearing them results in decreased performance or transfer errors on some boards. Fixes: de9b1771c3b6 ("mmc: sunxi: Support new mode") Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
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ead3697d |
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23-Aug-2017 |
Maxime Ripard <maxime.ripard@free-electrons.com> |
mmc: sunxi: fix legacy MMC initialisation The driver-model rework changed, among other things, the way the private data were moved around. It now uses the private field in the struct mmc. However, the mmc_create argument was changed in the process to always pass the array we used to have to store our private structures. The basically means that all the MMC driver instances will now have the private data of the first instance, which obviously doesn't work very well. Pass the proper pointer to mmc_create. Fixes: 034e226bc77e ("dm: mmc: sunxi: Pass private data around explicitly") Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Tested-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
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de9b1771 |
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22-Aug-2017 |
Maxime Ripard <maxime.ripard@free-electrons.com> |
mmc: sunxi: Support new mode Almost all of the newer Allwinner SoCs have a new operating mode for the eMMC clocks that needs to be enabled in both the clock and the MMC controller. Details about that mode are sparse, and the name itself (new mode vs old mode) doesn't give much details, but it seems that the it changes the sampling of the MMC clock. One side effect is also that it divides the parent clock rate by 2. Add support for it through a Kconfig option. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
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dd27918c |
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04-Jul-2017 |
Simon Glass <sjg@chromium.org> |
dm: mmc: sunxi: Add support for driver model Add a driver-model version of this driver which mostly uses the existing code. The old code can be removed once all boards are switched over. Signed-off-by: Simon Glass <sjg@chromium.org> |
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ec73d960 |
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04-Jul-2017 |
Simon Glass <sjg@chromium.org> |
dm: mmc: sunxi: Drop mmc_clk_io_on() This function has #ifdefs in it which we want to avoid for driver model. Instead we should use different compatible strings and the .data field. It also uses the MMC device number which is not available in driver model except through aliases. Move the function's into its caller so that the driver-model version can do things its own way. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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034e226b |
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04-Jul-2017 |
Simon Glass <sjg@chromium.org> |
dm: mmc: sunxi: Pass private data around explicitly At present the driver-private data is obtained in various functions by various means. With driver model this is provided automatically. Without driver model it comes from a C array declared at the top of the file. Adjust internal functions so that they are passed the private data as a parameter, allowing the caller to obtain it using either means. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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3f5af12a |
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04-Jul-2017 |
Simon Glass <sjg@chromium.org> |
dm: mmc: sunxi: Rename mmchost to priv Use the driver-model naming convention for this structure. It is data private to the driver so the local variable should be called 'priv'. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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e3c794e2 |
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04-Jul-2017 |
Simon Glass <sjg@chromium.org> |
dm: mmc: sunxi: Rename struct sunxi_mmc_host to sunxi_mmc_priv Use the driver-model naming convention for this structure. It is data private to the driver. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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07b0b9c0 |
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29-Dec-2016 |
Jaehoon Chung <jh80.chung@samsung.com> |
mmc: change the set_ios return type from void to int To maintain consistency, set_ios type of legacy mmc_ops changed to int. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> |
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fb013184 |
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04-Nov-2016 |
Maxime Ripard <maxime.ripard@free-electrons.com> |
mmc: sunxi: Enable 8bits bus width for sun8i The sun8i SoCs also have a 8 bits capable MMC2 controller. Enable the support for those too. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Hans de Goede <hdegoede@redhat.com> |
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915ffa52 |
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19-Jul-2016 |
Jaehoon Chung <jh80.chung@samsung.com> |
mmc: use the generic error number Use the generic error number instead of specific error number. If use the generic error number, it can debug more easier. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Minkyu Kang <mk7.kang@samsung.com> |
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ef36d9ae |
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09-Jul-2016 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Use BROM stored boot_media value to determine our boot-source Now that we know that the BROM stores a value indicating the boot-source at the beginning of SRAM, use that instead of trying to recreate the BROM's boot probing. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
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26c0c157 |
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07-Jul-2016 |
Tobias Doerffel <tobias.doerffel@ed-chemnitz.de> |
sunxi: mmc: increase status register polling rate for data transfers With a recent bunch of SD3.0 cards in our A20-based board we experienced data transfer rates of about 250 KiB/s instead of 10 MiB/s with previous cards from the same vendor (both 4 GB/class 10). By increasing status register polling rate from 1 kHz to 1 MHz we were able to reach the original transfer rates again. With the old cards we now even reach about 16 MiB/s. Signed-off-by: Tobias Doerffel <tobias.doerffel@ed-chemnitz.de> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
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d96ebc46 |
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29-Mar-2016 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: Add support for Allwinner A64 SoCs The Allwinner A64 SoC is used in the Pine64. This patch adds all bits necessary to compile U-Boot for it running in AArch64 mode. Unfortunately SPL is not ready yet due to legal problems, so we need to boot using the binary boot0 for now. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> [agraf: remove SPL code, move to AArch64] Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
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0ea5a04f |
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29-Mar-2016 |
Alexander Graf <agraf@csgraf.de> |
sunxi: Explicitly cast u32 pointer conversions Some parts of the sunxi code cast explicitly between u32 values and pointers. This is not a problem in practice, because all 64bit SoCs today only use the lower 32 bits for their phyical address space. But we need to make sure that the compiler is sure this is not an accident as well. Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
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7c4213f6 |
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07-Dec-2015 |
Stephen Warren <swarren@nvidia.com> |
block: pass block dev not num to read/write/erase() This will allow the implementation to make use of data in the block_dev structure beyond the base device number. This will be useful so that eMMC block devices can encompass the HW partition ID rather than treating this out-of-band. Equally, the existence of the priv field is crying out for this patch to exist. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
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be90974c |
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23-Sep-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Fix clk-delay settings In recent allwinner kernel sources the mmc/sdio clk-delay settings have been slightly tweaked, and for sun9i they are completely different then what we are using. This commit brings us in sync with what allwinner does, fixing problems accessing sdcards on some A33 devices (and likely others). For pre sun9i hardware this makes the following changes: -At 400Khz change the sample delay from 7 to 0 (first introduced in A31 sdk) -At 50 Mhz change the sample delay from 5 to 4 (first introduced in A23 sdk) -Above 50 MHz change the out delay from 2 to 1 (first introduced in A20 sdk) Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
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28f69b9a |
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29-Aug-2015 |
Yousong Zhou <yszhou4tech@gmail.com> |
sunxi: mmc: set transfer timeout according to byte_cnt. Originally a timeout value of 2 seconds was used regardless of the size of data to be transfered. This prevented slow devices from working correctly while there was no much gain for faster devices, e.g. it takes 3708ms for a transfer of uImage of size 1899008 bytes. Signed-off-by: Yousong Zhou <yszhou4tech@gmail.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
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645c48f5 |
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29-May-2015 |
Daniel Kochmański <dkochmanski@turtle-solutions.eu> |
sunxi: Create helper function veryfing valid boot signature on MMC This patch extracts checking for valid SD card "eGON.BT0" signature from `board_mmc_init` into function `sunxi_mmc_has_egon_boot_signature`. Buffer for mmc sector is allocated and freed at runtime. `panic` is triggered on malloc failure. Signed-off-by: Daniel Kochmański <dkochmanski@turtle-solutions.eu> CC: Roy Spliet <r.spliet@ultimaker.com> Cc: Ian Campbell <ijc@hellion.org.uk> [hdegoede@redhat.com: Small bugfix to make it work for devs other then mmc0] Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
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1c09fa38 |
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30-May-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Enable pull-up on card-detect gpio pin On some boards we need to enable the internal pull-up te reliable detect that no card is inserted. Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
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ff7e9cfc |
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05-May-2015 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-mmc
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5a20397b |
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23-Mar-2015 |
Rob Herring <robh@kernel.org> |
mmc: remove the MMC_MODE_HC flag High capacity support is not a host capability, but a device capability that is queried via the OCR. The flag in the operating conditions request argument can just be set unconditionally. This matches the Linux implementation. [panto] Hand merged and renumbering MMC_MODE_DDR_52MHz. Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com> Cc: Pantelis Antoniou <pantelis.antoniou@konsulko.com> |
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90641f82 |
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22-Apr-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Fix card-detect gpio handling to work with the driver-model The driver-model gpio functions may return another value then -1 as error, make the sunxi mmc code properly handle this. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
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44d8ae5b |
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06-Apr-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Introduce a hidden SUNXI_GEN_SUNxI Kconfig bool sun6i and newer (derived) SoCs such as the sun8i-a23, sun8i-a33 and sun9i have a various things in common, like having separate ahb reset control registers, the SID living inside the pmic, custom pmic busses, new style watchdog, etc. This commit introduces a new hidden SUNXI_GEN_SUN6I Kconfig bool which can be used to check for these features avoiding the need for an ever growing list of "#if defined CONFIG_MACH_SUN?I" conditionals as we add support for more "new style" sunxi SoCs. Note that this commit changes the behavior of the gmac and hdmi code for sun8i and the upcoming sun9i devices. This does not matter as sun8i does not have gmac nor hdmi, and sun9i has new hardware-blocks for these so the old code will not work there. Also this is intentional as if a sun8i / sun9i variant which does use the old hwblocks shows up then the GEN_SUN6I code paths will be the right ones to use. For completeness this also adds a SUNXI_GEN_SUN4I bool for A10/A13/A20. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
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1de32b8a |
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19-Feb-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Always declare High Capacity capability High Capacity (e)MMC cards work fine on sun4i / sun5i, and not having this capability set causes u-boot to not recognize the eMMC on an Utoo P66 A13 tablet, so always set it thereby fixing this. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
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5abdb156 |
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31-Jan-2015 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: mmc: Add 'sunxi_' prefix to the static functions This results in a much more readable callgraph, because now they can't be confused with the function having exactly the same name in the generic mmc code. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
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daf22636 |
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14-Jan-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Add support for sun9i (A80) The clocks on the A80 are hooked up slightly different, add support for this. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
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5b8d7fb4 |
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15-Jan-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Use a realistic timeout when sending a mmc command Wait 1 second for the sdcard to respond, rather then waiting for 0xfffff milliseconds. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
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b0c4ae1a |
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19-Dec-2014 |
Axel Lin <axel.lin@ingics.com> |
mmc: sunxi: Fix misuse of gpio_direction_input() It does not make sense to make gpio_direction_input() return the gpio input status. The return value of gpio_direction_input() is inconsistent if CONFIG_DM_GPIO is defined. And we don't need to call gpio_direction_input() int sunxi_mmc_getcd(). Just init the gpio once in mmc_resource_init() is enough. Signed-off-by: Axel Lin <axel.lin@ingics.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Ian Campbell <ijc@hellion.org.uk> |
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fc3a8325 |
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07-Dec-2014 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Properly setup mod-clk and clock sampling phases The sunxi mmc controller has both an internal clock divider, as well as the divider in the mod0-clk for the mmc controller. The internal divider cannot be used, as it conflicts with the setting of clock sampling phases which is done in the mod0-clk, so it must be set to 0 (divide by 1). For some reason while the kernel has had this correct from day one, the u-boot sunxi mmc code has been using a fixed mod0-clk and setting its internal divider depending on the desired speed. This is something which we've inherited from the original Allwinner u-boot sources, but while this has been fixed in Allwinner's own u-boot code at least for the A23 and later upstream u-boot was still doing this wrong. This commit fixes this, thereby also fixing mmc support not working reliable on the A23 (which seems more sensitive to this) and possible also fixes some other sunxi mmc issues. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
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967325fe |
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31-Oct-2014 |
Hans de Goede <hdegoede@redhat.com> |
dm: sunxi: Request card detect gpio This is necessary for the device-model enabled builds to work properly. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Simon Glass <sjg@chromium.org> |
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ed41e62f |
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24-Oct-2014 |
Ian Campbell <ijc@hellion.org.uk> |
sunxi: Use CONFIG_MACH_SUN?I from Kconfig instead of CONFIG_SUN?I Mostly automatic with: sed -i -e 's/CONFIG_\(SUN[45678]I\)/CONFIG_MACH_\1/g' $(git grep -l CONFIG_SUN[45678]I) followed by removing the relevant #defines from include/configs/sun?i.h by hand. Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
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e637b30b |
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22-Oct-2014 |
Chen-Yu Tsai <wens@csie.org> |
mmc: sunxi: Add support for sun8i (A23) The Allwinner A23 SoC has reset controls like the A31 (sun6i). The FIFO address is also the same as sun6i. Re-use code added for sun6i. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
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e79c7c88 |
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02-Oct-2014 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: When we've both mmc0 and mmc2, detect from which one we're booting sunxi SOCs can boot from both mmc0 and mmc2, detect from which one we're booting, and make that one "mmc dev 0" so that a single u-boot binary can be used for both the onboard eMMC and for external sdcards. When we're booting from mmc2, we make it dev 0 because that is where the SPL will load the tertiary payload (the actual u-boot binary in our case) from, see: common/spl/spl_mmc.c, which has dev 0 hardcoded everywhere. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
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cd82113a |
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02-Oct-2014 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Add mmc card-detect functionality Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
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1d1bd42e |
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03-Oct-2014 |
Hans de Goede <hdegoede@redhat.com> |
ARM: sunxi-mmc: Add mmc support for sun6i / A31 The mmc hardware on sun6i has an extra reset control that needs to be de-asserted prior to usage. Also the FIFO address is different. Signed-off-by: Hans de Goede <hdegoede@redhat.com> [wens@csie.org: use setbits_le32 for reset control, drop obsolete changes, rewrite different FIFO address handling, add commit message] Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
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a3e8c220 |
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22-Sep-2014 |
Wills Wang <wills.wang.open@gmail.com> |
mmc: sunxi: add SDHC support for sun6i/sun7i/sun8i Allwinner A20/A23/A31's SD/MMC host support SDHC High Capacity feature. Signed-off-by: Wills Wang <wills.wang.open@gmail.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
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b6ae6765 |
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09-Jun-2014 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Remove mmc DMA support The DMA code in sunxi_mmc.c is broken. mmc_trans_data_by_dma() allocates the dma descriptors on the stack, and then exits while the dma transfer is in progress, so the dma engine is reading stack memory which at that point may be re-used. So far we've gotten away with this by luck, but recent u-boot changes have shifted the stack start address by 16 bytes, which combined with dma alignment now exposes this problem. Since we end up just busy waiting for the dma engine anyway, this commit fixes things by simply removing the dma code, resulting in smaller bug-free code. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
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e24ea55c |
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05-May-2014 |
Ian Campbell <ijc@hellion.org.uk> |
sunxi: mmc support On Mon, 2014-05-05 at 14:18 +0200, Stefan Roese wrote: > > + case 1: > > +#if CONFIG_MMC1_PG > Are you sure that this is correct and shouldn't be: > > +#ifdef CONFIG_MMC1_PG > > ? It's "correct" in so far as it works (the boards.cfg config stuff #defines things to 1), but I think you are right that it isn't the preferred style. But... > A quick scan through this patch series shows that this define > is not set at all. Perhaps its outdated? Or is it used to support > some other sunxi SoC? Not sure, perhaps it should be removed for > now. ...I had thought that it was to support some other board which wasn't being upstreamed right now, so eventually useful and harmless for now, but I've just checked and it isn't actually used by any of the boards in u-boot-sunxi.git. So rather than fix it to use #ifdef lets drop it. Rather than resend the entire series, here is v5.1 of this patch. > Other than this please add my: > > Reviewed-by: Stefan Roese <sr@denx.de> Thanks! 8<--------------------------------- >From 20704e35a41664de5f516ed0e02981ac06085102 Mon Sep 17 00:00:00 2001 From: Ian Campbell <ijc@hellion.org.uk> Date: Fri, 7 Mar 2014 04:29:39 +0000 Subject: [PATCH v5.1 7/8] sunxi: mmc support This adds support for the MMC controller on the Allwinner A20 (sun7i) processor. Signed-off-by: Henrik Nordstrom <henrik@henriknordstrom.net> Signed-off-by: Luke Leighton <lkcl@lkcl.net> Signed-off-by: Oliver Schinagl <oliver@schinagl.nl> Signed-off-by: Wills Wang <wills.wang.open@gmail.com> Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Stefan Roese <sr@denx.de> Cc: Tom Cubie <Mr.hipboi@gmail.com> Cc: Aaron Maoye <leafy.myeh@allwinnertech.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Reviewed-by: Tom Rini <trini@ti.com> |
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42508461 |
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11-Sep-2021 |
Samuel Holland <samuel@sholland.org> |
sunxi: Clean up inclusions of asm/arch/gpio.h As part of migrating to DM_GPIO and DM_PINCTRL, eventually we will remove the asm/arch/gpio.h header. In preparation, clean up the various files that include it. Some files did not contain any GPIO code at all, so this header was completely unused. A few files contained only legacy platform-specific GPIO code for setting up pin muxes. They were left unchanged, as that code will be completely removed by the DM_PINCTRL migration. The remaining files contain some combination of DM_GPIO and legacy GPIO code. For those, switch to including asm/gpio.h (if it wasn't included already). Right now, this header provides both sets of functions, because ARCH_SUNXI selects GPIO_EXTRA_HEADER. This will still be the right header to include once the DM_GPIO migration is complete and GPIO_EXTRA_HEADER is no longer needed. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
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0b508ca8 |
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03-Sep-2021 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: mmc: A20: Fix MMC optimisation Some SoCs (as seen on A20) seem to misreport the MMC FIFO level if the FIFO is completely full: the level size reads as zero, but the FIFO_FULL bit is set. We won't do a single iteration of the read loop in this case, so will be stuck forever. Check for this situation and use a safe minimal FIFO size instead when we hit this case. This fixes MMC boot on A20 devices after the MMC FIFO optimisation (9faae5457f52). Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> |
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ac62dadb |
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21-Apr-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Use mmc_of_parse() At the moment the Allwinner MMC driver parses the bus-width and non-removable DT properties itself, in the probe() routine. There is actually a generic function provided by the MMC framework doing this job, also it parses more generic properties like broken-cd and advanced transfer modes. Drop our own code and call mmc_of_parse() instead, to get all new features for free. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> |
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9faae545 |
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05-May-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Increase MMIO FIFO read performance To avoid the complexity of DMA operations (with chained descriptors), we use repeated MMIO reads and writes to the SD_FIFO_REG, which allows us to drain or fill the MMC data buffer FIFO very easily. However those MMIO accesses are somewhat costly, so this limits our MMC performance, to between 17 and 22 MB/s, but down to 9.5 MB/s on the H6 (partly due to the lower AHB1 frequency). As it turns out we read the FIFO status register after *every* word we read or write, which effectively doubles the number of MMIO accesses, thus effectively more than halving our performance. To avoid this overhead, we can make use of the FIFO level bits, which are in the very same FIFO status registers. So for a read request, we now can collect as many words as the FIFO level originally indicated, and only then need to update the status register. We don't know for sure the size of the FIFO (and it seems to differ across SoCs anyway), so writing is more fragile, which is why we still use the old method for that. If we find a minimum FIFO size available on all SoCs, we could use that, in a later optimisation. This patch increases the eMMC read speed on a Pine64-LTS from about 22MB/s to 44 MB/s. SD card reads don't gain that much, but with 23 MB/s we now reach the practical limit for 3.3V SD cards. On the H6 we double our transfer speed, from 9.5 MB/s to 19.7 MB/s. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
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b5dd39c9 |
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05-May-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Cleanup and fix self-calibration code Newer SoCs have a self calibration feature, which avoids us writing hard coded phase delay values into the controller. Consolidate the code by avoiding unnecessary #ifdefs, and also enabling the feature for all those newer SoCs. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
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f85c0912 |
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05-May-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Cleanup "new timing mode" selection Among the SoCs using the "new timing mode", only the A83T needs to explicitly switch to that mode. By just defining the symbol for that one odd A83T bit to 0 for any other SoCs, we can always OR that in, and save the confusing nested #ifdefs. Clean up the also confusing new_mode setting on the way. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> |
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937ee31e |
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05-May-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Fix MMC clock parent selection Most Allwinner SoCs which use the so called "new timing mode" in their MMC controllers actually use the double-rate PLL6/PERIPH0 clock as their parent input clock. This is interestingly enough compensated by a hidden "by 2" post-divider in the mod clock, so the divider and actual output rate stay the same. Even though for the H6 and H616 (but only for them!) we use the doubled input clock for the divider computation, we never accounted for the implicit post-divider, so the clock was only half the speed on those SoCs. This didn't really matter so far, as our slow MMIO routine limits the transfer speed anyway, but we will fix this soon. Clean up the code around that selection, to always use the normal PLL6 (PERIPH0(1x)) clock as an input. As the rate and divider are the same, that makes no difference. Explain the hardware differences in a comment. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
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ca496baf |
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29-Apr-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Fix warnings with CONFIG_PHYS_64BIT When enabling PHYS_64BIT on 32-bit platforms, we get two warnings about pointer casts in sunxi_mmc.c. Those are related to MMIO addresses, which are always below 1GB on all Allwinner SoCs, so there is no problem with anything having more than 32 bits. Add the proper casts to make it compile cleanly. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> |
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f4826fb1 |
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18-Dec-2020 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Avoid #ifdefs in delay and width setup The delay and bus-width setup are slightly different across the Allwinner SoC generations, and we covered this so far with some preprocessor conditionals. Use the more readable IS_ENABLE() instead. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> |
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0237b304 |
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11-Jan-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Refactor mod clock register offset So far the only difference between the various Allwinner MMC controller we are concerned about is the mod clock register offset. This is actually not directly related to the MMC controller IP, but an integration choice, dependent on the SoC this appears in. To avoid becoming trapped with some compatible fallback strings, let's remove the whole struct sunxi_mmc_variant, and replace this with a SoC based choice, which we can derive from the CONFIG_MACH_SUNx_y symbols. This will later simplify H616 support. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> |
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aaebb900 |
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11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@gmail.com> |
mmc: sunxi: Replace H6 ifdefs with H6 gen macro It turns out that several SoCs share same mmc configuration as H6. In order to lower ifdef clutter replace H6 specific macro with common one. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
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c69cda25 |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org> |
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caa4daa2 |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org> |
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41575d8e |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org> |
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c05ed00a |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
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f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
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4233698d |
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18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com> |
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c57572eb |
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29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
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3c8c7da6 |
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21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> |
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9e233382 |
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29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
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a1925a64 |
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29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
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e8f37f42 |
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09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime |
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0e21a2ff |
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09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com> |
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629d267a |
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09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic |
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2a8882ec |
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09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic |
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20940ef2 |
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05-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
mmc: sunxi: add support for automatic delay calibration A64 and H6 support automatic delay calibration and Linux driver uses it instead of hardcoded delays. Add support for it to u-boot driver. Fixes eMMC instability on Pinebook Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Tested-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Cc: Vagrant Cascadian <vagrant@debian.org> Reviewed-by: Jagan Teki <jagan@openedev.com> |
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42956f1b |
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21-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: add MMC support for H6 The Allwinner H6 SoC has 3 MMC controllers like the ones in A64, with the MMC2 come with the capability to do crypto by EMCE. Add MMC support for H6. EMCE support is not added yet. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> |
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979b239b |
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29-Jun-2018 |
Adam Sampson <ats@offog.org> |
dm: mmc: sunxi: Add A10/A20 compatible strings Commit dd27918c2252 ("dm: mmc: sunxi: Add support for driver model") only added the allwinner,sun5i-a13-mmc compatible string for this driver. The DM initialisation code here also works with (at least) A10 and A20, so add the appropriate compatible strings as per Linux 4.17's driver. Tested on A10 Cubieboard and A20 pcDuino3 Nano with CONFIG_DM_MMC. (A20 worked already, because sun7i-a20.dtsi specifies both the A13 and A20 strings.) Signed-off-by: Adam Sampson <ats@offog.org> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jteki@openedev.com> |
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83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
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5ff8e548 |
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20-Mar-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
sunxi: improve throughput in the sunxi_mmc driver Throughput tests have shown the sunxi_mmc driver to take over 10s to read 10MB from a fast eMMC device due to excessive delays in polling loops. This commit restructures the main polling loops to use get_timer(...) to determine whether a (millisecond) timeout has expired. We choose not to use the wait_bit function, as we don't need interruptability with ctrl-c and have at least one case where two bits (one for an error condition and another one for completion) need to be read and using wait_bit would have not added to the clarity. The observed speedup in testing on a A31 is greater than 10x (e.g. a 10MB write decreases from 9.302s to 0.884s). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Tested-by: Mylène Josserand <mylene.josserand@bootlin.com> Acked-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
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4744d81c |
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27-Mar-2018 |
Stefan Mavrodiev <stefan@olimex.com> |
sunxi: mmc: Fix phase delays U-boot driver for sunxi-mmc uses PLL6, unlike linux kernel where PLL5 is used, with clock rates respectively 600MHz and 768MHz. Thus there are different phase degree steps - 24 for the kernel and 30 for u-boot. In the kernel driver the phase is set 90 deg for output and 120 for sample. Dividing by 30 will result values 3 and 4. Those are the values set in the u-boot driver. However, the condition defining delays is wrong. MMC core driver requests clock of 52MHz, sunxi-driver sets clock of 50MHz, but phase is set 30 deg for output and 120 deg for sample. Apparently this works for most cards. On A20-SOM204-EVB-eMMC there is eMMC card (KLMAG2GEND) which complains about it. Maybe there is other boards with similar problem? So the fix is to match delays for both u-boot and kernel. Signed-off-by: Stefan Mavrodiev <stefan@olimex.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
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8be4e61d |
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01-Feb-2018 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
mmc: sunxi: support cd-inverted With CONFIG_DM_MMC the BananaPi does not detect SD cards. The sunxi device trees use the cd-inverted property to indicate that the card detect is inverted. This property is documented in Linux kernel devicetree/bindings/mmc/mmc.txt The property is not marked as deprecated. A similar patch was posted by Tuomas but is in status "Changes Requested". https://patchwork.ozlabs.org/patch/850377/ This patch is a stripped down version of his patch. Suggested-by: Tuomas Tynkkynen <tuomas@tuxera.com> Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
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8a647fc3 |
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31-Aug-2017 |
Chen-Yu Tsai <wens@csie.org> |
mmc: sunxi: Only update timing mode bit when enabling new timing mode When enabling the new mmc timing mode, we inadvertently clear all the remaining bits in the new timing mode register. The bits cleared include a default phase delay on the output clock. The BSP kernel states that the default values are supposed to be used. Clearing them results in decreased performance or transfer errors on some boards. Fixes: de9b1771c3b6 ("mmc: sunxi: Support new mode") Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
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ead3697d |
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23-Aug-2017 |
Maxime Ripard <maxime.ripard@free-electrons.com> |
mmc: sunxi: fix legacy MMC initialisation The driver-model rework changed, among other things, the way the private data were moved around. It now uses the private field in the struct mmc. However, the mmc_create argument was changed in the process to always pass the array we used to have to store our private structures. The basically means that all the MMC driver instances will now have the private data of the first instance, which obviously doesn't work very well. Pass the proper pointer to mmc_create. Fixes: 034e226bc77e ("dm: mmc: sunxi: Pass private data around explicitly") Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Tested-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
de9b1771 |
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22-Aug-2017 |
Maxime Ripard <maxime.ripard@free-electrons.com> |
mmc: sunxi: Support new mode Almost all of the newer Allwinner SoCs have a new operating mode for the eMMC clocks that needs to be enabled in both the clock and the MMC controller. Details about that mode are sparse, and the name itself (new mode vs old mode) doesn't give much details, but it seems that the it changes the sampling of the MMC clock. One side effect is also that it divides the parent clock rate by 2. Add support for it through a Kconfig option. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
dd27918c |
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04-Jul-2017 |
Simon Glass <sjg@chromium.org> |
dm: mmc: sunxi: Add support for driver model Add a driver-model version of this driver which mostly uses the existing code. The old code can be removed once all boards are switched over. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
ec73d960 |
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04-Jul-2017 |
Simon Glass <sjg@chromium.org> |
dm: mmc: sunxi: Drop mmc_clk_io_on() This function has #ifdefs in it which we want to avoid for driver model. Instead we should use different compatible strings and the .data field. It also uses the MMC device number which is not available in driver model except through aliases. Move the function's into its caller so that the driver-model version can do things its own way. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
034e226b |
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04-Jul-2017 |
Simon Glass <sjg@chromium.org> |
dm: mmc: sunxi: Pass private data around explicitly At present the driver-private data is obtained in various functions by various means. With driver model this is provided automatically. Without driver model it comes from a C array declared at the top of the file. Adjust internal functions so that they are passed the private data as a parameter, allowing the caller to obtain it using either means. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
3f5af12a |
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04-Jul-2017 |
Simon Glass <sjg@chromium.org> |
dm: mmc: sunxi: Rename mmchost to priv Use the driver-model naming convention for this structure. It is data private to the driver so the local variable should be called 'priv'. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
e3c794e2 |
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04-Jul-2017 |
Simon Glass <sjg@chromium.org> |
dm: mmc: sunxi: Rename struct sunxi_mmc_host to sunxi_mmc_priv Use the driver-model naming convention for this structure. It is data private to the driver. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
07b0b9c0 |
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29-Dec-2016 |
Jaehoon Chung <jh80.chung@samsung.com> |
mmc: change the set_ios return type from void to int To maintain consistency, set_ios type of legacy mmc_ops changed to int. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> |
#
fb013184 |
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04-Nov-2016 |
Maxime Ripard <maxime.ripard@free-electrons.com> |
mmc: sunxi: Enable 8bits bus width for sun8i The sun8i SoCs also have a 8 bits capable MMC2 controller. Enable the support for those too. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Hans de Goede <hdegoede@redhat.com> |
#
915ffa52 |
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19-Jul-2016 |
Jaehoon Chung <jh80.chung@samsung.com> |
mmc: use the generic error number Use the generic error number instead of specific error number. If use the generic error number, it can debug more easier. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ef36d9ae |
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09-Jul-2016 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Use BROM stored boot_media value to determine our boot-source Now that we know that the BROM stores a value indicating the boot-source at the beginning of SRAM, use that instead of trying to recreate the BROM's boot probing. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
26c0c157 |
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07-Jul-2016 |
Tobias Doerffel <tobias.doerffel@ed-chemnitz.de> |
sunxi: mmc: increase status register polling rate for data transfers With a recent bunch of SD3.0 cards in our A20-based board we experienced data transfer rates of about 250 KiB/s instead of 10 MiB/s with previous cards from the same vendor (both 4 GB/class 10). By increasing status register polling rate from 1 kHz to 1 MHz we were able to reach the original transfer rates again. With the old cards we now even reach about 16 MiB/s. Signed-off-by: Tobias Doerffel <tobias.doerffel@ed-chemnitz.de> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
d96ebc46 |
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29-Mar-2016 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: Add support for Allwinner A64 SoCs The Allwinner A64 SoC is used in the Pine64. This patch adds all bits necessary to compile U-Boot for it running in AArch64 mode. Unfortunately SPL is not ready yet due to legal problems, so we need to boot using the binary boot0 for now. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> [agraf: remove SPL code, move to AArch64] Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
0ea5a04f |
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29-Mar-2016 |
Alexander Graf <agraf@csgraf.de> |
sunxi: Explicitly cast u32 pointer conversions Some parts of the sunxi code cast explicitly between u32 values and pointers. This is not a problem in practice, because all 64bit SoCs today only use the lower 32 bits for their phyical address space. But we need to make sure that the compiler is sure this is not an accident as well. Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
7c4213f6 |
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07-Dec-2015 |
Stephen Warren <swarren@nvidia.com> |
block: pass block dev not num to read/write/erase() This will allow the implementation to make use of data in the block_dev structure beyond the base device number. This will be useful so that eMMC block devices can encompass the HW partition ID rather than treating this out-of-band. Equally, the existence of the priv field is crying out for this patch to exist. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
be90974c |
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23-Sep-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Fix clk-delay settings In recent allwinner kernel sources the mmc/sdio clk-delay settings have been slightly tweaked, and for sun9i they are completely different then what we are using. This commit brings us in sync with what allwinner does, fixing problems accessing sdcards on some A33 devices (and likely others). For pre sun9i hardware this makes the following changes: -At 400Khz change the sample delay from 7 to 0 (first introduced in A31 sdk) -At 50 Mhz change the sample delay from 5 to 4 (first introduced in A23 sdk) -Above 50 MHz change the out delay from 2 to 1 (first introduced in A20 sdk) Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
28f69b9a |
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29-Aug-2015 |
Yousong Zhou <yszhou4tech@gmail.com> |
sunxi: mmc: set transfer timeout according to byte_cnt. Originally a timeout value of 2 seconds was used regardless of the size of data to be transfered. This prevented slow devices from working correctly while there was no much gain for faster devices, e.g. it takes 3708ms for a transfer of uImage of size 1899008 bytes. Signed-off-by: Yousong Zhou <yszhou4tech@gmail.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
645c48f5 |
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29-May-2015 |
Daniel Kochmański <dkochmanski@turtle-solutions.eu> |
sunxi: Create helper function veryfing valid boot signature on MMC This patch extracts checking for valid SD card "eGON.BT0" signature from `board_mmc_init` into function `sunxi_mmc_has_egon_boot_signature`. Buffer for mmc sector is allocated and freed at runtime. `panic` is triggered on malloc failure. Signed-off-by: Daniel Kochmański <dkochmanski@turtle-solutions.eu> CC: Roy Spliet <r.spliet@ultimaker.com> Cc: Ian Campbell <ijc@hellion.org.uk> [hdegoede@redhat.com: Small bugfix to make it work for devs other then mmc0] Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
1c09fa38 |
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30-May-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Enable pull-up on card-detect gpio pin On some boards we need to enable the internal pull-up te reliable detect that no card is inserted. Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
ff7e9cfc |
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05-May-2015 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-mmc
|
#
5a20397b |
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23-Mar-2015 |
Rob Herring <robh@kernel.org> |
mmc: remove the MMC_MODE_HC flag High capacity support is not a host capability, but a device capability that is queried via the OCR. The flag in the operating conditions request argument can just be set unconditionally. This matches the Linux implementation. [panto] Hand merged and renumbering MMC_MODE_DDR_52MHz. Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com> Cc: Pantelis Antoniou <pantelis.antoniou@konsulko.com> |
#
90641f82 |
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22-Apr-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Fix card-detect gpio handling to work with the driver-model The driver-model gpio functions may return another value then -1 as error, make the sunxi mmc code properly handle this. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
44d8ae5b |
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06-Apr-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Introduce a hidden SUNXI_GEN_SUNxI Kconfig bool sun6i and newer (derived) SoCs such as the sun8i-a23, sun8i-a33 and sun9i have a various things in common, like having separate ahb reset control registers, the SID living inside the pmic, custom pmic busses, new style watchdog, etc. This commit introduces a new hidden SUNXI_GEN_SUN6I Kconfig bool which can be used to check for these features avoiding the need for an ever growing list of "#if defined CONFIG_MACH_SUN?I" conditionals as we add support for more "new style" sunxi SoCs. Note that this commit changes the behavior of the gmac and hdmi code for sun8i and the upcoming sun9i devices. This does not matter as sun8i does not have gmac nor hdmi, and sun9i has new hardware-blocks for these so the old code will not work there. Also this is intentional as if a sun8i / sun9i variant which does use the old hwblocks shows up then the GEN_SUN6I code paths will be the right ones to use. For completeness this also adds a SUNXI_GEN_SUN4I bool for A10/A13/A20. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
1de32b8a |
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19-Feb-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Always declare High Capacity capability High Capacity (e)MMC cards work fine on sun4i / sun5i, and not having this capability set causes u-boot to not recognize the eMMC on an Utoo P66 A13 tablet, so always set it thereby fixing this. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
5abdb156 |
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31-Jan-2015 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: mmc: Add 'sunxi_' prefix to the static functions This results in a much more readable callgraph, because now they can't be confused with the function having exactly the same name in the generic mmc code. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
daf22636 |
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14-Jan-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Add support for sun9i (A80) The clocks on the A80 are hooked up slightly different, add support for this. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
5b8d7fb4 |
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15-Jan-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Use a realistic timeout when sending a mmc command Wait 1 second for the sdcard to respond, rather then waiting for 0xfffff milliseconds. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
b0c4ae1a |
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19-Dec-2014 |
Axel Lin <axel.lin@ingics.com> |
mmc: sunxi: Fix misuse of gpio_direction_input() It does not make sense to make gpio_direction_input() return the gpio input status. The return value of gpio_direction_input() is inconsistent if CONFIG_DM_GPIO is defined. And we don't need to call gpio_direction_input() int sunxi_mmc_getcd(). Just init the gpio once in mmc_resource_init() is enough. Signed-off-by: Axel Lin <axel.lin@ingics.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Ian Campbell <ijc@hellion.org.uk> |
#
fc3a8325 |
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07-Dec-2014 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Properly setup mod-clk and clock sampling phases The sunxi mmc controller has both an internal clock divider, as well as the divider in the mod0-clk for the mmc controller. The internal divider cannot be used, as it conflicts with the setting of clock sampling phases which is done in the mod0-clk, so it must be set to 0 (divide by 1). For some reason while the kernel has had this correct from day one, the u-boot sunxi mmc code has been using a fixed mod0-clk and setting its internal divider depending on the desired speed. This is something which we've inherited from the original Allwinner u-boot sources, but while this has been fixed in Allwinner's own u-boot code at least for the A23 and later upstream u-boot was still doing this wrong. This commit fixes this, thereby also fixing mmc support not working reliable on the A23 (which seems more sensitive to this) and possible also fixes some other sunxi mmc issues. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
967325fe |
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31-Oct-2014 |
Hans de Goede <hdegoede@redhat.com> |
dm: sunxi: Request card detect gpio This is necessary for the device-model enabled builds to work properly. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
ed41e62f |
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24-Oct-2014 |
Ian Campbell <ijc@hellion.org.uk> |
sunxi: Use CONFIG_MACH_SUN?I from Kconfig instead of CONFIG_SUN?I Mostly automatic with: sed -i -e 's/CONFIG_\(SUN[45678]I\)/CONFIG_MACH_\1/g' $(git grep -l CONFIG_SUN[45678]I) followed by removing the relevant #defines from include/configs/sun?i.h by hand. Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
e637b30b |
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22-Oct-2014 |
Chen-Yu Tsai <wens@csie.org> |
mmc: sunxi: Add support for sun8i (A23) The Allwinner A23 SoC has reset controls like the A31 (sun6i). The FIFO address is also the same as sun6i. Re-use code added for sun6i. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
e79c7c88 |
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02-Oct-2014 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: When we've both mmc0 and mmc2, detect from which one we're booting sunxi SOCs can boot from both mmc0 and mmc2, detect from which one we're booting, and make that one "mmc dev 0" so that a single u-boot binary can be used for both the onboard eMMC and for external sdcards. When we're booting from mmc2, we make it dev 0 because that is where the SPL will load the tertiary payload (the actual u-boot binary in our case) from, see: common/spl/spl_mmc.c, which has dev 0 hardcoded everywhere. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
cd82113a |
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02-Oct-2014 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Add mmc card-detect functionality Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
1d1bd42e |
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03-Oct-2014 |
Hans de Goede <hdegoede@redhat.com> |
ARM: sunxi-mmc: Add mmc support for sun6i / A31 The mmc hardware on sun6i has an extra reset control that needs to be de-asserted prior to usage. Also the FIFO address is different. Signed-off-by: Hans de Goede <hdegoede@redhat.com> [wens@csie.org: use setbits_le32 for reset control, drop obsolete changes, rewrite different FIFO address handling, add commit message] Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
a3e8c220 |
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22-Sep-2014 |
Wills Wang <wills.wang.open@gmail.com> |
mmc: sunxi: add SDHC support for sun6i/sun7i/sun8i Allwinner A20/A23/A31's SD/MMC host support SDHC High Capacity feature. Signed-off-by: Wills Wang <wills.wang.open@gmail.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
b6ae6765 |
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09-Jun-2014 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Remove mmc DMA support The DMA code in sunxi_mmc.c is broken. mmc_trans_data_by_dma() allocates the dma descriptors on the stack, and then exits while the dma transfer is in progress, so the dma engine is reading stack memory which at that point may be re-used. So far we've gotten away with this by luck, but recent u-boot changes have shifted the stack start address by 16 bytes, which combined with dma alignment now exposes this problem. Since we end up just busy waiting for the dma engine anyway, this commit fixes things by simply removing the dma code, resulting in smaller bug-free code. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
e24ea55c |
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05-May-2014 |
Ian Campbell <ijc@hellion.org.uk> |
sunxi: mmc support On Mon, 2014-05-05 at 14:18 +0200, Stefan Roese wrote: > > + case 1: > > +#if CONFIG_MMC1_PG > Are you sure that this is correct and shouldn't be: > > +#ifdef CONFIG_MMC1_PG > > ? It's "correct" in so far as it works (the boards.cfg config stuff #defines things to 1), but I think you are right that it isn't the preferred style. But... > A quick scan through this patch series shows that this define > is not set at all. Perhaps its outdated? Or is it used to support > some other sunxi SoC? Not sure, perhaps it should be removed for > now. ...I had thought that it was to support some other board which wasn't being upstreamed right now, so eventually useful and harmless for now, but I've just checked and it isn't actually used by any of the boards in u-boot-sunxi.git. So rather than fix it to use #ifdef lets drop it. Rather than resend the entire series, here is v5.1 of this patch. > Other than this please add my: > > Reviewed-by: Stefan Roese <sr@denx.de> Thanks! 8<--------------------------------- >From 20704e35a41664de5f516ed0e02981ac06085102 Mon Sep 17 00:00:00 2001 From: Ian Campbell <ijc@hellion.org.uk> Date: Fri, 7 Mar 2014 04:29:39 +0000 Subject: [PATCH v5.1 7/8] sunxi: mmc support This adds support for the MMC controller on the Allwinner A20 (sun7i) processor. Signed-off-by: Henrik Nordstrom <henrik@henriknordstrom.net> Signed-off-by: Luke Leighton <lkcl@lkcl.net> Signed-off-by: Oliver Schinagl <oliver@schinagl.nl> Signed-off-by: Wills Wang <wills.wang.open@gmail.com> Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Stefan Roese <sr@denx.de> Cc: Tom Cubie <Mr.hipboi@gmail.com> Cc: Aaron Maoye <leafy.myeh@allwinnertech.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Reviewed-by: Tom Rini <trini@ti.com> |
#
0b508ca8 |
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03-Sep-2021 |
Andre Przywara <andre.przywara@arm.com> |
sunxi: mmc: A20: Fix MMC optimisation Some SoCs (as seen on A20) seem to misreport the MMC FIFO level if the FIFO is completely full: the level size reads as zero, but the FIFO_FULL bit is set. We won't do a single iteration of the read loop in this case, so will be stuck forever. Check for this situation and use a safe minimal FIFO size instead when we hit this case. This fixes MMC boot on A20 devices after the MMC FIFO optimisation (9faae5457f52). Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> |
#
ac62dadb |
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21-Apr-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Use mmc_of_parse() At the moment the Allwinner MMC driver parses the bus-width and non-removable DT properties itself, in the probe() routine. There is actually a generic function provided by the MMC framework doing this job, also it parses more generic properties like broken-cd and advanced transfer modes. Drop our own code and call mmc_of_parse() instead, to get all new features for free. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> |
#
9faae545 |
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05-May-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Increase MMIO FIFO read performance To avoid the complexity of DMA operations (with chained descriptors), we use repeated MMIO reads and writes to the SD_FIFO_REG, which allows us to drain or fill the MMC data buffer FIFO very easily. However those MMIO accesses are somewhat costly, so this limits our MMC performance, to between 17 and 22 MB/s, but down to 9.5 MB/s on the H6 (partly due to the lower AHB1 frequency). As it turns out we read the FIFO status register after *every* word we read or write, which effectively doubles the number of MMIO accesses, thus effectively more than halving our performance. To avoid this overhead, we can make use of the FIFO level bits, which are in the very same FIFO status registers. So for a read request, we now can collect as many words as the FIFO level originally indicated, and only then need to update the status register. We don't know for sure the size of the FIFO (and it seems to differ across SoCs anyway), so writing is more fragile, which is why we still use the old method for that. If we find a minimum FIFO size available on all SoCs, we could use that, in a later optimisation. This patch increases the eMMC read speed on a Pine64-LTS from about 22MB/s to 44 MB/s. SD card reads don't gain that much, but with 23 MB/s we now reach the practical limit for 3.3V SD cards. On the H6 we double our transfer speed, from 9.5 MB/s to 19.7 MB/s. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
b5dd39c9 |
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05-May-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Cleanup and fix self-calibration code Newer SoCs have a self calibration feature, which avoids us writing hard coded phase delay values into the controller. Consolidate the code by avoiding unnecessary #ifdefs, and also enabling the feature for all those newer SoCs. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
f85c0912 |
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05-May-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Cleanup "new timing mode" selection Among the SoCs using the "new timing mode", only the A83T needs to explicitly switch to that mode. By just defining the symbol for that one odd A83T bit to 0 for any other SoCs, we can always OR that in, and save the confusing nested #ifdefs. Clean up the also confusing new_mode setting on the way. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> |
#
937ee31e |
|
05-May-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Fix MMC clock parent selection Most Allwinner SoCs which use the so called "new timing mode" in their MMC controllers actually use the double-rate PLL6/PERIPH0 clock as their parent input clock. This is interestingly enough compensated by a hidden "by 2" post-divider in the mod clock, so the divider and actual output rate stay the same. Even though for the H6 and H616 (but only for them!) we use the doubled input clock for the divider computation, we never accounted for the implicit post-divider, so the clock was only half the speed on those SoCs. This didn't really matter so far, as our slow MMIO routine limits the transfer speed anyway, but we will fix this soon. Clean up the code around that selection, to always use the normal PLL6 (PERIPH0(1x)) clock as an input. As the rate and divider are the same, that makes no difference. Explain the hardware differences in a comment. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
ca496baf |
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29-Apr-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Fix warnings with CONFIG_PHYS_64BIT When enabling PHYS_64BIT on 32-bit platforms, we get two warnings about pointer casts in sunxi_mmc.c. Those are related to MMIO addresses, which are always below 1GB on all Allwinner SoCs, so there is no problem with anything having more than 32 bits. Add the proper casts to make it compile cleanly. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> |
#
f4826fb1 |
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18-Dec-2020 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Avoid #ifdefs in delay and width setup The delay and bus-width setup are slightly different across the Allwinner SoC generations, and we covered this so far with some preprocessor conditionals. Use the more readable IS_ENABLE() instead. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> |
#
0237b304 |
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11-Jan-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Refactor mod clock register offset So far the only difference between the various Allwinner MMC controller we are concerned about is the mod clock register offset. This is actually not directly related to the MMC controller IP, but an integration choice, dependent on the SoC this appears in. To avoid becoming trapped with some compatible fallback strings, let's remove the whole struct sunxi_mmc_variant, and replace this with a SoC based choice, which we can derive from the CONFIG_MACH_SUNx_y symbols. This will later simplify H616 support. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> |
#
aaebb900 |
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11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@siol.net> |
mmc: sunxi: Replace H6 ifdefs with H6 gen macro It turns out that several SoCs share same mmc configuration as H6. In order to lower ifdef clutter replace H6 specific macro with common one. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
c69cda25 |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
caa4daa2 |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
41575d8e |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
c05ed00a |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
4233698d |
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18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com> |
#
c57572eb |
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29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
3c8c7da6 |
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21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> |
#
9e233382 |
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29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
a1925a64 |
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29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
e8f37f42 |
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09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime |
#
0e21a2ff |
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09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
629d267a |
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09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic |
#
2a8882ec |
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09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic |
#
20940ef2 |
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05-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
mmc: sunxi: add support for automatic delay calibration A64 and H6 support automatic delay calibration and Linux driver uses it instead of hardcoded delays. Add support for it to u-boot driver. Fixes eMMC instability on Pinebook Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Tested-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Cc: Vagrant Cascadian <vagrant@debian.org> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
42956f1b |
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21-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: add MMC support for H6 The Allwinner H6 SoC has 3 MMC controllers like the ones in A64, with the MMC2 come with the capability to do crypto by EMCE. Add MMC support for H6. EMCE support is not added yet. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> |
#
979b239b |
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29-Jun-2018 |
Adam Sampson <ats@offog.org> |
dm: mmc: sunxi: Add A10/A20 compatible strings Commit dd27918c2252 ("dm: mmc: sunxi: Add support for driver model") only added the allwinner,sun5i-a13-mmc compatible string for this driver. The DM initialisation code here also works with (at least) A10 and A20, so add the appropriate compatible strings as per Linux 4.17's driver. Tested on A10 Cubieboard and A20 pcDuino3 Nano with CONFIG_DM_MMC. (A20 worked already, because sun7i-a20.dtsi specifies both the A13 and A20 strings.) Signed-off-by: Adam Sampson <ats@offog.org> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jteki@openedev.com> |
#
83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
5ff8e548 |
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20-Mar-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
sunxi: improve throughput in the sunxi_mmc driver Throughput tests have shown the sunxi_mmc driver to take over 10s to read 10MB from a fast eMMC device due to excessive delays in polling loops. This commit restructures the main polling loops to use get_timer(...) to determine whether a (millisecond) timeout has expired. We choose not to use the wait_bit function, as we don't need interruptability with ctrl-c and have at least one case where two bits (one for an error condition and another one for completion) need to be read and using wait_bit would have not added to the clarity. The observed speedup in testing on a A31 is greater than 10x (e.g. a 10MB write decreases from 9.302s to 0.884s). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Tested-by: Mylène Josserand <mylene.josserand@bootlin.com> Acked-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
4744d81c |
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27-Mar-2018 |
Stefan Mavrodiev <stefan@olimex.com> |
sunxi: mmc: Fix phase delays U-boot driver for sunxi-mmc uses PLL6, unlike linux kernel where PLL5 is used, with clock rates respectively 600MHz and 768MHz. Thus there are different phase degree steps - 24 for the kernel and 30 for u-boot. In the kernel driver the phase is set 90 deg for output and 120 for sample. Dividing by 30 will result values 3 and 4. Those are the values set in the u-boot driver. However, the condition defining delays is wrong. MMC core driver requests clock of 52MHz, sunxi-driver sets clock of 50MHz, but phase is set 30 deg for output and 120 deg for sample. Apparently this works for most cards. On A20-SOM204-EVB-eMMC there is eMMC card (KLMAG2GEND) which complains about it. Maybe there is other boards with similar problem? So the fix is to match delays for both u-boot and kernel. Signed-off-by: Stefan Mavrodiev <stefan@olimex.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
8be4e61d |
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01-Feb-2018 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
mmc: sunxi: support cd-inverted With CONFIG_DM_MMC the BananaPi does not detect SD cards. The sunxi device trees use the cd-inverted property to indicate that the card detect is inverted. This property is documented in Linux kernel devicetree/bindings/mmc/mmc.txt The property is not marked as deprecated. A similar patch was posted by Tuomas but is in status "Changes Requested". https://patchwork.ozlabs.org/patch/850377/ This patch is a stripped down version of his patch. Suggested-by: Tuomas Tynkkynen <tuomas@tuxera.com> Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
8a647fc3 |
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31-Aug-2017 |
Chen-Yu Tsai <wens@csie.org> |
mmc: sunxi: Only update timing mode bit when enabling new timing mode When enabling the new mmc timing mode, we inadvertently clear all the remaining bits in the new timing mode register. The bits cleared include a default phase delay on the output clock. The BSP kernel states that the default values are supposed to be used. Clearing them results in decreased performance or transfer errors on some boards. Fixes: de9b1771c3b6 ("mmc: sunxi: Support new mode") Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
ead3697d |
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23-Aug-2017 |
Maxime Ripard <maxime.ripard@free-electrons.com> |
mmc: sunxi: fix legacy MMC initialisation The driver-model rework changed, among other things, the way the private data were moved around. It now uses the private field in the struct mmc. However, the mmc_create argument was changed in the process to always pass the array we used to have to store our private structures. The basically means that all the MMC driver instances will now have the private data of the first instance, which obviously doesn't work very well. Pass the proper pointer to mmc_create. Fixes: 034e226bc77e ("dm: mmc: sunxi: Pass private data around explicitly") Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Tested-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
de9b1771 |
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22-Aug-2017 |
Maxime Ripard <maxime.ripard@free-electrons.com> |
mmc: sunxi: Support new mode Almost all of the newer Allwinner SoCs have a new operating mode for the eMMC clocks that needs to be enabled in both the clock and the MMC controller. Details about that mode are sparse, and the name itself (new mode vs old mode) doesn't give much details, but it seems that the it changes the sampling of the MMC clock. One side effect is also that it divides the parent clock rate by 2. Add support for it through a Kconfig option. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
dd27918c |
|
04-Jul-2017 |
Simon Glass <sjg@chromium.org> |
dm: mmc: sunxi: Add support for driver model Add a driver-model version of this driver which mostly uses the existing code. The old code can be removed once all boards are switched over. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
ec73d960 |
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04-Jul-2017 |
Simon Glass <sjg@chromium.org> |
dm: mmc: sunxi: Drop mmc_clk_io_on() This function has #ifdefs in it which we want to avoid for driver model. Instead we should use different compatible strings and the .data field. It also uses the MMC device number which is not available in driver model except through aliases. Move the function's into its caller so that the driver-model version can do things its own way. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
034e226b |
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04-Jul-2017 |
Simon Glass <sjg@chromium.org> |
dm: mmc: sunxi: Pass private data around explicitly At present the driver-private data is obtained in various functions by various means. With driver model this is provided automatically. Without driver model it comes from a C array declared at the top of the file. Adjust internal functions so that they are passed the private data as a parameter, allowing the caller to obtain it using either means. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
3f5af12a |
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04-Jul-2017 |
Simon Glass <sjg@chromium.org> |
dm: mmc: sunxi: Rename mmchost to priv Use the driver-model naming convention for this structure. It is data private to the driver so the local variable should be called 'priv'. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
e3c794e2 |
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04-Jul-2017 |
Simon Glass <sjg@chromium.org> |
dm: mmc: sunxi: Rename struct sunxi_mmc_host to sunxi_mmc_priv Use the driver-model naming convention for this structure. It is data private to the driver. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
07b0b9c0 |
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29-Dec-2016 |
Jaehoon Chung <jh80.chung@samsung.com> |
mmc: change the set_ios return type from void to int To maintain consistency, set_ios type of legacy mmc_ops changed to int. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> |
#
fb013184 |
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04-Nov-2016 |
Maxime Ripard <maxime.ripard@free-electrons.com> |
mmc: sunxi: Enable 8bits bus width for sun8i The sun8i SoCs also have a 8 bits capable MMC2 controller. Enable the support for those too. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Hans de Goede <hdegoede@redhat.com> |
#
915ffa52 |
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19-Jul-2016 |
Jaehoon Chung <jh80.chung@samsung.com> |
mmc: use the generic error number Use the generic error number instead of specific error number. If use the generic error number, it can debug more easier. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ef36d9ae |
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09-Jul-2016 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Use BROM stored boot_media value to determine our boot-source Now that we know that the BROM stores a value indicating the boot-source at the beginning of SRAM, use that instead of trying to recreate the BROM's boot probing. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
26c0c157 |
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07-Jul-2016 |
Tobias Doerffel <tobias.doerffel@ed-chemnitz.de> |
sunxi: mmc: increase status register polling rate for data transfers With a recent bunch of SD3.0 cards in our A20-based board we experienced data transfer rates of about 250 KiB/s instead of 10 MiB/s with previous cards from the same vendor (both 4 GB/class 10). By increasing status register polling rate from 1 kHz to 1 MHz we were able to reach the original transfer rates again. With the old cards we now even reach about 16 MiB/s. Signed-off-by: Tobias Doerffel <tobias.doerffel@ed-chemnitz.de> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
d96ebc46 |
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29-Mar-2016 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: Add support for Allwinner A64 SoCs The Allwinner A64 SoC is used in the Pine64. This patch adds all bits necessary to compile U-Boot for it running in AArch64 mode. Unfortunately SPL is not ready yet due to legal problems, so we need to boot using the binary boot0 for now. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> [agraf: remove SPL code, move to AArch64] Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
0ea5a04f |
|
29-Mar-2016 |
Alexander Graf <agraf@csgraf.de> |
sunxi: Explicitly cast u32 pointer conversions Some parts of the sunxi code cast explicitly between u32 values and pointers. This is not a problem in practice, because all 64bit SoCs today only use the lower 32 bits for their phyical address space. But we need to make sure that the compiler is sure this is not an accident as well. Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
7c4213f6 |
|
07-Dec-2015 |
Stephen Warren <swarren@nvidia.com> |
block: pass block dev not num to read/write/erase() This will allow the implementation to make use of data in the block_dev structure beyond the base device number. This will be useful so that eMMC block devices can encompass the HW partition ID rather than treating this out-of-band. Equally, the existence of the priv field is crying out for this patch to exist. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
be90974c |
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23-Sep-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Fix clk-delay settings In recent allwinner kernel sources the mmc/sdio clk-delay settings have been slightly tweaked, and for sun9i they are completely different then what we are using. This commit brings us in sync with what allwinner does, fixing problems accessing sdcards on some A33 devices (and likely others). For pre sun9i hardware this makes the following changes: -At 400Khz change the sample delay from 7 to 0 (first introduced in A31 sdk) -At 50 Mhz change the sample delay from 5 to 4 (first introduced in A23 sdk) -Above 50 MHz change the out delay from 2 to 1 (first introduced in A20 sdk) Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
28f69b9a |
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29-Aug-2015 |
Yousong Zhou <yszhou4tech@gmail.com> |
sunxi: mmc: set transfer timeout according to byte_cnt. Originally a timeout value of 2 seconds was used regardless of the size of data to be transfered. This prevented slow devices from working correctly while there was no much gain for faster devices, e.g. it takes 3708ms for a transfer of uImage of size 1899008 bytes. Signed-off-by: Yousong Zhou <yszhou4tech@gmail.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
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645c48f5 |
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29-May-2015 |
Daniel Kochmański <dkochmanski@turtle-solutions.eu> |
sunxi: Create helper function veryfing valid boot signature on MMC This patch extracts checking for valid SD card "eGON.BT0" signature from `board_mmc_init` into function `sunxi_mmc_has_egon_boot_signature`. Buffer for mmc sector is allocated and freed at runtime. `panic` is triggered on malloc failure. Signed-off-by: Daniel Kochmański <dkochmanski@turtle-solutions.eu> CC: Roy Spliet <r.spliet@ultimaker.com> Cc: Ian Campbell <ijc@hellion.org.uk> [hdegoede@redhat.com: Small bugfix to make it work for devs other then mmc0] Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
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1c09fa38 |
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30-May-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Enable pull-up on card-detect gpio pin On some boards we need to enable the internal pull-up te reliable detect that no card is inserted. Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
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ff7e9cfc |
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05-May-2015 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-mmc
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5a20397b |
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23-Mar-2015 |
Rob Herring <robh@kernel.org> |
mmc: remove the MMC_MODE_HC flag High capacity support is not a host capability, but a device capability that is queried via the OCR. The flag in the operating conditions request argument can just be set unconditionally. This matches the Linux implementation. [panto] Hand merged and renumbering MMC_MODE_DDR_52MHz. Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com> Cc: Pantelis Antoniou <pantelis.antoniou@konsulko.com> |
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90641f82 |
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22-Apr-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Fix card-detect gpio handling to work with the driver-model The driver-model gpio functions may return another value then -1 as error, make the sunxi mmc code properly handle this. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
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44d8ae5b |
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06-Apr-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Introduce a hidden SUNXI_GEN_SUNxI Kconfig bool sun6i and newer (derived) SoCs such as the sun8i-a23, sun8i-a33 and sun9i have a various things in common, like having separate ahb reset control registers, the SID living inside the pmic, custom pmic busses, new style watchdog, etc. This commit introduces a new hidden SUNXI_GEN_SUN6I Kconfig bool which can be used to check for these features avoiding the need for an ever growing list of "#if defined CONFIG_MACH_SUN?I" conditionals as we add support for more "new style" sunxi SoCs. Note that this commit changes the behavior of the gmac and hdmi code for sun8i and the upcoming sun9i devices. This does not matter as sun8i does not have gmac nor hdmi, and sun9i has new hardware-blocks for these so the old code will not work there. Also this is intentional as if a sun8i / sun9i variant which does use the old hwblocks shows up then the GEN_SUN6I code paths will be the right ones to use. For completeness this also adds a SUNXI_GEN_SUN4I bool for A10/A13/A20. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
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1de32b8a |
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19-Feb-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Always declare High Capacity capability High Capacity (e)MMC cards work fine on sun4i / sun5i, and not having this capability set causes u-boot to not recognize the eMMC on an Utoo P66 A13 tablet, so always set it thereby fixing this. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
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5abdb156 |
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31-Jan-2015 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: mmc: Add 'sunxi_' prefix to the static functions This results in a much more readable callgraph, because now they can't be confused with the function having exactly the same name in the generic mmc code. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
daf22636 |
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14-Jan-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Add support for sun9i (A80) The clocks on the A80 are hooked up slightly different, add support for this. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
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5b8d7fb4 |
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15-Jan-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Use a realistic timeout when sending a mmc command Wait 1 second for the sdcard to respond, rather then waiting for 0xfffff milliseconds. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
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b0c4ae1a |
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19-Dec-2014 |
Axel Lin <axel.lin@ingics.com> |
mmc: sunxi: Fix misuse of gpio_direction_input() It does not make sense to make gpio_direction_input() return the gpio input status. The return value of gpio_direction_input() is inconsistent if CONFIG_DM_GPIO is defined. And we don't need to call gpio_direction_input() int sunxi_mmc_getcd(). Just init the gpio once in mmc_resource_init() is enough. Signed-off-by: Axel Lin <axel.lin@ingics.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Ian Campbell <ijc@hellion.org.uk> |
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fc3a8325 |
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07-Dec-2014 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Properly setup mod-clk and clock sampling phases The sunxi mmc controller has both an internal clock divider, as well as the divider in the mod0-clk for the mmc controller. The internal divider cannot be used, as it conflicts with the setting of clock sampling phases which is done in the mod0-clk, so it must be set to 0 (divide by 1). For some reason while the kernel has had this correct from day one, the u-boot sunxi mmc code has been using a fixed mod0-clk and setting its internal divider depending on the desired speed. This is something which we've inherited from the original Allwinner u-boot sources, but while this has been fixed in Allwinner's own u-boot code at least for the A23 and later upstream u-boot was still doing this wrong. This commit fixes this, thereby also fixing mmc support not working reliable on the A23 (which seems more sensitive to this) and possible also fixes some other sunxi mmc issues. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
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967325fe |
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31-Oct-2014 |
Hans de Goede <hdegoede@redhat.com> |
dm: sunxi: Request card detect gpio This is necessary for the device-model enabled builds to work properly. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Simon Glass <sjg@chromium.org> |
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ed41e62f |
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24-Oct-2014 |
Ian Campbell <ijc@hellion.org.uk> |
sunxi: Use CONFIG_MACH_SUN?I from Kconfig instead of CONFIG_SUN?I Mostly automatic with: sed -i -e 's/CONFIG_\(SUN[45678]I\)/CONFIG_MACH_\1/g' $(git grep -l CONFIG_SUN[45678]I) followed by removing the relevant #defines from include/configs/sun?i.h by hand. Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
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e637b30b |
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22-Oct-2014 |
Chen-Yu Tsai <wens@csie.org> |
mmc: sunxi: Add support for sun8i (A23) The Allwinner A23 SoC has reset controls like the A31 (sun6i). The FIFO address is also the same as sun6i. Re-use code added for sun6i. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
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e79c7c88 |
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02-Oct-2014 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: When we've both mmc0 and mmc2, detect from which one we're booting sunxi SOCs can boot from both mmc0 and mmc2, detect from which one we're booting, and make that one "mmc dev 0" so that a single u-boot binary can be used for both the onboard eMMC and for external sdcards. When we're booting from mmc2, we make it dev 0 because that is where the SPL will load the tertiary payload (the actual u-boot binary in our case) from, see: common/spl/spl_mmc.c, which has dev 0 hardcoded everywhere. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
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cd82113a |
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02-Oct-2014 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Add mmc card-detect functionality Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
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1d1bd42e |
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03-Oct-2014 |
Hans de Goede <hdegoede@redhat.com> |
ARM: sunxi-mmc: Add mmc support for sun6i / A31 The mmc hardware on sun6i has an extra reset control that needs to be de-asserted prior to usage. Also the FIFO address is different. Signed-off-by: Hans de Goede <hdegoede@redhat.com> [wens@csie.org: use setbits_le32 for reset control, drop obsolete changes, rewrite different FIFO address handling, add commit message] Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
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a3e8c220 |
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22-Sep-2014 |
Wills Wang <wills.wang.open@gmail.com> |
mmc: sunxi: add SDHC support for sun6i/sun7i/sun8i Allwinner A20/A23/A31's SD/MMC host support SDHC High Capacity feature. Signed-off-by: Wills Wang <wills.wang.open@gmail.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
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b6ae6765 |
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09-Jun-2014 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Remove mmc DMA support The DMA code in sunxi_mmc.c is broken. mmc_trans_data_by_dma() allocates the dma descriptors on the stack, and then exits while the dma transfer is in progress, so the dma engine is reading stack memory which at that point may be re-used. So far we've gotten away with this by luck, but recent u-boot changes have shifted the stack start address by 16 bytes, which combined with dma alignment now exposes this problem. Since we end up just busy waiting for the dma engine anyway, this commit fixes things by simply removing the dma code, resulting in smaller bug-free code. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
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e24ea55c |
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05-May-2014 |
Ian Campbell <ijc@hellion.org.uk> |
sunxi: mmc support On Mon, 2014-05-05 at 14:18 +0200, Stefan Roese wrote: > > + case 1: > > +#if CONFIG_MMC1_PG > Are you sure that this is correct and shouldn't be: > > +#ifdef CONFIG_MMC1_PG > > ? It's "correct" in so far as it works (the boards.cfg config stuff #defines things to 1), but I think you are right that it isn't the preferred style. But... > A quick scan through this patch series shows that this define > is not set at all. Perhaps its outdated? Or is it used to support > some other sunxi SoC? Not sure, perhaps it should be removed for > now. ...I had thought that it was to support some other board which wasn't being upstreamed right now, so eventually useful and harmless for now, but I've just checked and it isn't actually used by any of the boards in u-boot-sunxi.git. So rather than fix it to use #ifdef lets drop it. Rather than resend the entire series, here is v5.1 of this patch. > Other than this please add my: > > Reviewed-by: Stefan Roese <sr@denx.de> Thanks! 8<--------------------------------- >From 20704e35a41664de5f516ed0e02981ac06085102 Mon Sep 17 00:00:00 2001 From: Ian Campbell <ijc@hellion.org.uk> Date: Fri, 7 Mar 2014 04:29:39 +0000 Subject: [PATCH v5.1 7/8] sunxi: mmc support This adds support for the MMC controller on the Allwinner A20 (sun7i) processor. Signed-off-by: Henrik Nordstrom <henrik@henriknordstrom.net> Signed-off-by: Luke Leighton <lkcl@lkcl.net> Signed-off-by: Oliver Schinagl <oliver@schinagl.nl> Signed-off-by: Wills Wang <wills.wang.open@gmail.com> Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Stefan Roese <sr@denx.de> Cc: Tom Cubie <Mr.hipboi@gmail.com> Cc: Aaron Maoye <leafy.myeh@allwinnertech.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Reviewed-by: Tom Rini <trini@ti.com> |
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ac62dadb |
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21-Apr-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Use mmc_of_parse() At the moment the Allwinner MMC driver parses the bus-width and non-removable DT properties itself, in the probe() routine. There is actually a generic function provided by the MMC framework doing this job, also it parses more generic properties like broken-cd and advanced transfer modes. Drop our own code and call mmc_of_parse() instead, to get all new features for free. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> |
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9faae545 |
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05-May-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Increase MMIO FIFO read performance To avoid the complexity of DMA operations (with chained descriptors), we use repeated MMIO reads and writes to the SD_FIFO_REG, which allows us to drain or fill the MMC data buffer FIFO very easily. However those MMIO accesses are somewhat costly, so this limits our MMC performance, to between 17 and 22 MB/s, but down to 9.5 MB/s on the H6 (partly due to the lower AHB1 frequency). As it turns out we read the FIFO status register after *every* word we read or write, which effectively doubles the number of MMIO accesses, thus effectively more than halving our performance. To avoid this overhead, we can make use of the FIFO level bits, which are in the very same FIFO status registers. So for a read request, we now can collect as many words as the FIFO level originally indicated, and only then need to update the status register. We don't know for sure the size of the FIFO (and it seems to differ across SoCs anyway), so writing is more fragile, which is why we still use the old method for that. If we find a minimum FIFO size available on all SoCs, we could use that, in a later optimisation. This patch increases the eMMC read speed on a Pine64-LTS from about 22MB/s to 44 MB/s. SD card reads don't gain that much, but with 23 MB/s we now reach the practical limit for 3.3V SD cards. On the H6 we double our transfer speed, from 9.5 MB/s to 19.7 MB/s. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
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b5dd39c9 |
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05-May-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Cleanup and fix self-calibration code Newer SoCs have a self calibration feature, which avoids us writing hard coded phase delay values into the controller. Consolidate the code by avoiding unnecessary #ifdefs, and also enabling the feature for all those newer SoCs. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
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f85c0912 |
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05-May-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Cleanup "new timing mode" selection Among the SoCs using the "new timing mode", only the A83T needs to explicitly switch to that mode. By just defining the symbol for that one odd A83T bit to 0 for any other SoCs, we can always OR that in, and save the confusing nested #ifdefs. Clean up the also confusing new_mode setting on the way. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> |
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937ee31e |
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05-May-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Fix MMC clock parent selection Most Allwinner SoCs which use the so called "new timing mode" in their MMC controllers actually use the double-rate PLL6/PERIPH0 clock as their parent input clock. This is interestingly enough compensated by a hidden "by 2" post-divider in the mod clock, so the divider and actual output rate stay the same. Even though for the H6 and H616 (but only for them!) we use the doubled input clock for the divider computation, we never accounted for the implicit post-divider, so the clock was only half the speed on those SoCs. This didn't really matter so far, as our slow MMIO routine limits the transfer speed anyway, but we will fix this soon. Clean up the code around that selection, to always use the normal PLL6 (PERIPH0(1x)) clock as an input. As the rate and divider are the same, that makes no difference. Explain the hardware differences in a comment. Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
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ca496baf |
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29-Apr-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Fix warnings with CONFIG_PHYS_64BIT When enabling PHYS_64BIT on 32-bit platforms, we get two warnings about pointer casts in sunxi_mmc.c. Those are related to MMIO addresses, which are always below 1GB on all Allwinner SoCs, so there is no problem with anything having more than 32 bits. Add the proper casts to make it compile cleanly. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> |
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f4826fb1 |
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18-Dec-2020 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Avoid #ifdefs in delay and width setup The delay and bus-width setup are slightly different across the Allwinner SoC generations, and we covered this so far with some preprocessor conditionals. Use the more readable IS_ENABLE() instead. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> |
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0237b304 |
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11-Jan-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Refactor mod clock register offset So far the only difference between the various Allwinner MMC controller we are concerned about is the mod clock register offset. This is actually not directly related to the MMC controller IP, but an integration choice, dependent on the SoC this appears in. To avoid becoming trapped with some compatible fallback strings, let's remove the whole struct sunxi_mmc_variant, and replace this with a SoC based choice, which we can derive from the CONFIG_MACH_SUNx_y symbols. This will later simplify H616 support. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> |
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aaebb900 |
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11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@siol.net> |
mmc: sunxi: Replace H6 ifdefs with H6 gen macro It turns out that several SoCs share same mmc configuration as H6. In order to lower ifdef clutter replace H6 specific macro with common one. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
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c69cda25 |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org> |
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caa4daa2 |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org> |
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41575d8e |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org> |
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c05ed00a |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
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f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
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4233698d |
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18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com> |
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c57572eb |
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29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
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3c8c7da6 |
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21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> |
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9e233382 |
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29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
a1925a64 |
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29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
e8f37f42 |
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09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime |
#
0e21a2ff |
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09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
629d267a |
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09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic |
#
2a8882ec |
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09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic |
#
20940ef2 |
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05-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
mmc: sunxi: add support for automatic delay calibration A64 and H6 support automatic delay calibration and Linux driver uses it instead of hardcoded delays. Add support for it to u-boot driver. Fixes eMMC instability on Pinebook Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Tested-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Cc: Vagrant Cascadian <vagrant@debian.org> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
42956f1b |
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21-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: add MMC support for H6 The Allwinner H6 SoC has 3 MMC controllers like the ones in A64, with the MMC2 come with the capability to do crypto by EMCE. Add MMC support for H6. EMCE support is not added yet. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> |
#
979b239b |
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29-Jun-2018 |
Adam Sampson <ats@offog.org> |
dm: mmc: sunxi: Add A10/A20 compatible strings Commit dd27918c2252 ("dm: mmc: sunxi: Add support for driver model") only added the allwinner,sun5i-a13-mmc compatible string for this driver. The DM initialisation code here also works with (at least) A10 and A20, so add the appropriate compatible strings as per Linux 4.17's driver. Tested on A10 Cubieboard and A20 pcDuino3 Nano with CONFIG_DM_MMC. (A20 worked already, because sun7i-a20.dtsi specifies both the A13 and A20 strings.) Signed-off-by: Adam Sampson <ats@offog.org> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jteki@openedev.com> |
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83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
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5ff8e548 |
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20-Mar-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
sunxi: improve throughput in the sunxi_mmc driver Throughput tests have shown the sunxi_mmc driver to take over 10s to read 10MB from a fast eMMC device due to excessive delays in polling loops. This commit restructures the main polling loops to use get_timer(...) to determine whether a (millisecond) timeout has expired. We choose not to use the wait_bit function, as we don't need interruptability with ctrl-c and have at least one case where two bits (one for an error condition and another one for completion) need to be read and using wait_bit would have not added to the clarity. The observed speedup in testing on a A31 is greater than 10x (e.g. a 10MB write decreases from 9.302s to 0.884s). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Tested-by: Mylène Josserand <mylene.josserand@bootlin.com> Acked-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
4744d81c |
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27-Mar-2018 |
Stefan Mavrodiev <stefan@olimex.com> |
sunxi: mmc: Fix phase delays U-boot driver for sunxi-mmc uses PLL6, unlike linux kernel where PLL5 is used, with clock rates respectively 600MHz and 768MHz. Thus there are different phase degree steps - 24 for the kernel and 30 for u-boot. In the kernel driver the phase is set 90 deg for output and 120 for sample. Dividing by 30 will result values 3 and 4. Those are the values set in the u-boot driver. However, the condition defining delays is wrong. MMC core driver requests clock of 52MHz, sunxi-driver sets clock of 50MHz, but phase is set 30 deg for output and 120 deg for sample. Apparently this works for most cards. On A20-SOM204-EVB-eMMC there is eMMC card (KLMAG2GEND) which complains about it. Maybe there is other boards with similar problem? So the fix is to match delays for both u-boot and kernel. Signed-off-by: Stefan Mavrodiev <stefan@olimex.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
8be4e61d |
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01-Feb-2018 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
mmc: sunxi: support cd-inverted With CONFIG_DM_MMC the BananaPi does not detect SD cards. The sunxi device trees use the cd-inverted property to indicate that the card detect is inverted. This property is documented in Linux kernel devicetree/bindings/mmc/mmc.txt The property is not marked as deprecated. A similar patch was posted by Tuomas but is in status "Changes Requested". https://patchwork.ozlabs.org/patch/850377/ This patch is a stripped down version of his patch. Suggested-by: Tuomas Tynkkynen <tuomas@tuxera.com> Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
8a647fc3 |
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31-Aug-2017 |
Chen-Yu Tsai <wens@csie.org> |
mmc: sunxi: Only update timing mode bit when enabling new timing mode When enabling the new mmc timing mode, we inadvertently clear all the remaining bits in the new timing mode register. The bits cleared include a default phase delay on the output clock. The BSP kernel states that the default values are supposed to be used. Clearing them results in decreased performance or transfer errors on some boards. Fixes: de9b1771c3b6 ("mmc: sunxi: Support new mode") Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
ead3697d |
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23-Aug-2017 |
Maxime Ripard <maxime.ripard@free-electrons.com> |
mmc: sunxi: fix legacy MMC initialisation The driver-model rework changed, among other things, the way the private data were moved around. It now uses the private field in the struct mmc. However, the mmc_create argument was changed in the process to always pass the array we used to have to store our private structures. The basically means that all the MMC driver instances will now have the private data of the first instance, which obviously doesn't work very well. Pass the proper pointer to mmc_create. Fixes: 034e226bc77e ("dm: mmc: sunxi: Pass private data around explicitly") Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Tested-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
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de9b1771 |
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22-Aug-2017 |
Maxime Ripard <maxime.ripard@free-electrons.com> |
mmc: sunxi: Support new mode Almost all of the newer Allwinner SoCs have a new operating mode for the eMMC clocks that needs to be enabled in both the clock and the MMC controller. Details about that mode are sparse, and the name itself (new mode vs old mode) doesn't give much details, but it seems that the it changes the sampling of the MMC clock. One side effect is also that it divides the parent clock rate by 2. Add support for it through a Kconfig option. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
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dd27918c |
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04-Jul-2017 |
Simon Glass <sjg@chromium.org> |
dm: mmc: sunxi: Add support for driver model Add a driver-model version of this driver which mostly uses the existing code. The old code can be removed once all boards are switched over. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
ec73d960 |
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04-Jul-2017 |
Simon Glass <sjg@chromium.org> |
dm: mmc: sunxi: Drop mmc_clk_io_on() This function has #ifdefs in it which we want to avoid for driver model. Instead we should use different compatible strings and the .data field. It also uses the MMC device number which is not available in driver model except through aliases. Move the function's into its caller so that the driver-model version can do things its own way. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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034e226b |
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04-Jul-2017 |
Simon Glass <sjg@chromium.org> |
dm: mmc: sunxi: Pass private data around explicitly At present the driver-private data is obtained in various functions by various means. With driver model this is provided automatically. Without driver model it comes from a C array declared at the top of the file. Adjust internal functions so that they are passed the private data as a parameter, allowing the caller to obtain it using either means. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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3f5af12a |
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04-Jul-2017 |
Simon Glass <sjg@chromium.org> |
dm: mmc: sunxi: Rename mmchost to priv Use the driver-model naming convention for this structure. It is data private to the driver so the local variable should be called 'priv'. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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e3c794e2 |
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04-Jul-2017 |
Simon Glass <sjg@chromium.org> |
dm: mmc: sunxi: Rename struct sunxi_mmc_host to sunxi_mmc_priv Use the driver-model naming convention for this structure. It is data private to the driver. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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07b0b9c0 |
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29-Dec-2016 |
Jaehoon Chung <jh80.chung@samsung.com> |
mmc: change the set_ios return type from void to int To maintain consistency, set_ios type of legacy mmc_ops changed to int. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> |
#
fb013184 |
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04-Nov-2016 |
Maxime Ripard <maxime.ripard@free-electrons.com> |
mmc: sunxi: Enable 8bits bus width for sun8i The sun8i SoCs also have a 8 bits capable MMC2 controller. Enable the support for those too. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Hans de Goede <hdegoede@redhat.com> |
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915ffa52 |
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19-Jul-2016 |
Jaehoon Chung <jh80.chung@samsung.com> |
mmc: use the generic error number Use the generic error number instead of specific error number. If use the generic error number, it can debug more easier. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Minkyu Kang <mk7.kang@samsung.com> |
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ef36d9ae |
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09-Jul-2016 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Use BROM stored boot_media value to determine our boot-source Now that we know that the BROM stores a value indicating the boot-source at the beginning of SRAM, use that instead of trying to recreate the BROM's boot probing. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
26c0c157 |
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07-Jul-2016 |
Tobias Doerffel <tobias.doerffel@ed-chemnitz.de> |
sunxi: mmc: increase status register polling rate for data transfers With a recent bunch of SD3.0 cards in our A20-based board we experienced data transfer rates of about 250 KiB/s instead of 10 MiB/s with previous cards from the same vendor (both 4 GB/class 10). By increasing status register polling rate from 1 kHz to 1 MHz we were able to reach the original transfer rates again. With the old cards we now even reach about 16 MiB/s. Signed-off-by: Tobias Doerffel <tobias.doerffel@ed-chemnitz.de> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
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d96ebc46 |
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29-Mar-2016 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: Add support for Allwinner A64 SoCs The Allwinner A64 SoC is used in the Pine64. This patch adds all bits necessary to compile U-Boot for it running in AArch64 mode. Unfortunately SPL is not ready yet due to legal problems, so we need to boot using the binary boot0 for now. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> [agraf: remove SPL code, move to AArch64] Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
0ea5a04f |
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29-Mar-2016 |
Alexander Graf <agraf@csgraf.de> |
sunxi: Explicitly cast u32 pointer conversions Some parts of the sunxi code cast explicitly between u32 values and pointers. This is not a problem in practice, because all 64bit SoCs today only use the lower 32 bits for their phyical address space. But we need to make sure that the compiler is sure this is not an accident as well. Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
7c4213f6 |
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07-Dec-2015 |
Stephen Warren <swarren@nvidia.com> |
block: pass block dev not num to read/write/erase() This will allow the implementation to make use of data in the block_dev structure beyond the base device number. This will be useful so that eMMC block devices can encompass the HW partition ID rather than treating this out-of-band. Equally, the existence of the priv field is crying out for this patch to exist. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
be90974c |
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23-Sep-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Fix clk-delay settings In recent allwinner kernel sources the mmc/sdio clk-delay settings have been slightly tweaked, and for sun9i they are completely different then what we are using. This commit brings us in sync with what allwinner does, fixing problems accessing sdcards on some A33 devices (and likely others). For pre sun9i hardware this makes the following changes: -At 400Khz change the sample delay from 7 to 0 (first introduced in A31 sdk) -At 50 Mhz change the sample delay from 5 to 4 (first introduced in A23 sdk) -Above 50 MHz change the out delay from 2 to 1 (first introduced in A20 sdk) Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
28f69b9a |
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29-Aug-2015 |
Yousong Zhou <yszhou4tech@gmail.com> |
sunxi: mmc: set transfer timeout according to byte_cnt. Originally a timeout value of 2 seconds was used regardless of the size of data to be transfered. This prevented slow devices from working correctly while there was no much gain for faster devices, e.g. it takes 3708ms for a transfer of uImage of size 1899008 bytes. Signed-off-by: Yousong Zhou <yszhou4tech@gmail.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
645c48f5 |
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29-May-2015 |
Daniel Kochmański <dkochmanski@turtle-solutions.eu> |
sunxi: Create helper function veryfing valid boot signature on MMC This patch extracts checking for valid SD card "eGON.BT0" signature from `board_mmc_init` into function `sunxi_mmc_has_egon_boot_signature`. Buffer for mmc sector is allocated and freed at runtime. `panic` is triggered on malloc failure. Signed-off-by: Daniel Kochmański <dkochmanski@turtle-solutions.eu> CC: Roy Spliet <r.spliet@ultimaker.com> Cc: Ian Campbell <ijc@hellion.org.uk> [hdegoede@redhat.com: Small bugfix to make it work for devs other then mmc0] Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
1c09fa38 |
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30-May-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Enable pull-up on card-detect gpio pin On some boards we need to enable the internal pull-up te reliable detect that no card is inserted. Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
ff7e9cfc |
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05-May-2015 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-mmc
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#
5a20397b |
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23-Mar-2015 |
Rob Herring <robh@kernel.org> |
mmc: remove the MMC_MODE_HC flag High capacity support is not a host capability, but a device capability that is queried via the OCR. The flag in the operating conditions request argument can just be set unconditionally. This matches the Linux implementation. [panto] Hand merged and renumbering MMC_MODE_DDR_52MHz. Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com> Cc: Pantelis Antoniou <pantelis.antoniou@konsulko.com> |
#
90641f82 |
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22-Apr-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Fix card-detect gpio handling to work with the driver-model The driver-model gpio functions may return another value then -1 as error, make the sunxi mmc code properly handle this. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
44d8ae5b |
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06-Apr-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Introduce a hidden SUNXI_GEN_SUNxI Kconfig bool sun6i and newer (derived) SoCs such as the sun8i-a23, sun8i-a33 and sun9i have a various things in common, like having separate ahb reset control registers, the SID living inside the pmic, custom pmic busses, new style watchdog, etc. This commit introduces a new hidden SUNXI_GEN_SUN6I Kconfig bool which can be used to check for these features avoiding the need for an ever growing list of "#if defined CONFIG_MACH_SUN?I" conditionals as we add support for more "new style" sunxi SoCs. Note that this commit changes the behavior of the gmac and hdmi code for sun8i and the upcoming sun9i devices. This does not matter as sun8i does not have gmac nor hdmi, and sun9i has new hardware-blocks for these so the old code will not work there. Also this is intentional as if a sun8i / sun9i variant which does use the old hwblocks shows up then the GEN_SUN6I code paths will be the right ones to use. For completeness this also adds a SUNXI_GEN_SUN4I bool for A10/A13/A20. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
1de32b8a |
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19-Feb-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Always declare High Capacity capability High Capacity (e)MMC cards work fine on sun4i / sun5i, and not having this capability set causes u-boot to not recognize the eMMC on an Utoo P66 A13 tablet, so always set it thereby fixing this. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
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5abdb156 |
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31-Jan-2015 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: mmc: Add 'sunxi_' prefix to the static functions This results in a much more readable callgraph, because now they can't be confused with the function having exactly the same name in the generic mmc code. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
daf22636 |
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14-Jan-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Add support for sun9i (A80) The clocks on the A80 are hooked up slightly different, add support for this. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
5b8d7fb4 |
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15-Jan-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Use a realistic timeout when sending a mmc command Wait 1 second for the sdcard to respond, rather then waiting for 0xfffff milliseconds. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
b0c4ae1a |
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19-Dec-2014 |
Axel Lin <axel.lin@ingics.com> |
mmc: sunxi: Fix misuse of gpio_direction_input() It does not make sense to make gpio_direction_input() return the gpio input status. The return value of gpio_direction_input() is inconsistent if CONFIG_DM_GPIO is defined. And we don't need to call gpio_direction_input() int sunxi_mmc_getcd(). Just init the gpio once in mmc_resource_init() is enough. Signed-off-by: Axel Lin <axel.lin@ingics.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Ian Campbell <ijc@hellion.org.uk> |
#
fc3a8325 |
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07-Dec-2014 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Properly setup mod-clk and clock sampling phases The sunxi mmc controller has both an internal clock divider, as well as the divider in the mod0-clk for the mmc controller. The internal divider cannot be used, as it conflicts with the setting of clock sampling phases which is done in the mod0-clk, so it must be set to 0 (divide by 1). For some reason while the kernel has had this correct from day one, the u-boot sunxi mmc code has been using a fixed mod0-clk and setting its internal divider depending on the desired speed. This is something which we've inherited from the original Allwinner u-boot sources, but while this has been fixed in Allwinner's own u-boot code at least for the A23 and later upstream u-boot was still doing this wrong. This commit fixes this, thereby also fixing mmc support not working reliable on the A23 (which seems more sensitive to this) and possible also fixes some other sunxi mmc issues. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
967325fe |
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31-Oct-2014 |
Hans de Goede <hdegoede@redhat.com> |
dm: sunxi: Request card detect gpio This is necessary for the device-model enabled builds to work properly. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Simon Glass <sjg@chromium.org> |
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ed41e62f |
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24-Oct-2014 |
Ian Campbell <ijc@hellion.org.uk> |
sunxi: Use CONFIG_MACH_SUN?I from Kconfig instead of CONFIG_SUN?I Mostly automatic with: sed -i -e 's/CONFIG_\(SUN[45678]I\)/CONFIG_MACH_\1/g' $(git grep -l CONFIG_SUN[45678]I) followed by removing the relevant #defines from include/configs/sun?i.h by hand. Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
e637b30b |
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22-Oct-2014 |
Chen-Yu Tsai <wens@csie.org> |
mmc: sunxi: Add support for sun8i (A23) The Allwinner A23 SoC has reset controls like the A31 (sun6i). The FIFO address is also the same as sun6i. Re-use code added for sun6i. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
e79c7c88 |
|
02-Oct-2014 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: When we've both mmc0 and mmc2, detect from which one we're booting sunxi SOCs can boot from both mmc0 and mmc2, detect from which one we're booting, and make that one "mmc dev 0" so that a single u-boot binary can be used for both the onboard eMMC and for external sdcards. When we're booting from mmc2, we make it dev 0 because that is where the SPL will load the tertiary payload (the actual u-boot binary in our case) from, see: common/spl/spl_mmc.c, which has dev 0 hardcoded everywhere. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
cd82113a |
|
02-Oct-2014 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Add mmc card-detect functionality Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
1d1bd42e |
|
03-Oct-2014 |
Hans de Goede <hdegoede@redhat.com> |
ARM: sunxi-mmc: Add mmc support for sun6i / A31 The mmc hardware on sun6i has an extra reset control that needs to be de-asserted prior to usage. Also the FIFO address is different. Signed-off-by: Hans de Goede <hdegoede@redhat.com> [wens@csie.org: use setbits_le32 for reset control, drop obsolete changes, rewrite different FIFO address handling, add commit message] Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
a3e8c220 |
|
22-Sep-2014 |
Wills Wang <wills.wang.open@gmail.com> |
mmc: sunxi: add SDHC support for sun6i/sun7i/sun8i Allwinner A20/A23/A31's SD/MMC host support SDHC High Capacity feature. Signed-off-by: Wills Wang <wills.wang.open@gmail.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
b6ae6765 |
|
09-Jun-2014 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Remove mmc DMA support The DMA code in sunxi_mmc.c is broken. mmc_trans_data_by_dma() allocates the dma descriptors on the stack, and then exits while the dma transfer is in progress, so the dma engine is reading stack memory which at that point may be re-used. So far we've gotten away with this by luck, but recent u-boot changes have shifted the stack start address by 16 bytes, which combined with dma alignment now exposes this problem. Since we end up just busy waiting for the dma engine anyway, this commit fixes things by simply removing the dma code, resulting in smaller bug-free code. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
#
e24ea55c |
|
05-May-2014 |
Ian Campbell <ijc@hellion.org.uk> |
sunxi: mmc support On Mon, 2014-05-05 at 14:18 +0200, Stefan Roese wrote: > > + case 1: > > +#if CONFIG_MMC1_PG > Are you sure that this is correct and shouldn't be: > > +#ifdef CONFIG_MMC1_PG > > ? It's "correct" in so far as it works (the boards.cfg config stuff #defines things to 1), but I think you are right that it isn't the preferred style. But... > A quick scan through this patch series shows that this define > is not set at all. Perhaps its outdated? Or is it used to support > some other sunxi SoC? Not sure, perhaps it should be removed for > now. ...I had thought that it was to support some other board which wasn't being upstreamed right now, so eventually useful and harmless for now, but I've just checked and it isn't actually used by any of the boards in u-boot-sunxi.git. So rather than fix it to use #ifdef lets drop it. Rather than resend the entire series, here is v5.1 of this patch. > Other than this please add my: > > Reviewed-by: Stefan Roese <sr@denx.de> Thanks! 8<--------------------------------- >From 20704e35a41664de5f516ed0e02981ac06085102 Mon Sep 17 00:00:00 2001 From: Ian Campbell <ijc@hellion.org.uk> Date: Fri, 7 Mar 2014 04:29:39 +0000 Subject: [PATCH v5.1 7/8] sunxi: mmc support This adds support for the MMC controller on the Allwinner A20 (sun7i) processor. Signed-off-by: Henrik Nordstrom <henrik@henriknordstrom.net> Signed-off-by: Luke Leighton <lkcl@lkcl.net> Signed-off-by: Oliver Schinagl <oliver@schinagl.nl> Signed-off-by: Wills Wang <wills.wang.open@gmail.com> Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Stefan Roese <sr@denx.de> Cc: Tom Cubie <Mr.hipboi@gmail.com> Cc: Aaron Maoye <leafy.myeh@allwinnertech.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Reviewed-by: Tom Rini <trini@ti.com> |
#
0237b304 |
|
11-Jan-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Refactor mod clock register offset So far the only difference between the various Allwinner MMC controller we are concerned about is the mod clock register offset. This is actually not directly related to the MMC controller IP, but an integration choice, dependent on the SoC this appears in. To avoid becoming trapped with some compatible fallback strings, let's remove the whole struct sunxi_mmc_variant, and replace this with a SoC based choice, which we can derive from the CONFIG_MACH_SUNx_y symbols. This will later simplify H616 support. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
|
#
aaebb900 |
|
11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@siol.net> |
mmc: sunxi: Replace H6 ifdefs with H6 gen macro It turns out that several SoCs share same mmc configuration as H6. In order to lower ifdef clutter replace H6 specific macro with common one. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
c69cda25 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
caa4daa2 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
41575d8e |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
0237b304 |
|
11-Jan-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Refactor mod clock register offset So far the only difference between the various Allwinner MMC controller we are concerned about is the mod clock register offset. This is actually not directly related to the MMC controller IP, but an integration choice, dependent on the SoC this appears in. To avoid becoming trapped with some compatible fallback strings, let's remove the whole struct sunxi_mmc_variant, and replace this with a SoC based choice, which we can derive from the CONFIG_MACH_SUNx_y symbols. This will later simplify H616 support. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
|
#
aaebb900 |
|
11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@siol.net> |
mmc: sunxi: Replace H6 ifdefs with H6 gen macro It turns out that several SoCs share same mmc configuration as H6. In order to lower ifdef clutter replace H6 specific macro with common one. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
c69cda25 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
caa4daa2 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
41575d8e |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
0237b304 |
|
11-Jan-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Refactor mod clock register offset So far the only difference between the various Allwinner MMC controller we are concerned about is the mod clock register offset. This is actually not directly related to the MMC controller IP, but an integration choice, dependent on the SoC this appears in. To avoid becoming trapped with some compatible fallback strings, let's remove the whole struct sunxi_mmc_variant, and replace this with a SoC based choice, which we can derive from the CONFIG_MACH_SUNx_y symbols. This will later simplify H616 support. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
|
#
aaebb900 |
|
11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@siol.net> |
mmc: sunxi: Replace H6 ifdefs with H6 gen macro It turns out that several SoCs share same mmc configuration as H6. In order to lower ifdef clutter replace H6 specific macro with common one. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
c69cda25 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
caa4daa2 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
41575d8e |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
0237b304 |
|
11-Jan-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Refactor mod clock register offset So far the only difference between the various Allwinner MMC controller we are concerned about is the mod clock register offset. This is actually not directly related to the MMC controller IP, but an integration choice, dependent on the SoC this appears in. To avoid becoming trapped with some compatible fallback strings, let's remove the whole struct sunxi_mmc_variant, and replace this with a SoC based choice, which we can derive from the CONFIG_MACH_SUNx_y symbols. This will later simplify H616 support. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
|
#
aaebb900 |
|
11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@siol.net> |
mmc: sunxi: Replace H6 ifdefs with H6 gen macro It turns out that several SoCs share same mmc configuration as H6. In order to lower ifdef clutter replace H6 specific macro with common one. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
c69cda25 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
caa4daa2 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
41575d8e |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
0237b304 |
|
11-Jan-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Refactor mod clock register offset So far the only difference between the various Allwinner MMC controller we are concerned about is the mod clock register offset. This is actually not directly related to the MMC controller IP, but an integration choice, dependent on the SoC this appears in. To avoid becoming trapped with some compatible fallback strings, let's remove the whole struct sunxi_mmc_variant, and replace this with a SoC based choice, which we can derive from the CONFIG_MACH_SUNx_y symbols. This will later simplify H616 support. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
|
#
aaebb900 |
|
11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@siol.net> |
mmc: sunxi: Replace H6 ifdefs with H6 gen macro It turns out that several SoCs share same mmc configuration as H6. In order to lower ifdef clutter replace H6 specific macro with common one. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
c69cda25 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
caa4daa2 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
41575d8e |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
0237b304 |
|
11-Jan-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Refactor mod clock register offset So far the only difference between the various Allwinner MMC controller we are concerned about is the mod clock register offset. This is actually not directly related to the MMC controller IP, but an integration choice, dependent on the SoC this appears in. To avoid becoming trapped with some compatible fallback strings, let's remove the whole struct sunxi_mmc_variant, and replace this with a SoC based choice, which we can derive from the CONFIG_MACH_SUNx_y symbols. This will later simplify H616 support. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
|
#
aaebb900 |
|
11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@siol.net> |
mmc: sunxi: Replace H6 ifdefs with H6 gen macro It turns out that several SoCs share same mmc configuration as H6. In order to lower ifdef clutter replace H6 specific macro with common one. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
c69cda25 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
caa4daa2 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
41575d8e |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
0237b304 |
|
11-Jan-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Refactor mod clock register offset So far the only difference between the various Allwinner MMC controller we are concerned about is the mod clock register offset. This is actually not directly related to the MMC controller IP, but an integration choice, dependent on the SoC this appears in. To avoid becoming trapped with some compatible fallback strings, let's remove the whole struct sunxi_mmc_variant, and replace this with a SoC based choice, which we can derive from the CONFIG_MACH_SUNx_y symbols. This will later simplify H616 support. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
|
#
aaebb900 |
|
11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@siol.net> |
mmc: sunxi: Replace H6 ifdefs with H6 gen macro It turns out that several SoCs share same mmc configuration as H6. In order to lower ifdef clutter replace H6 specific macro with common one. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
c69cda25 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
caa4daa2 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
41575d8e |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
0237b304 |
|
11-Jan-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Refactor mod clock register offset So far the only difference between the various Allwinner MMC controller we are concerned about is the mod clock register offset. This is actually not directly related to the MMC controller IP, but an integration choice, dependent on the SoC this appears in. To avoid becoming trapped with some compatible fallback strings, let's remove the whole struct sunxi_mmc_variant, and replace this with a SoC based choice, which we can derive from the CONFIG_MACH_SUNx_y symbols. This will later simplify H616 support. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
|
#
aaebb900 |
|
11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@siol.net> |
mmc: sunxi: Replace H6 ifdefs with H6 gen macro It turns out that several SoCs share same mmc configuration as H6. In order to lower ifdef clutter replace H6 specific macro with common one. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
c69cda25 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
caa4daa2 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
41575d8e |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
0237b304 |
|
11-Jan-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Refactor mod clock register offset So far the only difference between the various Allwinner MMC controller we are concerned about is the mod clock register offset. This is actually not directly related to the MMC controller IP, but an integration choice, dependent on the SoC this appears in. To avoid becoming trapped with some compatible fallback strings, let's remove the whole struct sunxi_mmc_variant, and replace this with a SoC based choice, which we can derive from the CONFIG_MACH_SUNx_y symbols. This will later simplify H616 support. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
|
#
aaebb900 |
|
11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@siol.net> |
mmc: sunxi: Replace H6 ifdefs with H6 gen macro It turns out that several SoCs share same mmc configuration as H6. In order to lower ifdef clutter replace H6 specific macro with common one. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
c69cda25 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
caa4daa2 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
41575d8e |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
0237b304 |
|
11-Jan-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Refactor mod clock register offset So far the only difference between the various Allwinner MMC controller we are concerned about is the mod clock register offset. This is actually not directly related to the MMC controller IP, but an integration choice, dependent on the SoC this appears in. To avoid becoming trapped with some compatible fallback strings, let's remove the whole struct sunxi_mmc_variant, and replace this with a SoC based choice, which we can derive from the CONFIG_MACH_SUNx_y symbols. This will later simplify H616 support. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
|
#
aaebb900 |
|
11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@siol.net> |
mmc: sunxi: Replace H6 ifdefs with H6 gen macro It turns out that several SoCs share same mmc configuration as H6. In order to lower ifdef clutter replace H6 specific macro with common one. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
c69cda25 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
caa4daa2 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
41575d8e |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
0237b304 |
|
11-Jan-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Refactor mod clock register offset So far the only difference between the various Allwinner MMC controller we are concerned about is the mod clock register offset. This is actually not directly related to the MMC controller IP, but an integration choice, dependent on the SoC this appears in. To avoid becoming trapped with some compatible fallback strings, let's remove the whole struct sunxi_mmc_variant, and replace this with a SoC based choice, which we can derive from the CONFIG_MACH_SUNx_y symbols. This will later simplify H616 support. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
|
#
aaebb900 |
|
11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@siol.net> |
mmc: sunxi: Replace H6 ifdefs with H6 gen macro It turns out that several SoCs share same mmc configuration as H6. In order to lower ifdef clutter replace H6 specific macro with common one. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
c69cda25 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
caa4daa2 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
41575d8e |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
0237b304 |
|
11-Jan-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Refactor mod clock register offset So far the only difference between the various Allwinner MMC controller we are concerned about is the mod clock register offset. This is actually not directly related to the MMC controller IP, but an integration choice, dependent on the SoC this appears in. To avoid becoming trapped with some compatible fallback strings, let's remove the whole struct sunxi_mmc_variant, and replace this with a SoC based choice, which we can derive from the CONFIG_MACH_SUNx_y symbols. This will later simplify H616 support. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
|
#
aaebb900 |
|
11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@siol.net> |
mmc: sunxi: Replace H6 ifdefs with H6 gen macro It turns out that several SoCs share same mmc configuration as H6. In order to lower ifdef clutter replace H6 specific macro with common one. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
c69cda25 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
caa4daa2 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
41575d8e |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
0237b304 |
|
11-Jan-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Refactor mod clock register offset So far the only difference between the various Allwinner MMC controller we are concerned about is the mod clock register offset. This is actually not directly related to the MMC controller IP, but an integration choice, dependent on the SoC this appears in. To avoid becoming trapped with some compatible fallback strings, let's remove the whole struct sunxi_mmc_variant, and replace this with a SoC based choice, which we can derive from the CONFIG_MACH_SUNx_y symbols. This will later simplify H616 support. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
|
#
aaebb900 |
|
11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@siol.net> |
mmc: sunxi: Replace H6 ifdefs with H6 gen macro It turns out that several SoCs share same mmc configuration as H6. In order to lower ifdef clutter replace H6 specific macro with common one. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
c69cda25 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
caa4daa2 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
41575d8e |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
0237b304 |
|
11-Jan-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Refactor mod clock register offset So far the only difference between the various Allwinner MMC controller we are concerned about is the mod clock register offset. This is actually not directly related to the MMC controller IP, but an integration choice, dependent on the SoC this appears in. To avoid becoming trapped with some compatible fallback strings, let's remove the whole struct sunxi_mmc_variant, and replace this with a SoC based choice, which we can derive from the CONFIG_MACH_SUNx_y symbols. This will later simplify H616 support. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
|
#
aaebb900 |
|
11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@siol.net> |
mmc: sunxi: Replace H6 ifdefs with H6 gen macro It turns out that several SoCs share same mmc configuration as H6. In order to lower ifdef clutter replace H6 specific macro with common one. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
c69cda25 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
caa4daa2 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
41575d8e |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
0237b304 |
|
11-Jan-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Refactor mod clock register offset So far the only difference between the various Allwinner MMC controller we are concerned about is the mod clock register offset. This is actually not directly related to the MMC controller IP, but an integration choice, dependent on the SoC this appears in. To avoid becoming trapped with some compatible fallback strings, let's remove the whole struct sunxi_mmc_variant, and replace this with a SoC based choice, which we can derive from the CONFIG_MACH_SUNx_y symbols. This will later simplify H616 support. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
|
#
aaebb900 |
|
11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@siol.net> |
mmc: sunxi: Replace H6 ifdefs with H6 gen macro It turns out that several SoCs share same mmc configuration as H6. In order to lower ifdef clutter replace H6 specific macro with common one. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
c69cda25 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
caa4daa2 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
41575d8e |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
0237b304 |
|
11-Jan-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Refactor mod clock register offset So far the only difference between the various Allwinner MMC controller we are concerned about is the mod clock register offset. This is actually not directly related to the MMC controller IP, but an integration choice, dependent on the SoC this appears in. To avoid becoming trapped with some compatible fallback strings, let's remove the whole struct sunxi_mmc_variant, and replace this with a SoC based choice, which we can derive from the CONFIG_MACH_SUNx_y symbols. This will later simplify H616 support. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
|
#
aaebb900 |
|
11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@siol.net> |
mmc: sunxi: Replace H6 ifdefs with H6 gen macro It turns out that several SoCs share same mmc configuration as H6. In order to lower ifdef clutter replace H6 specific macro with common one. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
c69cda25 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
caa4daa2 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
41575d8e |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
0237b304 |
|
11-Jan-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Refactor mod clock register offset So far the only difference between the various Allwinner MMC controller we are concerned about is the mod clock register offset. This is actually not directly related to the MMC controller IP, but an integration choice, dependent on the SoC this appears in. To avoid becoming trapped with some compatible fallback strings, let's remove the whole struct sunxi_mmc_variant, and replace this with a SoC based choice, which we can derive from the CONFIG_MACH_SUNx_y symbols. This will later simplify H616 support. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
|
#
aaebb900 |
|
11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@siol.net> |
mmc: sunxi: Replace H6 ifdefs with H6 gen macro It turns out that several SoCs share same mmc configuration as H6. In order to lower ifdef clutter replace H6 specific macro with common one. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
c69cda25 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
caa4daa2 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
41575d8e |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
0237b304 |
|
11-Jan-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Refactor mod clock register offset So far the only difference between the various Allwinner MMC controller we are concerned about is the mod clock register offset. This is actually not directly related to the MMC controller IP, but an integration choice, dependent on the SoC this appears in. To avoid becoming trapped with some compatible fallback strings, let's remove the whole struct sunxi_mmc_variant, and replace this with a SoC based choice, which we can derive from the CONFIG_MACH_SUNx_y symbols. This will later simplify H616 support. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
|
#
aaebb900 |
|
11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@siol.net> |
mmc: sunxi: Replace H6 ifdefs with H6 gen macro It turns out that several SoCs share same mmc configuration as H6. In order to lower ifdef clutter replace H6 specific macro with common one. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
c69cda25 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
caa4daa2 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
41575d8e |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
0237b304 |
|
11-Jan-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Refactor mod clock register offset So far the only difference between the various Allwinner MMC controller we are concerned about is the mod clock register offset. This is actually not directly related to the MMC controller IP, but an integration choice, dependent on the SoC this appears in. To avoid becoming trapped with some compatible fallback strings, let's remove the whole struct sunxi_mmc_variant, and replace this with a SoC based choice, which we can derive from the CONFIG_MACH_SUNx_y symbols. This will later simplify H616 support. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
|
#
aaebb900 |
|
11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@siol.net> |
mmc: sunxi: Replace H6 ifdefs with H6 gen macro It turns out that several SoCs share same mmc configuration as H6. In order to lower ifdef clutter replace H6 specific macro with common one. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
c69cda25 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
caa4daa2 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
41575d8e |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
0237b304 |
|
11-Jan-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Refactor mod clock register offset So far the only difference between the various Allwinner MMC controller we are concerned about is the mod clock register offset. This is actually not directly related to the MMC controller IP, but an integration choice, dependent on the SoC this appears in. To avoid becoming trapped with some compatible fallback strings, let's remove the whole struct sunxi_mmc_variant, and replace this with a SoC based choice, which we can derive from the CONFIG_MACH_SUNx_y symbols. This will later simplify H616 support. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
|
#
aaebb900 |
|
11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@siol.net> |
mmc: sunxi: Replace H6 ifdefs with H6 gen macro It turns out that several SoCs share same mmc configuration as H6. In order to lower ifdef clutter replace H6 specific macro with common one. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
c69cda25 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
caa4daa2 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
41575d8e |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
0237b304 |
|
11-Jan-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Refactor mod clock register offset So far the only difference between the various Allwinner MMC controller we are concerned about is the mod clock register offset. This is actually not directly related to the MMC controller IP, but an integration choice, dependent on the SoC this appears in. To avoid becoming trapped with some compatible fallback strings, let's remove the whole struct sunxi_mmc_variant, and replace this with a SoC based choice, which we can derive from the CONFIG_MACH_SUNx_y symbols. This will later simplify H616 support. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
|
#
aaebb900 |
|
11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@siol.net> |
mmc: sunxi: Replace H6 ifdefs with H6 gen macro It turns out that several SoCs share same mmc configuration as H6. In order to lower ifdef clutter replace H6 specific macro with common one. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
c69cda25 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
caa4daa2 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
41575d8e |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
0237b304 |
|
11-Jan-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Refactor mod clock register offset So far the only difference between the various Allwinner MMC controller we are concerned about is the mod clock register offset. This is actually not directly related to the MMC controller IP, but an integration choice, dependent on the SoC this appears in. To avoid becoming trapped with some compatible fallback strings, let's remove the whole struct sunxi_mmc_variant, and replace this with a SoC based choice, which we can derive from the CONFIG_MACH_SUNx_y symbols. This will later simplify H616 support. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
|
#
aaebb900 |
|
11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@siol.net> |
mmc: sunxi: Replace H6 ifdefs with H6 gen macro It turns out that several SoCs share same mmc configuration as H6. In order to lower ifdef clutter replace H6 specific macro with common one. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
c69cda25 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
caa4daa2 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
41575d8e |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
0237b304 |
|
11-Jan-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Refactor mod clock register offset So far the only difference between the various Allwinner MMC controller we are concerned about is the mod clock register offset. This is actually not directly related to the MMC controller IP, but an integration choice, dependent on the SoC this appears in. To avoid becoming trapped with some compatible fallback strings, let's remove the whole struct sunxi_mmc_variant, and replace this with a SoC based choice, which we can derive from the CONFIG_MACH_SUNx_y symbols. This will later simplify H616 support. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
|
#
aaebb900 |
|
11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@siol.net> |
mmc: sunxi: Replace H6 ifdefs with H6 gen macro It turns out that several SoCs share same mmc configuration as H6. In order to lower ifdef clutter replace H6 specific macro with common one. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
c69cda25 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
caa4daa2 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
41575d8e |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
0237b304 |
|
11-Jan-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Refactor mod clock register offset So far the only difference between the various Allwinner MMC controller we are concerned about is the mod clock register offset. This is actually not directly related to the MMC controller IP, but an integration choice, dependent on the SoC this appears in. To avoid becoming trapped with some compatible fallback strings, let's remove the whole struct sunxi_mmc_variant, and replace this with a SoC based choice, which we can derive from the CONFIG_MACH_SUNx_y symbols. This will later simplify H616 support. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
|
#
aaebb900 |
|
11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@siol.net> |
mmc: sunxi: Replace H6 ifdefs with H6 gen macro It turns out that several SoCs share same mmc configuration as H6. In order to lower ifdef clutter replace H6 specific macro with common one. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
c69cda25 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
caa4daa2 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
41575d8e |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
0237b304 |
|
11-Jan-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Refactor mod clock register offset So far the only difference between the various Allwinner MMC controller we are concerned about is the mod clock register offset. This is actually not directly related to the MMC controller IP, but an integration choice, dependent on the SoC this appears in. To avoid becoming trapped with some compatible fallback strings, let's remove the whole struct sunxi_mmc_variant, and replace this with a SoC based choice, which we can derive from the CONFIG_MACH_SUNx_y symbols. This will later simplify H616 support. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
|
#
aaebb900 |
|
11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@siol.net> |
mmc: sunxi: Replace H6 ifdefs with H6 gen macro It turns out that several SoCs share same mmc configuration as H6. In order to lower ifdef clutter replace H6 specific macro with common one. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
c69cda25 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
caa4daa2 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
41575d8e |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
0237b304 |
|
11-Jan-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Refactor mod clock register offset So far the only difference between the various Allwinner MMC controller we are concerned about is the mod clock register offset. This is actually not directly related to the MMC controller IP, but an integration choice, dependent on the SoC this appears in. To avoid becoming trapped with some compatible fallback strings, let's remove the whole struct sunxi_mmc_variant, and replace this with a SoC based choice, which we can derive from the CONFIG_MACH_SUNx_y symbols. This will later simplify H616 support. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
|
#
aaebb900 |
|
11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@siol.net> |
mmc: sunxi: Replace H6 ifdefs with H6 gen macro It turns out that several SoCs share same mmc configuration as H6. In order to lower ifdef clutter replace H6 specific macro with common one. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
c69cda25 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
caa4daa2 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
41575d8e |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
0237b304 |
|
11-Jan-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Refactor mod clock register offset So far the only difference between the various Allwinner MMC controller we are concerned about is the mod clock register offset. This is actually not directly related to the MMC controller IP, but an integration choice, dependent on the SoC this appears in. To avoid becoming trapped with some compatible fallback strings, let's remove the whole struct sunxi_mmc_variant, and replace this with a SoC based choice, which we can derive from the CONFIG_MACH_SUNx_y symbols. This will later simplify H616 support. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
|
#
aaebb900 |
|
11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@siol.net> |
mmc: sunxi: Replace H6 ifdefs with H6 gen macro It turns out that several SoCs share same mmc configuration as H6. In order to lower ifdef clutter replace H6 specific macro with common one. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
c69cda25 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
caa4daa2 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
41575d8e |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
0237b304 |
|
11-Jan-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Refactor mod clock register offset So far the only difference between the various Allwinner MMC controller we are concerned about is the mod clock register offset. This is actually not directly related to the MMC controller IP, but an integration choice, dependent on the SoC this appears in. To avoid becoming trapped with some compatible fallback strings, let's remove the whole struct sunxi_mmc_variant, and replace this with a SoC based choice, which we can derive from the CONFIG_MACH_SUNx_y symbols. This will later simplify H616 support. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
|
#
aaebb900 |
|
11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@siol.net> |
mmc: sunxi: Replace H6 ifdefs with H6 gen macro It turns out that several SoCs share same mmc configuration as H6. In order to lower ifdef clutter replace H6 specific macro with common one. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
c69cda25 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
caa4daa2 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
41575d8e |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
0237b304 |
|
11-Jan-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Refactor mod clock register offset So far the only difference between the various Allwinner MMC controller we are concerned about is the mod clock register offset. This is actually not directly related to the MMC controller IP, but an integration choice, dependent on the SoC this appears in. To avoid becoming trapped with some compatible fallback strings, let's remove the whole struct sunxi_mmc_variant, and replace this with a SoC based choice, which we can derive from the CONFIG_MACH_SUNx_y symbols. This will later simplify H616 support. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
|
#
aaebb900 |
|
11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@siol.net> |
mmc: sunxi: Replace H6 ifdefs with H6 gen macro It turns out that several SoCs share same mmc configuration as H6. In order to lower ifdef clutter replace H6 specific macro with common one. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
c69cda25 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
caa4daa2 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
41575d8e |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
0237b304 |
|
11-Jan-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Refactor mod clock register offset So far the only difference between the various Allwinner MMC controller we are concerned about is the mod clock register offset. This is actually not directly related to the MMC controller IP, but an integration choice, dependent on the SoC this appears in. To avoid becoming trapped with some compatible fallback strings, let's remove the whole struct sunxi_mmc_variant, and replace this with a SoC based choice, which we can derive from the CONFIG_MACH_SUNx_y symbols. This will later simplify H616 support. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
|
#
aaebb900 |
|
11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@siol.net> |
mmc: sunxi: Replace H6 ifdefs with H6 gen macro It turns out that several SoCs share same mmc configuration as H6. In order to lower ifdef clutter replace H6 specific macro with common one. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
c69cda25 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
caa4daa2 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
41575d8e |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
0237b304 |
|
11-Jan-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Refactor mod clock register offset So far the only difference between the various Allwinner MMC controller we are concerned about is the mod clock register offset. This is actually not directly related to the MMC controller IP, but an integration choice, dependent on the SoC this appears in. To avoid becoming trapped with some compatible fallback strings, let's remove the whole struct sunxi_mmc_variant, and replace this with a SoC based choice, which we can derive from the CONFIG_MACH_SUNx_y symbols. This will later simplify H616 support. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
|
#
aaebb900 |
|
11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@siol.net> |
mmc: sunxi: Replace H6 ifdefs with H6 gen macro It turns out that several SoCs share same mmc configuration as H6. In order to lower ifdef clutter replace H6 specific macro with common one. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
c69cda25 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
caa4daa2 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
41575d8e |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
0237b304 |
|
11-Jan-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Refactor mod clock register offset So far the only difference between the various Allwinner MMC controller we are concerned about is the mod clock register offset. This is actually not directly related to the MMC controller IP, but an integration choice, dependent on the SoC this appears in. To avoid becoming trapped with some compatible fallback strings, let's remove the whole struct sunxi_mmc_variant, and replace this with a SoC based choice, which we can derive from the CONFIG_MACH_SUNx_y symbols. This will later simplify H616 support. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
|
#
aaebb900 |
|
11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@siol.net> |
mmc: sunxi: Replace H6 ifdefs with H6 gen macro It turns out that several SoCs share same mmc configuration as H6. In order to lower ifdef clutter replace H6 specific macro with common one. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
c69cda25 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
caa4daa2 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
41575d8e |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
0237b304 |
|
11-Jan-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Refactor mod clock register offset So far the only difference between the various Allwinner MMC controller we are concerned about is the mod clock register offset. This is actually not directly related to the MMC controller IP, but an integration choice, dependent on the SoC this appears in. To avoid becoming trapped with some compatible fallback strings, let's remove the whole struct sunxi_mmc_variant, and replace this with a SoC based choice, which we can derive from the CONFIG_MACH_SUNx_y symbols. This will later simplify H616 support. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
|
#
aaebb900 |
|
11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@siol.net> |
mmc: sunxi: Replace H6 ifdefs with H6 gen macro It turns out that several SoCs share same mmc configuration as H6. In order to lower ifdef clutter replace H6 specific macro with common one. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
c69cda25 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
caa4daa2 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
41575d8e |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
0237b304 |
|
11-Jan-2021 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Refactor mod clock register offset So far the only difference between the various Allwinner MMC controller we are concerned about is the mod clock register offset. This is actually not directly related to the MMC controller IP, but an integration choice, dependent on the SoC this appears in. To avoid becoming trapped with some compatible fallback strings, let's remove the whole struct sunxi_mmc_variant, and replace this with a SoC based choice, which we can derive from the CONFIG_MACH_SUNx_y symbols. This will later simplify H616 support. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
|
#
aaebb900 |
|
11-Jan-2021 |
Jernej Skrabec <jernej.skrabec@siol.net> |
mmc: sunxi: Replace H6 ifdefs with H6 gen macro It turns out that several SoCs share same mmc configuration as H6. In order to lower ifdef clutter replace H6 specific macro with common one. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
c69cda25 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
caa4daa2 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
41575d8e |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c69cda25 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
caa4daa2 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
41575d8e |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c69cda25 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
caa4daa2 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
41575d8e |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c69cda25 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
caa4daa2 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
41575d8e |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c69cda25 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
caa4daa2 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
41575d8e |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c69cda25 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
caa4daa2 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
41575d8e |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c69cda25 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
caa4daa2 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
41575d8e |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c69cda25 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
caa4daa2 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
41575d8e |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c69cda25 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
caa4daa2 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
41575d8e |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c69cda25 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
caa4daa2 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
41575d8e |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c69cda25 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
caa4daa2 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
41575d8e |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c69cda25 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
caa4daa2 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
41575d8e |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c69cda25 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
caa4daa2 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
41575d8e |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c69cda25 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
caa4daa2 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
41575d8e |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c69cda25 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
caa4daa2 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
41575d8e |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c69cda25 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
caa4daa2 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
41575d8e |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c69cda25 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
caa4daa2 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
41575d8e |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c69cda25 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
caa4daa2 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
41575d8e |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c69cda25 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
caa4daa2 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
41575d8e |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c69cda25 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
caa4daa2 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
41575d8e |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c69cda25 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
caa4daa2 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
41575d8e |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c69cda25 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
caa4daa2 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
41575d8e |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c69cda25 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
caa4daa2 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
41575d8e |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c69cda25 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
caa4daa2 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
41575d8e |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c69cda25 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
caa4daa2 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
41575d8e |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c69cda25 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
caa4daa2 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
41575d8e |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c69cda25 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
caa4daa2 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
41575d8e |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c69cda25 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
caa4daa2 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
41575d8e |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c69cda25 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
caa4daa2 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
41575d8e |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c69cda25 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
caa4daa2 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
41575d8e |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c69cda25 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
caa4daa2 |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
41575d8e |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
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#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
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#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
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#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
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#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
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#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
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#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
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#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
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#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
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#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
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#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
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#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
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#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
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#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
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#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
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#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
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#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
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#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
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#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
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#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
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#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
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#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
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#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
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#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
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#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
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#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
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#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
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#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
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#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
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#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
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#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
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#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
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#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
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#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
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#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
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#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
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#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
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#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
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#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
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#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
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#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
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#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
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#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
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#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
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#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
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#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
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#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
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#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
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#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
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#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
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#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
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#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
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#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
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#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
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#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
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#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
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#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
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#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
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#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
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#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
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#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
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#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
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#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
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#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
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#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
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#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
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#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
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#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
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#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
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#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
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#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
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#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
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#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
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#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
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#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
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#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
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#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
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#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
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#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
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#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
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#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
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#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
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#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
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#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
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#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
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#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
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#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
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#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
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#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
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#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
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#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
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#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
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#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
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#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
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#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
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#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
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#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
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#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
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#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
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#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
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#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
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#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
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#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
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#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
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#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
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#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
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#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
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#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
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#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
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#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
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#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
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#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
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#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
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#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
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#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
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#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
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#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
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#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
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#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
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#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
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#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
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#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
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#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
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#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
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#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
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#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
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#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
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#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
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#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
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#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
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#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
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#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
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#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
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#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
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#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
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#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
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#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
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#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
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#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
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#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
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#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
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#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
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#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
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#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
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#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
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#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
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#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
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#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
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#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
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#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
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#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
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#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
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#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
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#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
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#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
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#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
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#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
|
#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
|
#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
|
#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
|
#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
|
#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
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#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
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#
c57572eb |
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29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
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#
3c8c7da6 |
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21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
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#
9e233382 |
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29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
a1925a64 |
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29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
e8f37f42 |
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09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
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#
0e21a2ff |
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09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
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#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
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#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
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#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
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#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
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#
3c8c7da6 |
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21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
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#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
a1925a64 |
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29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
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#
0e21a2ff |
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09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
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#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
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#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
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#
4233698d |
|
18-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Honour non-removable property in DT If a board DT describes a cd-gpios property, but also marks the storage as non-removable, we must ignore the GPIO (as Linux does). Teach the DM_MMC part of the Allwinner MMC driver about the non-removable DT property, to fix DM_MMC access on the SoPine and Pine64-LTS board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@openedev.com>
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#
c57572eb |
|
29-Jan-2019 |
Andre Przywara <andre.przywara@arm.com> |
mmc: sunxi: Add DM clk and reset support Now that we have the gate clocks and the reset gates in our new Allwinner clock driver, let's make use of them in the MMC driver, when DM_MMC is defined. We treat the reset device as optional now, as the older SoCs don't implement it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
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#
3c8c7da6 |
|
21-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for A80 A80 gates clock already be part of CLK framework, so just add mod_clk offset with A80 compatible string. Cc: Rask Ingemann Lambertsen <rask@formelder.dk> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
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#
9e233382 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add DM_MMC support for H6 Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset. Connect that with the respective compatible string. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
a1925a64 |
|
29-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Add remaining compatible strings Add MMC compatible strings for A83T, A64, H5. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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#
e8f37f42 |
|
09-Jan-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
mmc: sunxi: Fix mmc clocks for DM_MMC Existing clock configure code has been followed based on the legacy MMC dt node definitions and it cannot work with recent dts(i) sync from Linux. So, add clock configure code for Allwinner platforms which support DM_MMC and eventually this will drop once CLK support is in Mainline. Fixes: 3c92cca3cda0 ("ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Priit Laes <plaes@plaes.org> # Gemei G9 A10 Tablet Tested-by: Marek Kraus <gamelasterv2@gmail.com> # A10-OLinuXino-Lime
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#
0e21a2ff |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: use new mode on both controllers on A64 Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
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#
629d267a |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: don't double clock for new mode unconditionally Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
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#
2a8882ec |
|
09-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH option Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
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20940ef2 |
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05-Nov-2018 |
Vasily Khoruzhick <anarsoul@gmail.com> |
mmc: sunxi: add support for automatic delay calibration A64 and H6 support automatic delay calibration and Linux driver uses it instead of hardcoded delays. Add support for it to u-boot driver. Fixes eMMC instability on Pinebook Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Tested-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Cc: Vagrant Cascadian <vagrant@debian.org> Reviewed-by: Jagan Teki <jagan@openedev.com>
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#
42956f1b |
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21-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: add MMC support for H6 The Allwinner H6 SoC has 3 MMC controllers like the ones in A64, with the MMC2 come with the capability to do crypto by EMCE. Add MMC support for H6. EMCE support is not added yet. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>
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#
979b239b |
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29-Jun-2018 |
Adam Sampson <ats@offog.org> |
dm: mmc: sunxi: Add A10/A20 compatible strings Commit dd27918c2252 ("dm: mmc: sunxi: Add support for driver model") only added the allwinner,sun5i-a13-mmc compatible string for this driver. The DM initialisation code here also works with (at least) A10 and A20, so add the appropriate compatible strings as per Linux 4.17's driver. Tested on A10 Cubieboard and A20 pcDuino3 Nano with CONFIG_DM_MMC. (A20 worked already, because sun7i-a20.dtsi specifies both the A13 and A20 strings.) Signed-off-by: Adam Sampson <ats@offog.org> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
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83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
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#
5ff8e548 |
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20-Mar-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
sunxi: improve throughput in the sunxi_mmc driver Throughput tests have shown the sunxi_mmc driver to take over 10s to read 10MB from a fast eMMC device due to excessive delays in polling loops. This commit restructures the main polling loops to use get_timer(...) to determine whether a (millisecond) timeout has expired. We choose not to use the wait_bit function, as we don't need interruptability with ctrl-c and have at least one case where two bits (one for an error condition and another one for completion) need to be read and using wait_bit would have not added to the clarity. The observed speedup in testing on a A31 is greater than 10x (e.g. a 10MB write decreases from 9.302s to 0.884s). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Tested-by: Mylène Josserand <mylene.josserand@bootlin.com> Acked-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Tom Rini <trini@konsulko.com>
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#
4744d81c |
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27-Mar-2018 |
Stefan Mavrodiev <stefan@olimex.com> |
sunxi: mmc: Fix phase delays U-boot driver for sunxi-mmc uses PLL6, unlike linux kernel where PLL5 is used, with clock rates respectively 600MHz and 768MHz. Thus there are different phase degree steps - 24 for the kernel and 30 for u-boot. In the kernel driver the phase is set 90 deg for output and 120 for sample. Dividing by 30 will result values 3 and 4. Those are the values set in the u-boot driver. However, the condition defining delays is wrong. MMC core driver requests clock of 52MHz, sunxi-driver sets clock of 50MHz, but phase is set 30 deg for output and 120 deg for sample. Apparently this works for most cards. On A20-SOM204-EVB-eMMC there is eMMC card (KLMAG2GEND) which complains about it. Maybe there is other boards with similar problem? So the fix is to match delays for both u-boot and kernel. Signed-off-by: Stefan Mavrodiev <stefan@olimex.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
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#
8be4e61d |
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01-Feb-2018 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
mmc: sunxi: support cd-inverted With CONFIG_DM_MMC the BananaPi does not detect SD cards. The sunxi device trees use the cd-inverted property to indicate that the card detect is inverted. This property is documented in Linux kernel devicetree/bindings/mmc/mmc.txt The property is not marked as deprecated. A similar patch was posted by Tuomas but is in status "Changes Requested". https://patchwork.ozlabs.org/patch/850377/ This patch is a stripped down version of his patch. Suggested-by: Tuomas Tynkkynen <tuomas@tuxera.com> Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
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#
8a647fc3 |
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31-Aug-2017 |
Chen-Yu Tsai <wens@csie.org> |
mmc: sunxi: Only update timing mode bit when enabling new timing mode When enabling the new mmc timing mode, we inadvertently clear all the remaining bits in the new timing mode register. The bits cleared include a default phase delay on the output clock. The BSP kernel states that the default values are supposed to be used. Clearing them results in decreased performance or transfer errors on some boards. Fixes: de9b1771c3b6 ("mmc: sunxi: Support new mode") Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
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#
ead3697d |
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23-Aug-2017 |
Maxime Ripard <maxime.ripard@free-electrons.com> |
mmc: sunxi: fix legacy MMC initialisation The driver-model rework changed, among other things, the way the private data were moved around. It now uses the private field in the struct mmc. However, the mmc_create argument was changed in the process to always pass the array we used to have to store our private structures. The basically means that all the MMC driver instances will now have the private data of the first instance, which obviously doesn't work very well. Pass the proper pointer to mmc_create. Fixes: 034e226bc77e ("dm: mmc: sunxi: Pass private data around explicitly") Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Tested-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
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de9b1771 |
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22-Aug-2017 |
Maxime Ripard <maxime.ripard@free-electrons.com> |
mmc: sunxi: Support new mode Almost all of the newer Allwinner SoCs have a new operating mode for the eMMC clocks that needs to be enabled in both the clock and the MMC controller. Details about that mode are sparse, and the name itself (new mode vs old mode) doesn't give much details, but it seems that the it changes the sampling of the MMC clock. One side effect is also that it divides the parent clock rate by 2. Add support for it through a Kconfig option. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
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dd27918c |
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04-Jul-2017 |
Simon Glass <sjg@chromium.org> |
dm: mmc: sunxi: Add support for driver model Add a driver-model version of this driver which mostly uses the existing code. The old code can be removed once all boards are switched over. Signed-off-by: Simon Glass <sjg@chromium.org>
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ec73d960 |
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04-Jul-2017 |
Simon Glass <sjg@chromium.org> |
dm: mmc: sunxi: Drop mmc_clk_io_on() This function has #ifdefs in it which we want to avoid for driver model. Instead we should use different compatible strings and the .data field. It also uses the MMC device number which is not available in driver model except through aliases. Move the function's into its caller so that the driver-model version can do things its own way. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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034e226b |
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04-Jul-2017 |
Simon Glass <sjg@chromium.org> |
dm: mmc: sunxi: Pass private data around explicitly At present the driver-private data is obtained in various functions by various means. With driver model this is provided automatically. Without driver model it comes from a C array declared at the top of the file. Adjust internal functions so that they are passed the private data as a parameter, allowing the caller to obtain it using either means. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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3f5af12a |
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04-Jul-2017 |
Simon Glass <sjg@chromium.org> |
dm: mmc: sunxi: Rename mmchost to priv Use the driver-model naming convention for this structure. It is data private to the driver so the local variable should be called 'priv'. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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e3c794e2 |
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04-Jul-2017 |
Simon Glass <sjg@chromium.org> |
dm: mmc: sunxi: Rename struct sunxi_mmc_host to sunxi_mmc_priv Use the driver-model naming convention for this structure. It is data private to the driver. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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07b0b9c0 |
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29-Dec-2016 |
Jaehoon Chung <jh80.chung@samsung.com> |
mmc: change the set_ios return type from void to int To maintain consistency, set_ios type of legacy mmc_ops changed to int. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
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fb013184 |
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04-Nov-2016 |
Maxime Ripard <maxime.ripard@free-electrons.com> |
mmc: sunxi: Enable 8bits bus width for sun8i The sun8i SoCs also have a 8 bits capable MMC2 controller. Enable the support for those too. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Hans de Goede <hdegoede@redhat.com>
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915ffa52 |
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19-Jul-2016 |
Jaehoon Chung <jh80.chung@samsung.com> |
mmc: use the generic error number Use the generic error number instead of specific error number. If use the generic error number, it can debug more easier. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
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ef36d9ae |
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09-Jul-2016 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Use BROM stored boot_media value to determine our boot-source Now that we know that the BROM stores a value indicating the boot-source at the beginning of SRAM, use that instead of trying to recreate the BROM's boot probing. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
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26c0c157 |
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07-Jul-2016 |
Tobias Doerffel <tobias.doerffel@ed-chemnitz.de> |
sunxi: mmc: increase status register polling rate for data transfers With a recent bunch of SD3.0 cards in our A20-based board we experienced data transfer rates of about 250 KiB/s instead of 10 MiB/s with previous cards from the same vendor (both 4 GB/class 10). By increasing status register polling rate from 1 kHz to 1 MHz we were able to reach the original transfer rates again. With the old cards we now even reach about 16 MiB/s. Signed-off-by: Tobias Doerffel <tobias.doerffel@ed-chemnitz.de> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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d96ebc46 |
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29-Mar-2016 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: Add support for Allwinner A64 SoCs The Allwinner A64 SoC is used in the Pine64. This patch adds all bits necessary to compile U-Boot for it running in AArch64 mode. Unfortunately SPL is not ready yet due to legal problems, so we need to boot using the binary boot0 for now. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> [agraf: remove SPL code, move to AArch64] Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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0ea5a04f |
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29-Mar-2016 |
Alexander Graf <agraf@suse.de> |
sunxi: Explicitly cast u32 pointer conversions Some parts of the sunxi code cast explicitly between u32 values and pointers. This is not a problem in practice, because all 64bit SoCs today only use the lower 32 bits for their phyical address space. But we need to make sure that the compiler is sure this is not an accident as well. Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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7c4213f6 |
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07-Dec-2015 |
Stephen Warren <swarren@nvidia.com> |
block: pass block dev not num to read/write/erase() This will allow the implementation to make use of data in the block_dev structure beyond the base device number. This will be useful so that eMMC block devices can encompass the HW partition ID rather than treating this out-of-band. Equally, the existence of the priv field is crying out for this patch to exist. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Tom Rini <trini@konsulko.com>
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be90974c |
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23-Sep-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Fix clk-delay settings In recent allwinner kernel sources the mmc/sdio clk-delay settings have been slightly tweaked, and for sun9i they are completely different then what we are using. This commit brings us in sync with what allwinner does, fixing problems accessing sdcards on some A33 devices (and likely others). For pre sun9i hardware this makes the following changes: -At 400Khz change the sample delay from 7 to 0 (first introduced in A31 sdk) -At 50 Mhz change the sample delay from 5 to 4 (first introduced in A23 sdk) -Above 50 MHz change the out delay from 2 to 1 (first introduced in A20 sdk) Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
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28f69b9a |
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29-Aug-2015 |
Yousong Zhou <yszhou4tech@gmail.com> |
sunxi: mmc: set transfer timeout according to byte_cnt. Originally a timeout value of 2 seconds was used regardless of the size of data to be transfered. This prevented slow devices from working correctly while there was no much gain for faster devices, e.g. it takes 3708ms for a transfer of uImage of size 1899008 bytes. Signed-off-by: Yousong Zhou <yszhou4tech@gmail.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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645c48f5 |
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29-May-2015 |
Daniel Kochmański <dkochmanski@turtle-solutions.eu> |
sunxi: Create helper function veryfing valid boot signature on MMC This patch extracts checking for valid SD card "eGON.BT0" signature from `board_mmc_init` into function `sunxi_mmc_has_egon_boot_signature`. Buffer for mmc sector is allocated and freed at runtime. `panic` is triggered on malloc failure. Signed-off-by: Daniel Kochmański <dkochmanski@turtle-solutions.eu> CC: Roy Spliet <r.spliet@ultimaker.com> Cc: Ian Campbell <ijc@hellion.org.uk> [hdegoede@redhat.com: Small bugfix to make it work for devs other then mmc0] Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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1c09fa38 |
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30-May-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Enable pull-up on card-detect gpio pin On some boards we need to enable the internal pull-up te reliable detect that no card is inserted. Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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5a20397b |
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23-Mar-2015 |
Rob Herring <robh@kernel.org> |
mmc: remove the MMC_MODE_HC flag High capacity support is not a host capability, but a device capability that is queried via the OCR. The flag in the operating conditions request argument can just be set unconditionally. This matches the Linux implementation. [panto] Hand merged and renumbering MMC_MODE_DDR_52MHz. Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com> Cc: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
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90641f82 |
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22-Apr-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Fix card-detect gpio handling to work with the driver-model The driver-model gpio functions may return another value then -1 as error, make the sunxi mmc code properly handle this. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Ian Campbell <ijc@hellion.org.uk>
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44d8ae5b |
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06-Apr-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Introduce a hidden SUNXI_GEN_SUNxI Kconfig bool sun6i and newer (derived) SoCs such as the sun8i-a23, sun8i-a33 and sun9i have a various things in common, like having separate ahb reset control registers, the SID living inside the pmic, custom pmic busses, new style watchdog, etc. This commit introduces a new hidden SUNXI_GEN_SUN6I Kconfig bool which can be used to check for these features avoiding the need for an ever growing list of "#if defined CONFIG_MACH_SUN?I" conditionals as we add support for more "new style" sunxi SoCs. Note that this commit changes the behavior of the gmac and hdmi code for sun8i and the upcoming sun9i devices. This does not matter as sun8i does not have gmac nor hdmi, and sun9i has new hardware-blocks for these so the old code will not work there. Also this is intentional as if a sun8i / sun9i variant which does use the old hwblocks shows up then the GEN_SUN6I code paths will be the right ones to use. For completeness this also adds a SUNXI_GEN_SUN4I bool for A10/A13/A20. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
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1f3e877d |
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19-Feb-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Always declare High Capacity capability High Capacity (e)MMC cards work fine on sun4i / sun5i, and not having this capability set causes u-boot to not recognize the eMMC on an Utoo P66 A13 tablet, so always set it thereby fixing this. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
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1de32b8a |
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19-Feb-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Always declare High Capacity capability High Capacity (e)MMC cards work fine on sun4i / sun5i, and not having this capability set causes u-boot to not recognize the eMMC on an Utoo P66 A13 tablet, so always set it thereby fixing this. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
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5abdb156 |
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31-Jan-2015 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: mmc: Add 'sunxi_' prefix to the static functions This results in a much more readable callgraph, because now they can't be confused with the function having exactly the same name in the generic mmc code. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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daf22636 |
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14-Jan-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Add support for sun9i (A80) The clocks on the A80 are hooked up slightly different, add support for this. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
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5b8d7fb4 |
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15-Jan-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Use a realistic timeout when sending a mmc command Wait 1 second for the sdcard to respond, rather then waiting for 0xfffff milliseconds. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
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b0c4ae1a |
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19-Dec-2014 |
Axel Lin <axel.lin@ingics.com> |
mmc: sunxi: Fix misuse of gpio_direction_input() It does not make sense to make gpio_direction_input() return the gpio input status. The return value of gpio_direction_input() is inconsistent if CONFIG_DM_GPIO is defined. And we don't need to call gpio_direction_input() int sunxi_mmc_getcd(). Just init the gpio once in mmc_resource_init() is enough. Signed-off-by: Axel Lin <axel.lin@ingics.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
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fc3a8325 |
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07-Dec-2014 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: mmc: Properly setup mod-clk and clock sampling phases The sunxi mmc controller has both an internal clock divider, as well as the divider in the mod0-clk for the mmc controller. The internal divider cannot be used, as it conflicts with the setting of clock sampling phases which is done in the mod0-clk, so it must be set to 0 (divide by 1). For some reason while the kernel has had this correct from day one, the u-boot sunxi mmc code has been using a fixed mod0-clk and setting its internal divider depending on the desired speed. This is something which we've inherited from the original Allwinner u-boot sources, but while this has been fixed in Allwinner's own u-boot code at least for the A23 and later upstream u-boot was still doing this wrong. This commit fixes this, thereby also fixing mmc support not working reliable on the A23 (which seems more sensitive to this) and possible also fixes some other sunxi mmc issues. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
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967325fe |
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31-Oct-2014 |
Hans de Goede <hdegoede@redhat.com> |
dm: sunxi: Request card detect gpio This is necessary for the device-model enabled builds to work properly. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Simon Glass <sjg@chromium.org>
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ed41e62f |
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24-Oct-2014 |
Ian Campbell <ijc@hellion.org.uk> |
sunxi: Use CONFIG_MACH_SUN?I from Kconfig instead of CONFIG_SUN?I Mostly automatic with: sed -i -e 's/CONFIG_\(SUN[45678]I\)/CONFIG_MACH_\1/g' $(git grep -l CONFIG_SUN[45678]I) followed by removing the relevant #defines from include/configs/sun?i.h by hand. Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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e637b30b |
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22-Oct-2014 |
Chen-Yu Tsai <wens@csie.org> |
mmc: sunxi: Add support for sun8i (A23) The Allwinner A23 SoC has reset controls like the A31 (sun6i). The FIFO address is also the same as sun6i. Re-use code added for sun6i. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Ian Campbell <ijc@hellion.org.uk>
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e79c7c88 |
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02-Oct-2014 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: When we've both mmc0 and mmc2, detect from which one we're booting sunxi SOCs can boot from both mmc0 and mmc2, detect from which one we're booting, and make that one "mmc dev 0" so that a single u-boot binary can be used for both the onboard eMMC and for external sdcards. When we're booting from mmc2, we make it dev 0 because that is where the SPL will load the tertiary payload (the actual u-boot binary in our case) from, see: common/spl/spl_mmc.c, which has dev 0 hardcoded everywhere. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
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cd82113a |
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02-Oct-2014 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Add mmc card-detect functionality Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
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1d1bd42e |
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03-Oct-2014 |
Hans de Goede <hdegoede@redhat.com> |
ARM: sunxi-mmc: Add mmc support for sun6i / A31 The mmc hardware on sun6i has an extra reset control that needs to be de-asserted prior to usage. Also the FIFO address is different. Signed-off-by: Hans de Goede <hdegoede@redhat.com> [wens@csie.org: use setbits_le32 for reset control, drop obsolete changes, rewrite different FIFO address handling, add commit message] Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Ian Campbell <ijc@hellion.org.uk>
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a3e8c220 |
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22-Sep-2014 |
Wills Wang <wills.wang.open@gmail.com> |
mmc: sunxi: add SDHC support for sun6i/sun7i/sun8i Allwinner A20/A23/A31's SD/MMC host support SDHC High Capacity feature. Signed-off-by: Wills Wang <wills.wang.open@gmail.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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b6ae6765 |
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09-Jun-2014 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Remove mmc DMA support The DMA code in sunxi_mmc.c is broken. mmc_trans_data_by_dma() allocates the dma descriptors on the stack, and then exits while the dma transfer is in progress, so the dma engine is reading stack memory which at that point may be re-used. So far we've gotten away with this by luck, but recent u-boot changes have shifted the stack start address by 16 bytes, which combined with dma alignment now exposes this problem. Since we end up just busy waiting for the dma engine anyway, this commit fixes things by simply removing the dma code, resulting in smaller bug-free code. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
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e24ea55c |
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05-May-2014 |
Ian Campbell <ijc@hellion.org.uk> |
sunxi: mmc support On Mon, 2014-05-05 at 14:18 +0200, Stefan Roese wrote: > > + case 1: > > +#if CONFIG_MMC1_PG > Are you sure that this is correct and shouldn't be: > > +#ifdef CONFIG_MMC1_PG > > ? It's "correct" in so far as it works (the boards.cfg config stuff #defines things to 1), but I think you are right that it isn't the preferred style. But... > A quick scan through this patch series shows that this define > is not set at all. Perhaps its outdated? Or is it used to support > some other sunxi SoC? Not sure, perhaps it should be removed for > now. ...I had thought that it was to support some other board which wasn't being upstreamed right now, so eventually useful and harmless for now, but I've just checked and it isn't actually used by any of the boards in u-boot-sunxi.git. So rather than fix it to use #ifdef lets drop it. Rather than resend the entire series, here is v5.1 of this patch. > Other than this please add my: > > Reviewed-by: Stefan Roese <sr@denx.de> Thanks! 8<--------------------------------- >From 20704e35a41664de5f516ed0e02981ac06085102 Mon Sep 17 00:00:00 2001 From: Ian Campbell <ijc@hellion.org.uk> Date: Fri, 7 Mar 2014 04:29:39 +0000 Subject: [PATCH v5.1 7/8] sunxi: mmc support This adds support for the MMC controller on the Allwinner A20 (sun7i) processor. Signed-off-by: Henrik Nordstrom <henrik@henriknordstrom.net> Signed-off-by: Luke Leighton <lkcl@lkcl.net> Signed-off-by: Oliver Schinagl <oliver@schinagl.nl> Signed-off-by: Wills Wang <wills.wang.open@gmail.com> Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Stefan Roese <sr@denx.de> Cc: Tom Cubie <Mr.hipboi@gmail.com> Cc: Aaron Maoye <leafy.myeh@allwinnertech.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Reviewed-by: Tom Rini <trini@ti.com>
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