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48c4d118 |
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04-Apr-2018 |
Anna Lyons <Anna.Lyons@data61.csiro.au> |
riscv: define _Addr and __sysinfo as int for 32bit
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f02a8407 |
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04-Apr-2018 |
Anna Lyons <Anna.Lyons@data61.csiro.au> |
riscv: build on 32-bit
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ad0e98ed |
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03-Apr-2018 |
Kent McLeod <Kent.Mcleod@data61.csiro.au> |
RISC-V: Use pthread typedefs from x86_64 for now They at least have the union definitions with correct sizes. Given that we don't support TLS for RISC-V the sizes of these don't really matter for now.
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f548fc36 |
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02-Apr-2018 |
Kent McLeod <Kent.Mcleod@data61.csiro.au> |
RISC-V: Revert pthread_impl definitions
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23252db4 |
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02-Apr-2018 |
Kent McLeod <Kent.Mcleod@data61.csiro.au> |
RISC-V: Fix core type definitions and sizes
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2435f79d |
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30-Jul-2016 |
Hesham Almatary <hesham.almatary@data61.csiro.au> |
RISC-V port
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