#
b228501f |
|
19-Apr-2024 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
drm/msm: merge dpu format database to MDP formats Finally remove duplication between DPU and generic MDP code by merging DPU format lists to the MDP format database. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/590435/ Link: https://lore.kernel.org/r/20240420-dpu-format-v2-8-9e93226cbffd@linaro.org
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#
7120d8a0 |
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19-Apr-2024 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
drm/msm/dpu: pull format flag definitions to mdp_format.h In preparation to merger of formats databases, pull format flag definitions to mdp_format.h header, so that they are visibile to both dpu and mdp drivers. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/590425/ Link: https://lore.kernel.org/r/20240420-dpu-format-v2-4-9e93226cbffd@linaro.org
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#
0efadfb0 |
|
10-Apr-2024 |
Konrad Dybcio <konrad.dybcio@linaro.org> |
drm/msm: Drop msm_read/writel Totally useless. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Andrew Halaney <ahalaney@redhat.com> Patchwork: https://patchwork.freedesktop.org/patch/588804/ Link: https://lore.kernel.org/r/20240410-topic-msm_rw-v1-1-e1fede9ffaba@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
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#
d72a3d35 |
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25-Feb-2024 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
drm/msm/dpu: split dpu_encoder_wait_for_event into two functions Stop multiplexing several events via the dpu_encoder_wait_for_event() function. Split it into two distinct functions two allow separate handling of those events. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/579848/ Link: https://lore.kernel.org/r/20240226-fd-dpu-debug-timeout-v4-2-51eec83dde23@linaro.org
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#
ee2fcc0f |
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22-Feb-2024 |
Paloma Arellano <quic_parellan@quicinc.com> |
drm/msm/dp: allow YUV420 mode for DP connector when CDM available All the components of YUV420 over DP are added. Therefore, let's mark the connector property as true for DP connector when the DP type is not eDP and when there is a CDM block available. Changes in v3: - Move setting the connector's ycbcr_420_allowed parameter so that it is not dependent on if the dp_display is not eDP Changes in v2: - Check for if dp_catalog has a CDM block available instead of checking if VSC SDP is allowed when setting the dp connector's ycbcr_420_allowed parameter Signed-off-by: Paloma Arellano <quic_parellan@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/579628/ Link: https://lore.kernel.org/r/20240222194025.25329-20-quic_parellan@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
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#
b40c8377 |
|
22-Feb-2024 |
Paloma Arellano <quic_parellan@quicinc.com> |
drm/msm/dpu: modify encoder programming for CDM over DP Adjust the encoder format programming in the case of video mode for DP to accommodate CDM related changes. Changes in v4: - Remove hw_cdm check in dpu_encoder_needs_periph_flush() - Remove hw_cdm check when getting the fmt_fourcc in dpu_encoder_phys_vid_enable() Changes in v2: - Move timing engine programming to a separate patch from this one - Move update_pending_flush_periph() invocation completely to this patch - Change the logic of dpu_encoder_get_drm_fmt() so that it only calls drm_mode_is_420_only() instead of doing additional unnecessary checks - Create new functions msm_dp_needs_periph_flush() and it's supporting function dpu_encoder_needs_periph_flush() to check if the mode is YUV420 and VSC SDP is enabled before doing a peripheral flush Signed-off-by: Paloma Arellano <quic_parellan@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/579641/ Link: https://lore.kernel.org/r/20240222194025.25329-17-quic_parellan@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
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#
b8b12318 |
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08-Feb-2024 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
drm/msm: add a kernel param to select between MDP5 and DPU drivers For some of the platforms (e.g. SDM660, SDM630, MSM8996, etc.) it is possible to support this platform via the DPU driver (e.g. to provide support for DP, multirect, etc). Add a modparam to be able to switch between these two drivers. All platforms supported by both drivers are by default handled by the MDP5 driver. To let them be handled by the DPU driver pass the `msm.prefer_mdp5=false` kernel param. Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Carl Vanderlip <quic_carlv@quicinc.com> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/577504/ Link: https://lore.kernel.org/r/20240208-fd-migrate-mdp5-v4-3-945d08ef3fa8@linaro.org
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#
39b06ed6 |
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08-Feb-2024 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
drm/msm/dpu: support binding to the mdp5 devices Existing MDP5 devices have slightly different bindings. The main register region is called `mdp_phys' instead of `mdp'. Also vbif register regions are a part of the parent, MDSS device. Add support for handling this binding differences. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/577505/ Link: https://lore.kernel.org/r/20240208-fd-migrate-mdp5-v4-2-945d08ef3fa8@linaro.org
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#
5ef42da7 |
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12-Dec-2023 |
Abhinav Kumar <quic_abhinavk@quicinc.com> |
drm/msm/dpu: add support to allocate CDM from RM Even though there is usually only one CDM block, it can be used by either HDMI, DisplayPort OR Writeback interfaces. Hence its allocation needs to be tracked properly by the resource manager to ensure appropriate availability of the block. changes in v2: - move needs_cdm to topology struct Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/571827/ Link: https://lore.kernel.org/r/20231212205254.12422-10-quic_abhinavk@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
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#
a08935fc |
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03-Oct-2023 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
drm/msm/dpu: drop MSM_ENC_VBLANK support There are no in-kernel users of MSM_ENC_VBLANK wait type. Drop it together with the corresponding wait_for_vblank callback. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/560701/ Link: https://lore.kernel.org/r/20231004031903.518223-1-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
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#
2b3aabc9 |
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01-Dec-2023 |
Kuogee Hsieh <quic_khsieh@quicinc.com> |
drm/msm/dp: delete EV_HPD_INIT_SETUP EV_HPD_INIT_SETUP flag is used to trigger the initialization of external DP host controller. Since external DP host controller initialization had been incorporated into pm_runtime_resume(), this flag became obsolete. msm_dp_irq_postinstall() which triggers EV_HPD_INIT_SETUP event is obsoleted accordingly. Changes in v4: -- reworded commit text -- drop EV_HPD_INIT_SETUP -- drop msm_dp_irq_postinstall() Changes in v3: -- drop EV_HPD_INIT_SETUP and msm_dp_irq_postinstall() Signed-off-by: Kuogee Hsieh <quic_khsieh@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/570075/ Link: https://lore.kernel.org/r/1701472789-25951-7-git-send-email-quic_khsieh@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
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#
ab842041 |
|
19-Oct-2023 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
drm/msm/dp: cleanup debugfs handling Currently there are two subdirs for DP debugfs files, e.g. DP-1, created by the drm core for the connector, and the msm_dp-DP-1, created by the DP driver itself. Merge those two, so that there are no extraneous connector-related subdirs. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/563523/ Link: https://lore.kernel.org/r/20231019104419.1032329-1-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
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#
937154e4 |
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09-Oct-2023 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
drm/msm: rename msm_drv_shutdown() to msm_kms_shutdown() The msm_drv_shutdown function should only be used in the KMS case. Rename it accordingly. Reviewed-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/561652/ Signed-off-by: Rob Clark <robdclark@chromium.org>
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#
d069ef29 |
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09-Oct-2023 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
drm/msm: rename msm_pm_prepare/complete to note the KMS nature Rename the msm_pm_prepare() and msm_pm_complete() to msm_kms_pm_prepare() and msm_kms_pm_complete() consequently. Reviewed-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/561646/ Signed-off-by: Rob Clark <robdclark@chromium.org>
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#
4d1a1e46 |
|
09-Oct-2023 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
drm/msm: remove msm_drm_private::bridges field As all output devices have switched to devm_drm_bridge_add(), we can drop the bridges array from struct msm_drm_private. Reviewed-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/561641/ Signed-off-by: Rob Clark <robdclark@chromium.org>
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#
a2ab5d5b |
|
09-Oct-2023 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
drm/msm: allow passing struct msm_kms to msm_drv_probe() In preparation of moving resource allocation to the probe time, allow MSM KMS drivers to pass struct msm_kms pointer via msm_drv_probe(). Reviewed-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/561627/ Signed-off-by: Rob Clark <robdclark@chromium.org>
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#
97f038db |
|
22-Aug-2023 |
Jessica Zhang <quic_jesszhan@quicinc.com> |
drm/msm/dpu: Enable widebus for DSI INTF DPU supports a data-bus widen mode for DSI INTF. Enable this mode for all supported chipsets if widebus is enabled for DSI. Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/553756/ Link: https://lore.kernel.org/r/20230822-add-widebus-support-v4-2-9dc86083d6ea@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
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#
cd61a76c |
|
11-Sep-2023 |
Qi Zheng <zhengqi.arch@bytedance.com> |
drm/msm: dynamically allocate the drm-msm_gem shrinker In preparation for implementing lockless slab shrink, use new APIs to dynamically allocate the drm-msm_gem shrinker, so that it can be freed asynchronously via RCU. Then it doesn't need to wait for RCU read-side critical section when releasing the struct msm_drm_private. Link: https://lkml.kernel.org/r/20230911094444.68966-22-zhengqi.arch@bytedance.com Signed-off-by: Qi Zheng <zhengqi.arch@bytedance.com> Reviewed-by: Muchun Song <songmuchun@bytedance.com> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: Rob Clark <robdclark@gmail.com> Cc: Abhinav Kumar <quic_abhinavk@quicinc.com> Cc: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Cc: Sean Paul <sean@poorly.run> Cc: Marijn Suijten <marijn.suijten@somainline.org> Cc: David Airlie <airlied@gmail.com> Cc: Alasdair Kergon <agk@redhat.com> Cc: Alexander Viro <viro@zeniv.linux.org.uk> Cc: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Cc: Andreas Dilger <adilger.kernel@dilger.ca> Cc: Andreas Gruenbacher <agruenba@redhat.com> Cc: Anna Schumaker <anna@kernel.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Bob Peterson <rpeterso@redhat.com> Cc: Borislav Petkov <bp@alien8.de> Cc: Carlos Llamas <cmllamas@google.com> Cc: Chandan Babu R <chandan.babu@oracle.com> Cc: Chao Yu <chao@kernel.org> Cc: Chris Mason <clm@fb.com> Cc: Christian Brauner <brauner@kernel.org> Cc: Christian Koenig <christian.koenig@amd.com> Cc: Chuck Lever <cel@kernel.org> Cc: Coly Li <colyli@suse.de> Cc: Dai Ngo <Dai.Ngo@oracle.com> Cc: Daniel Vetter <daniel@ffwll.ch> Cc: "Darrick J. Wong" <djwong@kernel.org> Cc: Dave Chinner <david@fromorbit.com> Cc: Dave Hansen <dave.hansen@linux.intel.com> Cc: David Hildenbrand <david@redhat.com> Cc: David Sterba <dsterba@suse.com> Cc: Gao Xiang <hsiangkao@linux.alibaba.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Huang Rui <ray.huang@amd.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: Jaegeuk Kim <jaegeuk@kernel.org> Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: Jan Kara <jack@suse.cz> Cc: Jason Wang <jasowang@redhat.com> Cc: Jeff Layton <jlayton@kernel.org> Cc: Jeffle Xu <jefflexu@linux.alibaba.com> Cc: Joel Fernandes (Google) <joel@joelfernandes.org> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Josef Bacik <josef@toxicpanda.com> Cc: Juergen Gross <jgross@suse.com> Cc: Kent Overstreet <kent.overstreet@gmail.com> Cc: Kirill Tkhai <tkhai@ya.ru> Cc: "Michael S. Tsirkin" <mst@redhat.com> Cc: Mike Snitzer <snitzer@kernel.org> Cc: Minchan Kim <minchan@kernel.org> Cc: Muchun Song <muchun.song@linux.dev> Cc: Nadav Amit <namit@vmware.com> Cc: Neil Brown <neilb@suse.de> Cc: Oleksandr Tyshchenko <oleksandr_tyshchenko@epam.com> Cc: Olga Kornievskaia <kolga@netapp.com> Cc: Paul E. McKenney <paulmck@kernel.org> Cc: Richard Weinberger <richard@nod.at> Cc: Rob Herring <robh@kernel.org> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: Roman Gushchin <roman.gushchin@linux.dev> Cc: Sergey Senozhatsky <senozhatsky@chromium.org> Cc: Song Liu <song@kernel.org> Cc: Stefano Stabellini <sstabellini@kernel.org> Cc: Steven Price <steven.price@arm.com> Cc: "Theodore Ts'o" <tytso@mit.edu> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Tomeu Vizoso <tomeu.vizoso@collabora.com> Cc: Tom Talpey <tom@talpey.com> Cc: Trond Myklebust <trond.myklebust@hammerspace.com> Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> Cc: Vlastimil Babka <vbabka@suse.cz> Cc: Xuan Zhuo <xuanzhuo@linux.alibaba.com> Cc: Yue Hu <huyue2@coolpad.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
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#
70e913f7 |
|
03-Jul-2023 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
drm/msm: enumerate DSI interfaces Follow the DP example and define MSM_DSI_CONTROLLER_n enumeration. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Tested-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/545351/ Link: https://lore.kernel.org/r/20230704022136.130522-2-dmitry.baryshkov@linaro.org
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#
274f1614 |
|
19-May-2023 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
drm/msm: stop storing the array of CRTCs in struct msm_drm_private The array of CRTC in the struct msm_drm_private duplicates a list of CRTCs in the drm_device. Drop it and use the existing list for CRTC enumeration. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/538068/ Link: https://lore.kernel.org/r/20230519150734.3879916-1-dmitry.baryshkov@linaro.org
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#
0adec227 |
|
13-Jun-2023 |
Thomas Zimmermann <tzimmermann@suse.de> |
drm: Remove struct drm_driver.gem_prime_mmap All drivers initialize this field with drm_gem_prime_mmap(). Call the function directly and remove the field. Simplifies the code and resolves a long-standing TODO item. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230613150441.17720-3-tzimmermann@suse.de
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#
82836692 |
|
13-Feb-2023 |
Kalyan Thota <quic_kalyant@quicinc.com> |
drm/msm/dpu: manage DPU resources if CTM is requested Allow modeset to be triggered during CTM enable/disable. In the modeset callbacks, DPU resources required for the CTM feature are managed appropriately. Signed-off-by: Kalyan Thota <quic_kalyant@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/522448/ Link: https://lore.kernel.org/r/1676286704-818-5-git-send-email-quic_kalyant@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
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#
940b869c |
|
03-Apr-2023 |
Thomas Zimmermann <tzimmermann@suse.de> |
drm/msm: Implement fbdev emulation as in-kernel client Move code from ad-hoc fbdev callbacks into DRM client functions and remove the old callbacks. The functions instruct the client to poll for changed output or restore the display. The DRM core calls both, the old callbacks and the new client helpers, from the same places. The new functions perform the same operation as before, so there's no change in functionality. Replace all code that initializes or releases fbdev emulation throughout the driver. Instead initialize the fbdev client by a single call to msm_fbdev_setup() after msm has registered its DRM device. As in most drivers, msm's fbdev emulation now acts like a regular DRM client. The fbdev client setup consists of the initial preparation and the hot-plugging of the display. The latter creates the fbdev device and sets up the fbdev framebuffer. The setup performs display hot-plugging once. If no display can be detected, DRM probe helpers re-run the detection on each hotplug event. A call to drm_dev_unregister() releases the client automatically. No further action is required within msm. If the fbdev framebuffer has been fully set up, struct fb_ops.fb_destroy implements the release. For partially initialized emulation, the fbdev client reverts the initial setup. v2: * handle fbdev module parameter correctly (kernel test robot) Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> # RB5 Patchwork: https://patchwork.freedesktop.org/patch/530560/ Link: https://lore.kernel.org/r/20230403124538.8497-9-tzimmermann@suse.de Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
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#
e1344634 |
|
03-Apr-2023 |
Thomas Zimmermann <tzimmermann@suse.de> |
drm/msm: Remove fbdev from struct msm_drm_private The DRM device stores a pointer to the fbdev helper. Remove struct msm_drm_private.fbdev, which contains the same value. No functional changes. v2: * test for fb_helper->fb in debugfs code Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/530559/ Link: https://lore.kernel.org/r/20230403124538.8497-6-tzimmermann@suse.de Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
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#
4969bccd |
|
24-Mar-2023 |
Rob Clark <robdclark@chromium.org> |
drm/msm: Avoid rounding down to zero jiffies If userspace asked for a timeout greater than zero, but less than a jiffy, they clearly weren't planning on spinning. So it is better to round up to one. This fixes an issue with supertuxkart that was (for some reason) spinning on a gl sync with 1ms timeout. CPU time for a demo lap drops from: 15.83user 20.98system 0:47.46elapsed 77%CPU drops to: 8.84user 2.30system 0:46.67elapsed 23%CPU Signed-off-by: Rob Clark <robdclark@chromium.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/528725/ Link: https://lore.kernel.org/r/20230324220013.191795-1-robdclark@gmail.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
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#
6563f60f |
|
10-Jan-2023 |
Rob Clark <robdclark@chromium.org> |
drm/msm/gpu: Add devfreq tuning debugfs Make the handful of tuning knobs available visible via debugfs. v2: select DEVFREQ_GOV_SIMPLE_ONDEMAND because for some reason struct devfreq_simple_ondemand_data depends on this Signed-off-by: Rob Clark <robdclark@chromium.org> Patchwork: https://patchwork.freedesktop.org/patch/517784/ Link: https://lore.kernel.org/r/20230110231447.1939101-2-robdclark@gmail.com Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
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#
4ba5a4ad |
|
21-Dec-2022 |
Marijn Suijten <marijn.suijten@somainline.org> |
drm/msm/dpu: Remove num_enc from topology struct in favour of num_dsc Downstream calls this num_enc yet the DSC patches introduced a new num_dsc struct member, leaving num_enc effectively unused. Fixes: 7e9cc175b159 ("drm/msm/disp/dpu1: Add support for DSC in topology") Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/515688/ Link: https://lore.kernel.org/r/20221221231943.1961117-7-marijn.suijten@somainline.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
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#
4a352c2f |
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07-Dec-2022 |
Bjorn Andersson <andersson@kernel.org> |
drm/msm/dpu: Introduce SC8280XP The Qualcomm SC8280XP platform contains DPU version 8.0.0, has 9 interfaces, 2 DSI controllers and 4 DisplayPort controllers. Extend the necessary definitions and describe the DPU in the SC8280XP. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Kuogee Hsieh <quic_khsieh@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/514398/ Link: https://lore.kernel.org/r/20221207220012.16529-3-quic_bjorande@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
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#
5bd69fd1 |
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07-Dec-2022 |
Bjorn Andersson <andersson@kernel.org> |
drm/msm/dp: Add DP and EDP compatibles for SC8280XP The SC8280XP platform has four DisplayPort controllers, per MDSS instance, all with widebus support. The first two are defined to be DisplayPort only, while the latter pair (of each instance) can be either DisplayPort or Embedded DisplayPort. The two sets are tied to the possible compatibels. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> Reviewed-by: Kuogee Hsieh <quic_khsieh@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/514394/ Link: https://lore.kernel.org/r/20221207220012.16529-7-quic_bjorande@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
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#
d73b1d02 |
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14-Nov-2022 |
Rob Clark <robdclark@chromium.org> |
drm/msm: Hangcheck progress detection If the hangcheck timer expires, check if the fw's position in the cmdstream has advanced (changed) since last timer expiration, and allow it up to three additional "extensions" to it's alotted time. The intention is to continue to catch "shader stuck in a loop" type hangs quickly, but allow more time for things that are actually making forward progress. Because we need to sample the CP state twice to detect if there has not been progress, this also cuts the the timer's duration in half. v2: Fix typo (REG_A6XX_CP_CSQ_IB2_STAT), add comment v3: Only halve hangcheck timer duration for generations which support progress detection (hdanton); removed unused a5xx progress (without knowing how to adjust for data buffered in ROQ it is too likely to report a false negative) v4: Comment updates to better describe the total hangcheck duration when progress detection is applied Reviewed-by: Chia-I Wu <olvaffe@gmail.com> Tested-by: Chia-I Wu <olvaffe@gmail.com> # dEQP-GLES2.functional.flush_finish.wait Signed-off-by: Rob Clark <robdclark@chromium.org> Reviewed-by: Akhil P Oommen <quic_akhilpo@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/511584/ Link: https://lore.kernel.org/r/20221114193049.1533391-3-robdclark@gmail.com
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#
5ccdceca |
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05-Aug-2022 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
drm/msm: lookup the ICC paths in both mdp5/dpu and mdss devices The commit 6874f48bb8b0 ("drm/msm: make mdp5/dpu devices master components") changed the MDP5 driver to look for the interconnect paths in the MDSS device rather than in the MDP5 device itself. This was left unnoticed since on my testing devices the interconnects probably didn't reach the sync state. Rather than just using the MDP5 device for ICC path lookups for the MDP5 devices, introduce an additional helper to check both MDP5/DPU and MDSS nodes. This will be helpful for the MDP5->DPU conversion, since the driver will have to check both nodes. Fixes: 6874f48bb8b0 ("drm/msm: make mdp5/dpu devices master components") Reported-by: Marijn Suijten <marijn.suijten@somainline.org> Reported-by: Yassine Oudjana <y.oudjana@protonmail.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Tested-by: Marijn Suijten <marijn.suijten@somainline.org> # On sdm630 Tested-by: Yassine Oudjana <y.oudjana@protonmail.com> # msm8996 Patchwork: https://patchwork.freedesktop.org/patch/496488/ Link: https://lore.kernel.org/r/20220805115630.506391-1-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
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#
4b2b1b36 |
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11-Jul-2022 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
drm/msm/dsi: use drm_dsc_config instead of msm_display_dsc_config There is no need to use the struct msm_display_dsc_config wrapper inside the dsi driver, use the struct drm_dsc_config directly to pass pps data. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Patchwork: https://patchwork.freedesktop.org/patch/493341/ Link: https://lore.kernel.org/r/20220711100432.455268-3-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
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#
6d29709d |
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07-Aug-2022 |
Rob Clark <robdclark@chromium.org> |
drm/msm: Add fault-injection support Intended as a way to trigger error paths in mesa. Signed-off-by: Rob Clark <robdclark@chromium.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/496710/ Link: https://lore.kernel.org/r/20220807172848.2432845-1-robdclark@gmail.com
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#
b352ba54 |
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02-Aug-2022 |
Rob Clark <robdclark@chromium.org> |
drm/msm/gem: Convert to using drm_gem_lru This converts over to use the shared GEM LRU/shrinker helpers. Note that it means we are no longer tracking purgeable or willneed buffers that are active separately. But the most recently pinned buffers should be at the tail of the various LRUs, and the shrinker is already prepared to encounter objects which are still active. Signed-off-by: Rob Clark <robdclark@chromium.org> Patchwork: https://patchwork.freedesktop.org/patch/496131/ Link: https://lore.kernel.org/r/20220802155152.1727594-11-robdclark@gmail.com
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254e5e88 |
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20-Jul-2022 |
Thomas Zimmermann <tzimmermann@suse.de> |
drm: Remove unnecessary include statements of drm_plane_helper.h Remove the include statement for drm_plane_helper.h from all the files that don't need it. Althogh the header file is almost empty, many drivers include it somewhere. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Sam Ravnborg <sam@ravnborg.org> Link: https://patchwork.freedesktop.org/patch/msgid/20220720083058.15371-5-tzimmermann@suse.de
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#
40ae54ed |
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16-Jun-2022 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
drm/msm: move KMS aspace init to the separate helper MDP5 and DPU drivers have the same piece of code now to initialize IOMMU and GEM address space. Move it to the msm_drv.c Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/489701/ Link: https://lore.kernel.org/r/20220616081106.350262-5-dmitry.baryshkov@linaro.org Signed-off-by: Rob Clark <robdclark@chromium.org>
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#
b6529e33 |
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07-May-2022 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
drm/msm/dpu: drop enum msm_display_caps After the commit c46f0d69039c ("drm/msm: remove unused hotplug and edid macros from msm_drv.h") the msm_display_caps enum contains two bits describing whether the encoder should work in video or command mode. Drop the enum and replace capabilities field in struct msm_display_info with boolean is_cmd_mode field. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/485454/ Link: https://lore.kernel.org/r/20220507115942.1705872-2-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
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#
036d2072 |
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31-May-2022 |
Rob Clark <robdclark@chromium.org> |
drm/msm: Ensure mmap offset is initialized If a GEM object is allocated, and then exported as a dma-buf fd which is mmap'd before or without the GEM buffer being directly mmap'd, the vma_node could be unitialized. This leads to a situation where the CPU mapping is not correctly torn down in drm_vma_node_unmap(). Fixes: e5516553999f ("drm: call drm_gem_object_funcs.mmap with fake offset") Signed-off-by: Rob Clark <robdclark@chromium.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20220531200857.136547-1-robdclark@gmail.com
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13ea4799 |
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11-Feb-2022 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
drm/msm/dp: remove extra wrappers and public functions dp_bridge's functions are thin wrappers around the msm_dp_display_* family. Squash dp_bridge callbacks into respective msm_dp_display functions, removing the latter functions from public space. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Tested-by: Sankeerth Billakanti <quic_sbillaka@quicinc.com> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/473858/ Link: https://lore.kernel.org/r/20220211224006.1797846-6-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
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#
c46f0d69 |
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15-Apr-2022 |
Abhinav Kumar <quic_abhinavk@quicinc.com> |
drm/msm: remove unused hotplug and edid macros from msm_drv.h Remove unused MSM_DISPLAY_CAP_HOT_PLUG and MSM_DISPLAY_CAP_EDID macros from msm_drv.h. Even if we need these, there are drm equivalent ones present. Reported-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Patchwork: https://patchwork.freedesktop.org/patch/482260/ Link: https://lore.kernel.org/r/1650049782-8421-1-git-send-email-quic_abhinavk@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
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#
7e9cc175 |
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06-Apr-2022 |
Vinod Koul <vkoul@kernel.org> |
drm/msm/disp/dpu1: Add support for DSC in topology For DSC to work we typically need a 2,2,1 configuration. This should suffice for resolutions up to 4k. For more resolutions like 8k this won't work. Also, it is better to use 2 LMs and DSC instances as half width results in lesser power consumption as compared to single LM, DSC at full width. The panel has been tested only with 2,2,1 configuration, so for now we blindly create 2,2,1 topology when DSC is enabled Co-developed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Vinod Koul <vkoul@kernel.org> Patchwork: https://patchwork.freedesktop.org/patch/480925/ Link: https://lore.kernel.org/r/20220406094031.1027376-11-vkoul@kernel.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
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#
1d6fe0b7 |
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06-Apr-2022 |
Vinod Koul <vkoul@kernel.org> |
drm/msm: Add missing num_dspp field documentation Somehow documentation for num_dspp was missed, so add that Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Vinod Koul <vkoul@kernel.org> Patchwork: https://patchwork.freedesktop.org/patch/480924/ Link: https://lore.kernel.org/r/20220406094031.1027376-10-vkoul@kernel.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
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0f40ba48 |
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06-Apr-2022 |
Vinod Koul <vkoul@kernel.org> |
drm/msm/dsi: Pass DSC params to drm_panel When DSC is enabled, we need to get the DSC parameters from the panel driver, so add a dsc parameter in panel to fetch and pass DSC configuration for DSI panels to DPU encoder, which will enable and then configure DSC hardware blocks accordingly. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Vinod Koul <vkoul@kernel.org> Patchwork: https://patchwork.freedesktop.org/patch/480910/ Link: https://lore.kernel.org/r/20220406094031.1027376-3-vkoul@kernel.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
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b9080324 |
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06-Apr-2022 |
Vinod Koul <vkoul@kernel.org> |
drm/msm/dsi: add support for dsc data Display Stream Compression (DSC) parameters need to be calculated. Add helpers and struct msm_display_dsc_config in msm_drv for this msm_display_dsc_config uses drm_dsc_config for DSC parameters. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Vinod Koul <vkoul@kernel.org> Patchwork: https://patchwork.freedesktop.org/patch/480908/ Link: https://lore.kernel.org/r/20220406094031.1027376-2-vkoul@kernel.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
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757a2f36 |
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25-Feb-2022 |
Kuogee Hsieh <quic_khsieh@quicinc.com> |
drm/msm/dp: enable widebus feature for display port Widebus feature will transmit two pixel data per pixel clock to interface. This feature now is required to be enabled to easy migrant to higher resolution applications in future. However since some legacy chipsets does not support this feature, this feature is enabled by setting wide_bus_en flag to true within msm_dp_desc struct. changes in v2: -- remove compression related code from timing -- remove op_info from struct msm_drm_private -- remove unnecessary wide_bus_en variables -- pass wide_bus_en into timing configuration by struct msm_dp Changes in v3: -- split patch into 3 patches -- enable widebus feature base on chip hardware revision Changes in v5: -- DP_INTF_CONFIG_DATABUS_WIDEN Changes in v6: -- static inline bool msm_dp_wide_bus_enable() in msm_drv.h Changes in v7: -- add Tested-by Changes in v9: -- add wide_bus_en to msm_dp_desc Changes in v10: -- add wide_bus_en boolean to dp_catalog struc to avoid passing it as parameter Changes in v11: -- add const to dp_catalog_hw_revision() -- add const to msm_dp_wide_bus_available() Changes in v12: -- dp_catalog_hw_revision(const struct dp_catalog *dp_catalog) -- msm_dp_wide_bus_available(const struct msm_dp *dp_display) Signed-off-by: Kuogee Hsieh <quic_khsieh@quicinc.com> Reported-by: kernel test robot <lkp@intel.com> Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/476283/ Link: https://lore.kernel.org/r/1645824192-29670-5-git-send-email-quic_khsieh@quicinc.com [DB: fixed the compilation] Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
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8e809dfb |
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06-Apr-2022 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
drm/msm: remove unused plane_property field from msm_drm_private Remove unused field plane_property from struct msm_drm_private. Also drop the enum msm_mdp_plane_property which also becomes unused. Fixes: 7d36db0be3b9 ("drm/msm/mdp5: switch to standard zpos property") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Patchwork: https://patchwork.freedesktop.org/patch/480939/ Link: https://lore.kernel.org/r/20220406100556.479706-1-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
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0054ac2c |
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06-Apr-2022 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
drm/msm: don't store created planes, connectors and encoders There is no point now in storing arrays of creates planes, connectors and encoders. Remove them from struct msm_drm_private. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Patchwork: https://patchwork.freedesktop.org/patch/480945/ Link: https://lore.kernel.org/r/20220406101247.483649-4-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
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6874f48b |
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19-Apr-2022 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
drm/msm: make mdp5/dpu devices master components The msm_mdss serves several roles at this moment. It provides IRQ domain used by MDP5 and DPU drivers but it also serves as a component master for both those usecases. MDP4 (which does not have separate MDSS device) is the component master on it's own. Remove this assymmetry and make both MDP5 and DPU component masters too. This removes a need to care about drm/components from msm_mdss driver, removes an mdss pointer from struct msm_drm_private and simplifies the interface between mdp5/dpu and msm_drv. Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/482512/ Link: https://lore.kernel.org/r/20220419155346.1272627-7-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
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dc43e923 |
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19-Apr-2022 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
drm/msm: allow compile time selection of driver components MSM DRM driver already allows one to compile out the DP or DSI support. Add support for disabling other features like MDP4/MDP5/DPU drivers or direct HDMI output support. Suggested-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/482508/ Link: https://lore.kernel.org/r/20220419155346.1272627-6-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
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5d44531b |
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19-Apr-2022 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
drm/msm: stop using device's match data pointer Let's make the match's data pointer a (sub-)driver's private data. The only user currently is the msm_drm_init() function, using this data to select kms_init callback. Pass this callback through the driver's private data instead. Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/482510/ Link: https://lore.kernel.org/r/20220419155346.1272627-5-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
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ecb23f2e |
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19-Apr-2022 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
drm/msm: split the main platform driver Currently the msm platform driver is a multiplex handling several cases: - headless GPU-only driver, - MDP4 with flat device nodes, - MDP5/DPU MDSS with all the nodes being children of MDSS node. This results in not-so-perfect code, checking the hardware version (MDP4/MDP5/DPU) in several places, checking for mdss even when it can not exist, etc. Split the code into three handling subdrivers (mdp4, mdss and headless msm). Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reported-by: kernel test robot <lkp@intel.com> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/482507/ Link: https://lore.kernel.org/r/20220419155346.1272627-4-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
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695383a1 |
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11-Apr-2022 |
Rob Clark <robdclark@chromium.org> |
drm/msm/gem: Move prototypes These belong more cleanly in the gem header. Signed-off-by: Rob Clark <robdclark@chromium.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20220411215849.297838-2-robdclark@gmail.com Signed-off-by: Rob Clark <robdclark@chromium.org>
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9e4dde28 |
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23-Feb-2022 |
Rob Clark <robdclark@chromium.org> |
drm/msm: Avoid dirtyfb stalls on video mode displays (v2) Someone on IRC once asked an innocent enough sounding question: Why with xf86-video-modesetting is es2gears limited at 120fps. So I broke out the perfetto tracing mesa MR and took a look. It turns out the problem was drm_atomic_helper_dirtyfb(), which would end up waiting for vblank.. es2gears would rapidly push two frames to Xorg, which would blit them to screen and in idle hook (I assume) call the DIRTYFB ioctl. Which in turn would do an atomic update to flush the dirty rects, which would stall until the next vblank. And then the whole process would repeat. But this is a bit silly, we only need dirtyfb for command mode DSI panels. So track in plane state whether dirtyfb is required, and track in the fb how many attached planes require dirtyfb so that we can skip it when not required. (Note, mdp4 does not actually have cmd mode support.) Signed-off-by: Rob Clark <robdclark@chromium.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20220223191118.881321-1-robdclark@gmail.com Signed-off-by: Rob Clark <robdclark@chromium.org>
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b7420739 |
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16-Feb-2022 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
drm/msm: move struct msm_display_info to dpu driver The msm_display_info structure is not used by the rest of msm driver, so move it into the dpu1 (dpu_encoder.h to be precise). Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20220217035358.465904-3-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
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3f4a80cb |
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05-Jan-2022 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
drm/msm: move msm_readl/_writel to msm_drv.h With the reglog removal, msm_readl/_writel became single line wrappers around readl/writel. Move those two wrappers and msm_rmw to msm_drv.h to remove need for extra function calls when doing register writes. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/20220105232700.444170-3-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
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c0e745d7 |
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05-Jan-2022 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
drm/msm: drop dbgname argument from msm_ioremap*() msm_ioremap() functions take additional argument dbgname which is now unused. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/20220105232700.444170-2-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
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7938f421 |
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04-Feb-2022 |
Lucas De Marchi <lucas.demarchi@intel.com> |
dma-buf-map: Rename to iosys-map Rename struct dma_buf_map to struct iosys_map and corresponding APIs. Over time dma-buf-map grew up to more functionality than the one used by dma-buf: in fact it's just a shim layer to abstract system memory, that can be accessed via regular load and store, from IO memory that needs to be acessed via arch helpers. The idea is to extend this API so it can fulfill other needs, internal to a single driver. Example: in the i915 driver it's desired to share the implementation for integrated graphics, which uses mostly system memory, with discrete graphics, which may need to access IO memory. The conversion was mostly done with the following semantic patch: @r1@ @@ - struct dma_buf_map + struct iosys_map @r2@ @@ ( - DMA_BUF_MAP_INIT_VADDR + IOSYS_MAP_INIT_VADDR | - dma_buf_map_set_vaddr + iosys_map_set_vaddr | - dma_buf_map_set_vaddr_iomem + iosys_map_set_vaddr_iomem | - dma_buf_map_is_equal + iosys_map_is_equal | - dma_buf_map_is_null + iosys_map_is_null | - dma_buf_map_is_set + iosys_map_is_set | - dma_buf_map_clear + iosys_map_clear | - dma_buf_map_memcpy_to + iosys_map_memcpy_to | - dma_buf_map_incr + iosys_map_incr ) @@ @@ - #include <linux/dma-buf-map.h> + #include <linux/iosys-map.h> Then some files had their includes adjusted and some comments were update to remove mentions to dma-buf-map. Since this is not specific to dma-buf anymore, move the documentation to the "Bus-Independent Device Accesses" section. v2: - Squash patches v3: - Fix wrong removal of dma-buf.h from MAINTAINERS - Move documentation from dma-buf.rst to device-io.rst v4: - Change documentation title and level Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> Acked-by: Christian König <christian.koenig@amd.com> Acked-by: Sumit Semwal <sumit.semwal@linaro.org> Acked-by: Thomas Zimmermann <tzimmermann@suse.de> Link: https://patchwork.freedesktop.org/patch/msgid/20220204170541.829227-1-lucas.demarchi@intel.com
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8a3b4c17 |
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07-Dec-2021 |
Kuogee Hsieh <quic_khsieh@quicinc.com> |
drm/msm/dp: employ bridge mechanism for display enable and disable Currently the msm_dp_*** functions implement the same sequence which would happen when drm_bridge is used. hence get rid of this intermediate layer and align with the drm_bridge usage to avoid customized implementation. Signed-off-by: Kuogee Hsieh <quic_khsieh@quicinc.com> Changes in v2: -- revise commit text -- rename dp_bridge to msm_dp_bridge -- delete empty functions Changes in v3: -- replace kzalloc() with devm_kzalloc() -- replace __dp_display_enable() with dp_display_enable() -- replace __dp_display_disable() with dp_display_disable() Changes in v4: -- msm_dp_bridge_init() called from msm_dp_modeset_init() same as dsi Changes in v5: -- delete attach, mode_fixup and pre_enable from dp_bridge_ops Changes in v6: -- rebase on msm-next-plus-fixes branch Signed-off-by: Kuogee Hsieh <quic_khsieh@quicinc.com> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Link: https://lore.kernel.org/r/1638918933-2544-1-git-send-email-quic_khsieh@quicinc.com Signed-off-by: Rob Clark <robdclark@chromium.org>
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#
5edf2750 |
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09-Nov-2021 |
Rob Clark <robdclark@chromium.org> |
drm/msm: Add debugfs to disable hw err handling Add a debugfs interface to ignore hw error irqs, in order to force fallback to sw hangcheck mechanism. Because the hw error detection is pretty good on newer gens, we need this for igt tests to test the sw hang detection. Signed-off-by: Rob Clark <robdclark@chromium.org> Reviewed-by: Akhil P Oommen <akhilpo@codeaurora.org> Link: https://lore.kernel.org/r/20211109181117.591148-6-robdclark@gmail.com Signed-off-by: Rob Clark <robdclark@chromium.org>
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1d054c9b |
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09-Nov-2021 |
Rob Clark <robdclark@chromium.org> |
drm/msm: Drop priv->lastctx cur_ctx_seqno already does the same thing, but handles the edge cases where a refcnt'd context can live after lastclose. So let's not have two ways to do the same thing. Signed-off-by: Rob Clark <robdclark@chromium.org> Reviewed-by: Akhil P Oommen <akhilpo@codeaurora.org> Link: https://lore.kernel.org/r/20211109181117.591148-3-robdclark@gmail.com Signed-off-by: Rob Clark <robdclark@chromium.org>
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0a26daaa |
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01-Oct-2021 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
drm/msm/edp: drop old eDP support MSM DRM driver has support for eDP block present on MSM 8x74/8x84 SoC families. However since addition back in 2015 this driver received only generic fixes. No actual devices with these SoCs supported upstream (or by the community) seem to support eDP panels. Judging from downstream kernels the eDP was present only on MSM8974 LIQUID or on APQ8084 CDP. Remove this driver. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20211001165011.441945-3-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> [rob: Rebased on "drm: msm: fix building without CONFIG_COMMON_CLK"] Signed-off-by: Rob Clark <robdclark@chromium.org>
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#
8f59ee9a |
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25-Oct-2021 |
Rob Clark <robdclark@chromium.org> |
drm/msm/dsi: Adjust probe order Switch to the documented order dsi-host vs bridge probe. Tested-by: Amit Pundir <amit.pundir@linaro.org> Tested-by: Caleb Connolly <caleb.connolly@linaro.org> Tested-by: John Stultz <john.stultz@linaro.org> Signed-off-by: Rob Clark <robdclark@chromium.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://patchwork.freedesktop.org/patch/msgid/20211025151536.1048186-22-maxime@cerno.tech
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bb3de286 |
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16-Oct-2021 |
Bjorn Andersson <bjorn.andersson@linaro.org> |
drm/msm/dp: Support up to 3 DP controllers Based on the removal of the g_dp_display and the movement of the priv->dp lookup into the DP code it's now possible to have multiple DP instances. In line with the other controllers in the MSM driver, introduce a per-compatible list of base addresses which is used to resolve the "instance id" for the given DP controller. This instance id is used as index in the priv->dp[] array. Then extend the initialization code to initialize struct drm_encoder for each of the registered priv->dp[] and update the logic for associating each struct msm_dp with the struct dpu_encoder_virt. A new enum is introduced to document the connection between the instances referenced in the dpu_intf_cfg array and the controllers in the DP driver and sc7180 is updated. Lastly, bump the number of struct msm_dp instances carries by priv->dp to 3, the currently known maximum number of controllers found in a Qualcomm SoC. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/20211016221843.2167329-6-bjorn.andersson@linaro.org Signed-off-by: Rob Clark <robdclark@chromium.org>
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ddb6e37a |
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27-Sep-2021 |
Rob Clark <robdclark@chromium.org> |
drm/msm: Add hrtimer + kthread_work helper Before open-coding this a 2nd time, add a helper. Signed-off-by: Rob Clark <robdclark@chromium.org> Link: https://lore.kernel.org/r/20210927230455.1066297-1-robdclark@gmail.com Signed-off-by: Rob Clark <robdclark@chromium.org>
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171316a6 |
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16-Sep-2021 |
Marek Vasut <marex@denx.de> |
drm/msm: Avoid potential overflow in timeout_to_jiffies() The return type of ktime_divns() is s64. The timeout_to_jiffies() currently assigns the result of this ktime_divns() to unsigned long, which on 32 bit systems may overflow. Furthermore, the result of this function is sometimes also passed to functions which expect signed long, dma_fence_wait_timeout() is one such example. Fix this by adjusting the type of remaining_jiffies to s64, so we do not suffer overflow there, and return a value limited to range of 0..INT_MAX, which is safe for all usecases of this timeout. The above overflow can be triggered if userspace passes in too large timeout value, larger than INT_MAX / HZ seconds. The kernel detects it and complains about "schedule_timeout: wrong timeout value %lx" and generates a warning backtrace. Note that this fixes commit 6cedb8b377bb ("drm/msm: avoid using 'timespec'"), because the previously used timespec_to_jiffies() function returned unsigned long instead of s64: static inline unsigned long timespec_to_jiffies(const struct timespec *value) Fixes: 6cedb8b377bb ("drm/msm: avoid using 'timespec'") Signed-off-by: Marek Vasut <marex@denx.de> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Jordan Crouse <jcrouse@codeaurora.org> Cc: Rob Clark <robdclark@chromium.org> Cc: stable@vger.kernel.org # 5.6+ Acked-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20210917005913.157379-1-marex@denx.de Signed-off-by: Rob Clark <robdclark@chromium.org>
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4cd82aa3 |
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01-Oct-2021 |
Rob Clark <robdclark@chromium.org> |
drm/msm: A bit more docs + cleanup msm_file_private is more gpu related, and in the next commit it will need access to other GPU specific #defines. While we're at it, add some comments. Signed-off-by: Rob Clark <robdclark@chromium.org>
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14eb0cb4 |
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30-Sep-2021 |
Rob Clark <robdclark@chromium.org> |
drm/msm/a6xx: Track current ctx by seqno In theory a context can be destroyed and a new one allocated at the same address, making the pointer comparision to detect when we don't need to update the current pagetables invalid. Instead assign a sequence number to each context on creation, and use this for the check. Fixes: 84c31ee16f90 ("drm/msm/a6xx: Add support for per-instance pagetables") Signed-off-by: Rob Clark <robdclark@chromium.org>
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f518f6c1 |
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17-Jul-2021 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
drm/msm/dsi: add three helper functions Add three helper functions to be used by display drivers for setting up encoders. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org> Link: https://lore.kernel.org/r/20210717124016.316020-3-dmitry.baryshkov@linaro.org Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
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510410bf |
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06-Jul-2021 |
Thomas Zimmermann <tzimmermann@suse.de> |
drm/msm: Implement mmap as GEM object function Moving the driver-specific mmap code into a GEM object function allows for using DRM helpers for various mmap callbacks. The respective msm functions are being removed. The file_operations structure fops is now being created by the helper macro DEFINE_DRM_GEM_FOPS(). v2: * rebase onto latest upstream * remove declaration of msm_gem_mmap_obj() from msm_fbdev.c Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Link: https://lore.kernel.org/r/20210706084753.8194-1-tzimmermann@suse.de [squash in missing VM_DONTEXPAND flag] Signed-off-by: Rob Clark <robdclark@chromium.org>
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5434941f |
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14-Jun-2021 |
Rob Clark <robdclark@chromium.org> |
drm/msm: Add debugfs to trigger shrinker Just for the purposes of testing. Write to it the # of objects to scan, read back the # freed. Signed-off-by: Rob Clark <robdclark@chromium.org> Link: https://lore.kernel.org/r/20210614150618.729610-1-robdclark@gmail.com Signed-off-by: Rob Clark <robdclark@chromium.org>
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1d2fa58e |
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06-Jun-2021 |
Samuel Iglesias Gonsalvez <siglesias@igalia.com> |
drm/msm: export hangcheck_period in debugfs While keeping the previous default value for hangcheck period, we allow now the possibility of configuring its value via debugfs. Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com> Link: https://lore.kernel.org/r/20210607104441.184700-1-siglesias@igalia.com Signed-off-by: Rob Clark <robdclark@chromium.org>
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cc4c26d4 |
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30-May-2021 |
Rob Clark <robdclark@chromium.org> |
drm/msm: Generated register update Based on mesa commit daa2ccff7a0201941db3901780d179e2634057d5 Small bit of .c churn in the phy code to adapt to split up of phy related registers. Signed-off-by: Rob Clark <robdclark@chromium.org>
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53e23170 |
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27-May-2021 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
drm/msm: fix display snapshotting if DP or DSI is disabled Fix following warnings generated when either DP or DSI support is disabled: drivers/gpu/drm/msm/disp/msm_disp_snapshot_util.c:141:3: error: implicit declaration of function 'msm_dp_snapshot'; did you mean 'msm_dsi_snapshot'? [-Werror=implicit-function-declaration] drivers/gpu/drm/msm/msm_kms.h:127:26: warning: 'struct msm_disp_state' declared inside parameter list will not be visible outside of this definition or declaration drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c:867:21: error: initialization of 'void (*)(struct msm_disp_state *, struct msm_kms *)' from incompatible pointer type 'void (*)(struct msm_disp_state *, struct msm_kms *)' [-Werror=incompatible-pointer-types] drivers/gpu/drm/msm/dsi/dsi.h:94:30: warning: 'struct msm_disp_state' declared inside parameter list will not be visible outside of this definition or declaration Reported-by: kernel test robot <lkp@intel.com> Cc: Abhinav Kumar <abhinavk@codeaurora.org> Fixes: 1c3b7ac1a71d ("drm/msm: pass dump state as a function argument") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org> Link: https://lore.kernel.org/r/20210527220330.3364716-1-dmitry.baryshkov@linaro.org Signed-off-by: Rob Clark <robdclark@chromium.org>
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d12e3390 |
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23-Apr-2021 |
Jonathan Marek <jonathan@marek.ca> |
drm/msm: add MSM_BO_CACHED_COHERENT Add a new cache mode for creating coherent host-cached BOs. Signed-off-by: Jonathan Marek <jonathan@marek.ca> Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org> Link: https://lore.kernel.org/r/20210423190833.25319-5-jonathan@marek.ca Signed-off-by: Rob Clark <robdclark@chromium.org>
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bac2c6a6 |
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26-Apr-2021 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
drm/msm: get rid of msm_iomap_size Instead of looping throught the resources each time to get the DSI CTRL area size, get it at the ioremap time. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org> Link: https://lore.kernel.org/r/20210427001828.2375555-4-dmitry.baryshkov@linaro.org Signed-off-by: Rob Clark <robdclark@chromium.org>
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eb9d6c7e |
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26-Apr-2021 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
drm/msm: pass dump state as a function argument Instead of always getting the disp_state from drm device, pass it as an argument. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org> Link: https://lore.kernel.org/r/20210427001828.2375555-2-dmitry.baryshkov@linaro.org Signed-off-by: Rob Clark <robdclark@chromium.org>
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0f6090f3 |
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16-Apr-2021 |
Abhinav Kumar <abhinavk@codeaurora.org> |
drm/msm/dp: add API to take DP register snapshot Add an API to take a snapshot of DP controller registers. This API will be used by the msm_disp_snapshot module to capture the DP snapshot. Signed-off-by: Abhinav Kumar <abhinavk@codeaurora.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/1618606645-19695-5-git-send-email-abhinavk@codeaurora.org Signed-off-by: Rob Clark <robdclark@chromium.org>
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98659487 |
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16-Apr-2021 |
Abhinav Kumar <abhinavk@codeaurora.org> |
drm/msm: add support to take dpu snapshot Add the msm_disp_snapshot module which adds supports to dump dpu registers and capture the drm atomic state which can be used in case of error conditions. changes in v5: - start storing disp_state in msm_kms instead of dpu_kms - get rid of MSM_DISP_SNAPSHOT_IN_* enum by simplifying the functions - move snprintf inside the snapshot core by using varargs - get rid of some stale code comments - allow snapshot module for non-DPU targets Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Abhinav Kumar <abhinavk@codeaurora.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/1618606645-19695-3-git-send-email-abhinavk@codeaurora.org Signed-off-by: Rob Clark <robdclark@chromium.org>
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64fcbde7 |
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05-Apr-2021 |
Rob Clark <robdclark@chromium.org> |
drm/msm: Track potentially evictable objects Objects that are potential for swapping out are (1) willneed (ie. if they are purgable/MADV_WONTNEED we can just free the pages without them having to land in swap), (2) not on an active list, (3) not dma-buf imported or exported, and (4) not vmap'd. This repurposes the purged list for objects that do not have backing pages (either because they have not been pinned for the first time yet, or in a later patch because they have been unpinned/evicted. Signed-off-by: Rob Clark <robdclark@chromium.org> Link: https://lore.kernel.org/r/20210405174532.1441497-7-robdclark@gmail.com Signed-off-by: Rob Clark <robdclark@chromium.org>
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25ed38b3 |
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02-Apr-2021 |
Rob Clark <robdclark@chromium.org> |
drm/msm: Drop mm_lock in scan loop lock_stat + mmm_donut[1] say that this reduces contention on mm_lock significantly (~350x lower waittime-max, and ~100x lower waittime-avg) [1] https://chromium.googlesource.com/chromiumos/platform/microbenchmarks/+/refs/heads/main/mmm_donut.py Signed-off-by: Rob Clark <robdclark@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20210402211226.875726-1-robdclark@gmail.com Signed-off-by: Rob Clark <robdclark@chromium.org>
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6ed0897c |
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31-Mar-2021 |
Rob Clark <robdclark@chromium.org> |
drm/msm: Fix debugfs deadlock In normal cases the gem obj lock is acquired first before mm_lock. The exception is iterating the various object lists. In the shrinker path, deadlock is avoided by using msm_gem_trylock() and skipping over objects that cannot be locked. But for debugfs the straightforward thing is to split things out into a separate list of all objects protected by it's own lock. Fixes: d984457b31c4 ("drm/msm: Add priv->mm_lock to protect active/inactive lists") Signed-off-by: Rob Clark <robdclark@chromium.org> Tested-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20210401012722.527712-4-robdclark@gmail.com Signed-off-by: Rob Clark <robdclark@chromium.org>
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cc8a4d5a |
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31-Mar-2021 |
Rob Clark <robdclark@chromium.org> |
drm/msm: Avoid mutex in shrinker_count() When the system is under heavy memory pressure, we can end up with lots of concurrent calls into the shrinker. Keeping a running tab on what we can shrink avoids grabbing a lock in shrinker->count(), and avoids shrinker->scan() getting called when not profitable. Also, we can keep purged objects in their own list to avoid re-traversing them to help cut down time in the critical section further. Signed-off-by: Rob Clark <robdclark@chromium.org> Tested-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20210401012722.527712-3-robdclark@gmail.com Signed-off-by: Rob Clark <robdclark@chromium.org>
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40a72b0c |
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24-Nov-2020 |
Sharat Masetty <smasetty@codeaurora.org> |
drm/msm: rearrange the gpu_rmw() function The register read-modify-write construct is generic enough that it can be used by other subsystems as needed, create a more generic rmw() function and have the gpu_rmw() use this new function. Signed-off-by: Sharat Masetty <smasetty@codeaurora.org> Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
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3edfa30f |
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16-Nov-2020 |
Rob Clark <robdclark@chromium.org> |
drm/msm/shrinker: Only iterate dontneed objs In situations where the GPU is mostly idle, all or nearly all buffer objects will be in the inactive list. But if the system is under memory pressure (from something other than GPU), we could still get a lot of shrinker calls. Which results in traversing a list of thousands of objs and in the end finding nothing to shrink. Which isn't so efficient. Instead split the inactive_list into two lists, one inactive objs which are shrinkable, and a second one for those that are not. This way we can avoid traversing objs which we know are not shrinker candidates. v2: Fix inverted logic think-o Signed-off-by: Rob Clark <robdclark@chromium.org>
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b47f9f92 |
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09-Nov-2020 |
Thomas Zimmermann <tzimmermann@suse.de> |
drm/msm: Use struct dma_buf_map in GEM vmap ops Fixes a build failure with msm. This change was supposed to be part of commit 49a3f51dfeee ("drm/gem: Use struct dma_buf_map in GEM vmap ops and convert GEM backends"), but msm was forgotten. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Fixes: 49a3f51dfeee ("drm/gem: Use struct dma_buf_map in GEM vmap ops and convert GEM backends") Cc: Thomas Zimmermann <tzimmermann@suse.de> Cc: Christian König <christian.koenig@amd.com> Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Cc: Maxime Ripard <mripard@kernel.org> Cc: Dave Airlie <airlied@redhat.com> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Russell King <linux+etnaviv@armlinux.org.uk> Cc: Christian Gmeiner <christian.gmeiner@gmail.com> Cc: Qiang Yu <yuq825@gmail.com> Cc: Ben Skeggs <bskeggs@redhat.com> Cc: Rob Herring <robh@kernel.org> Cc: Tomeu Vizoso <tomeu.vizoso@collabora.com> Cc: Steven Price <steven.price@arm.com> Cc: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: "Christian König" <christian.koenig@amd.com> Cc: Sandy Huang <hjc@rock-chips.com> Cc: "Heiko Stübner" <heiko@sntech.de> Cc: Hans de Goede <hdegoede@redhat.com> Cc: Sean Paul <sean@poorly.run> Cc: Eric Anholt <eric@anholt.net> Cc: Rodrigo Siqueira <rodrigosiqueiramelo@gmail.com> Cc: Melissa Wen <melissa.srw@gmail.com> Cc: Haneen Mohammed <hamohammed.sa@gmail.com> Cc: Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com> Cc: Sumit Semwal <sumit.semwal@linaro.org> Cc: Emil Velikov <emil.velikov@collabora.com> Cc: Luben Tuikov <luben.tuikov@amd.com> Cc: Marek Szyprowski <m.szyprowski@samsung.com> Cc: Arunpravin <apaneers@amd.com> Cc: Huang Rui <ray.huang@amd.com> Cc: Madhav Chauhan <madhav.chauhan@amd.com> Cc: Jason Gunthorpe <jgg@ziepe.ca> Cc: Sam Ravnborg <sam@ravnborg.org> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Qinglang Miao <miaoqinglang@huawei.com> Cc: dri-devel@lists.freedesktop.org Cc: etnaviv@lists.freedesktop.org Cc: lima@lists.freedesktop.org Cc: nouveau@lists.freedesktop.org Cc: virtualization@lists.linux-foundation.org Cc: spice-devel@lists.freedesktop.org Cc: amd-gfx@lists.freedesktop.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-rockchip@lists.infradead.org Cc: xen-devel@lists.xenproject.org Link: https://patchwork.freedesktop.org/patch/msgid/20201109103242.19544-2-tzimmermann@suse.de
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c951a9b2 |
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23-Oct-2020 |
Rob Clark <robdclark@chromium.org> |
drm/msm: Remove msm_gem_free_work Now that we don't need struct_mutex in the free path, we can get rid of the asynchronous free altogether. Signed-off-by: Rob Clark <robdclark@chromium.org> Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com> Signed-off-by: Rob Clark <robdclark@chromium.org>
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964d2f97 |
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23-Oct-2020 |
Rob Clark <robdclark@chromium.org> |
drm/msm: Refcount submits Before we remove dev->struct_mutex from the retire path, we have to deal with the situation of a submit retiring before the submit ioctl returns. To deal with this, ring->submits will hold a reference to the submit, which is dropped when the submit is retired. And the submit ioctl path holds it's own ref, which it drops when it is done with the submit. Also, add to submit list *after* getting/pinning bo's, to prevent badness in case the completed fence is corrupted, and retire_worker mistakenly believes the submit is done too early. Signed-off-by: Rob Clark <robdclark@chromium.org> Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org> Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com> Signed-off-by: Rob Clark <robdclark@chromium.org>
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d984457b |
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23-Oct-2020 |
Rob Clark <robdclark@chromium.org> |
drm/msm: Add priv->mm_lock to protect active/inactive lists Rather than relying on the big dev->struct_mutex hammer, introduce a more specific lock for protecting the bo lists. Signed-off-by: Rob Clark <robdclark@chromium.org> Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org> Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com> Signed-off-by: Rob Clark <robdclark@chromium.org>
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8f642378 |
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23-Oct-2020 |
Rob Clark <robdclark@chromium.org> |
drm/msm/gem: Move prototypes to msm_gem.h Signed-off-by: Rob Clark <robdclark@chromium.org> Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com> Signed-off-by: Rob Clark <robdclark@chromium.org>
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a0b21e0a |
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25-Oct-2020 |
Robin Murphy <robin.murphy@arm.com> |
drm/msm: Add missing stub definition DRM_MSM fails to build with DRM_MSM_DP=n; add the missing stub. Signed-off-by: Robin Murphy <robin.murphy@arm.com> Reviewed-by: Rob Clark <robdclark@gmail.com> Fixes: 8ede2ecc3e5e ("drm/msm/dp: Add DP compliance tests on Signed-off-by: Rob Clark <robdclark@chromium.org>
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363bcec9 |
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19-Oct-2020 |
Rob Clark <robdclark@chromium.org> |
drm/msm/atomic: Convert to per-CRTC kthread_work Use a SCHED_FIFO kthread_worker for async atomic commits. We have a hard deadline if we don't want to miss a frame. Signed-off-by: Rob Clark <robdclark@chromium.org>
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d1ea9149 |
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25-Sep-2020 |
Abhinav Kumar <abhinavk@codeaurora.org> |
drm/msm/dp: fix incorrect function prototype of dp_debug_get() Fix the incorrect function prototype for dp_debug_get() in the dp_debug module to address compilation warning. Also add prototype for msm_dp_debugfs_init() for fixing compilation issue with other defconfigs. changes in v2: - add prototype for msm_dp_debugfs_init() Fixes: f913454aae8e ("drm/msm/dp: move debugfs node to /sys/kernel/debug/dri/*/") Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Abhinav Kumar <abhinavk@codeaurora.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
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3c9edd9c |
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22-Sep-2020 |
Thomas Zimmermann <tzimmermann@suse.de> |
drm/msm: Introduce GEM object funcs GEM object functions deprecate several similar callback interfaces in struct drm_driver. This patch replaces the per-driver callbacks with per-instance callbacks in msm. The only exception is gem_prime_mmap, which is non-trivial to convert. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Acked-by: Christian König <christian.koenig@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200923102159.24084-10-tzimmermann@suse.de
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9d8baa2b |
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22-Sep-2020 |
Akhil P Oommen <akhilpo@codeaurora.org> |
drm/msm: Fix premature purging of BO In the case where we have a back-to-back submission that shares the same BO, this BO will be prematurely moved to inactive_list while retiring the first submit. But it will be still part of the second submit which is being processed by the GPU. Now, if the shrinker happens to be triggered at this point, it will result in a premature purging of this BO. To fix this, we need to refcount BO while doing submit and retire. Then, it should be moved to inactive list when this refcount becomes 0. Signed-off-by: Akhil P Oommen <akhilpo@codeaurora.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
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f913454a |
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12-Sep-2020 |
Abhinav Kumar <abhinavk@codeaurora.org> |
drm/msm/dp: move debugfs node to /sys/kernel/debug/dri/*/ Move the MSM DP debugfs node from /sys/kernel/debug/drm_dp to /sys/kernel/debug/dri/*/ as required for video pattern compliance test suite. Changes in v2: rebase on top of latest patchset of dependency Signed-off-by: Abhinav Kumar <abhinavk@codeaurora.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
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8ede2ecc |
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11-Sep-2020 |
Kuogee Hsieh <khsieh@codeaurora.org> |
drm/msm/dp: Add DP compliance tests on Snapdragon Chipsets add event thread to execute events serially from event queue. Also timeout mode is supported which allow an event be deferred to be executed at later time. Both link and phy compliant tests had been done successfully. Changes in v2: -- Fix potential deadlock by removing redundant connect_mutex -- Check and enable link clock during modeset -- Drop unused code and fix function prototypes. -- set sink power to normal operation state (D0) before DPCD read Changes in v3: -- push idle pattern at main link before timing generator off -- add timeout handles for both connect and disconnect Changes in v4: -- add ST_SUSPEND_PENDING to handles suspend/modeset test operations -- clear dp phy aux interrupt status when ERR_DPPHY_AUX error -- send segment addr during edid read -- clear bpp depth before MISC register write Changes in v5: -- add ST_SUSPENDED to fix crash at resume Changes in v6: -- at msm_dp_display_enable() do not return until resume_done to avoid kms commit timeout Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
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220b856a |
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27-Aug-2020 |
Tanmay Shah <tanmay@codeaurora.org> |
drm/msm/dp: Add Display Port HPD feature Configure HPD registers in DP controller and enable HPD interrupt. Add interrupt to handle HPD connect and disconnect events. Changes in v8: None Signed-off-by: Tanmay Shah <tanmay@codeaurora.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
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c943b494 |
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27-Aug-2020 |
Chandan Uddaraju <chandanu@codeaurora.org> |
drm/msm/dp: add displayPort driver support Add the needed displayPort files to enable DP driver on msm target. "dp_display" module is the main module that calls into other sub-modules. "dp_drm" file represents the interface between DRM framework and DP driver. Changes in v12: -- Add support of pm ops in display port driver -- Clear bpp depth bits before writing to MISC register -- Fix edid read Previous Change log: https://lkml.kernel.org/lkml/20200818051137.21478-3-tanmay@codeaurora.org/ Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org> Signed-off-by: Vara Reddy <varar@codeaurora.org> Signed-off-by: Tanmay Shah <tanmay@codeaurora.org> Co-developed-by: Abhinav Kumar <abhinavk@codeaurora.org> Signed-off-by: Abhinav Kumar <abhinavk@codeaurora.org> Co-developed-by: Kuogee Hsieh <khsieh@codeaurora.org> Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org> Co-developed-by: Guenter Roeck <groeck@chromium.org> Signed-off-by: Guenter Roeck <groeck@chromium.org> Co-developed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
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933415e2 |
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17-Aug-2020 |
Jordan Crouse <jcrouse@codeaurora.org> |
drm/msm: Add support for private address space instances Add support for allocating private address space instances. Targets that support per-context pagetables should implement their own function to allocate private address spaces. The default will return a pointer to the global address space. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@chromium.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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cf655d61 |
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17-Aug-2020 |
Jordan Crouse <jcrouse@codeaurora.org> |
drm/msm: Add a context pointer to the submitqueue Each submitqueue is attached to a context. Add a pointer to the context to the submitqueue at create time and refcount it so that it stays around through the life of the queue. Co-developed-by: Rob Clark <robdclark@chromium.org> Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@chromium.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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1041dee2 |
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20-Jul-2020 |
Bernard <bernard@vivo.com> |
drm/msm: use kthread_create_worker instead of kthread_run Use kthread_create_worker to simplify the code and optimise the manager struct: msm_drm_thread. With this change, we could remove struct element (struct task_struct *thread & struct kthread_worker worker), instead, use one point (struct kthread_worker *worker). Signed-off-by: Bernard Zhao <bernard@vivo.com> Signed-off-by: Rob Clark <robdclark@chromium.org>
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62a35e81 |
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29-Jun-2020 |
Eric Anholt <eric@anholt.net> |
drm/msm: Quiet error during failure in optional resource mappings. We don't expect to find vbif_nrt or regdma on sdm845, but were clogging up dmesg with errors about it. Signed-off-by: Eric Anholt <eric@anholt.net> Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Rob Clark <robdclark@chromium.org>
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ccac7ce3 |
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22-May-2020 |
Jordan Crouse <jcrouse@codeaurora.org> |
drm/msm: Refactor address space initialization Refactor how address space initialization works. Instead of having the address space function create the MMU object (and thus require separate but equal functions for gpummu and iommu) use a single function and pass the MMU struct in. Make the generic code cleaner by using target specific functions to create the address space so a2xx can do its own thing in its own space. For all the other targets use a generic helper to initialize IOMMU but leave the door open for newer targets to use customization if they need it. Reviewed-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Tested-by: Shawn Guo <shawn.guo@linaro.org> [squash in rebase fixups] Signed-off-by: Rob Clark <robdclark@chromium.org>
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d3b8877e |
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23-Apr-2020 |
Jonathan Marek <jonathan@marek.ca> |
drm/msm: add msm_gem_get_and_pin_iova_range This function allows pinning iova to a specific page range (for a6xx GMU). Signed-off-by: Jonathan Marek <jonathan@marek.ca> Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
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e47616df |
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24-Mar-2020 |
Kalyan Thota <kalyan_t@codeaurora.org> |
drm/msm/dpu: add support for color processing blocks in dpu driver This change adds support to configure dspp blocks in the dpu driver. Macro description of the changes coming in this patch. 1) Add dspp definitions in the hw catalog. 2) Add capability to reserve dspp blocks in the display data path. 3) Attach the reserved block to the encoder. Signed-off-by: Kalyan Thota <kalyan_t@codeaurora.org> Tested-by: Fritz Koenig <frkoenig@google.com> Signed-off-by: Rob Clark <robdclark@chromium.org>
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76e8cfd8 |
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23-Jan-2020 |
Thomas Zimmermann <tzimmermann@suse.de> |
drm/msm: Convert to CRTC VBLANK callbacks VBLANK callbacks in struct drm_driver are deprecated in favor of their equivalents in struct drm_crtc_funcs. Convert msm over. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Tested-by: Yannick Fertré <yannick.fertre@st.com> Acked-by: Rob Clark <robdclark@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200123135943.24140-14-tzimmermann@suse.de
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6cedb8b3 |
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29-May-2018 |
Arnd Bergmann <arnd@arndb.de> |
drm/msm: avoid using 'timespec' The timespec structure and associated interfaces are deprecated and will be removed in the future because of the y2038 overflow. The use of ktime_to_timespec() in timeout_to_jiffies() does not suffer from that overflow, but is easy to avoid by just converting the ktime_t into jiffies directly. Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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2d99ced7 |
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29-Aug-2019 |
Rob Clark <robdclark@chromium.org> |
drm/msm: async commit support Now that flush/wait/complete is decoupled from the "synchronous" part of atomic commit_tail(), add support to defer flush to a timer that expires shortly before vblank for async commits. In this way, multiple atomic commits (for example, cursor updates) can be coalesced into a single flush at the end of the frame. v2: don't hold lock over ->wait_flush(), to avoid locking interaction that was causing fps drop when combining page flips or non-async atomic commits and lots of legacy cursor updates Signed-off-by: Rob Clark <robdclark@chromium.org> Reviewed-by: Sean Paul <sean@poorly.run>
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8e3e791d |
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25-Jul-2019 |
Jordan Crouse <jcrouse@codeaurora.org> |
drm/msm: Use generic bulk clock function Remove the homebrewed bulk clock get function and replace it with devm_clk_bulk_get_all(). Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Rob Clark <robdclark@chromium.org>
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feea39a8 |
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04-Aug-2019 |
Sam Ravnborg <sam@ravnborg.org> |
drm/msm: drop use of drmP.h Drop the deprecated drmP.h header file, and trim msm_drv.h to the relevant include files. This resulted in a suprisingly many edits as many files relied on headers included via msm_drv.h. But msm_drv.h is not supposed to carry include files it do not need, so the individual files have to include what extra they needs. v2: - Rebased on top of https://gitlab.freedesktop.org/drm/msm.git msm-next Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Cc: Rob Clark <robdclark@gmail.com> Cc: Sean Paul <sean@poorly.run> Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Cc: Jordan Crouse <jcrouse@codeaurora.org> Cc: Jeykumar Sankaran <jsanka@codeaurora.org> Cc: Bruce Wang <bzwang@chromium.org> Cc: Shayenne Moura <shayenneluzmoura@gmail.com> Cc: Mamta Shukla <mamtashukla555@gmail.com> Cc: Jonathan Marek <jonathan@marek.ca> Cc: Carsten Behling <carsten.behling@googlemail.com> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Cc: Maxime Ripard <maxime.ripard@bootlin.com> Cc: Paul Kocialkowski <paul.kocialkowski@bootlin.com> Cc: Sibi Sankar <sibis@codeaurora.org> Cc: Todor Tomov <todor.tomov@linaro.org> Cc: linux-arm-msm@vger.kernel.org Cc: freedreno@lists.freedesktop.org Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: https://patchwork.freedesktop.org/patch/msgid/20190804065551.GA5211@ravnborg.org
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caab277b |
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02-Jun-2019 |
Thomas Gleixner <tglx@linutronix.de> |
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 234 Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details you should have received a copy of the gnu general public license along with this program if not see http www gnu org licenses extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 503 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Alexios Zavras <alexios.zavras@intel.com> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Enrico Weigelt <info@metux.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190602204653.811534538@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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295b22ae |
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07-May-2019 |
Jordan Crouse <jcrouse@codeaurora.org> |
drm/msm: Pass the MMU domain index in struct msm_file_private Pass the index of the MMU domain in struct msm_file_private instead of assuming gpu->id throughout the submit path. This clears the way to change ctx->aspace to a per-instance pagetable. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
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87dfb311 |
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14-May-2019 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
treewide: replace #include <asm/sizes.h> with #include <linux/sizes.h> Since commit dccd2304cc90 ("ARM: 7430/1: sizes.h: move from asm-generic to <linux/sizes.h>"), <asm/sizes.h> and <asm-generic/sizes.h> are just wrappers of <linux/sizes.h>. This commit replaces all <asm/sizes.h> and <asm-generic/sizes.h> to prepare for the removal. Link: http://lkml.kernel.org/r/1553267665-27228-1-git-send-email-yamada.masahiro@socionext.com Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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48e7f183 |
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20-Mar-2019 |
Kristian H. Kristensen <hoegsberg@gmail.com> |
drm/msm: Implement .gem_free_object_unlocked We use a llist and a worker to delay the object cleanup. This avoids taking mmap_sem and struct_mutex in the wrong order when calling drm_gem_object_put_unlocked() from drm_gem_mmap(). Fixes lockdep problem with copy_from_user() in msm_ioctl_gem_submit(). Signed-off-by: Kristian H. Kristensen <hoegsberg@chromium.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
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b0fb6604 |
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22-Mar-2019 |
Jordan Crouse <jcrouse@codeaurora.org> |
drm/msm/gpu: Add submit queue queries Add the capability to query information from a submit queue. The first available parameter is for querying the number of GPU faults (hangs) that can be attributed to the queue. This is useful for implementing context robustness. A user context can regularly query the number of faults to see if it is responsible for any and if so it can invalidate itself. This is also helpful for testing by confirming to the user driver if a particular command stream caused a fault (or not as the case may be). Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
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dd55cf69 |
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02-Feb-2019 |
Rob Herring <robh@kernel.org> |
drm: msm: Switch to use drm_gem_object reservation_object Now that the base struct drm_gem_object has a reservation_object, use it and remove the private BO one. We can't use the drm_gem_reservation_object_wait() helper for MSM because (in theory) msm_gem_cpu_prep() will also do some cache maintenance on the GEM object. Cc: David Airlie <airlied@linux.ie> Cc: linux-arm-msm@vger.kernel.org Cc: dri-devel@lists.freedesktop.org Cc: freedreno@lists.freedesktop.org Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Acked-by: Rob Clark <robdclark@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190202154158.10443-4-robh@kernel.org Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
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48d1d28e |
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14-Dec-2018 |
Jeykumar Sankaran <jsanka@codeaurora.org> |
drm/msm: subclass work object for vblank events msm maintains a separate structure to define vblank work definitions and a list to track events submitted to the workqueue. We can avoid this redundant list and its protection mechanism, if we subclass the work object to encapsulate vblank event parameters. changes in v2: - subclass optimization on system wq (Sean Paul) changes in v3: - none changes in v4: - move flush_workqueue before irq uninstall changes in v5: - none Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org>
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d9db30ce |
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14-Dec-2018 |
Jeykumar Sankaran <jsanka@codeaurora.org> |
drm/msm: clean up display thread Since there are no clients using these threads, cleaning it up. changes in v2: - switch all the dependent clients to use system wq before removing the disp_threads (Sean Paul) changes in v3: - none changes in v4: - none changes in v5: - Rebase on latest tip with [1] (Sean Paul) [1] https://patchwork.freedesktop.org/patch/255105/ Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org>
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#
5aeb6656 |
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14-Dec-2018 |
Jeykumar Sankaran <jsanka@codeaurora.org> |
drm/msm/dpu: use msm wq for vblank events DPU was using one thread per display to dispatch async commits and vblank requests. Since clean up already happened in msm to use the common thread for all the display commits, display threads are only used to cater vblank requests. Since a single thread is sufficient to do the job without any performance hits, use msm workqueue to queue requests. A separate patch is submitted later in this series to remove the display threads altogether. changes in v2: - switch to system wq before removing disp threads (Sean Paul) changes in v3: - none changes in v4: - use msm wq for vblank events changes in v5: - none Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org>
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#
9b9c8e7e |
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17-Dec-2018 |
Jeykumar Sankaran <jsanka@codeaurora.org> |
drm/msm/dpu: fix documentation for intf_type Fix intf_type description in msm_disp_info to show that it represents drm encoder mode of the display. changes in v3: - introduced in the series changes in v4: - none Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org>
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#
19db1326 |
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17-Jan-2019 |
Joe Perches <joe@perches.com> |
drm/msm: Add __printf verification Add a few __printf attribute specifiers to routines that could use them. Signed-off-by: Joe Perches <joe@perches.com> Signed-off-by: Rob Clark <robdclark@gmail.com>
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#
388a515f |
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09-Jan-2019 |
Rob Clark <robdclark@gmail.com> |
drm/msm: honor GPU_READONLY flag Signed-off-by: Rob Clark <robdclark@gmail.com>
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#
023014e7 |
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17-Jan-2019 |
Joe Perches <joe@perches.com> |
drm/msm: Add __printf verification Add a few __printf attribute specifiers to routines that could use them. Signed-off-by: Joe Perches <joe@perches.com> Signed-off-by: Rob Clark <robdclark@gmail.com>
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#
bbc2cd07 |
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09-Jan-2019 |
Rob Clark <robdclark@gmail.com> |
drm/msm: honor GPU_READONLY flag Signed-off-by: Rob Clark <robdclark@gmail.com>
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#
fcd70cd3 |
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17-Jan-2019 |
Daniel Vetter <daniel.vetter@ffwll.ch> |
drm: Split out drm_probe_helper.h Having the probe helper stuff (which pretty much everyone needs) in the drm_crtc_helper.h file (which atomic drivers should never need) is confusing. Split them out. To make sure I actually achieved the goal here I went through all drivers. And indeed, all atomic drivers are now free of drm_crtc_helper.h includes. v2: Make it compile. There was so much compile fail on arm drivers that I figured I'll better not include any of the acks on v1. v3: Massive rebase because i915 has lost a lot of drmP.h includes, but not all: Through drm_crtc_helper.h > drm_modeset_helper.h -> drmP.h there was still one, which this patch largely removes. Which means rolling out lots more includes all over. This will also conflict with ongoing drmP.h cleanup by others I expect. v3: Rebase on top of atomic bochs. v4: Review from Laurent for bridge/rcar/omap/shmob/core bits: - (re)move some of the added includes, use the better include files in other places (all suggested from Laurent adopted unchanged). - sort alphabetically v5: Actually try to sort them, and while at it, sort all the ones I touch. v6: Rebase onto i915 changes. v7: Rebase once more. Acked-by: Harry Wentland <harry.wentland@amd.com> Acked-by: Sam Ravnborg <sam@ravnborg.org> Cc: Sam Ravnborg <sam@ravnborg.org> Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Acked-by: Benjamin Gaignard <benjamin.gaignard@linaro.org> Acked-by: Jani Nikula <jani.nikula@intel.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com> Acked-by: CK Hu <ck.hu@mediatek.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Sam Ravnborg <sam@ravnborg.org> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Liviu Dudau <liviu.dudau@arm.com> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Cc: linux-arm-kernel@lists.infradead.org Cc: virtualization@lists.linux-foundation.org Cc: etnaviv@lists.freedesktop.org Cc: linux-samsung-soc@vger.kernel.org Cc: intel-gfx@lists.freedesktop.org Cc: linux-mediatek@lists.infradead.org Cc: linux-amlogic@lists.infradead.org Cc: linux-arm-msm@vger.kernel.org Cc: freedreno@lists.freedesktop.org Cc: nouveau@lists.freedesktop.org Cc: spice-devel@lists.freedesktop.org Cc: amd-gfx@lists.freedesktop.org Cc: linux-renesas-soc@vger.kernel.org Cc: linux-rockchip@lists.infradead.org Cc: linux-stm32@st-md-mailman.stormreply.com Cc: linux-tegra@vger.kernel.org Cc: xen-devel@lists.xen.org Link: https://patchwork.freedesktop.org/patch/msgid/20190117210334.13234-1-daniel.vetter@ffwll.ch
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#
c2052a4e |
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14-Nov-2018 |
Jonathan Marek <jonathan@marek.ca> |
drm/msm: implement a2xx mmu A2XX has its own very simple MMU. Added a msm_use_mmu() function because we can't rely on iommu_present to decide to use MMU or not. Signed-off-by: Jonathan Marek <jonathan@marek.ca> Signed-off-by: Rob Clark <robdclark@gmail.com>
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#
0815d774 |
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07-Nov-2018 |
Jordan Crouse <jcrouse@codeaurora.org> |
drm/msm: Add a name field for gem objects For debugging purposes it is useful to assign descriptions to buffers so that we know what they are used for. Add a field to the buffer object and use that to name the various kernel side allocations which ends up looking like like this in /d/dri/X/gem: flags id ref offset kaddr size madv name 00040000: I 0 ( 1) 00000000 0000000070b79eca 00004096 memptrs vmas: [gpu: 01000000,mapped,inuse=1] 00020000: I 0 ( 1) 00000000 0000000031ed4074 00032768 ring0 Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
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#
7ad0e8cf |
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07-Nov-2018 |
Jordan Crouse <jcrouse@codeaurora.org> |
drm/msm: Count how many times iova memory is pinned Add a reference count to track how many times a particular chunk of iova memory is pinned (mapped) in the iomu and add msm_gem_unpin_iova to give up references. It is important to note that msm_gem_unpin_iova replaces msm_gem_put_iova because the new implicit behavior that an assigned iova in a given vma is now valid for the life of the buffer and what we are really focusing on is the use of that iova. For now the unmappings are lazy; once the reference counts go to zero they *COULD* be unmapped dynamically but that will require an outside force such as a shrinker or mm_notifiers. For now, we're just focusing on getting the counting right and setting ourselves up to be ready for the future. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
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#
9fe041f6 |
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07-Nov-2018 |
Jordan Crouse <jcrouse@codeaurora.org> |
drm/msm: Add msm_gem_get_and_pin_iova() Add a new function to get and pin the iova memory in one step (basically renaming the old msm_gem_get_iova function) and switch msm_gem_get_iova() to only allocate an iova but not map it in the IOMMU. This is only currently used by msm_ioctl_gem_info() since all other users of of the iova expect that the memory be immediately available. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
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#
c0ee9794 |
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07-Nov-2018 |
Jordan Crouse <jcrouse@codeaurora.org> |
drm/msm: Split msm_gem_get_iova into two steps Split the operation of msm_gem_get_iova into two operations: 1) allocate an iova and 2) map (pin) the backing memory int the iommu. This is the first step toward allowing memory pinning to occur independently of the iova management. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
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#
70dc51b4 |
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07-Nov-2018 |
Jordan Crouse <jcrouse@codeaurora.org> |
drm/msm: Remove sgt from the mmu unmap function The scatter gather table doesn't need to be passed in for the MMU unmap function. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
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#
1e29dff0 |
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07-Nov-2018 |
Jordan Crouse <jcrouse@codeaurora.org> |
drm/msm: Add a common function to free kernel buffer objects Buffer objects allocated with msm_gem_kernel_new() are mostly freed the same way so we can save a few lines of code with a common function. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
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#
96fc56a7 |
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29-Aug-2018 |
Sean Paul <seanpaul@chromium.org> |
drm/msm: dpu: Allow planes to extend past active display The atomic_check is a bit too aggressive with respect to planes which leave the active area. This caused a bunch of log spew when the cursor got to the edge of the screen and stopped it from going all the way. This patch removes the conservative bounds checks from atomic and clips the dst rect such that we properly display planes which go off the screen. Changes in v2: - Apply the clip to src as well (taking into account scaling) Changes in v3: - Use drm_atomic_helper_check_plane_state() to clip src/dst Cc: Sravanthi Kollukuduru <skolluku@codeaurora.org> Cc: Jeykumar Sankaran <jsanka@codeaurora.org> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
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#
8e54eea5 |
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06-Aug-2018 |
Jordan Crouse <jcrouse@codeaurora.org> |
drm/msm: Add a helper function to parse clock names Add a helper function to parse the clock names and set up the bulk data so we can take advantage of the bulk clock functions instead of rolling our own. This is added as a helper function so the upcoming a6xx GMU code can also take advantage of it. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
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#
a5f74ec7 |
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21-May-2018 |
Souptick Joarder <jrdr.linux@gmail.com> |
gpu: drm: msm: Change return type to vm_fault_t Use new return type vm_fault_t for fault handler. For now, this is just documenting that the function returns a VM_FAULT value rather than an errno. Once all instances are converted, vm_fault_t will become a distinct type. Ref- commit 1c8f422059ae ("mm: change return type to vm_fault_t") Previously vm_insert_mixed() returns err which driver mapped into VM_FAULT_* type. The new function vmf_insert_mixed() will replace this inefficiency by returning VM_FAULT_* type. vmf_error() is the newly introduce inline function in 4.17-rc6. Signed-off-by: Souptick Joarder <jrdr.linux@gmail.com> Reviewed-by: Matthew Wilcox <mawilcox@microsoft.com> Signed-off-by: Rob Clark <robdclark@gmail.com>
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#
25fdd593 |
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27-Jun-2018 |
Jeykumar Sankaran <jsanka@codeaurora.org> |
drm/msm: Add SDM845 DPU support SDM845 SoC includes the Mobile Display Sub System (MDSS) which is a top level wrapper consisting of Display Processing Unit (DPU) and display peripheral modules such as Display Serial Interface (DSI) and DisplayPort (DP). MDSS functions essentially as a back-end composition engine. It blends video and graphic images stored in the frame buffers and scans out the composed image to a display sink (over DSI/DP). The following diagram represents hardware blocks for a simple pipeline (two planes are present on a given crtc which is connected to a DSI connector): MDSS +---------------------------------+ | +-----------------------------+ | | | DPU | | | | +--------+ +--------+ | | | | | SSPP | | SSPP | | | | | +----+---+ +----+---+ | | | | | | | | | | +----v-----------v---+ | | | | | Layer Mixer (LM) | | | | | +--------------------+ | | | | +--------------------+ | | | | | PingPong (PP) | | | | | +--------------------+ | | | | +--------------------+ | | | | | INTERFACE (VIDEO) | | | | | +---+----------------+ | | | +------|----------------------+ | | | | | +------|---------------------+ | | | | DISPLAY PERIPHERALS | | | | +---v-+ +-----+ | | | | | DSI | | DP | | | | | +-----+ +-----+ | | | +----------------------------+ | +---------------------------------+ The number of DPU sub-blocks (i.e. SSPPs, LMs, PP blocks and INTFs) depends on SoC capabilities. Overview of DPU sub-blocks: --------------------------- * Source Surface Processor (SSPP): Refers to any of hardware pipes like ViG, DMA etc. Only ViG pipes are capable of performing format conversion, scaling and quality improvement for source surfaces. * Layer Mixer (LM): Blend source surfaces together (in requested zorder) * PingPong (PP): This block controls frame done interrupt output, EOL and EOF generation, overflow/underflow control. * Display interface (INTF): Timing generator and interface connecting the display peripherals. DRM components mapping to DPU architecture: ------------------------------------------ PLANEs maps to SSPPs CRTC maps to LMs Encoder maps to PPs, INTFs Data flow setup: --------------- MDSS hardware can support various data flows (e.g.): - Dual pipe: Output from two LMs combined to single display. - Split display: Output from two LMs connected to two separate interfaces. The hardware capabilities determine the number of concurrent data paths possible. Any control path (i.e. pipeline w/i DPU) can be routed to any of the hardware data paths. A given control path can be triggered, flushed and controlled independently. Changes in v3: - Move msm_media_info.h from uapi to dpu/ subdir - Remove preclose callback dpu (it's handled in core) - Fix kbuild warnings with parent_ops - Remove unused functions from dpu_core_irq - Rename mdss_phys to mdss - Rename mdp_phys address space to mdp - Drop _phys from vbif and regdma binding names Signed-off-by: Abhinav Kumar <abhinavk@codeaurora.org> Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org> Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org> Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rajesh Yadav <ryadav@codeaurora.org> Signed-off-by: Sravanthi Kollukuduru <skolluku@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> [robclark minor rebase] Signed-off-by: Rob Clark <robdclark@gmail.com>
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#
7305a0ce |
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27-Jun-2018 |
Jeykumar Sankaran <jsanka@codeaurora.org> |
drm/msm: #define MAX_<OBJECT> in msm_drv.h dpu uses these elsewhere in the driver (in addition to increasing MAX_PLANES, that'll come later), so pull them out into #define. Changes in v3: - None Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org> [seanpaul pulled this out of the dpu megapatch] Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
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#
74312fc7 |
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27-Jun-2018 |
Sean Paul <seanpaul@chromium.org> |
drm/msm: Clean up dangling atomic_wq I missed this during the atomic conversion Changes in v3: - None Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
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#
ec446d09 |
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28-May-2018 |
Daniel Mack <daniel@zonque.org> |
drm/msm: call drm_atomic_helper_suspend() and drm_atomic_helper_resume() To make suspend and resume work on msm8916 platforms, call into the generic helpers and preserve the state across suspends. Signed-off-by: Daniel Mack <daniel@zonque.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
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#
d14659f5 |
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28-Feb-2018 |
Sean Paul <seanpaul@chromium.org> |
drm/msm: Switch to atomic_helper_commit() Now that all of the msm-specific goo is tucked safely away we can switch over to using the atomic helper commit directly. \o/ Changes in v2: - None Changes in v3: - Rebased on Archit's private_obj set Changes in v4: - None Cc: Abhinav Kumar <abhinavk@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
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#
70db18dc |
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28-Feb-2018 |
Sean Paul <seanpaul@chromium.org> |
drm/msm: Remove msm_commit/worker, use atomic helper commit Moving further towards switching fully to the the atomic helpers, this patch removes the hand-rolled worker nonblock commit code and uses the atomic helpers commit_work model. Changes in v2: - Remove commit_destroy() - Shuffle order of commit_tail calls to further serialize commits - Use stall in swap_state to avoid abandoned events on disable Changes in v3: - Rebased on Archit's private_obj set Changes in v4: - None Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
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#
db8f4d5d |
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03-Apr-2018 |
Sean Paul <seanpaul@chromium.org> |
drm/msm: Move implicit sync handling to prepare_fb In preparation for moving to atomic helpers, move the implicit sync fence handling out of atomic commit and into the plane->prepare_fb() hook. While we're at it, de-duplicate the mdp*_prepare_fb functions. Changes in v4: - Added Reported-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
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#
94c3e78d |
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14-Feb-2018 |
Rob Clark <robdclark@gmail.com> |
drm/msm: strip out msm_fence_cb Remnants of pre-dma_fence fencing which got left behind by mistake. Signed-off-by: Rob Clark <robdclark@gmail.com>
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#
e6756d7c |
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01-Nov-2017 |
Arnd Bergmann <arnd@arndb.de> |
drm/msm: fix msm_rd_dump_submit prototype The prototype of msm_rd_dump_submit() has recently changed. However, we have two declarations of this functions, and the other one remains the old version, leading to this: drivers/gpu/drm/msm/msm_gpu.c: In function 'recover_worker': drivers/gpu/drm/msm/msm_gpu.c:295:23: error: passing argument 1 of 'msm_rd_dump_submit' from incompatible pointer type [-Werror=incompatible-pointer-types] This changes the second one to match the first again. Fixes: 2165e2b9cba2 ("drm/msm: split rd debugfs file") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Rob Clark <robdclark@gmail.com>
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#
1f920175 |
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24-Oct-2017 |
Rob Clark <robdclark@gmail.com> |
drm/msm/atomic: switch to drm_atomic_helper_check Signed-off-by: Rob Clark <robdclark@gmail.com>
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#
998b9a58 |
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15-Sep-2017 |
Rob Clark <robdclark@gmail.com> |
drm/msm/rd: allow adding addition msg to top of dump For faults or hangs, it is nice to be able to include a bit more information. Signed-off-by: Rob Clark <robdclark@gmail.com>
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#
2165e2b9 |
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15-Sep-2017 |
Rob Clark <robdclark@gmail.com> |
drm/msm: split rd debugfs file Split into two instances, the existing $debugfs/rd which continues to dump all submits, and $debugfs/hangrd which will be used to dump just submits that cause gpu hangs (and eventually faults, but that will require some iommu framework enhancements). Signed-off-by: Rob Clark <robdclark@gmail.com>
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fad33f4b |
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15-Sep-2017 |
Rob Clark <robdclark@gmail.com> |
drm/msm: add special _get_vaddr_active() for cmdstream dumps Prep work for adding a debugfs file that dumps just submits which trigger hangs/faults. In this case the bo may already be in the MADV_DONTNEED state, but will be still on the active list (since the submit hasn't completed yet). So the normal check that the bo is in the WILLNEED state does not apply. (But of course the bo should definitely not be in the PURGED state!) Signed-off-by: Rob Clark <robdclark@gmail.com>
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3ceaa141 |
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20-Oct-2017 |
Jordan Crouse <jcrouse@codeaurora.org> |
drm/msm: Removed unused struct_mutex_task Recent changes to locking have rendered struct_mutex_task unused. Unused since 0e08270a1f01. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
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#
b1fc2839 |
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20-Oct-2017 |
Jordan Crouse <jcrouse@codeaurora.org> |
drm/msm: Implement preemption for A5XX targets Implement preemption for A5XX targets - this allows multiple ringbuffers for different priorities with automatic preemption of a lower priority ringbuffer if a higher one is ready. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
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f97decac |
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20-Oct-2017 |
Jordan Crouse <jcrouse@codeaurora.org> |
drm/msm: Support multiple ringbuffers Add the infrastructure to support the idea of multiple ringbuffers. Assign each ringbuffer an id and use that as an index for the various ring specific operations. The biggest delta is to support legacy fences. Each fence gets its own sequence number but the legacy functions expect to use a unique integer. To handle this we return a unique identifier for each submission but map it to a specific ring/sequence under the covers. Newer users use a dma_fence pointer anyway so they don't care about the actual sequence ID or ring. The actual mechanics for multiple ringbuffers are very target specific so this code just allows for the possibility but still only defines one ringbuffer for each target family. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
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#
f7de1545 |
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20-Oct-2017 |
Jordan Crouse <jcrouse@codeaurora.org> |
drm/msm: Add per-instance submit queues Currently the behavior of a command stream is provided by the user application during submission and the application is expected to internally maintain the settings for each 'context' or 'rendering queue' and specify the correct ones. This works okay for simple cases but as applications become more complex we will want to set context specific flags and do various permission checks to allow certain contexts to enable additional privileges. Add kernel-side submit queues to be analogous to 'contexts' or 'rendering queues' on the application side. Each file descriptor instance will maintain its own list of queues. Queues cannot be shared between file descriptors. For backwards compatibility context id '0' is defined as a default context specifying no priority and no special flags. This is intended to be the usual configuration for 99% of applications so that a garden variety application can function correctly without creating a queue. Only those applications requiring the specific benefit of different queues need create one. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
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#
6c0693b1 |
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11-Jul-2017 |
Rob Clark <robdclark@gmail.com> |
drm/msm: make msm_framebuffer_init() static Only needed in msm_fb.c so don't export it. Signed-off-by: Rob Clark <robdclark@gmail.com>
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#
466e5606 |
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11-Jul-2017 |
Rob Clark <robdclark@gmail.com> |
drm/msm: add helper to allocate stolen fb We'll later want to re-use this for state-readback when bootloader enables display, so that we can create an fb for the initial plane->state->fb. Signed-off-by: Rob Clark <robdclark@gmail.com>
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#
a0ce4d23 |
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03-Jul-2017 |
Rob Clark <robdclark@gmail.com> |
drm/msm: remove unused define Signed-off-by: Rob Clark <robdclark@gmail.com>
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#
8223286d |
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27-Jul-2017 |
Jordan Crouse <jcrouse@codeaurora.org> |
drm/msm: Add a helper function for in-kernel buffer allocations Nearly all of the buffer allocations for kernel allocate an buffer object, virtual address and GPU iova at the same time. Make a helper function to handle the details. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> [dropped msm_fbdev conversion to new helper, since it interferes with display-handover work, where we want to separate allocation and mapping] Signed-off-by: Rob Clark <robdclark@gmail.com>
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#
0e08270a |
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13-Jun-2017 |
Sushmita Susheelendra <ssusheel@codeaurora.org> |
drm/msm: Separate locking of buffer resources from struct_mutex Buffer object specific resources like pages, domains, sg list need not be protected with struct_mutex. They can be protected with a buffer object level lock. This simplifies locking and makes it easier to avoid potential recursive locking scenarios for SVM involving mmap_sem and struct_mutex. This also removes unnecessary serialization when creating buffer objects, and also between buffer object creation and GPU command submission. Signed-off-by: Sushmita Susheelendra <ssusheel@codeaurora.org> [robclark: squash in handling new locking for shrinker] Signed-off-by: Rob Clark <robdclark@gmail.com>
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#
8432a903 |
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13-Jun-2017 |
Rob Clark <robdclark@gmail.com> |
drm/msm: remove address-space id Now that the msm_gem supports an arbitrary number of vma's, we no longer need to assign an id (index) to each address space. So rip out the associated code. Signed-off-by: Rob Clark <robdclark@gmail.com>
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8bdcd949 |
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13-Jun-2017 |
Rob Clark <robdclark@gmail.com> |
drm/msm: pass address-space to _get_iova() and friends No functional change, that will come later. But this will make it easier to deal with dynamically created address spaces (ie. per- process pagetables for gpu). Signed-off-by: Rob Clark <robdclark@gmail.com>
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43523eba |
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12-Apr-2017 |
Eric Anholt <eric@anholt.net> |
drm/msm: Expose our reservation object when exporting a dmabuf. Without this, polling on the dma-buf (and presumably other devices synchronizing against our rendering) would return immediately, even while the BO was busy. Signed-off-by: Eric Anholt <eric@anholt.net> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: stable@vger.kernel.org Cc: Rob Clark <robdclark@gmail.com> Cc: linux-arm-msm@vger.kernel.org Cc: freedreno@lists.freedesktop.org Reviewed-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Rob Clark <robdclark@gmail.com>
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#
ee546cd3 |
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07-Mar-2017 |
Jordan Crouse <jcrouse@codeaurora.org> |
drm/msm: Reference count address spaces There are reasons for a memory object to outlive the file descriptor that created it and so the address space that a buffer object is attached to must also outlive the file descriptor. Reference count the address space so that it can remain viable until all the objects have released their addresses. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
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#
3a270e4d |
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20-Mar-2017 |
Arnd Bergmann <arnd@arndb.de> |
drm/msm: add stubs for msm_{perf,rd}_debugfs_cleanup We now call those two functions even when they are not defined or declared anywhere because DEBUG_FS is disabled: drivers/gpu/drm/msm/msm_drv.c: In function 'msm_drm_uninit': drivers/gpu/drm/msm/msm_drv.c:244:2: error: implicit declaration of function 'msm_perf_debugfs_cleanup';did you mean 'msm_framebuffer_cleanup'? [-Werror=implicit-function-declaration] drivers/gpu/drm/msm/msm_drv.c:245:2: error: implicit declaration of function 'msm_rd_debugfs_cleanup';did you mean 'msm_framebuffer_cleanup'? [-Werror=implicit-function-declaration] This adds empty stub implementations for that case. Fixes: 85eac4700ede ("drm/msm: Remove msm_debugfs_cleanup()") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/20170320093936.1255573-1-arnd@arndb.de
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#
85eac470 |
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07-Mar-2017 |
Noralf Trønnes <noralf@tronnes.org> |
drm/msm: Remove msm_debugfs_cleanup() Move the contents of msm_debugfs_cleanup() to msm_drm_uninit() to free up the drm_driver->debugfs_cleanup callback. Also remove the mdp_kms_funcs->debugfs_cleanup callback which has no users. Cc: robdclark@gmail.com Signed-off-by: Noralf Trønnes <noralf@tronnes.org> Acked-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/20170307204924.1002-2-noralf@tronnes.org
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#
11bac800 |
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24-Feb-2017 |
Dave Jiang <dave.jiang@intel.com> |
mm, fs: reduce fault, page_mkwrite, and pfn_mkwrite to take only vmf ->fault(), ->page_mkwrite(), and ->pfn_mkwrite() calls do not need to take a vma and vmf parameter when the vma already resides in vmf. Remove the vma parameter to simplify things. [arnd@arndb.de: fix ARM build] Link: http://lkml.kernel.org/r/20170125223558.1451224-1-arnd@arndb.de Link: http://lkml.kernel.org/r/148521301778.19116.10840599906674778980.stgit@djiang5-desk3.ch.intel.com Signed-off-by: Dave Jiang <dave.jiang@intel.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Ross Zwisler <ross.zwisler@linux.intel.com> Cc: Theodore Ts'o <tytso@mit.edu> Cc: Darrick J. Wong <darrick.wong@oracle.com> Cc: Matthew Wilcox <mawilcox@microsoft.com> Cc: Dave Hansen <dave.hansen@intel.com> Cc: Christoph Hellwig <hch@lst.de> Cc: Jan Kara <jack@suse.com> Cc: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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#
97e00119 |
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15-Jan-2017 |
Archit Taneja <architt@codeaurora.org> |
drm/msm: Construct only one encoder for DSI We currently create 2 encoders for DSI interfaces, one for command mode and other for video mode operation. This isn't needed as we can't really use both the encoders at the same time. It also makes connecting bridges harder. Switch to creating a single encoder. For now, we assume that the encoder is configured only in video mode. Later, the same encoder would be usable in both modes. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
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#
720c3bb8 |
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30-Jan-2017 |
Rob Clark <robdclark@gmail.com> |
drm/msm: drop _clk suffix from clk names Suggested by Rob Herring. We still support the old names for compatibility with downstream android dt files. Cc: Rob Herring <robh@kernel.org> Signed-off-by: Rob Clark <robdclark@gmail.com> Reviewed-by: Eric Anholt <eric@anholt.net> Acked-by: Rob Herring <robh@kernel.org>
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#
78babc16 |
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10-Nov-2016 |
Rob Clark <robdclark@gmail.com> |
drm/msm: convert iova to 64b For a5xx the gpu is 64b so we need to change iova to 64b everywhere. On the display side, iova is still 32b so it can ignore the upper bits. (Although all the armv8 devices have an iommu that can map 64b pa to 32b iova.) Signed-off-by: Rob Clark <robdclark@gmail.com>
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#
bc5289ee |
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26-Oct-2016 |
Rob Clark <robdclark@gmail.com> |
drm/msm/mdp5: add debugfs to show smp block status Signed-off-by: Rob Clark <robdclark@gmail.com>
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#
870d738a |
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04-Nov-2016 |
Rob Clark <robdclark@gmail.com> |
drm/msm: subclass drm_atomic_state This will give the kms backends a slot to stash their own hw specific global state. Signed-off-by: Rob Clark <robdclark@gmail.com>
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#
667ce33e |
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28-Sep-2016 |
Rob Clark <robdclark@gmail.com> |
drm/msm: support multiple address spaces We can have various combinations of 64b and 32b address space, ie. 64b CPU but 32b display and gpu, or 64b CPU and GPU but 32b display. So best to decouple the device iova's from mmap offset. Signed-off-by: Rob Clark <robdclark@gmail.com>
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#
7ed216e5 |
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01-Nov-2016 |
Rob Clark <robdclark@gmail.com> |
drm/msm: use DRM_DEBUG_DRIVER() Signed-off-by: Rob Clark <robdclark@gmail.com>
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#
f54d1867 |
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25-Oct-2016 |
Chris Wilson <chris@chris-wilson.co.uk> |
dma-buf: Rename struct fence to dma_fence I plan to usurp the short name of struct fence for a core kernel struct, and so I need to rename the specialised fence/timeline for DMA operations to make room. A consensus was reached in https://lists.freedesktop.org/archives/dri-devel/2016-July/113083.html that making clear this fence applies to DMA operations was a good thing. Since then the patch has grown a bit as usage increases, so hopefully it remains a good thing! (v2...: rebase, rerun spatch) v3: Compile on msm, spotted a manual fixup that I broke. v4: Try again for msm, sorry Daniel coccinelle script: @@ @@ - struct fence + struct dma_fence @@ @@ - struct fence_ops + struct dma_fence_ops @@ @@ - struct fence_cb + struct dma_fence_cb @@ @@ - struct fence_array + struct dma_fence_array @@ @@ - enum fence_flag_bits + enum dma_fence_flag_bits @@ @@ ( - fence_init + dma_fence_init | - fence_release + dma_fence_release | - fence_free + dma_fence_free | - fence_get + dma_fence_get | - fence_get_rcu + dma_fence_get_rcu | - fence_put + dma_fence_put | - fence_signal + dma_fence_signal | - fence_signal_locked + dma_fence_signal_locked | - fence_default_wait + dma_fence_default_wait | - fence_add_callback + dma_fence_add_callback | - fence_remove_callback + dma_fence_remove_callback | - fence_enable_sw_signaling + dma_fence_enable_sw_signaling | - fence_is_signaled_locked + dma_fence_is_signaled_locked | - fence_is_signaled + dma_fence_is_signaled | - fence_is_later + dma_fence_is_later | - fence_later + dma_fence_later | - fence_wait_timeout + dma_fence_wait_timeout | - fence_wait_any_timeout + dma_fence_wait_any_timeout | - fence_wait + dma_fence_wait | - fence_context_alloc + dma_fence_context_alloc | - fence_array_create + dma_fence_array_create | - to_fence_array + to_dma_fence_array | - fence_is_array + dma_fence_is_array | - trace_fence_emit + trace_dma_fence_emit | - FENCE_TRACE + DMA_FENCE_TRACE | - FENCE_WARN + DMA_FENCE_WARN | - FENCE_ERR + DMA_FENCE_ERR ) ( ... ) Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk> Acked-by: Sumit Semwal <sumit.semwal@linaro.org> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/20161025120045.28839-1-chris@chris-wilson.co.uk
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#
d78d383a |
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22-Aug-2016 |
Rob Clark <robdclark@gmail.com> |
drm/msm: protect against faults from copy_from_user() in submit ioctl An evil userspace could try to cause deadlock by passing an unfaulted-in GEM bo as submit->bos (or submit->cmds) table. Which will trigger msm_gem_fault() while we already hold struct_mutex. See: https://github.com/freedreno/msmtest/blob/master/evilsubmittest.c Cc: stable@vger.kernel.org Signed-off-by: Rob Clark <robdclark@gmail.com>
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#
e1e9db2c |
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27-May-2016 |
Rob Clark <robdclark@gmail.com> |
drm/msm: wire up vmap shrinker Signed-off-by: Rob Clark <robdclark@gmail.com>
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#
18f23049 |
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26-May-2016 |
Rob Clark <robdclark@gmail.com> |
drm/msm: change gem->vmap() to get/put Before we can add vmap shrinking, we really need to know which vmap'ings are currently being used. So switch to get/put interface. Stubbed put fxns for now. Signed-off-by: Rob Clark <robdclark@gmail.com>
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#
68209390 |
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17-May-2016 |
Rob Clark <robdclark@gmail.com> |
drm/msm: shrinker support For a first step, only purge obj->madv==DONTNEED objects. We could be more agressive and next try unpinning inactive objects.. but that is only useful if you have swap. Signed-off-by: Rob Clark <robdclark@gmail.com>
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#
4cd33c48 |
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17-May-2016 |
Rob Clark <robdclark@gmail.com> |
drm/msm: add madvise ioctl Doesn't do anything too interesting until we wire up shrinker. Pretty much lifted from i915. Signed-off-by: Rob Clark <robdclark@gmail.com>
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#
1dd0a0b1 |
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30-May-2016 |
Archit Taneja <architt@codeaurora.org> |
drm/msm/mdp5: Create a separate MDP5 device In order to have a tree-like device hierarchy between MDSS and its sub-blocks (MDP5, DSI, HDMI, eDP etc), we need to create a separate device/driver for MDP5. Currently, MDP5 and MDSS are squashed together are are tied to the top level platform_device, which is also the one used to create drm_device. The mdp5_kms_init code is split into two parts. The part where device resources are allocated are associated with the MDP5 driver's probe, the rest is executed later when we initialize modeset. With this change, unlike MDP4, the MDP5 platform_device isn't tied to the top level drm_device anymore. The top level drm_device is now associated with a platform device that corresponds to MDSS wrapper hardware. Create mdp5_init/destroy funcs that will be used by the MDP5 driver probe/remove. Use the HW_VERSION register in the MDP5 register address space. Both the MDSS and MDP VERSION registers give out identical version info. The older mdp5_kms_init code is left as is for now, this would be removed later when we have all the pieces to support the new device hierarchy. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
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#
990a4007 |
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07-May-2016 |
Archit Taneja <architt@codeaurora.org> |
drm/msm/mdp5: Add MDSS top level driver SoCs that contain MDP5 have a top level wrapper called MDSS that manages clocks, power and irq for the sub-blocks within it. Currently, the MDSS portions are stuffed into the MDP5 driver. This makes it hard to represent the DT bindings in the correct way. We create a top level MDSS helper that handles these parts. This is essentially moving out some of the mdp5_kms irq code and MDSS register space and keeping it as a separate entity. We haven't given any clocks to the top level MDSS yet, but a AHB clock would be added in the future to access registers. One thing to note is that the resources allocated by this helper are tied to the top level platform_device (the one that allocates the drm_device struct too). This device would be the parent to MDSS sub-blocks like MDP5, DSI, eDP etc. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
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#
40e6815b |
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03-May-2016 |
Rob Clark <robdclark@gmail.com> |
drm/msm: fix leak in failed submit path Signed-off-by: Rob Clark <robdclark@gmail.com>
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#
b6295f9a |
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15-Mar-2016 |
Rob Clark <robdclark@gmail.com> |
drm/msm: 'struct fence' conversion Signed-off-by: Rob Clark <robdclark@gmail.com>
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#
ba00c3f2 |
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16-Mar-2016 |
Rob Clark <robdclark@gmail.com> |
drm/msm: remove fence_cbs This was only used for atomic commit these days. So instead just give atomic it's own work-queue where we can do a block on each bo in turn. Simplifies things a whole bunch and makes the 'struct fence' conversion easier. Signed-off-by: Rob Clark <robdclark@gmail.com>
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#
ca762a8a |
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15-Mar-2016 |
Rob Clark <robdclark@gmail.com> |
drm/msm: introduce msm_fence_context Better encapsulate the per-timeline stuff into fence-context. For now there is just a single fence-context, but eventually we'll also have one per-CRTC to enable fully explicit fencing. Signed-off-by: Rob Clark <robdclark@gmail.com>
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#
340ff410 |
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16-Mar-2016 |
Rob Clark <robdclark@gmail.com> |
drm/msm: split out timeout_to_jiffies helper Signed-off-by: Rob Clark <robdclark@gmail.com>
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#
79f0e202 |
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15-Mar-2016 |
Rob Clark <robdclark@gmail.com> |
drm/msm: use imported dmabuf's reservation object This was always the intention, but somehow it was never wired up properly. Signed-off-by: Rob Clark <robdclark@gmail.com>
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#
fde5de6c |
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15-Mar-2016 |
Rob Clark <robdclark@gmail.com> |
drm/msm: move fence code to it's own file Signed-off-by: Rob Clark <robdclark@gmail.com>
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#
a3ccfb9f |
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26-Apr-2016 |
Maarten Lankhorst <maarten.lankhorst@linux.intel.com> |
drm/msm: Rename async to nonblock. The async name is deprecated and should be changed to nonblocking. Also comments seem to be a bit outdated, as it looks like nonblocking commit is supported by msm. Cc: Rob Clark <robdclark@gmail.com> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/1461679905-30177-6-git-send-email-maarten.lankhorst@linux.intel.com
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#
fcda50c8 |
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22-Feb-2016 |
Arnd Bergmann <arnd@arndb.de> |
drm/msm: rename hdmi symbols Global symbols in the kernel should be prefixed by the name of the subsystem and/or driver to avoid conflicts when all code is built-in. In this case, function names like 'hdmi_register' or 'hdmi_set_mode' are way too generic for an MSM specific DRM driver, so I'm renaming them all to msm_hdmi_* here. I also rename a lot of the 'static' symbols along with the global names for consistency, even though those are relatively harmless; they might only be slightly confusing when they show up in backtraces. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Rob Clark <robdclark@gmail.com>
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#
1aaa57f5 |
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24-Feb-2016 |
Archit Taneja <architt@codeaurora.org> |
drm/msm: Free fb helper resources in msm_unload We have a msm_fbev_free function to uninit fb_helper stuff, but we aren't using it. Call it in msm_unload. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
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#
e9fbdaf2 |
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17-Nov-2015 |
Archit Taneja <architt@codeaurora.org> |
drm/msm: Remove non-DT code in msm_drv Support for non-DT kernels was mainly to use v3.4 downstream kernels. This is no longer a priority now as we have reasonable support upstream. Remove CONFIG_OF from the top level msm_drv.c file. While we're at it, clean up the data matching process using of_device_get_match_data. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
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#
1eb83451 |
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11-Nov-2015 |
Ville Syrjälä <ville.syrjala@linux.intel.com> |
drm: Pass the user drm_mode_fb_cmd2 as const to .fb_create() Drivers shouldn't clobber the passed in addfb ioctl parameters. i915 was doing just that. To prevent it from happening again, pass the struct around as const, starting all the way from internal_framebuffer_create(). Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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#
3d6df062 |
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09-Jun-2015 |
Archit Taneja <architt@codeaurora.org> |
drm/msm: mdp4 lvds: get panel node via of graph parsing We currently get the output connected to LVDS by looking for a phandle called 'qcom,lvds-panel' under the mdp DT node. Use the more standard of_graph approach to create an lvds output port, and retrieve the panel node from the port's endpoint data. v3 - Fix return value checks of of_graph_* calls. Tested-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
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#
78b1d470 |
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27-Jul-2015 |
Hai Li <hali@codeaurora.org> |
drm/msm: Enable clocks during enable/disable_vblank() callbacks AHB clock should be enabled before accessing registers during enable/disable_vblank(). Since these 2 callbacks are called in atomic context while clk_prepare may cause thread sleep, a work is scheduled to control vblanks. v2: fixup spinlock initialization Signed-off-by: Hai Li <hali@codeaurora.org> [add comment about cancel_work_sync() before drm_irq_uninstall()] Signed-off-by: Rob Clark <robdclark@gmail.com>
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#
12987781 |
|
25-Jun-2015 |
jilai wang <jilaiw@codeaurora.org> |
drm/msm/mdp5: Add plane blending operation support for MDP5 (v2) This change is to add properties alpha/zpos/blend_mode to mdp5 plane for alpha blending operation to generate the blended output. v1: Initial change v2: Change "premultilied" property to enum (Rob's comment) Signed-off-by: Jilai Wang <jilaiw@codeaurora.org> [Don't actually expose alpha/premultiplied props to userspace yet pending a chance for discussion and some userspace to exercise it] Signed-off-by: Rob Clark <robdclark@gmail.com>
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#
a9702ca2 |
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22-Jun-2015 |
Wentao Xu <wentaox@codeaurora.org> |
drm/msm: change to uninterruptible wait in atomic commit The atomic commit cannot easily undo and return an error once the state is swapped. Change to uninterruptible wait, and ignore the timeout error. Signed-off-by: Wentao Xu <wentaox@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
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#
99fc1bc4 |
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22-Jun-2015 |
Wentao Xu <wentaox@codeaurora.org> |
drm/msm: change to uninterruptible wait in atomic commit The atomic commit cannot easily undo and return an error once the state is swapped. Change to uninterruptible wait, and ignore the timeout error. Signed-off-by: Wentao Xu <wentaox@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
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#
56c2da83 |
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11-May-2015 |
Rob Clark <robdclark@gmail.com> |
drm/msm: fix timeout calculation The 'timeout' value comes from userspace (CLOCK_MONOTONIC), but converting this directly to jiffies doesn't take into account the initial jiffies count at boot, which may differ from the base time of CLOCK_MONOTONIC. TODO: add ktime_delta_jiffies() when rebasing on 4.1 and use that instead of ktime_sub/ktime_to_timespec/timespec_to_jiffies combo (as suggested by Arnd) v2: switch over from 'struct timespec' to ktime_t throughout, since 'struct timespec' will be deprecated (as suggested by Arnd) v3: minor cosmetic tweaks Cc: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Rob Clark <robdclark@gmail.com>
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#
a689554b |
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31-Mar-2015 |
Hai Li <hali@codeaurora.org> |
drm/msm: Initial add DSI connector support This change adds the DSI connector support in msm drm driver. v1: Initial change v2: - Address comments from Archit + minor clean-ups - Rebase to not depend on msm_drm_sub_dev change [Rob's comment] v3: Fix issues when initialization is failed Signed-off-by: Hai Li <hali@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
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#
00453981 |
|
12-Dec-2014 |
Hai Li <hali@codeaurora.org> |
drm/msm: Add the eDP connector in msm drm driver (V2) Modified the hard-coded hdmi connector/encoder implementations in msm drm driver to support both edp and hdmi. V1: Initial change V2: Address Thierry's change Signed-off-by: Hai Li <hali@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
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#
ab5b0107 |
|
07-Jan-2015 |
Hai Li <hali@codeaurora.org> |
drm/msm: Initial add eDP support in msm drm driver (v5) This change adds a new eDP connector in msm drm driver. With this change, eDP panel can work with msm platform under drm framework. v1: Initial change v2: Address Rob's comments Use generated header file for register definitions Change to devm_* APIs v3: Address Thierry's comments and rebase on top of atomic changes Remove edp_bridge_mode_fixup Remove backlight control code and rely on pwm-backlight Remove continuous splash screen support for now Change to gpiod_* APIs v4: Fix kbuild test issue Signed-off-by: Hai Li <hali@codeaurora.org> [robclark: v5: rebase on drm_bridge changes in drm-next] Signed-off-by: Rob Clark <robdclark@gmail.com>
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#
f86afecf |
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24-Nov-2014 |
Rob Clark <robdclark@gmail.com> |
drm/msm: block incoming update on pending updates We can't have multiple updates pending on a given CRTC, and we don't want a sync update to race w/ an async update that preceeded it. So keep track of which CRTCs have updates in flight, and block later updates that would conflict. Signed-off-by: Rob Clark <robdclark@gmail.com>
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#
b4274fbe |
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26-Nov-2014 |
Daniel Vetter <daniel.vetter@ffwll.ch> |
drm/atomic-helper: Again check modeset *before* plane states This essentially reverts commit 934ce1c23624526d9d784e0499190bb48113e6f4 Author: Rob Clark <robdclark@gmail.com> Date: Wed Nov 19 16:41:33 2014 -0500 drm/atomic: check mode_changed *after* atomic_check Depending upon the driver both orders (or maybe even interleaving) is required: - If ->atomic_check updates ->mode_changed then helper_check_modeset must be run afters. - If ->atomic_check depends upon accurate adjusted dotclock values for e.g. watermarks, then helper_check_modeset must be run first. The failure mode in the first case is usually a totally angry hw because the pixel format switching doesn't happen. The failure mode in the later case is usually nothing, since in most cases the old adjusted mode from the previous modeset wont be too far off to be a problem. So just underruns and perhaps even just suboptimal (from a power consumption) watermarks. Furthermore in the transitional helpers we only call ->atomic_check after the new modeset state has been fully set up (and hence computed). Given that asymmetry in expected failure modes I think it's safer to go back to the older order. So do that and give msm a special check function to compensate. Also update kerneldoc to explain this a bit. v2: Actually add the missing hunk Rob spotted. v3: Move msm_atomic_check into msm_atomic.c, requested by Rob. Cc: Rob Clark <robdclark@gmail.com> Reviewed-by: Rob Clark <robdclark@gmail.com> Tested-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
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#
f6a8eaca |
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17-Nov-2014 |
Rob Clark <robdclark@gmail.com> |
drm/msm/mdp5: use irqdomains For mdp5, the irqs of hdmi/eDP/dsi0/dsi1 blocks get routed through the mdp block. In order to decouple hdmi/eDP/etc, register an irq domain in mdp5. When hdmi/dsi/etc are used with mdp4, they can directly setup their irqs in their DT nodes as normal. When used with mdp5, instead set the mdp device as the interrupt-parent, as in: mdp: qcom,mdss_mdp@fd900000 { compatible = "qcom,mdss_mdp"; interrupt-controller; #interrupt-cells = <1>; ... }; hdmi: qcom,hdmi_tx@fd922100 { compatible = "qcom,hdmi-tx-8074"; interrupt-parent = <&mdp>; interrupts = <8 0>; /* MDP5_HW_INTR_STATUS.INTR_HDMI */ ... }; There is a slight awkwardness, in that we cannot disable child irqs at the mdp level, they can only be cleared in the child block. So you must not use threaded irq handlers in the child. I'm not sure if there is a better way to deal with that. Signed-off-by: Rob Clark <robdclark@gmail.com>
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cf3a7e4c |
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08-Nov-2014 |
Rob Clark <robdclark@gmail.com> |
drm/msm: atomic core bits The core parts for async commit. Signed-off-by: Rob Clark <robdclark@gmail.com>
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2638d90a |
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08-Nov-2014 |
Rob Clark <robdclark@gmail.com> |
drm/msm: fb prepare/cleanup Atomic wants to split the prepare/pin from where we actually program the scanout address (so that any part that can fail is done synchronously). Add some fb/gem apis to make this easier to use from the kms parts. Signed-off-by: Rob Clark <robdclark@gmail.com>
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032f8d5c |
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07-Nov-2014 |
Rob Clark <robdclark@gmail.com> |
drm/msm: remove unused compile-test stub Signed-off-by: Rob Clark <robdclark@gmail.com>
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69193e50 |
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07-Nov-2014 |
Rob Clark <robdclark@gmail.com> |
drm/msm: small fence cleanup Give ourselves a way to wait for certain fence #.. makes it easier to wait on a set of bo's, which we'll need for atomic. Signed-off-by: Rob Clark <robdclark@gmail.com>
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77a147e7 |
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12-Nov-2014 |
Daniel Thompson <daniel.thompson@linaro.org> |
drm/msm: Allow exported dma-bufs to be mapped Currently msm does not implement gem_prime_mmap. Without this it is not possible to draw onto a dma-buf from userspace (making its very hard to implement the Android rendering model). Fixing this is just a matter of adding a little boilerplate. Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
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067fef37 |
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04-Nov-2014 |
Rob Clark <robdclark@gmail.com> |
drm/msm/hdmi: refactor bind/init Split up hdmi_init() into hdmi_init() (done at hdmi sub-device bind/probe time) and hdmi_modeset_init() done from master driver's modeset_init(). Anything that can fail due to dependencies on other drivers which may be missing or not probed yet should go in hdmi_init(), so that devm error/cleanup paths work properly. Signed-off-by: Rob Clark <robdclark@gmail.com>
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b5e9c1a2 |
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09-Jan-2014 |
Maarten Lankhorst <maarten.lankhorst@canonical.com> |
drm: Pass dma-buf as argument to gem_prime_import_sg_table Allows importing dma_reservation_objects from a dma-buf. Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>
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d9fc9413 |
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23-Sep-2014 |
Daniel Vetter <daniel.vetter@ffwll.ch> |
drm: Extract <drm/drm_gem.h> v2: Don't forget git add, noticed by David. Cc: David Herrmann <dh.herrmann@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Acked-by: David Herrmann <dh.herrmann@gmail.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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70c70f09 |
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30-May-2014 |
Rob Clark <robdclark@gmail.com> |
drm/msm: add perf logging debugfs Signed-off-by: Rob Clark <robdclark@gmail.com>
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a7d3c950 |
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30-May-2014 |
Rob Clark <robdclark@gmail.com> |
drm/msm: add rd logging debugfs To ease debugging, add debugfs file which can be cat/tail'd to log submits, along with fence #. If GPU hangs, you can look at 'gpu' debugfs file to find last completed fence and current register state, and compare with logged rd file to narrow down the DRAW_INDX which triggered the GPU hang. Signed-off-by: Rob Clark <robdclark@gmail.com>
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fb27b8f2 |
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30-May-2014 |
Rob Clark <robdclark@gmail.com> |
drm/msm: update for ARCH_MSM -> ARCH_QCOM Architecture rename/split.. ARCH_QCOM is for the non-legacy platforms (ie. device-tree, multiplatform support, etc). Signed-off-by: Rob Clark <robdclark@gmail.com>
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060530f1 |
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03-Mar-2014 |
Rob Clark <robdclark@gmail.com> |
drm/msm: use componentised device support Signed-off-by: Rob Clark <robdclark@gmail.com>
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dada25bd |
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30-Nov-2013 |
Rob Clark <robdclark@gmail.com> |
drm/msm: add hdmi support for apq8x74/mdp5 The HDMI block is basically the same between older SoC's with mdp4 display controller, and newer ones with mdp5. So mostly this consists of better abstracting out the different sets of regulators, clks, etc. In particular, for regulators and clks we can split it up by what is needed for hot plug detect to work, and what is needed to light up the display. Also, 8x74 has a new phy.. a very simple one, but split out into a different mmio space. And with mdp5, the irq is shared with mdp, so we don't directly register our own irq handler. Signed-off-by: Rob Clark <robdclark@gmail.com>
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dd2da6e3 |
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30-Nov-2013 |
Rob Clark <robdclark@gmail.com> |
drm/msm: split out msm_kms.h Signed-off-by: Rob Clark <robdclark@gmail.com>
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871d812a |
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15-Nov-2013 |
Rob Clark <robdclark@gmail.com> |
drm/msm: add support for non-IOMMU systems Add a VRAM carveout that is used for systems which do not have an IOMMU. The VRAM carveout uses CMA. The arch code must setup a CMA pool for the device (preferrably in highmem.. a 256m-512m VRAM pool in lowmem is not cool). The user can configure the VRAM pool size using msm.vram module param. Technically, the abstraction of IOMMU behind msm_mmu is not strictly needed, but it simplifies the GEM code a bit, and will be useful later when I add support for a2xx devices with GPUMMU, so I decided to keep this part. It appears to be possible to configure the GPU to restrict access to addresses within the VRAM pool, but this is not done yet. So for now the GPU will refuse to load if there is no sort of mmu. Once address based limits are supported and tested to confirm that we aren't giving the GPU access to arbitrary memory, this restriction can be lifted Signed-off-by: Rob Clark <robdclark@gmail.com>
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3083894f |
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27-Nov-2013 |
Rob Clark <robdclark@gmail.com> |
drm/msm: COMPILE_TEST support With a simple stub, we can get COMPILE_TEST support. Signed-off-by: Rob Clark <robdclark@gmail.com>
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edd4fc63 |
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14-Sep-2013 |
Rob Clark <robdclark@gmail.com> |
drm/msm: rework inactive-work Re-arrange things a bit so that we can get work requested after a bo fence passes, like pageflip, done before retiring bo's. Without any sort of bo cache in userspace, some games can trigger hundred's of transient bo's, which can cause retire to take a long time (5-10ms). Obviously we want a bo cache.. but this cleanup will make things a bit easier for atomic as well and makes things a bit cleaner. Signed-off-by: Rob Clark <robdclark@gmail.com> Acked-by: David Brown <davidb@codeaurora.org>
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a8623918 |
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07-Oct-2013 |
Rob Clark <robdclark@gmail.com> |
drm/msm: add plane support Enable using VG1 and VG2 for planes. Currently YUV/CSC or scaling is not enabled, but ARGB and xRGB blending is. Signed-off-by: Rob Clark <robdclark@gmail.com> Acked-by: David Brown <davidb@codeaurora.org>
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05b84911 |
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28-Sep-2013 |
Rob Clark <robdclark@gmail.com> |
drm/msm: prime support Signed-off-by: Rob Clark <robdclark@gmail.com> Acked-by: David Brown <davidb@codeaurora.org>
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f816f272 |
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11-Sep-2013 |
Rob Clark <robdclark@gmail.com> |
drm/msm: return -EBUSY if bo still active When we CPU_PREP a bo with NOSYNC flag (for example, to implement PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE), an -EBUSY return indicates to userspace that the bo is still busy. Previously it was incorrectly returning 0 in this case. And while we're in there throw in an bit of extra sanity checking in case userspace tries to wait for a bogus fence. Signed-off-by: Rob Clark <robdclark@gmail.com>
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bf6811f3 |
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01-Sep-2013 |
Rob Clark <robdclark@gmail.com> |
drm/msm: handle read vs write fences The userspace API already had everything needed to handle read vs write synchronization. This patch actually bothers to hook it up properly, so that we don't need to (for example) stall on userspace read access to a buffer that gpu is also still reading. Signed-off-by: Rob Clark <robdclark@gmail.com>
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a3376e3e |
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30-Aug-2013 |
Rob Clark <robdclark@gmail.com> |
drm/msm: convert to drm_bridge Drop the msm_connector base class, and special calls to base class methods from the encoder, and use instead drm_bridge. This allows for a cleaner division between the hdmi (and in future dsi) blocks, from the mdp block. Signed-off-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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7198e6b0 |
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18-Jul-2013 |
Rob Clark <robdclark@gmail.com> |
drm/msm: add a3xx gpu support Add initial support for a3xx 3d core. So far, with hardware that I've seen to date, we can have: + zero, one, or two z180 2d cores + a3xx or a2xx 3d core, which share a common CP (the firmware for the CP seems to implement some different PM4 packet types but the basics of cmdstream submission are the same) Which means that the eventual complete "class" hierarchy, once support for all past and present hw is in place, becomes: + msm_gpu + adreno_gpu + a3xx_gpu + a2xx_gpu + z180_gpu This commit splits out the parts that will eventually be common between a2xx/a3xx into adreno_gpu, and the parts that are even common to z180 into msm_gpu. Note that there is no cmdstream validation required. All memory access from the GPU is via IOMMU/MMU. So as long as you don't map silly things to the GPU, there isn't much damage that the GPU can do. Signed-off-by: Rob Clark <robdclark@gmail.com>
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c8afe684 |
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25-Jun-2013 |
Rob Clark <robdclark@gmail.com> |
drm/msm: basic KMS driver for snapdragon The snapdragon chips have multiple different display controllers, depending on which chip variant/version. (As far as I can tell, current devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And then external to the display controller are HDMI, DSI, etc. blocks which may be shared across devices which have different display controller blocks. To more easily add support for different display controller blocks, the display controller specific bits are split out into a "kms" module, which provides the kms plane/crtc/encoder objects. The external HDMI, DSI, etc. blocks are part encoder, and part connector currently. But I think I will pull in the drm_bridge patches from chromeos tree, and split them into a bridge+connector, with the registers that need to be set in modeset handled by the bridge. This would remove the 'msm_connector' base class. But some things need to be double checked to make sure I could get the correct ON/OFF sequencing.. This patch adds support for mdp4 crtc (including hw cursor), dtv encoder (part of MDP4 block), and hdmi. Signed-off-by: Rob Clark <robdclark@gmail.com>
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