#
968118fc |
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12-Sep-2023 |
Linus Walleij <linus.walleij@linaro.org> |
OMAP/gpio: drop MPUIO static base The OMAP GPIO driver hardcodes the MPIO chip base, but there is no point: we have already moved all consumers over to using descriptor look-ups. Drop the MPUIO GPIO base and use dynamic assignment. Root out the unused instances of the OMAP_MPUIO() macro and delete the unused OMAP_GPIO_IS_MPUIO() macro. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Tony Lindgren <tony@atomide.com> Tested-by: Janusz Krzysztofik <jmkrzyszt@gmail.com> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
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#
f822f46f |
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28-Sep-2023 |
Uwe Kleine-König <u.kleine-koenig@pengutronix.de> |
gpio: omap: Convert to platform remove callback returning void The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is ignored (apart from emitting a warning) and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new(), which already returns void. Eventually after all drivers are converted, .remove_new() will be renamed to .remove(). Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
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#
291bc793 |
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27-Jul-2023 |
Ruan Jinjie <ruanjinjie@huawei.com> |
gpio: omap: Remove redundant dev_err_probe() and zero value handle code There is no need to call the dev_err_probe() function directly to print a custom message when handling an error from platform_get_irq() function as it is going to display an appropriate error message in case of a failure. And the code to handle bank->irq = 0 is redundant because platform_get_irq() do not return 0. Signed-off-by: Ruan Jinjie <ruanjinjie@huawei.com> Reviewed-by: Andy Shevchenko <andy@kernel.org> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
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#
e91d0f05 |
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14-Jul-2023 |
Rob Herring <robh@kernel.org> |
gpio: Explicitly include correct DT includes The DT of_device.h and of_platform.h date back to the separate of_platform_bus_type before it as merged into the regular platform bus. As part of that merge prepping Arm DT support 13 years ago, they "temporarily" include each other. They also include platform_device.h and of.h. As a result, there's a pretty much random mix of those include files used throughout the tree. In order to detangle these headers and replace the implicit includes with struct declarations, users need to explicitly include the correct includes. Signed-off-by: Rob Herring <robh@kernel.org> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Acked-by: Romain Perier <romain.perier@gmail.com> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
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#
39575d11 |
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09-Mar-2023 |
Linus Walleij <linus.walleij@linaro.org> |
gpio: omap: Convert to immutable irq_chip Convert the driver to immutable irq-chip with a bit of intuition. This driver require some special care: .irq_ack() was copied from dummy_irq_chip where it was defined as noop. This only makes sense if using handle_edge_irq() that will unconditionally call .irq_ack() to avoid a crash, but this driver is not ever using handle_edge_irq() so just avoid assigning .irq_ack(). A separate chip had to be created for the non-wakeup instance. Cc: Marc Zyngier <maz@kernel.org> Reviewed-by: Tony Lindgren <tony@atomide.com> Tested-by: Tony Lindgren <tony@atomide.com> Acked-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
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#
1e77c092 |
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09-Mar-2023 |
Linus Walleij <linus.walleij@linaro.org> |
gpio: omap: Drop irq_base The OMAP1 at one point was using static irqs but that time is gone, OMAP1 uses sparse irqs like all other multiplatform targets so this static allocation of descriptors should just go. Cc: Janusz Krzysztofik <jmkrzyszt@gmail.com> Cc: Tony Lindgren <tony@atomide.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Marc Zyngier <maz@kernel.org> Reviewed-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
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#
92bf78b3 |
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13-Jan-2023 |
Andreas Kemnade <andreas@kemnade.info> |
gpio: omap: use dynamic allocation of base Static allocatin is deprecated and may cause probe mess, if probe order is unusual. like this example [ 2.553833] twl4030_gpio twl4030-gpio: gpio (irq 145) chaining IRQs 161..178 [ 2.561401] gpiochip_find_base: found new base at 160 [ 2.564392] gpio gpiochip5: (twl4030): added GPIO chardev (254:5) [ 2.564544] gpio gpiochip5: registered GPIOs 160 to 177 on twl4030 [...] [ 2.692169] omap-gpmc 6e000000.gpmc: GPMC revision 5.0 [ 2.697357] gpmc_mem_init: disabling cs 0 mapped at 0x0-0x1000000 [ 2.703643] gpiochip_find_base: found new base at 178 [ 2.704376] gpio gpiochip6: (omap-gpmc): added GPIO chardev (254:6) [ 2.704589] gpio gpiochip6: registered GPIOs 178 to 181 on omap-gpmc [...] [ 2.840393] gpio gpiochip7: Static allocation of GPIO base is deprecated, use dynamic allocation. [ 2.849365] gpio gpiochip7: (gpio-160-191): GPIO integer space overlap, cannot add chip [ 2.857513] gpiochip_add_data_with_key: GPIOs 160..191 (gpio-160-191) failed to register, -16 [ 2.866149] omap_gpio 48310000.gpio: error -EBUSY: Could not register gpio chip So probing was done in an unusual order, causing mess and chips not getting their gpio in the end. Signed-off-by: Andreas Kemnade <andreas@kemnade.info> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
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#
989c78f2 |
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31-Jan-2022 |
Marc Zyngier <maz@kernel.org> |
gpio: omap: Move PM device over to irq domain Move the reference to the device over to the irq domain. Signed-off-by: Marc Zyngier <maz@kernel.org> Tested-by: Tony Lindgren <tony@atomide.com> Acked-by: Bartosz Golaszewski <brgl@bgdev.pl> Link: https://lore.kernel.org/r/20220201120310.878267-8-maz@kernel.org
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#
448cf905 |
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17-Dec-2021 |
Andy Shevchenko <andriy.shevchenko@linux.intel.com> |
gpio: Get rid of duplicate of_node assignment in the drivers GPIO library does copy the of_node from the parent device of the GPIO chip, there is no need to repeat this in the individual drivers. Remove these assignment all at once. For the details one may look into the of_gpio_dev_init() implementation. While at it, remove duplicate parent device assignment where it is the case. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-By: Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
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#
dbd1c54f |
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04-May-2021 |
Marc Zyngier <maz@kernel.org> |
gpio: Bulk conversion to generic_handle_domain_irq() Wherever possible, replace constructs that match either generic_handle_irq(irq_find_mapping()) or generic_handle_irq(irq_linear_revmap()) to a single call to generic_handle_domain_irq(). Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Marc Zyngier <maz@kernel.org>
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#
ca40daf3 |
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31-Mar-2021 |
Tian Tao <tiantao6@hisilicon.com> |
gpio: omap: Use device_get_match_data() helper Use the device_get_match_data() helper instead of open coding. Signed-off-by: Tian Tao <tiantao6@hisilicon.com> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
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#
ddd8d94c |
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17-Apr-2021 |
Tony Lindgren <tony@atomide.com> |
gpio: omap: Save and restore sysconfig As we are using cpu_pm to save and restore context, we must also save and restore the GPIO sysconfig register. This is needed because we are not calling PM runtime functions at all with cpu_pm. We need to save the sysconfig on idle as it's value can get reconfigured by PM runtime and can be different from the init time value. Device specific flags like "ti,no-idle-on-init" can affect the init value. Fixes: b764a5863fd8 ("gpio: omap: Remove custom PM calls and use cpu_pm instead") Cc: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: Adam Ford <aford173@gmail.com> Cc: Andreas Kemnade <andreas@kemnade.info> Cc: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Peter Ujfalusi <peter.ujfalusi@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Acked-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
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#
2ae136a3 |
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18-Nov-2020 |
Grygorii Strashko <grygorii.strashko@ti.com> |
gpio: omap: handle deferred probe with dev_err_probe() for gpiochip_add_data() The gpiochip_add_data() may return -EPROBE_DEFER which is not handled properly by TI GPIO driver and causes unnecessary boot log messages. Hence, add proper deferred probe handling with new dev_err_probe() API. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
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#
7ffa0816 |
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28-Oct-2020 |
Tony Lindgren <tony@atomide.com> |
Revert "Revert "gpio: omap: Fix lost edge wake-up interrupts"" This reverts commit 579ced8fdb00b8e94304a83e3cc419f6f8eab08e. Turns out I was overly optimistic about cpu_pm blocking idle being a solution for handling edge interrupts. While it helps in preventing entering idle states that potentially lose context, we can still get an edge interrupt triggering while entering idle. So we need to also add back the workaround for seeing if there are any pending edge interrupts when waking up. Signed-off-by: Tony Lindgren <tony@atomide.com> Cc: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Keerthy <j-keerthy@ti.com> Cc: Ladislav Michl <ladis@linux-mips.org> Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Cc: Russell King <rmk+kernel@armlinux.org.uk> Cc: Tero Kristo <t-kristo@ti.com> Link: https://lore.kernel.org/r/20201028060556.56038-1-tony@atomide.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
4e7ed696 |
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27-Aug-2020 |
Krzysztof Kozlowski <krzk@kernel.org> |
gpio: omap: Simplify with dev_err_probe() Common pattern of handling deferred probe can be simplified with dev_err_probe(). Less code and also it prints the error value. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Grygorii Strashko <grygorii.strashko@ti.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
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#
d3f99f91 |
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18-Aug-2020 |
Tony Lindgren <tony@atomide.com> |
gpio: omap: Fix warnings if PM is disabled Fix warnings for omap_gpio_resume and omap_gpio_suspend defined but not used when PM is disabled as noticed when doing make randconfig builds. Fixes: f02a03985d06 ("gpio: omap: Add missing PM ops for suspend") Cc: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Tony Lindgren <tony@atomide.com> Acked-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
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#
bde8c0e6 |
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22-Jul-2020 |
Drew Fustini <drew@beagleboard.org> |
gpio: omap: improve coding style for pin config flags Change the handling of pin config flags from if/else to switch statement to make the code more readable and cleaner. Suggested-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Signed-off-by: Drew Fustini <drew@beagleboard.org> Acked-by: Gustavo A. R. Silva <gustavoars@kernel.org> Link: https://lore.kernel.org/r/20200722120755.230741-1-drew@beagleboard.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
75dec567 |
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17-Jul-2020 |
Drew Fustini <drew@beagleboard.org> |
gpio: omap: handle pin config bias flags Modify omap_gpio_set_config() to handle pin config bias flags by calling gpiochip_generic_config(). The pin group for the gpio line must have the corresponding pinconf properties: PIN_CONFIG_BIAS_PULL_UP requires "pinctrl-single,bias-pullup" PIN_CONFIG_BIAS_PULL_DOWN requires "pinctrl-single,bias-pulldown" This is necessary for pcs_pinconf_set() to find the requested bias parameter in the PIN_MAP_TYPE_CONFIGS_GROUP pinctrl map. Signed-off-by: Drew Fustini <drew@beagleboard.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Grygorii Strashko <grygorii.strashko@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Link: https://lore.kernel.org/r/20200715213738.1640030-1-drew@beagleboard.org Link: https://lore.kernel.org/r/20200717194043.1774643-1-drew@beagleboard.org
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#
3762442a |
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20-Jul-2020 |
Linus Walleij <linus.walleij@linaro.org> |
Revert "gpio: omap: handle pin config bias flags" This reverts commit 40e30d26d909af89de2dcd0b4abdd27c47ac2235. I applied the patch to the wrong tree, oooups. Also there is a new version of it. Revert it out of pinctrl and apply to the gpio tree. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
40e30d26 |
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15-Jul-2020 |
Drew Fustini <drew@beagleboard.org> |
gpio: omap: handle pin config bias flags Modify omap_gpio_set_config() to handle pin config bias flags by calling gpiochip_generic_config(). The pin group for the gpio line must have the corresponding pinconf properties: PIN_CONFIG_BIAS_PULL_UP requires "pinctrl-single,bias-pullup" PIN_CONFIG_BIAS_PULL_DOWN requires "pinctrl-single,bias-pulldown" This is necessary for pcs_pinconf_set() to find the requested bias parameter in the PIN_MAP_TYPE_CONFIGS_GROUP pinctrl map. Signed-off-by: Drew Fustini <drew@beagleboard.org> Acked-by: Grygorii Strashko <grygorii.strashko@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Link: https://lore.kernel.org/r/20200715213738.1640030-1-drew@beagleboard.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
f02a0398 |
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29-Jun-2020 |
Tony Lindgren <tony@atomide.com> |
gpio: omap: Add missing PM ops for suspend We've had the legacy platform code take care of suspend for us but this no longer is the case when probed without legacy mode with ti-sysc. We need to configure PM ops like standard Linux device drivers do. As we still have some SoCs booting also the legacy mode, we need to add omap_gpio_suspend() and omap_gpio_resume(), and check for the is_suspended flag to avoid legacy _od_suspend_noirq() calling them on an already suspended GPIO instance. Once we have no SoCs booting in legacy mode, we can just switch to using the standard PM ops with pm_runtime_force_suspend() and pm_runtime_force_resume(). Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
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#
579ced8f |
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04-Mar-2020 |
Tony Lindgren <tony@atomide.com> |
Revert "gpio: omap: Fix lost edge wake-up interrupts" This reverts commit a522f1d0c381c42f3ace13b8bbeeccabdd6d2e5c. With cpu_pm handling fixed for omaps, and with gpio-omap now returning notify error on pending interrupts, we can drop the old workaround for seeing if there may be pending edge interrupts. Depends-on: ARM: OMAP2+: Handle errors for cpu_pm Depends-on: gpio: omap: Block idle on pending gpio interrupts Cc: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Keerthy <j-keerthy@ti.com> Cc: Ladislav Michl <ladis@linux-mips.org> Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Cc: Russell King <rmk+kernel@armlinux.org.uk> Cc: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20200304225433.37336-4-tony@atomide.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
43582265 |
|
04-Mar-2020 |
Tony Lindgren <tony@atomide.com> |
gpio: omap: Block idle on pending gpio interrupts With the SoC cpuidle handling fixed for cpu_pm, we can now start to return NOTIFY_BAD if there there are pending gpio interrupts. This way the deeper SoC idle states can get blocked, and gpio latency is improved in some cases. Note that this will not help with the latency if the SoC has already entered a deeper idle state. Note that this patch depends on cpu_pm properly handling the errors returned by notifiers. For omap variants, this is fixed with patch "ARM: OMAP2+: Handle errors for cpu_pm". Cc: Dave Gerlach <d-gerlach@ti.com> Cc: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Keerthy <j-keerthy@ti.com> Cc: Ladislav Michl <ladis@linux-mips.org> Cc: Russell King <rmk+kernel@armlinux.org.uk> Cc: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Link: https://lore.kernel.org/r/20200304225433.37336-3-tony@atomide.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
e42615ec |
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06-Nov-2019 |
Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com> |
gpio: Use new GPIO_LINE_DIRECTION It's hard for occasional GPIO code reader/writer to know if values 0/1 equal to IN or OUT. Use defined GPIO_LINE_DIRECTION_IN and GPIO_LINE_DIRECTION_OUT to help them out. NOTE - for gpio-amd-fch and gpio-bd9571mwv: This commit also changes the return value for direction get to equal 1 for direction INPUT. Prior this commit these drivers might have returned some other positive value but 1 for INPUT. Signed-off-by: Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com> Acked-by: Scott Branden <scott.branden@broadcom.com> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com> Reviewed-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: William Breathitt Gray <vilhelm.gray@gmail.com> Acked-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
d2912cb1 |
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04-Jun-2019 |
Thomas Gleixner <tglx@linutronix.de> |
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation # extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 4122 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Enrico Weigelt <info@metux.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
a522f1d0 |
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12-Jun-2019 |
Tony Lindgren <tony@atomide.com> |
gpio: omap: Fix lost edge wake-up interrupts If an edge interrupt triggers while entering idle just before we save GPIO datain register to saved_datain, the triggered GPIO will not be noticed on wake-up. This is because the saved_datain and GPIO datain are the same on wake-up in omap_gpio_unidle(). Let's fix this by ignoring any pending edge interrupts for saved_datain. This issue affects only idle states where the GPIO module internal wake-up path is operational. For deeper idle states where the GPIO module gets powered off, Linux generic wakeirqs must be used for the padconf wake-up events with pinctrl-single driver. For examples, please see "interrupts-extended" dts usage in many drivers. This issue can be somewhat easily reproduced by pinging an idle system with smsc911x Ethernet interface configured IRQ_TYPE_EDGE_FALLING. At some point the smsc911x interrupts will just stop triggering. Also if WLCORE WLAN is used with EDGE interrupt like it's documentation specifies, we can see lost interrupts without this patch. Note that in the long run we may be able to cancel entering idle by returning an error in gpio_omap_cpu_notifier() on pending interrupts. But let's fix the bug first. Also note that because of the recent clean-up efforts this patch does not apply directly to older kernels. This does fix a long term issue though, and can be backported as needed. Cc: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Keerthy <j-keerthy@ti.com> Cc: Ladislav Michl <ladis@linux-mips.org> Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Cc: Russell King <rmk+kernel@armlinux.org.uk> Cc: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
754dfd79 |
|
10-Jun-2019 |
Russell King <rmk+kernel@armlinux.org.uk> |
gpio: omap: clean up register access in omap2_set_gpio_debounce() Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
f1c32ef1 |
|
10-Jun-2019 |
Russell King <rmk+kernel@armlinux.org.uk> |
gpio: omap: irq_startup() must not return error codes The irq_startup() method returns an unsigned int, but in __irq_startup() it is assigned to an int. However, nothing checks for errors, so any error that is returned is ignored. Remove the check for GPIO-input mode and the error return. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
40fd422a |
|
10-Jun-2019 |
Russell King <rmk+kernel@armlinux.org.uk> |
gpio: omap: clean up wakeup handling Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
#
18bd49c4 |
|
10-Jun-2019 |
Russell King <rmk+kernel@armlinux.org.uk> |
gpio: omap: constify register tables We must never alter the register tables; these are read-only as far as the driver is concerned. Constify these tables. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
9c7f798d |
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10-Jun-2019 |
Russell King <rmk+kernel@armlinux.org.uk> |
gpio: omap: clean up omap_gpio_restore_context() Use local variables to store the base iomem address and regs table pointer like omap_gpio_init_context() does. Not only does this make the function neater, it also avoids unnecessary reloads of the same data multiple times. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
9a302781 |
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10-Jun-2019 |
Russell King <rmk+kernel@armlinux.org.uk> |
gpio: omap: remove dataout variation in context handling When a GPIO block has the set/clear dataout registers implemented, it also has the normal dataout register implemented. Reading this register reads the current GPIO output state, and writing it sets the GPIOs to the explicit state. This is the behaviour that we want when saving and restoring the context, so use the dataout register exclusively. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
31b2d7f7 |
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10-Jun-2019 |
Russell King <rmk+kernel@armlinux.org.uk> |
gpio: omap: simplify omap_set_gpio_irqenable() omap_set_gpio_irqenable() calls two helpers that are almost the same apart from whether they set or clear bits. We can consolidate these: - in the set/clear bit register case, we can perform the operation on our saved context copy and write the appropriate set/clear register. - otherwise, we can use our read-modify-write helper and invert enable if irqenable_inv is set. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
a47b9158 |
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10-Jun-2019 |
Russell King <rmk+kernel@armlinux.org.uk> |
gpio: omap: simplify omap_toggle_gpio_edge_triggering() This function open-codes an exclusive-or bitwise operation using an if() statement and explicitly setting or clearing the bit. Instead, use an exclusive-or operation instead, and simplify the function. We can combine the preprocessor conditional using IS_ENABLED() and gain some additional compilation coverage. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
8ee1de65 |
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10-Jun-2019 |
Russell King <rmk+kernel@armlinux.org.uk> |
gpio: omap: simplify read-modify-write We already have a read-modify-write helper, but there's more that can be done with a read-modify-write helper if it returned the new value. Modify the existing helper to return the new value, and arrange for it to take one less argument by having the caller compute the register address. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
a0e881e2 |
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10-Jun-2019 |
Russell King <rmk+kernel@armlinux.org.uk> |
gpio: omap: simplify bank->level_mask bank->level_mask is merely the bitwise or of the level detection context which we have already read in this function. Rather than repeating additional reads, compute it from the values already read. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
8ba70595 |
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10-Jun-2019 |
Russell King <rmk+kernel@armlinux.org.uk> |
gpio: omap: simplify set_multiple() One of the reasons for set_multiple() to exist is to allow multiple GPIOs on the same chip to be changed simultaneously - see commit 5f42424354f5 ("gpiolib: allow simultaneous setting of multiple GPIO outputs"): - Simultaneous glitch-free setting of multiple pins on any kind of parallel bus attached to GPIOs provided they all reside on the same chip and bank. In order for this to work, we should not use the atomic set/clear registers, but instead read-modify-write the dataout register. We already take the spinlock to ensure that happens atomically, so move the code into the set_multiple() function and kill the two helper functions. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
6653dd88 |
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10-Jun-2019 |
Russell King <rmk+kernel@armlinux.org.uk> |
gpio: omap: simplify get_multiple() There is no reason to have helper functions to read the datain and dataout registers when they are only used in one location. Simplify this code to make it more readable. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
5ca5f92c |
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10-Jun-2019 |
Russell King <rmk+kernel@armlinux.org.uk> |
gpio: omap: simplify get() method omap_gpio_get() calls omap_get_gpio_datain() or omap_get_gpio_dataout() to read the GPIO state. These two functions are only called from this method, so they don't add much value. Move their contents into omap_gpio_get() method and simplify. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
40bb2273 |
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10-Jun-2019 |
Russell King <rmk+kernel@armlinux.org.uk> |
gpio: omap: simplify omap_gpio_get_direction() Architectures are single-copy atomic, which means that simply reading a register is an inherently atomic operation. There is no need to take a spinlock here. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
dfbc6c7a |
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10-Jun-2019 |
Russell King <rmk+kernel@armlinux.org.uk> |
gpio: omap: move omap_gpio_request() and omap_gpio_free() Move these two functions to live beside the rest of the gpio chip implementation, rather than in the middle of the irq chip implementation. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
693de831 |
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10-Jun-2019 |
Russell King <rmk+kernel@armlinux.org.uk> |
gpio: omap: remove irq_ack method The irq_ack method does not fit our hardware requirements. Edge interrupts must be cleared before we handle them, and level interrupts must be cleared after handling them. We handle the interrupt clearance in our interrupt handler for edge IRQs and in the unmask method for level IRQs. Replace the irq_ack method with the no-op method from the dummy irq chip. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
395373c7 |
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10-Jun-2019 |
Russell King <rmk+kernel@armlinux.org.uk> |
gpio: omap: clean up edge interrupt handling The edge interrupt handling was effectively: isr = ISR_reg & enabled; if (bank->level_mask) level_mask = bank->level_mask & enabled; else level_mask = 0; edge = isr & ~level_mask; When bank->level_mask is zero, level_mask will be computed as zero anyway, so the if() statement is redundant. We are then left with: isr = ISR_reg & enabled; level_mask = bank->level_mask & enabled; edge = isr & ~level_mask; This can be simplified further to: isr = ISR_reg & enabled; edge = isr & ~bank->level_mask; since the second mask with 'enabled' is redundant. Improve the associated comment as well. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
c030a9c9 |
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10-Jun-2019 |
Russell King <rmk+kernel@armlinux.org.uk> |
gpio: omap: remove remainder of list management Commit c4791bc6e3a6 ("gpio: omap: drop omap_gpio_list") removed the list head and addition to the list head of each gpio bank, but failed to remove the list_del() call and the node inside struct gpio_bank. Remove these too. Fixes: c4791bc6e3a6 ("gpio: omap: drop omap_gpio_list") Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
64ea3e90 |
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10-Jun-2019 |
Russell King <rmk+kernel@armlinux.org.uk> |
gpio: omap: fix lack of irqstatus_raw0 for OMAP4 Commit 384ebe1c2849 ("gpio/omap: Add DT support to GPIO driver") added the register definition tables to the gpio-omap driver. Subsequently to that commit, commit 4e962e8998cc ("gpio/omap: remove cpu_is_omapxxxx() checks from *_runtime_resume()") added definitions for irqstatus_raw* registers to the legacy OMAP4 definitions, but missed the DT definitions. This causes an unintentional change of behaviour for the 1.101 errata workaround on OMAP4 platforms. Fix this oversight. Fixes: 4e962e8998cc ("gpio/omap: remove cpu_is_omapxxxx() checks from *_runtime_resume()") Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
c859e0d4 |
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10-Jun-2019 |
Russell King <rmk+kernel@armlinux.org.uk> |
gpio: omap: ensure irq is enabled before wakeup Documentation states: NOTE: There must be a correlation between the wake-up enable and interrupt-enable registers. If a GPIO pin has a wake-up configured on it, it must also have the corresponding interrupt enabled (on one of the two interrupt lines). Ensure that this condition is always satisfied by enabling the detection events after enabling the interrupt, and disabling the detection before disabling the interrupt. This ensures interrupt/wakeup events can not happen until both the wakeup and interrupt enables correlate. If we do any clearing, clear between the interrupt enable/disable and trigger setting. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
044e499a |
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10-Apr-2019 |
Russell King <rmk+kernel@armlinux.org.uk> |
gpio: gpio-omap: Remove conditional pm_runtime handling for GPIO interrupts Commit b764a5863fd8 ("gpio: omap: Remove custom PM calls and use cpu_pm instead") moved interrupt using GPIO banks to idle with cpu_pm in order to drop the use of pm_runtime_irq_safe() in a later patch. The GPIO banks with no interrupts claimed are still being idled based on PM runtime calls. However this caused a regression for am437x suspend for rtc+ddr idle mode where the device cannot enter idle state as reported by Keerthy <j-keerthy@ti.com>. To fix the issue, we must not fail the pm_runtime callbacks. For GPIO interrupts, we already have irq_chip_pm_get increment the PM runtime use count as pointed out by Grygorii Strashko <grygorii.strashko@ti.com>. So all we need to do is remove the conditional handling in the runtime_suspend and resume functions and let the CPU PM notifier idle the GPIO banks. Cc: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Keerthy <j-keerthy@ti.com> Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Cc: Tero Kristo <t-kristo@ti.com> Fixes: b764a5863fd8 ("gpio: omap: Remove custom PM calls and use cpu_pm instead") Reported-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> [tony@atomide.com: updated patch description, dropped runtime count changes] Signed-off-by: Tony Lindgren <tony@atomide.com> Tested-by: Keerthy <j-keerthy@ti.com> Reviewed-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
e6818d29 |
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08-Apr-2019 |
Russell King <rmk+kernel@armlinux.org.uk> |
gpio: gpio-omap: configure edge detection for level IRQs for idle wakeup The GPIO block can enter idle independently of the CPU power management calls via smart-idle. When the GPIO block enters idle, level detection stops working due to clocks being shut off, and an alternative form of edge detection is used. However, this needs the edge detection registers set to mark the appropriate edges. Arrange to configure the edge detection enables along with the level detection to ensure that any transition to active interrupt state that occurs while the block is idle is detected as a wake-up event. Since we enable the edge detection when configuring the IRQ, both omap2_gpio_enable_level_quirk() nor omap2_gpio_disable_level_quirk() become redundant, which also means OMAP_GPIO_QUIRK_IDLE_REMOVE_TRIGGER can be removed. This can be now done without regressions as patch "gpio: gpio-omap: fix level interrupt idling" allows level interrupts to idle on omap4 without a workaround. Cc: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Keerthy <j-keerthy@ti.com> Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Cc: Tero Kristo <t-kristo@ti.com> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> [tony@atomide.com: update description for the fix dependency] Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
58f57f86 |
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11-Mar-2019 |
Enrico Weigelt, metux IT consult <info@metux.net> |
gpio: omap: use devm_platform_ioremap_resource() Use the new helper that wraps the calls to platform_get_resource() and devm_ioremap_resource() together. Signed-off-by: Enrico Weigelt, metux IT consult <info@metux.net> Acked-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
7c68571f |
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07-Mar-2019 |
Arnd Bergmann <arnd@arndb.de> |
gpio: omap: avoid clang warning clang warns about a tentative array definition in the gpio-omap driver: drivers/gpio/gpio-omap.c:1282:34: error: tentative array definition assumed to have one element [-Werror] static const struct of_device_id omap_gpio_match[]; It's best to just reorder the entire file to avoid forward declarations, which lets us use the regular declaration. To do this, the unnecessary CONFIG_OF check must also be removed. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
da38ef3e |
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25-Mar-2019 |
Tony Lindgren <tony@atomide.com> |
gpio: gpio-omap: add check for off wake capable gpios We are currently assuming all GPIOs are non-wakeup capable GPIOs as we not configuring the bank->non_wakeup_gpios like we used to earlier with platform_data. Let's add omap_gpio_is_off_wakeup_capable() to make the handling clearer while considering that later patches may want to configure SoC specific bank->non_wakeup_gpios for the GPIOs in wakeup domain. Cc: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Keerthy <j-keerthy@ti.com> Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Cc: Russell King <rmk+kernel@armlinux.org.uk> Cc: Tero Kristo <t-kristo@ti.com> Reported-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
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#
06dce84e |
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25-Mar-2019 |
Tony Lindgren <tony@atomide.com> |
gpio: gpio-omap: always scan for triggered non-wakeup capable interrupts The bank->workaround_enabled should be for omap24xx erratum 1.101 but is not needed any longer as erratum 1.101 handling only needs to happen based on !bank->loses_context with patch "gpio: omap: Limit errata 1.101 handling to wkup domain gpios only". Further Grygorii Strashko <grygorii.strashko@ti.com> points out that we are now tagging all edge GPIOs as non-wakeup GPIOs and rely on original erratum 1.101 handling for scacnning for edge interrupts that have triggered during idle. Also the TI Android kernel tree has an earlier commit "GPIO: OMAP: Always scan gpios during runtime resume" by Tero Kristo <t-kristo@ti.com> saying: "This allows the driver to generate interrupts for GPIOs that can't wakeup but have changed state during runtime suspend. We cannot depend on the decision based on no need to restore, as the system state might change and pending events could gather up." So let's remove bank->workaround_enabled and always scan for triggered edge interrupts on resume. We do that based on bank->enabled_non_wakeup_gpios. Cc: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Keerthy <j-keerthy@ti.com> Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Cc: Russell King <rmk+kernel@armlinux.org.uk> Cc: Tero Kristo <t-kristo@ti.com> Reported-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
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#
21e2118f |
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25-Mar-2019 |
Tony Lindgren <tony@atomide.com> |
gpio: gpio-omap: limit errata 1.101 handling to wkup domain gpios only We need to only apply errata 1.101 handling to clear non-wakeup edge gpios for idle to the gpio bank(s) in the wkup domain to prevent spurious wake-up events. And we must restore what we did after idle manually as the gpio bank in wkup domain is not restored otherwise. Let's keep bank->saved_datain register reading separate, that's not related to the 1.101 errata and is used separately on restore. Cc: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Keerthy <j-keerthy@ti.com> Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Cc: Russell King <rmk+kernel@armlinux.org.uk> Cc: Tero Kristo <t-kristo@ti.com> Reported-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
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#
d01849f7 |
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01-Mar-2019 |
Russell King <rmk+kernel@armlinux.org.uk> |
gpio: gpio-omap: fix level interrupt idling Tony notes that the GPIO module does not idle when level interrupts are in use, as the wakeup appears to get stuck. After extensive investigation, it appears that the wakeup will only be cleared if the interrupt status register is cleared while the interrupt is enabled. However, we are currently clearing it with the interrupt disabled for level-based interrupts. It is acknowledged that this observed behaviour conflicts with a statement in the TRM: CAUTION After servicing the interrupt, the status bit in the interrupt status register (GPIOi.GPIO_IRQSTATUS_0 or GPIOi.GPIO_IRQSTATUS_1) must be reset and the interrupt line released (by setting the corresponding bit of the interrupt status register to 1) before enabling an interrupt for the GPIO channel in the interrupt-enable register (GPIOi.GPIO_IRQSTATUS_SET_0 or GPIOi.GPIO_IRQSTATUS_SET_1) to prevent the occurrence of unexpected interrupts when enabling an interrupt for the GPIO channel. However, this does not appear to be a practical problem. Further, as reported by Grygorii Strashko <grygorii.strashko@ti.com>, the TI Android kernel tree has an earlier similar patch as "GPIO: OMAP: Fix the sequence to clear the IRQ status" saying: if the status is cleared after disabling the IRQ then sWAKEUP will not be cleared and gates the module transition When we unmask the level interrupt after the interrupt has been handled, enable the interrupt and only then clear the interrupt. If the interrupt is still pending, the hardware will re-assert the interrupt status. Should the caution note in the TRM prove to be a problem, we could use a clear-enable-clear sequence instead. Cc: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: Keerthy <j-keerthy@ti.com> Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> [tony@atomide.com: updated comments based on an earlier TI patch] Signed-off-by: Tony Lindgren <tony@atomide.com> Acked-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
00ded24c |
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07-Dec-2018 |
Tony Lindgren <tony@atomide.com> |
gpio: gpio-omap: Revert deferred wakeup quirk handling for regressions Commit ec0daae685b2 ("gpio: omap: Add level wakeup handling for omap4 based SoCs") attempted to fix omap4 GPIO wakeup handling as it was blocking deeper SoC idle states. However this caused a regression for GPIOs during runtime having over second long latencies for Ethernet GPIO interrupt as reportedy by Russell King <rmk+kernel@armlinux.org.uk>. Let's fix this issue by doing a partial revert of the breaking commit. We still want to keep the quirk handling around as it is also used for OMAP_GPIO_QUIRK_IDLE_REMOVE_TRIGGER. The real fix for omap4 GPIO wakeup handling involves fixes for omap_set_gpio_trigger() and omap_gpio_unmask_irq() and will be posted separately. And we must keep the wakeup bit enabled during runtime because of module doing clock autogating with autoidle configured. Reported-by: Russell King <rmk+kernel@armlinux.org.uk> Fixes: ec0daae685b2 ("gpio: omap: Add level wakeup handling for omap4 based SoCs") Cc: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Keerthy <j-keerthy@ti.com> Cc: Ladislav Michl <ladis@linux-mips.org> Cc: Russell King <rmk+kernel@armlinux.org.uk> Cc: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
a3f4f728 |
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21-Oct-2018 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
gpio: gpio-omap: simplify getting .driver_data We should get 'driver_data' from 'struct device' directly. Going via platform_device is an unneeded step back and forth. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
850d434e |
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27-Sep-2018 |
YueHaibing <yuehaibing@huawei.com> |
gpio: omap: Remove set but not used variable 'dev' Fixes gcc '-Wunused-but-set-variable' warning: drivers/gpio/gpio-omap.c: In function 'gpio_omap_cpu_notifier': drivers/gpio/gpio-omap.c:1327:17: warning: variable 'dev' set but not used [-Wunused-but-set-variable] Signed-off-by: YueHaibing <yuehaibing@huawei.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
c4791bc6 |
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27-Sep-2018 |
Grygorii Strashko <grygorii.strashko@ti.com> |
gpio: omap: drop omap_gpio_list omap_gpio_list is unused so drop it. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
46748073 |
|
28-Sep-2018 |
Grygorii Strashko <grygorii.strashko@ti.com> |
gpio: omap: get rid of the conditional PM runtime calls OMAP GPIO driver is checking !BANK_USED() used condition before calling PM runtime API, because of PM runtime calls in omap2_gpio_prepare/resume_for_idle(). It's not required any more since "omap gpio add level idle, cpu_pm and drop runtime_irq_safe" series [1] from Tony Lindgren was accepted and PM runtime management was enabled in IRQ chip core by commit be45beb2df69 ("genirq: Add runtime power management support for IRQ chips") . As result safely drop !BANK_USED() checks from omap_gpio_request/free(), omap_gpio_irq_bus_lock/unlock() and enable PM runtime management for OMAP GPIO IRQ chip. [1] https://www.spinics.net/lists/arm-kernel/msg677583.html Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
5284521a |
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20-Sep-2018 |
Tony Lindgren <tony@atomide.com> |
gpio: omap: Get rid of pm_runtime_irq_safe() If a gpio instance has any GPIO bits requested we do a pm_runtime_get() on the device. Now with cpu_pm handling the deeper SoC idle state quirks, let's just remove pm_runtime_irq_safe() call and add a warning in case we ever happen to encounter it. Cc: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: Keerthy <j-keerthy@ti.com> Cc: Ladislav Michl <ladis@linux-mips.org> Cc: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Acked-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
b764a586 |
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20-Sep-2018 |
Tony Lindgren <tony@atomide.com> |
gpio: omap: Remove custom PM calls and use cpu_pm instead For a long time the gpio-omap custom PM calls have been annoying me so let's replace them with cpu_pm instead. This will enable GPIO PM for deeper idle states on omap4. And we can handle GPIO PM for omap2/3/4 in the same way. Note that with this patch we are also slightly changing GPIO PM to be less aggressive for omap3 and only will idle GPIO when PER context may be lost. For omap2, we don't need to save context and don't want to remove any triggering so let's add a quirk flag for that. Let's do this all in a single patch to avoid a situation where old custom calls still are used with new code. Cc: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: Keerthy <j-keerthy@ti.com> Cc: Ladislav Michl <ladis@linux-mips.org> Cc: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Acked-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
ec0daae6 |
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20-Sep-2018 |
Tony Lindgren <tony@atomide.com> |
gpio: omap: Add level wakeup handling for omap4 based SoCs I noticed that unlike omap2 and 3 based SoCs, omap4 based SoCs keep the GPIO clocks enabled for GPIO level interrupts with wakeup enabled. This blocks deeper idle states as the whole domain will stay busy. The GPIO functional clock seems to stay enabled if the wakeup register is enabled and a level interrupt is triggered. In that case the only way to have the GPIO module idle is to reset it. It is possible this has gone unnoticed with OSWR (Open SWitch Retention) and off mode during idle resetting GPIO context most GPIO instances in the earlier Android trees for example. Looks like the way to deal with this is to have omap4 based SoCs only set wake for the duration of idle for level interrupts, and clear level registers for the idle. With level interrupts we can do this as the level interrupt from device will be still there on resume. I've taken the long path to fixing this to avoid yet more hard to read code. I've set up a quirks flag, and a struct for function pointers so we can use these to clean up other quirk handling easier in the later patches. The current level quirk handling is moved to the new functions. Cc: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: Ladislav Michl <ladis@linux-mips.org> Cc: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Acked-by: Grygorii Strashko <grygorii.strashko@ti.com> Tested-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
442af140 |
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18-Jul-2018 |
Janusz Krzysztofik <jmkrzyszt@gmail.com> |
gpio: omap: Add get/set_multiple() callbacks This should make applications utilizing whole banks work faster. Signed-off-by: Janusz Krzysztofik <jmkrzyszt@gmail.com> Acked-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
b7351b07 |
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24-May-2018 |
Linus Walleij <linus.walleij@linaro.org> |
gpio: omap: Include the right header This is a GPIO driver, include only <linux/gpio/driver.h>. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
f97364c9 |
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10-Feb-2018 |
Markus Elfring <elfring@users.sourceforge.net> |
gpio: omap: Improve a size determination Replace the specification of a data structure by a pointer dereference as the parameter for the operator "sizeof" to make the corresponding size determination a bit safer according to the Linux coding style convention. This issue was detected by using the Coccinelle software. Signed-off-by: Markus Elfring <elfring@users.sourceforge.net> Acked-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
9117d40b |
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10-Feb-2018 |
Markus Elfring <elfring@users.sourceforge.net> |
gpio: omap: Delete an error message Omit an extra message for a memory allocation failure in this function. This issue was detected by using the Coccinelle software. Signed-off-by: Markus Elfring <elfring@users.sourceforge.net> Acked-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
088413bc |
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29-Dec-2017 |
Linus Walleij <linus.walleij@linaro.org> |
gpio: omap: Give unique labels to each GPIO bank/chip As we need to add GPIO lookup tables to the OMAP platforms, we need to reference each GPIO chip with a unique label. Use the GPIO base to name each chip, "gpio-0-31", "gpio-32-63" etc. Cc: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Santosh Shilimkar <ssantosh@kernel.org> Cc: Kevin Hilman <khilman@kernel.org> Cc: linux-omap@vger.kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
81930328 |
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14-Nov-2017 |
Grygorii Strashko <grygorii.strashko@ti.com> |
gpio: omap: initialize gpioirq chip as part of gpiochip_add_data Hence, series from Thierry Reding [1] merged - the OMAP GPIO driver can be switched to reuse new feature and just fill new struct gpio_irq_chip before calling gpiochip_add_data() instead of using few separate gpioirq chip APIs. gpiochip_add_data() will do the job and create and initialize gpioirq chip [1] https://www.mail-archive.com/linux-kernel@vger.kernel.org/msg1531592.html Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
f0fbe7bc |
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07-Nov-2017 |
Thierry Reding <treding@nvidia.com> |
gpio: Move irqdomain into struct gpio_irq_chip In order to consolidate the multiple ways to associate an IRQ chip with a GPIO chip, move more fields into the new struct gpio_irq_chip. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
80ac93c2 |
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03-Oct-2017 |
Grygorii Strashko <grygorii.strashko@ti.com> |
gpio: omap: Fix lost edge interrupts Now acking of edge irqs happens the following way: - omap_gpio_irq_handler - "isr" = read irq status - omap_clear_gpio_irqbank(bank, isr_saved & ~level_mask); ^ clear edge status, so irq can be accepted - loop while "isr" generic_handle_irq() - handle_edge_irq() - desc->irq_data.chip->irq_ack(&desc->irq_data); - omap_gpio_ack_irq() it might be that at this moment edge IRQ was triggered again and it will be cleared and IRQ will be lost. Use handle_simple_irq and clear edge interrupts early without disabling them in omap_gpio_irq_handler to avoid loosing interrupts. [1] https://marc.info/?l=linux-omap&m=149004465313534&w=2 Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Ladislav Michl <ladis@linux-mips.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
e4b2ae7a |
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16-Sep-2017 |
Arnd Bergmann <arnd@arndb.de> |
gpio: omap: omap_gpio_show_rev is not __init The probe function calls omap_gpio_show_rev(), which on most compilers is inlined, but on the old gcc-4.6 is not, causing a valid warning about the incorrect __init annotation: WARNING: vmlinux.o(.text+0x40f614): Section mismatch in reference from the function omap_gpio_probe() to the function .init.text:omap_gpio_show_rev() The function omap_gpio_probe() references the function __init omap_gpio_show_rev(). This is often because omap_gpio_probe lacks a __init annotation or the annotation of omap_gpio_show_rev is wrong. This removes the __init. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Santosh Shilimkar <ssantosh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
e2c3c196 |
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31-Jul-2017 |
Arvind Yadav <arvind.yadav.cs@gmail.com> |
gpio: omap : Add missing clk_unprepare(). omap_gpio_probe() can fail here and we must disable clock. Signed-off-by: Arvind Yadav <arvind.yadav.cs@gmail.com> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
83977443 |
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24-Apr-2017 |
David Rivshin <DRivshin@allworx.com> |
gpio: omap: return error if requested debounce time is not possible omap_gpio_debounce() does not validate that the requested debounce is within a range it can handle. Instead it lets the register value wrap silently, and always returns success. This can lead to all sorts of unexpected behavior, such as gpio_keys asking for a too-long debounce, but getting a very short debounce in practice. Fix this by returning -EINVAL if the requested value does not fit into the register field. If there is no debounce clock available at all, return -ENOTSUPP. Fixes: e85ec6c3047b ("gpio: omap: fix omap2_set_gpio_debounce") Cc: <stable@vger.kernel.org> # 4.3+ Signed-off-by: David Rivshin <drivshin@allworx.com> Acked-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
2ed36f30 |
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04-Mar-2017 |
Bartosz Golaszewski <bgolaszewski@baylibre.com> |
gpio: omap: use devm_irq_alloc_descs() This driver never frees the allocated interrupt descriptors. Fix it by using a resource managed variant of irq_alloc_descs(). Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
2956b5d9 |
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23-Jan-2017 |
Mika Westerberg <mika.westerberg@linux.intel.com> |
pinctrl / gpio: Introduce .set_config() callback for GPIO chips Currently we already have two pin configuration related callbacks available for GPIO chips .set_single_ended() and .set_debounce(). In future we expect to have even more, which does not scale well if we need to add yet another callback to the GPIO chip structure for each possible configuration parameter. Better solution is to reuse what we already have available in the generic pinconf. To support this, we introduce a new .set_config() callback for GPIO chips. The callback takes a single packed pin configuration value as parameter. This can then be extended easily beyond what is currently supported by just adding new types to the generic pinconf enum. If the GPIO driver is backed up by a pinctrl driver the GPIO driver can just assign gpiochip_generic_config() (introduced in this patch) to .set_config and that will take care configuration requests are directed to the pinctrl driver. We then convert the existing drivers over .set_config() and finally remove the .set_single_ended() and .set_debounce() callbacks. Suggested-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
0c0451e7 |
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12-Apr-2016 |
Grygorii Strashko <grygorii.strashko@ti.com> |
gpio: omap: fix irq triggering in smart-idle wakeup mode Now GPIO IRQ loss is observed on dra7-evm after suspend/resume cycle in the following case: extcon_usb1(id_irq) -> pcf8575.gpio1 -> omapgpio6.gpio11 -> gic the extcon_usb1 is wake up source and it enables IRQ wake up for id_irq by calling enable/disable_irq_wake() during suspend/resume which, in turn, causes execution of omap_gpio_wake_enable(). And omap_gpio_wake_enable() will set/clear corresponding bit in GPIO_IRQWAKEN_x register. omapgpio6 configuration after boot - wakeup is enabled for GPIO IRQs by default from omap_gpio_irq_type: GPIO_IRQSTATUS_SET_0 | 0x00000400 GPIO_IRQSTATUS_CLR_0 | 0x00000400 GPIO_IRQWAKEN_0 | 0x00000400 GPIO_RISINGDETECT | 0x00000000 GPIO_FALLINGDETECT | 0x00000400 omapgpio6 configuration after after suspend/resume cycle: GPIO_IRQSTATUS_SET_0 | 0x00000400 GPIO_IRQSTATUS_CLR_0 | 0x00000400 GPIO_IRQWAKEN_0 | 0x00000000 <--- GPIO_RISINGDETECT | 0x00000000 GPIO_FALLINGDETECT | 0x00000400 As result, system will start to lose interrupts from pcf8575 GPIO expander, because when OMAP GPIO IP is in smart-idle wakeup mode, there is no guarantee that transition(s) on input non wake up GPIO pin will trigger asynchronous wake-up request to PRCM and then IRQ generation. IRQ will be generated when GPIO is in active mode - for example, some time after accessing GPIO bank registers IRQs will be generated normally, but issue will happen again once PRCM will put GPIO in low power smart-idle wakeup mode. Note 1. Issue is not reproduced if debounce clk is enabled for GPIO bank. Note 2. Issue hardly reproducible if GPIO pins group contains both wakeup/non-wakeup gpios - for example, it will be hard to reproduce issue with pin2 if GPIO_IRQWAKEN_0=0x1 GPIO_IRQSTATUS_SET_0=0x3 GPIO_FALLINGDETECT = 0x3 (TRM "Power Saving by Grouping the Edge/Level Detection"). Note 3. There nothing common bitween System wake up and OMAP GPIO bank IP wake up logic - the last one defines how the GPIO bank ON-IDLE-ON transition will happen inside SoC under control of PRCM. Hence, fix the problem by removing omap_set_gpio_wakeup() function completely and so keeping always in sync GPIO IRQ mask/unmask (IRQSTATUS_SET) and wake up enable (GPIO_IRQWAKEN) bits; and adding IRQCHIP_MASK_ON_SUSPEND flag in OMAP GPIO irqchip. That way non wakeup GPIO IRQs will be properly masked/unmask by IRQ PM core during suspend/resume cycle. Cc: Roger Quadros <rogerq@ti.com> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@oracle.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
7b1e5dc8 |
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04-Mar-2016 |
Grygorii Strashko <grygorii.strashko@ti.com> |
gpio: omap: drop dev field from gpio_bank structure GPIO chip structure already has "parent" field which is used for the same purpose as "dev" field in gpio_bank structure - store pointer on GPIO device. Hence, drop duplicated "dev" field from gpio_bank structure. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Acked-by: Santosh Shilimkar <ssantosh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
d99f7aec |
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07-Dec-2015 |
Linus Walleij <linus.walleij@linaro.org> |
gpio: omap: use gpiochip data pointer This makes the driver use the data pointer added to the gpio_chip to store a pointer to the state container instead of relying on container_of(). Cc: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Tony Lindgren <tony@atomide.com> Acked-by: Santosh Shilimkar <ssantosh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
000255b7 |
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20-Nov-2015 |
Grygorii Strashko <grygorii.strashko@ti.com> |
gpio: omap: drop omap1 mpuio specific irq_mask/unmask callbacks Originally OMAP MPUIO GPIO irqchip was implemented using Generic irq chip, but after set of reworks Generic irq chip code was replaced by common OMAP GPIO implementation and finally removed by commit d2d05c65c40e ("gpio: omap: Fix regression for MPUIO interrupts"). Unfortunately, above commit left .irq_mask/unmask callbacks assigned as below for MPUIO GPIO case: irqc->irq_mask = irq_gc_mask_set_bit; irqc->irq_unmask = irq_gc_mask_clr_bit; This now causes boot failure on OMAP1 platforms, after commit 450fa54cfd66 ("gpio: omap: convert to use generic irq handler") which forces these callbacks to be called during GPIO IRQs mapping from gpiochip_irq_map: Unable to handle kernel NULL pointer dereference at virtual address 00000000 pgd = c0004000 [00000000] *pgd=00000000 Internal error: Oops: 75 [#1] ARM Modules linked in: CPU: 0 PID: 1 Comm: swapper Not tainted 4.4.0-rc1-e3-los_afe0c+-00002-g25379c0-dirty #1 Hardware name: Amstrad E3 (Delta) task: c1836000 ti: c1838000 task.ti: c1838000 PC is at irq_gc_mask_set_bit+0x1c/0x60 LR is at __irq_do_set_handler+0x118/0x15c pc : [<c004848c>] lr : [<c0047d4c>] psr: 600000d3 sp : c1839c90 ip : c1862c64 fp : c1839c9c r10: 00000000 r9 : c0411950 r8 : c0411bbc r7 : 00000000 r6 : c185c310 r5 : c00444e8 r4 : c185c300 r3 : c1854b50 r2 : 00000000 r1 : 00000000 r0 : c185c310 Flags: nZCv IRQs off FIQs off Mode SVC_32 ISA ARM Segment kernel Control: 0000317f Table: 10004000 DAC: 00000057 Process swapper (pid: 1, stack limit = 0xc1838190) Stack: (0xc1839c90 to 0xc183a000) [...] Backtrace: [<c0048470>] (irq_gc_mask_set_bit) from [<c0047d4c>] (__irq_do_set_handler+0x118/0x15c) [<c0047c34>] (__irq_do_set_handler) from [<c0047dd4>] (__irq_set_handler+0x44/0x5c) r6:00000000 r5:c00444e8 r4:c185c300 [<c0047d90>] (__irq_set_handler) from [<c0047e1c>] (irq_set_chip_and_handler_name+0x30/0x34) r7:00000050 r6:00000000 r5:c00444e8 r4:00000050 [<c0047dec>] (irq_set_chip_and_handler_name) from [<c01b345c>] (gpiochip_irq_map+0x3c/0x8c) r7:00000050 r6:00000000 r5:00000050 r4:c1862c64 [<c01b3420>] (gpiochip_irq_map) from [<c0049670>] (irq_domain_associate+0x7c/0x1c4) r5:c185c310 r4:c185cb00 [<c00495f4>] (irq_domain_associate) from [<c0049894>] (irq_domain_add_simple+0x98/0xc0) r8:c0411bbc r7:c185cb00 r6:00000050 r5:00000010 r4:00000001 [<c00497fc>] (irq_domain_add_simple) from [<c01b3328>] (_gpiochip_irqchip_add+0x64/0x10c) r7:c1862c64 r6:c0419280 r5:c1862c64 r4:c1854b50 [<c01b32c4>] (_gpiochip_irqchip_add) from [<c01b79f4>] (omap_gpio_probe+0x2fc/0x63c) r5:c1854b50 r4:c1862c10 [<c01b76f8>] (omap_gpio_probe) from [<c01fcf58>] (platform_drv_probe+0x2c/0x64) r10:00000000 r9:c03e45e8 r8:00000000 r7:c0419294 r6:c0411984 r5:c0419294 r4:c0411950 [<c01fcf2c>] (platform_drv_probe) from [<c01fb668>] (really_probe+0x160/0x29c) Hence, fix it by remove obsolete callbacks assignment. After this change omap_gpio_mask_irq()/omap_gpio_unmask_irq() will be used for MPUIO IRQs masking, but this now happens anyway from omap_gpio_irq_startup/shutdown(). Cc: Tony Lindgren <tony@atomide.com> Fixes: commit d2d05c65c40e ("gpio: omap: Fix regression for MPUIO interrupts") Reported-by: Aaro Koskinen <aaro.koskinen@iki.fi> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Acked-by: Santosh Shilimkar <ssantosh@kernel.org> Tested-by: Aaro Koskinen <aaro.koskinen@iki.fi> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
58383c78 |
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04-Nov-2015 |
Linus Walleij <linus.walleij@linaro.org> |
gpio: change member .dev to .parent The name .dev in a struct is normally reserved for a struct device that is let us say a superclass to the thing described by the struct. struct gpio_chip stands out by confusingly using a struct device *dev to point to the parent device (such as a platform_device) that represents the hardware. As we want to give gpio_chip:s real devices, this is not working. We need to rename this member to parent. This was done by two coccinelle scripts, I guess it is possible to combine them into one, but I don't know such stuff. They look like this: @@ struct gpio_chip *var; @@ -var->dev +var->parent and: @@ struct gpio_chip var; @@ -var.dev +var.parent and: @@ struct bgpio_chip *var; @@ -var->gc.dev +var->gc.parent Plus a few instances of bgpio that I couldn't figure out how to teach Coccinelle to rewrite. This patch hits all over the place, but I *strongly* prefer this solution to any piecemal approaches that just exercise patch mechanics all over the place. It mainly hits drivers/gpio and drivers/pinctrl which is my own backyard anyway. Cc: Haavard Skinnemoen <hskinnemoen@gmail.com> Cc: Rafał Miłecki <zajec5@gmail.com> Cc: Richard Purdie <rpurdie@rpsys.net> Cc: Mauro Carvalho Chehab <mchehab@osg.samsung.com> Cc: Alek Du <alek.du@intel.com> Cc: Jaroslav Kysela <perex@perex.cz> Cc: Takashi Iwai <tiwai@suse.com> Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Acked-by: Lee Jones <lee.jones@linaro.org> Acked-by: Jiri Kosina <jkosina@suse.cz> Acked-by: Hans-Christian Egtvedt <egtvedt@samfundet.no> Acked-by: Jacek Anaszewski <j.anaszewski@samsung.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
30cefeac |
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25-Sep-2015 |
Grygorii Strashko <grygorii.strashko@ti.com> |
gpio: omap: fix static checker warning This patch fixes below static checker warning by changing type of irq field in struct gpio_bank from u16 to int. drivers/gpio/gpio-omap.c:1191 omap_gpio_probe() warn: assigning (-6) to unsigned variable 'bank->irq' drivers/gpio/gpio-omap.c 1188 bank->irq = platform_get_irq(pdev, 0); 1189 if (bank->irq <= 0) { bank->irq is u16. 1190 if (!bank->irq) 1191 bank->irq = -ENXIO; Does not work. 1192 if (bank->irq != -EPROBE_DEFER) Does not work. 1193 dev_err(dev, 1194 "can't get irq resource ret=%d\n", bank->irq); 1195 return bank->irq; 1196 } Fixes: commit 89d18e3af8b9: "gpio: omap: switch to use platform_get_irq" Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
450fa54c |
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25-Sep-2015 |
Grygorii Strashko <grygorii.strashko@ti.com> |
gpio: omap: convert to use generic irq handler This patch converts TI OMAP GPIO driver to use generic irq handler instead of chained IRQ handler. This way OMAP GPIO driver will be compatible with RT kernel where it will be forced thread IRQ handler while in non-RT kernel it still will be executed in HW IRQ context. As part of this change the IRQ wakeup configuration is applied to GPIO Bank IRQ as it now will be under control of IRQ PM Core during suspend. There are also additional benefits: - on-RT kernel there will be no complains any more about PM runtime usage in atomic context "BUG: sleeping function called from invalid context"; - GPIO bank IRQs will appear in /proc/interrupts and its usage statistic will be visible; - GPIO bank IRQs could be configured through IRQ proc_fs interface and, as result, could be a part of IRQ balancing process if needed; - GPIO bank IRQs will be under control of IRQ PM Core during suspend to RAM. Disadvantage: - additional runtime overhed as call chain till omap_gpio_irq_handler() will be longer now - necessity to use wa_lock in omap_gpio_irq_handler() to W/A warning in handle_irq_event_percpu() WARNING: CPU: 1 PID: 35 at kernel/irq/handle.c:149 handle_irq_event_percpu+0x51c/0x638() This patch doesn't fully follows recommendations provided by Sebastian Andrzej Siewior [1], because It's required to go through and check all GPIO IRQ pin states as fast as possible and pass control to handle_level_irq or handle_edge_irq. handle_level_irq or handle_edge_irq will perform actions specific for IRQ triggering type and wakeup corresponding registered threaded IRQ handler (at least it's expected to be threaded). IRQs can be lost if handle_nested_irq() will be used, because excecution time of some pin specific GPIO IRQ handler can be very significant and require accessing ext. devices (I2C). Idea of such kind reworking was also discussed in [2]. [1] http://www.spinics.net/lists/linux-omap/msg120665.html [2] http://www.spinics.net/lists/linux-omap/msg119516.html Tested-by: Tony Lindgren <tony@atomide.com> Tested-by: Austin Schuh <austin@peloton-tech.com> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Acked-by: Santosh Shilimkar <ssantosh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
aca82d1c |
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25-Sep-2015 |
Grygorii Strashko <grygorii.strashko@ti.com> |
gpio: omap: move pm runtime in irq_chip.irq_bus_lock/sync_unlock The PM runtime API can't be used in atomic contex on -RT even if it's configured as irqsafe. As result, below error report can be seen when PM runtime API called from IRQ chip's callbacks irq_startup/irq_shutdown/irq_set_type, because they are protected by RAW spinlock: BUG: sleeping function called from invalid context at kernel/locking/rtmutex.c:917 in_atomic(): 1, irqs_disabled(): 128, pid: 96, name: insmod 3 locks held by insmod/96: #0: (&dev->mutex){......}, at: [<c04752c8>] __driver_attach+0x54/0xa0 #1: (&dev->mutex){......}, at: [<c04752d4>] __driver_attach+0x60/0xa0 #2: (class){......}, at: [<c00a408c>] __irq_get_desc_lock+0x60/0xa4 irq event stamp: 1834 hardirqs last enabled at (1833): [<c06ab2a4>] _raw_spin_unlock_irqrestore+0x88/0x90 hardirqs last disabled at (1834): [<c06ab068>] _raw_spin_lock_irqsave+0x2c/0x64 softirqs last enabled at (0): [<c003d220>] copy_process.part.52+0x410/0x19d8 softirqs last disabled at (0): [< (null)>] (null) Preemption disabled at:[< (null)>] (null) CPU: 1 PID: 96 Comm: insmod Tainted: G W O 4.1.3-rt3-00618-g57e2387-dirty #184 Hardware name: Generic DRA74X (Flattened Device Tree) [<c00190f4>] (unwind_backtrace) from [<c0014734>] (show_stack+0x20/0x24) [<c0014734>] (show_stack) from [<c06a62ec>] (dump_stack+0x88/0xdc) [<c06a62ec>] (dump_stack) from [<c006ca44>] (___might_sleep+0x198/0x2a8) [<c006ca44>] (___might_sleep) from [<c06ab6d4>] (rt_spin_lock+0x30/0x70) [<c06ab6d4>] (rt_spin_lock) from [<c04815ac>] (__pm_runtime_resume+0x68/0xa4) [<c04815ac>] (__pm_runtime_resume) from [<c04123f4>] (omap_gpio_irq_type+0x188/0x1d8) [<c04123f4>] (omap_gpio_irq_type) from [<c00a64e4>] (__irq_set_trigger+0x68/0x130) [<c00a64e4>] (__irq_set_trigger) from [<c00a7bc4>] (irq_set_irq_type+0x44/0x6c) [<c00a7bc4>] (irq_set_irq_type) from [<c00abbf8>] (irq_create_of_mapping+0x120/0x174) [<c00abbf8>] (irq_create_of_mapping) from [<c0577b74>] (of_irq_get+0x48/0x58) [<c0577b74>] (of_irq_get) from [<c0540a14>] (i2c_device_probe+0x54/0x15c) [<c0540a14>] (i2c_device_probe) from [<c04750dc>] (driver_probe_device+0x184/0x2c8) [<c04750dc>] (driver_probe_device) from [<c0475310>] (__driver_attach+0x9c/0xa0) [<c0475310>] (__driver_attach) from [<c0473238>] (bus_for_each_dev+0x7c/0xb0) [<c0473238>] (bus_for_each_dev) from [<c0474af4>] (driver_attach+0x28/0x30) [<c0474af4>] (driver_attach) from [<c0474760>] (bus_add_driver+0x154/0x200) [<c0474760>] (bus_add_driver) from [<c0476348>] (driver_register+0x88/0x108) [<c0476348>] (driver_register) from [<c0541600>] (i2c_register_driver+0x3c/0x90) [<c0541600>] (i2c_register_driver) from [<bf003018>] (pcf857x_init+0x18/0x24 [gpio_pcf857x]) [<bf003018>] (pcf857x_init [gpio_pcf857x]) from [<c000998c>] (do_one_initcall+0x128/0x1e8) [<c000998c>] (do_one_initcall) from [<c06a4220>] (do_init_module+0x6c/0x1bc) [<c06a4220>] (do_init_module) from [<c00dd0c8>] (load_module+0x18e8/0x21c4) [<c00dd0c8>] (load_module) from [<c00ddaa0>] (SyS_init_module+0xfc/0x158) [<c00ddaa0>] (SyS_init_module) from [<c000ff40>] (ret_fast_syscall+0x0/0x54) The IRQ chip interface defines only two callbacks which are executed in non-atomic contex - irq_bus_lock/irq_bus_sync_unlock, so lets move PM runtime calls there. Tested-by: Tony Lindgren <tony@atomide.com> Tested-by: Austin Schuh <austin@peloton-tech.com> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Acked-by: Santosh Shilimkar <ssantosh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
bd0b9ac4 |
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14-Sep-2015 |
Thomas Gleixner <tglx@linutronix.de> |
genirq: Remove irq argument from irq flow handlers Most interrupt flow handlers do not use the irq argument. Those few which use it can retrieve the irq number from the irq descriptor. Remove the argument. Search and replace was done with coccinelle and some extra helper scripts around it. Thanks to Julia for her help! Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Julia Lawall <Julia.Lawall@lip6.fr> Cc: Jiang Liu <jiang.liu@linux.intel.com>
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#
46d4f7c2 |
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03-Sep-2015 |
Tony Lindgren <tony@atomide.com> |
gpio: omap: Fix GPIO numbering for deferred probe If gpio-omap probe fails with -EPROBE_DEFER, the GPIO numbering keeps increasing. Only increase the gpio count if gpiochip_add() was successful as otherwise the numbers will increase for each probe attempt. Cc: Javier Martinez Canillas <javier@dowhile0.org> Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Santosh Shilimkar <ssantosh@kernel.org> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
5e606abe |
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28-Aug-2015 |
Tony Lindgren <tony@atomide.com> |
gpio: omap: Fix gpiochip_add() handling for deferred probe Currently we gpio-omap breaks if gpiochip_add() returns -EPROBE_DEFER: [ 0.570000] gpiochip_add: GPIOs 0..31 (gpio) failed to register [ 0.570000] omap_gpio 48310000.gpio: Could not register gpio chip -517 ... [ 3.670000] omap_gpio 48310000.gpio: Unbalanced pm_runtime_enable! Let's fix the issue by adding the missing pm_runtime_put() on error. Cc: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Javier Martinez Canillas <javier@dowhile0.org> Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Santosh Shilimkar <ssantosh@kernel.org> Acked-by: Santosh Shilimkar <ssantosh@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
5d9452e7 |
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18-Aug-2015 |
Grygorii Strashko <grygorii.strashko@ti.com> |
gpio: omap: fix clk_prepare/unprepare usage As per CCF documentation (clk.txt) the clk_prepare/unprepare APIs are not allowed in atomic context. But now OMAP GPIO driver uses them while applying debounce settings and as part of PM runtime irqsafe operations: - omap_gpio_debounce() is holding the lock with IRQs off. + omap2_set_gpio_debounce() + clk_prepare_enable() + clk_prepare() this one might sleep. - pm_runtime_get_sync() is holding the lock with IRQs off + omap_gpio_runtime_suspend() + raw_spin_lock_irqsave() + omap_gpio_dbck_disable() + clk_disable_unprepare() Hence, fix it by moeving dbclk prepare/unprepare in OMAP GPIO omap_gpio_probe/omap_gpio_remove. Also, while here, ensure that debounce functionality is disabled if clk_get() failed, because otherwise kernel will carsh in omap2_set_gpio_debounce(). Reported-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Acked-by: Santosh Shilimkar <ssantosh@kernel.org> Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
235f1eb1 |
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18-Aug-2015 |
Grygorii Strashko <grygorii.strashko@ti.com> |
gpio: omap: protect regs access in omap_gpio_irq_handler The access to HW registers has to be be protected in omap_gpio_irq_handler(), as it may race with code executed on another CPUs. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Acked-by: Santosh Shilimkar <ssantosh@kernel.org> Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
e85ec6c3 |
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18-Aug-2015 |
Grygorii Strashko <grygorii.strashko@ti.com> |
gpio: omap: fix omap2_set_gpio_debounce According to TRMs: Required input line stable = (the value of the GPIO_DEBOUNCINGTIME[7:0].DEBOUNCETIME + 1) × 31, where the value of the GPIO_DEBOUNCINGTIME[7:0].DEBOUNCETIME bit field is from 0 to 255. But now omap2_set_gpio_debounce() will calculate debounce time and behave incorrectly in the following cases: 1) requested debounce time is !0 and <32 calculated DEBOUNCETIME = 0x1 == 62 us; expected value of DEBOUNCETIME = 0x0 == 31us 2) requested debounce time is 0 calculated DEBOUNCETIME = 0x1 == 62 us; expected: disable debounce and DEBOUNCETIME = 0x0 3) requested debounce time is >32 and <63 calculated DEBOUNCETIME = 0x0 and debounce will be disabled; expected: enable debounce and DEBOUNCETIME = 0x1 == 62 us Hence, rework omap2_set_gpio_debounce() to fix above cases: 1) introduce local variable "enable" and use it to identify when debounce need to be enabled or disabled. Disable debounce if requested debounce time is 0. 2) use below formula for debounce time calculation: debounce = (DIV_ROUND_UP(debounce, 31) - 1) & 0xFF; Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Acked-by: Santosh Shilimkar <ssantosh@kernel.org> Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
89d18e3a |
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18-Aug-2015 |
Grygorii Strashko <grygorii.strashko@ti.com> |
gpio: omap: switch to use platform_get_irq Switch OMAP GPIO driver to use platform_get_irq(), because it is not recommened to use platform_get_resource(pdev, IORESOURCE_IRQ, ..) for requesting IRQ resources any more, as they can be not ready yet in case of DT-boot. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Acked-by: Santosh Shilimkar <ssantosh@kernel.org> Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
bb8cdf95 |
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18-Aug-2015 |
Grygorii Strashko <grygorii.strashko@ti.com> |
gpio: omap: remove wrong irq_domain_remove usage in probe The bank->chip.irqdomain is uninitialized at the moment when irq_domain_remove() is called, so remove this call. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Acked-by: Santosh Shilimkar <ssantosh@kernel.org> Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
627c89b4 |
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05-Aug-2015 |
Axel Lin <axel.lin@ingics.com> |
gpio: omap: Fix missing raw locks conversion Fix below build warning: CC drivers/gpio/gpio-omap.o drivers/gpio/gpio-omap.c: In function 'omap_gpio_irq_type': drivers/gpio/gpio-omap.c:504:3: warning: passing argument 1 of 'spin_unlock_irqrestore' from incompatible pointer type [enabled by default] include/linux/spinlock.h:360:29: note: expected 'struct spinlock_t *' but argument is of type 'struct raw_spinlock_t *' Fixes: commit 4dbada2be460 ("gpio: omap: use raw locks for locking") Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
4dbada2b |
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21-Jul-2015 |
Sebastian Andrzej Siewior <bigeasy@linutronix.de> |
gpio: omap: use raw locks for locking This patch converts gpio_bank.lock from a spin_lock into a raw_spin_lock. The call path is to access this lock is always under a raw_spin_lock, for instance - __setup_irq() holds &desc->lock with irq off + __irq_set_trigger() + omap_gpio_irq_type() - handle_level_irq() (runs with irqs off therefore raw locks) + mask_ack_irq() + omap_gpio_mask_irq() This fixes the obvious backtrace on -RT. However the locking vs context is not and this is not limited to -RT: - omap_gpio_irq_type() is called with IRQ off and has an conditional call to pm_runtime_get_sync() which may sleep. Either it may happen or it may not happen but pm_runtime_get_sync() should not be called with irqs off. - omap_gpio_debounce() is holding the lock with IRQs off. + omap2_set_gpio_debounce() + clk_prepare_enable() + clk_prepare() this one might sleep. The number of users of gpiod_set_debounce() / gpio_set_debounce() looks low but still this is not good. Acked-by: Javier Martinez Canillas <javier@dowhile0.org> Acked-by: Santosh Shilimkar <ssantosh@kernel.org> Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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c23837ce |
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25-Jun-2015 |
Grygorii Strashko <grygorii.strashko@ti.com> |
gpio: omap: prevent module from being unloaded while in use OMAP GPIO driver allowed to be built as loadable module, but it doesn't set owner field in GPIO chip structure. As result, module_get/put() API is not working and it's possible to unload OMAP driver while in use: omap_gpio 48051000.gpio: REMOVING GPIOCHIP WITH GPIOS STILL REQUESTED Hence, add missing configuration. Cc: Tony Lindgren <tony@atomide.com> Fixes: cac089f9026e ('gpio: omap: Allow building as a loadable module') Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Acked-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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977bd8a9 |
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24-Jun-2015 |
Grygorii Strashko <grygorii.strashko@linaro.org> |
gpio: omap: add missed spin_unlock_irqrestore in omap_gpio_irq_type Add missed spin_unlock_irqrestore in omap_gpio_irq_type when omap_set_gpio_triggering() is failed. It fixes static checker warning: drivers/gpio/gpio-omap.c:523 omap_gpio_irq_type() warn: inconsistent returns 'spin_lock:&bank->lock'. This fixes commit: 1562e4618ded ('gpio: omap: fix error handling in omap_gpio_irq_type') Reported-by: Javier Martinez Canillas <javier@dowhile0.org> Signed-off-by: Grygorii Strashko <grygorii.strashko@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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476f8b4c |
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03-Jun-2015 |
Jiang Liu <jiang.liu@linux.intel.com> |
gpio: Use irq_desc_get_xxx() to avoid redundant lookup of irq_desc Use irq_desc_get_xxx() to avoid redundant lookup of irq_desc while we already have a pointer to corresponding irq_desc. Preparatory patch for the removal of the 'irq' argument from irq flow handlers. Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Cc: Alexandre Courbot <gnurou@gmail.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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#
43ec2e43 |
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23-Jun-2015 |
Thomas Gleixner <tglx@linutronix.de> |
gpio/omap: Use irq_set_handler_locked() Use irq_set_handler_locked() as it avoids a redundant lookup of the irq descriptor. Search and replacement was done with coccinelle: Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Jiang Liu <jiang.liu@linux.intel.com> Cc: Julia Lawall <julia.lawall@lip6.fr> Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Alexandre Courbot <gnurou@gmail.com> Cc: linux-gpio@vger.kernel.org
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121dcb76 |
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22-May-2015 |
Grygorii Strashko <grygorii.strashko@linaro.org> |
gpio: omap: rework omap_gpio_irq_startup to handle current pin state properly The omap_gpio_irq_startup() can be called at time when: - corresponding GPIO has been requested already and in this case it has to be configured as input already. If not - return with -EINVAL and do not try to re-configure it as it could be unsafe. - corresponding GPIO is free: reconfigure GPIO as input. In addition, call omap_enable_gpio_module directly as all needed checks are already present inside it. Signed-off-by: Grygorii Strashko <grygorii.strashko@linaro.org> Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
c3518172 |
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22-May-2015 |
Grygorii Strashko <grygorii.strashko@linaro.org> |
gpio: omap: rework omap_gpio_request to touch only gpio specific registers The GPIO Chip and GPIO IRQ Chip functionality are essentially orthogonal, so GPIO Chip implementation shouldn't touch GPIO IRQ specific registers and vise versa. Hence, rework omap_gpio_request: - don't reset GPIO IRQ triggering type to IRQ_TYPE_NONE, because GPIO irqchip should be responsible for that; - call directly omap_enable_gpio_module as all needed checks are already present inside it. Signed-off-by: Grygorii Strashko <grygorii.strashko@linaro.org> Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
6e96c1b5 |
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22-May-2015 |
Grygorii Strashko <grygorii.strashko@linaro.org> |
gpio: omap: rework omap_x_irq_shutdown to touch only irqs specific registers The GPIO Chip and GPIO IRQ Chip functionality are essentially orthogonal, so GPIO IRQ Chip implementation shouldn't touch GPIO specific registers and vise versa. Hence, rework omap_gpio_irq_shutdown and try to touch only irqs specific registers: - don't configure GPIO as input (it, actually, should be already configured as input). - don't clear debounce configuration if GPIO is still used as GPIO. We need to take in to account here commit c9c55d921115 ("gpio/omap: fix off-mode bug: clear debounce settings on free/reset"). Also remove omap_reset_gpio() function as it is not used any more. Signed-off-by: Grygorii Strashko <grygorii.strashko@linaro.org> Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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1562e461 |
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22-May-2015 |
Grygorii Strashko <grygorii.strashko@linaro.org> |
gpio: omap: fix error handling in omap_gpio_irq_type The GPIO bank will be kept powered in case if input parameters are invalid or error occurred in omap_gpio_irq_type. Hence, fix it by ensuring that GPIO bank will be unpowered in case of errors and add additional check of value returned from omap_set_gpio_triggering(). Signed-off-by: Grygorii Strashko <grygorii.strashko@linaro.org> Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
5f982c70 |
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22-May-2015 |
Grygorii Strashko <grygorii.strashko@linaro.org> |
gpio: omap: fix omap_gpio_free to not clean up irq configuration This patch fixes following issue: - GPIOn is used as IRQ by some dev, for example PCF8575.INT -> gpio6.11 - PCFx driver knows nothing about type of IRQ line (GPIO or not) so it doesn't request gpio and just do request_irq() - If gpio6.11 will be exported through the sysfs and then un-xeported then IRQs from PCFx will not be received any more, because IRQ configuration for gpio6.11 will be cleaned up unconditionally in omap_gpio_free. Fix this by removing all GPIO IRQ specific code from omap_gpio_free() and also do GPIO clean up (change direction to 'in' and disable debounce) only if corresponding GPIO is not used as IRQ too. GPIO IRQ will be properly cleaned up by GPIO irqchip code. Signed-off-by: Grygorii Strashko <grygorii.strashko@linaro.org> Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
cac089f9 |
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23-Apr-2015 |
Tony Lindgren <tony@atomide.com> |
gpio: omap: Allow building as a loadable module We currently get all kinds of errors building the omap gpio driver as a module starting with: undefined reference to `omap2_gpio_resume_after_idle' undefined reference to `omap2_gpio_prepare_for_idle' ... Let's fix the issue by adding inline functions to the header. Note that we can now also remove the two unused functions for omap_set_gpio_debounce and omap_set_gpio_debounce_time. Then doing rmmod on the module produces further warnings because of missing exit related functions. Let's add those. And finally, we can make the Kconfig entry just a tristate option that's selected for omaps. Cc: Javier Martinez Canillas <javier@dowhile0.org> Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Nishanth Menon <nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Grygorii Strashko <grygorii.strashko@linaro.org> Acked-by: Santosh Shilimkar <ssantosh@kernel.org> Reviewed-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
d2d05c65 |
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23-Apr-2015 |
Tony Lindgren <tony@atomide.com> |
gpio: omap: Fix regression for MPUIO interrupts At some point with all the GPIO clean-up we've broken the MPUIO interrupts. Those are just a little bit different from the GPIO interrupts, so we can fix it up just by setting different irqchip functions for it. And then we can just remove all old code trying to do the same. Cc: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: Javier Martinez Canillas <javier@dowhile0.org> Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Nishanth Menon <nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Grygorii Strashko <grygorii.strashko@linaro.org> Acked-by: Santosh Shilimkar <ssantosh@kernel.org> Reviewed-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
17d33a45 |
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23-Mar-2015 |
Grygorii Strashko <grygorii.strashko@linaro.org> |
gpio: omap: get rid of GPIO_INDEX() macro Now OMAP GPIO driver prepared for GPIO_INDEX() macro removing. Do It ;) Tested-by: Tony Lindgren <tony@atomide.com> Tested-by: Aaro Koskinen <aaro.koskinen@iki.fi> Acked-by: Santosh Shilimkar <ssantosh@kernel.org> Acked-by: Javier Martinez Canillas <javier@dowhile0.org> Signed-off-by: Grygorii Strashko <grygorii.strashko@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
ea5fbe8d |
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23-Mar-2015 |
Grygorii Strashko <grygorii.strashko@linaro.org> |
gpio: omap: get rid of omap_irq_to_gpio() Now OMAP GPIO driver prepared for omap_irq_to_gpio() removing. Do it ;) Tested-by: Tony Lindgren <tony@atomide.com> Tested-by: Aaro Koskinen <aaro.koskinen@iki.fi> Acked-by: Santosh Shilimkar <ssantosh@kernel.org> Acked-by: Javier Martinez Canillas <javier@dowhile0.org> Signed-off-by: Grygorii Strashko <grygorii.strashko@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
8ac58a0a |
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23-Mar-2015 |
Grygorii Strashko <grygorii.strashko@linaro.org> |
gpio: omap: get rid of GPIO_BIT() macro Now OMAP GPIO driver prepared for GPIO_BIT() macro removing. Do it ;) Tested-by: Tony Lindgren <tony@atomide.com> Tested-by: Aaro Koskinen <aaro.koskinen@iki.fi> Acked-by: Santosh Shilimkar <ssantosh@kernel.org> Acked-by: Javier Martinez Canillas <javier@dowhile0.org> Signed-off-by: Grygorii Strashko <grygorii.strashko@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
9943f261 |
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23-Mar-2015 |
Grygorii Strashko <grygorii.strashko@linaro.org> |
gpio: omap: convert gpio irq functions to use GPIO offset Convert GPIO IRQ functions to use GPIO offset instead of system GPIO numbers. This allows to drop unneeded conversations between system GPIO <-> GPIO offset which are done in many places and many times. It is safe to do now because: - gpiolib always passes GPIO offset to GPIO controller - OMAP GPIO driver converted to use IRQ domain, so struct irq_data->hwirq contains GPIO offset This is preparation step before removing: #define GPIO_INDEX(bank, gpio) #define GPIO_BIT(bank, gpio) int omap_irq_to_gpio() Tested-by: Tony Lindgren <tony@atomide.com> Tested-by: Aaro Koskinen <aaro.koskinen@iki.fi> Acked-by: Santosh Shilimkar <ssantosh@kernel.org> Acked-by: Javier Martinez Canillas <javier@dowhile0.org> Signed-off-by: Grygorii Strashko <grygorii.strashko@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
37e14ecf |
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23-Mar-2015 |
Grygorii Strashko <grygorii.strashko@linaro.org> |
gpio: omap: drop 'gpio' param from omap_gpio_init_irq() The 'gpio' parameter isn't needed any more as it duplicates 'offset' parameter, so drop it. Tested-by: Tony Lindgren <tony@atomide.com> Tested-by: Aaro Koskinen <aaro.koskinen@iki.fi> Acked-by: Santosh Shilimkar <ssantosh@kernel.org> Acked-by: Javier Martinez Canillas <javier@dowhile0.org> Signed-off-by: Grygorii Strashko <grygorii.strashko@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
4a58d229 |
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23-Mar-2015 |
Grygorii Strashko <grygorii.strashko@linaro.org> |
gpio: omap: convert debounce functions switch to use gpio offset Convert debounce functions to use GPIO offset instead of system GPIO numbers. This allows to drop unneeded conversations between system GPIO <-> GPIO offset which are done in many places and many times. It is safe to do now because: - gpiolib always passes GPIO offset to GPIO controller - OMAP GPIO driver converted to use IRQ domain This is preparation step before removing: #define GPIO_INDEX(bank, gpio) #define GPIO_BIT(bank, gpio) int omap_irq_to_gpio() Tested-by: Tony Lindgren <tony@atomide.com> Tested-by: Aaro Koskinen <aaro.koskinen@iki.fi> Acked-by: Santosh Shilimkar <ssantosh@kernel.org> Acked-by: Javier Martinez Canillas <javier@dowhile0.org> Signed-off-by: Grygorii Strashko <grygorii.strashko@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
04ebcbd8 |
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23-Mar-2015 |
Grygorii Strashko <grygorii.strashko@linaro.org> |
gpio: omap: simplify omap_set_gpio_dataout_x() Both functions omap_set_gpio_dataout_reg() and omap_set_gpio_dataout_mask() accept GPIO offset as 'gpio' input parameter, so rename it to 'offset' and drop usage of GPIO_BIT() macro. Tested-by: Tony Lindgren <tony@atomide.com> Tested-by: Aaro Koskinen <aaro.koskinen@iki.fi> Acked-by: Santosh Shilimkar <ssantosh@kernel.org> Acked-by: Javier Martinez Canillas <javier@dowhile0.org> Signed-off-by: Grygorii Strashko <grygorii.strashko@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
b2b20045 |
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23-Mar-2015 |
Grygorii Strashko <grygorii.strashko@linaro.org> |
gpio: omap: convert omap_gpio_is_input() to use gpio offset Convert omap_gpio_is_input() to use GPIO offset instead of mask and, in such way, make code simpler and remove few lines of code. Tested-by: Tony Lindgren <tony@atomide.com> Tested-by: Aaro Koskinen <aaro.koskinen@iki.fi> Acked-by: Santosh Shilimkar <ssantosh@kernel.org> Acked-by: Javier Martinez Canillas <javier@dowhile0.org> Signed-off-by: Grygorii Strashko <grygorii.strashko@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
878ce058 |
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06-Mar-2015 |
Grygorii Strashko <grygorii.strashko@linaro.org> |
gpio: omap: irq_shutdown: remove unnecessary call of gpiochip_unlock_as_irq GPIOLib core implemnts irqchip->irq_request/release_resources callbacks internally and these callbacks already contain clalls of gpiochip_lock/unlock_as_irq(). Hence, remove unnecessary call of gpiochip_unlock_as_irq() from omap_gpio_irq_shutdown(). Signed-off-by: Grygorii Strashko <grygorii.strashko@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
3d009c8c |
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16-Jan-2015 |
Tony Lindgren <tony@atomide.com> |
gpio: omap: Fix bad device access with setup_irq() Similar to omap_gpio_irq_type() let's make sure that the GPIO is usable as an interrupt if the platform init code did not call gpio_request(). Otherwise we can get invalid device access after setup_irq(): WARNING: CPU: 0 PID: 1 at drivers/bus/omap_l3_noc.c:147 l3_interrupt_handler+0x214/0x340() 44000000.ocp:L3 Custom Error: MASTER MPU TARGET L4CFG (Idle): Data Access in Supervisor mode during Functional access ... [<c05f21e4>] (__irq_svc) from [<c05f1974>] (_raw_spin_unlock_irqrestore+0x34/0x44) [<c05f1974>] (_raw_spin_unlock_irqrestore) from [<c00914a8>] (__setup_irq+0x244/0x530) [<c00914a8>] (__setup_irq) from [<c00917d4>] (setup_irq+0x40/0x8c) [<c00917d4>] (setup_irq) from [<c0039c8c>] (omap_system_dma_probe+0x1d4/0x2b4) [<c0039c8c>] (omap_system_dma_probe) from [<c03b2200>] (platform_drv_probe+0x44/0xa4) ... We can fix this the same way omap_gpio_irq_type() is handling it. Note that the long term solution is to change the gpio-omap driver to handle the banks as separate driver instances. This will allow us to rely on just runtime PM for tracking the bank specific state. Reported-by: Russell King <rmk+kernel@arm.linux.org.uk> Cc: Javier Martinez Canillas <javier@dowhile0.org> Cc: Kevin Hilman <khilman@kernel.org> Cc: Santosh Shilimkar <ssantosh@kernel.org> Tested-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
ecb2312f |
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03-Dec-2014 |
Rafael J. Wysocki <rafael.j.wysocki@intel.com> |
gpio / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM After commit b2b49ccbdd54 (PM: Kconfig: Set PM_RUNTIME if PM_SLEEP is selected) PM_RUNTIME is always set if PM is set, so #ifdef blocks depending on CONFIG_PM_RUNTIME may now be changed to depend on CONFIG_PM. Replace CONFIG_PM_RUNTIME with CONFIG_PM in drivers/gpio/gpio-omap.c. Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Acked-by: Alexandre Courbot <acourbot@nvidia.com> Acked-by: Javier Martinez Canillas <javier@dowhile0.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
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#
e3a2e878 |
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23-Oct-2014 |
Alexandre Courbot <acourbot@nvidia.com> |
gpio: rename gpio_lock_as_irq to gpiochip_lock_as_irq This function actually operates on a gpio_chip, so its prefix should reflect that fact for consistency with other functions defined in gpio/driver.h. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
46824e22 |
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05-Sep-2014 |
Nishanth Menon <nm@ti.com> |
gpio: omap: Fix interrupt names When viewing the /proc/interrupts, there is no information about which GPIO bank a specific gpio interrupt is hooked on to. This is more than a bit irritating as such information can esily be provided back to the user and at times, can be crucial for debug. So, instead of displaying something like: 31: 0 0 GPIO 0 palmas 32: 0 0 GPIO 27 mmc0 Display the following with appropriate device name: 31: 0 0 4ae10000.gpio 0 palmas 32: 0 0 4805d000.gpio 27 mmc0 This requires that we create irq_chip instance specific for each GPIO bank which is trivial to achieve. Signed-off-by: Nishanth Menon <nm@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Acked-by: Kevin Hilman <khilman@linaro.org> Acked-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
da26d5d8 |
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16-Sep-2014 |
Linus Walleij <linus.walleij@linaro.org> |
gpio: remove remaining users of gpiochip_remove() retval Some drivers accidentally still use the return value from gpiochip_remove(). Get rid of them so we can simplify this function and get rid of the return value. Cc: Abdoulaye Berthe <berthe.ab@gmail.com> Acked-by: Alexandre Courbot <acourbot@nvidia.com> Acked-by: Javier Martinez Canillas <javier@dowhile0.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
a0e827c6 |
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27-Jun-2014 |
Javier Martinez Canillas <javier@dowhile0.org> |
gpio: omap: Add an omap prefix to all functions The GPIO OMAP driver didn't have a consistent naming scheme for all its functions. Some of them had an omap prefix while others didn't. There are many advantages on having a separate namespace for driver functions so let's add an "omap" prefix to all of them. Signed-off-by: Javier Martinez Canillas <jmartinez@softcrates.net> Acked-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
598f64d4 |
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27-Jun-2014 |
Javier Martinez Canillas <javier@dowhile0.org> |
gpio: omap: Remove unneeded include The <linux/irqchip/chained_irq.h> header is already included when selecting GPIOLIB_IRQCHIP so there is no need to do it in the driver. This is a left over from commit fb655f5 ("gpio: omap: convert driver to use gpiolib irqchip"). Signed-off-by: Javier Martinez Canillas <jmartinez@softcrates.net> Acked-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
55db60cc |
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27-Jun-2014 |
Javier Martinez Canillas <javier@dowhile0.org> |
gpio: omap: Remove unnecessary lockdep class GPIO irqchips assign to the cascaded IRQs their own lock class in order to avoid warnings about lockdep recursions since that allow the lockdep core to keep track of things. Since commit e45d1c80 ("gpio: put GPIO IRQs into their own lock class") there is no need to do this in a driver if it's using the GPIO irqchip helpers since gpiolib already assigns a lockdep class. Signed-off-by: Javier Martinez Canillas <jmartinez@softcrates.net> Acked-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
345477ff |
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23-Apr-2014 |
Rajendra Nayak <rnayak@ti.com> |
gpio: omap: prepare and unprepare the debounce clock Replace the clk_enable()s with a clk_prepare_enable() and the clk_disables()s with a clk_disable_unprepare() This never showed issues due to the OMAP platform code (hwmod) leaving these clocks in clk_prepare()ed state by default. Reported-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Rajendra Nayak <rnayak@ti.com> Acked-by: Javier Martinez Canillas <javier@dowhile0.org> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
b1e9fec2 |
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26-Apr-2014 |
Javier Martinez Canillas <javier@dowhile0.org> |
gpio: omap: use BIT() macro instead of shifting bits Using the BIT() macro instead of shifting bits makes the code less error prone and also more readable. Signed-off-by: Javier Martinez Canillas <javier@dowhile0.org> Reviewed-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
9370084e |
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24-Apr-2014 |
Yegor Yefremov <yegorslists@googlemail.com> |
gpio: omap: implement get_direction This patch implements gpio_chip's get_direction() routine, that lets other drivers get particular GPIOs direction using struct gpio_desc. Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com> Acked-by: Javier Martinez Canillas <javier@dowhile0.org> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
fb655f57 |
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06-Apr-2014 |
Javier Martinez Canillas <javier@osg.samsung.com> |
gpio: omap: convert driver to use gpiolib irqchip Converts the GPIO OMAP driver to register its chained irq handler and irqchip using the helpers in the gpiolib core. Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
6ef7f385 |
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06-Apr-2014 |
Javier Martinez Canillas <javier@osg.samsung.com> |
gpio: omap: check gpiochip_add() return value The gpiochip_add() function can fail if the chip cannot be registered so the return value has to be checked and the error propagated in case it happens. Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
caebd9db |
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06-Apr-2014 |
Javier Martinez Canillas <javier@osg.samsung.com> |
gpio: omap: convert to use irq_domain_add_simple() The GPIO OMAP driver supports different OMAP SoC families and not all of them have the needed support to use the linear IRQ domain mapping like OMAP1 that use the legacy domain mapping. But this special check is not necessary since the simple IRQ domain mapping is able to handle both cases. Having a zero IRQ offset will be interpreted as a linear domain case while a non-zero value will be interpreted as a legacy domain case. Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
717f70e3 |
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11-Feb-2014 |
Jingoo Han <jg1.han@samsung.com> |
gpio: omap: Use devm_ioremap_resource() Use devm_ioremap_resource() in order to make the code simpler, and remove redundant return value check of platform_get_resource() because the value is checked by devm_ioremap_resource(). Signed-off-by: Jingoo Han <jg1.han@samsung.com> Reviewed-by: Alexandre Courbot <acourbot@nvidia.com> Acked-by: Kevin Hilman <khilman@linaro.org> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
661553b9 |
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15-Nov-2013 |
Victor Kamensky <victor.kamensky@linaro.org> |
gpio/omap: raw read and write endian fix All OMAP IP blocks expect LE data, but CPU may operate in BE mode. Need to use endian neutral functions to read/write h/w registers. I.e instead of __raw_read[lw] and __raw_write[lw] functions code need to use read[lw]_relaxed and write[lw]_relaxed functions. If the first simply reads/writes register, the second will byteswap it if host operates in BE mode. Changes are trivial sed like replacement of __raw_xxx functions with xxx_relaxed variant. Signed-off-by: Victor Kamensky <victor.kamensky@linaro.org> Signed-off-by: Taras Kondratiuk <taras.kondratiuk@linaro.org> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Kevin Hilman <khilman@linaro.org> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
2f56e0a5 |
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15-Oct-2013 |
Javier Martinez Canillas <javier@osg.samsung.com> |
gpio/omap: use gpiolib API to mark a GPIO used as an IRQ The OMAP GPIO driver keeps track about GPIO pins that are used as IRQ lines for two reasons: 1) To prevent GPIO banks to be disabled while one of their GPIO pins are only used as an interrupt line. 2) To not allow another caller to set the GPIO pin as output. Now gpiolib has an API to mark GPIO pins as used as IRQ lines so the GPIO core only allows to set as output GPIO pins not tied to an IRQ. So there is no need to have custom code for 2). The IRQ usage still has to be maintained locally for 1) though. Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
fac7fa16 |
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24-Sep-2013 |
Javier Martinez Canillas <javier@osg.samsung.com> |
gpio/omap: auto-setup a GPIO when used as an IRQ The OMAP GPIO controller HW requires a pin to be configured in GPIO input mode in order to operate as an interrupt input. Since drivers should not be aware of whether an interrupt pin is also a GPIO or not, the HW should be fully configured/enabled as an IRQ if a driver solely uses IRQ APIs such as request_irq(), and never calls any GPIO-related APIs. As such, add the missing HW setup to the OMAP GPIO controller's irq_chip driver. Since this bypasses the GPIO subsystem we have to ensure that another driver won't be able to request the same GPIO pin that is used as an IRQ and set its direction as output. Requesting the GPIO and setting its direction as input is allowed though. This fixes smsc911x ethernet support for tobi and igep OMAP3 boards and OMAP4 SDP SPI based ethernet that use a GPIO as an interrupt line. Cc: stable@vger.kernel.org Acked-by: Stephen Warren <swarren@nvidia.com> Tested-by: George Cherian <george.cherian@ti.com> Tested-by: Aaro Koskinen <aaro.koskinen@iki.fi> Tested-by: Lars Poeschel <poeschel@lemonage.de> Reviewed-by: Kevin Hilman <khilman@linaro.org> Tested-by: Kevin Hilman <khilman@linaro.org> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
fa365e4d |
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24-Sep-2013 |
Javier Martinez Canillas <javier@osg.samsung.com> |
gpio/omap: maintain GPIO and IRQ usage separately The GPIO OMAP controller pins can be used as IRQ and GPIO independently so is necessary to keep track GPIO pins and IRQ lines usage separately to make sure that the bank will always be enabled while being used. Also move gpio_is_input() definition in preparation for the next patch that setups the controller's irq_chip driver when a caller requests an interrupt line. Cc: stable@vger.kernel.org Acked-by: Stephen Warren <swarren@nvidia.com> Tested-by: George Cherian <george.cherian@ti.com> Tested-by: Aaro Koskinen <aaro.koskinen@iki.fi> Tested-by: Lars Poeschel <poeschel@lemonage.de> Reviewed-by: Kevin Hilman <khilman@linaro.org> Tested-by: Kevin Hilman <khilman@linaro.org> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
388f4308 |
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13-Aug-2013 |
Julia Lawall <Julia.Lawall@lip6.fr> |
drivers/gpio/gpio-omap.c: convert comma to semicolon Replace a comma between expression statements by a semicolon. This changes the semantics of the code, but given the current indentation appears to be what is intended. A simplified version of the semantic patch that performs this transformation is as follows: (http://coccinelle.lip6.fr/) // <smpl> @r@ expression e1,e2,e; type T; identifier i; @@ e1 -, +; e2; // </smpl> Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Acked-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
e56aee18 |
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30-Jul-2013 |
Jingoo Han <jg1.han@samsung.com> |
gpio: use dev_get_platdata() Use the wrapper function for retrieving the platform data instead of accessing dev->platform_data directly. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
253403b0 |
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29-Jul-2013 |
Linus Walleij <linus.walleij@linaro.org> |
Revert "gpio/omap: don't create an IRQ mapping for every GPIO on DT" This reverts commit 0e970cec05635adbe7b686063e2548a8e4afb8f4. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
c119fee0 |
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29-Jul-2013 |
Linus Walleij <linus.walleij@linaro.org> |
Revert "gpio/omap: auto request GPIO as input if used as IRQ via DT" This reverts commit b4419e1a15905191661ffe75ba2f9e649f5d565e. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
27d470c1 |
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29-Jul-2013 |
Linus Walleij <linus.walleij@linaro.org> |
Revert "gpio/omap: fix build error when OF_GPIO is not defined." This reverts commit 949eb1a4d29dc75e0b5b16b03747886b52ecf854. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
949eb1a4 |
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02-Jul-2013 |
Javier Martinez Canillas <javier@osg.samsung.com> |
gpio/omap: fix build error when OF_GPIO is not defined. The OMAP GPIO driver check if the chip has an associated Device Tree node using the struct gpio_chip of_node member. But this is only build if CONFIG_OF_GPIO is defined which leads to the following error when using omap1_defconfig: linux/drivers/gpio/gpio-omap.c: In function 'omap_gpio_chip_init': linux/drivers/gpio/gpio-omap.c:1080:17: error: 'struct gpio_chip' has no member named 'of_node' linux/drivers/gpio/gpio-omap.c: In function 'omap_gpio_irq_map': linux/drivers/gpio/gpio-omap.c:1116:16: error: 'struct gpio_chip' has no member named 'of_node' Reported-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
b4419e1a |
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28-Jun-2013 |
Javier Martinez Canillas <javier@osg.samsung.com> |
gpio/omap: auto request GPIO as input if used as IRQ via DT When an OMAP GPIO is used as an IRQ line, a call to gpio_request() has to be made to initialize the OMAP GPIO bank before a driver request the IRQ. Otherwise the call to request_irq() fails. Drives should not be aware of this neither care wether an IRQ line is a GPIO or not. They should just request the IRQ and this has to be handled by the irq_chip driver. With the current OMAP GPIO DT binding, if we define: gpio6: gpio@49058000 { compatible = "ti,omap3-gpio"; reg = <0x49058000 0x200>; interrupts = <34>; ti,hwmods = "gpio6"; gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; }; interrupt-parent = <&gpio6>; interrupts = <16 8>; The GPIO is correctly mapped as an IRQ but a call to gpio_request() is never made. Since a call to the custom IRQ domain .map function handler is made for each GPIO used as an IRQ, the GPIO can be setup and configured as input there automatically. Changes since v3: - Use bank->chip.of_node instead of_have_populated_dt() to check DT or legacy boot as suggested by Jean-Christophe PLAGNIOL-VILLARD - Add a comment that this is just a temporary solution until and that it has to be removed once is handled by the IRQ core. Changes since v2: - Only make the call to gpio_request_one() conditional in the DT case as suggested by Grant Likely. Changes since v1: - Split the irq domain mapping function handler and the GPIO request in two different patches. Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Tested-by: Enric Balletbo i Serra <eballetbo@gmail.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
0e970cec |
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28-Jun-2013 |
Javier Martinez Canillas <javier@osg.samsung.com> |
gpio/omap: don't create an IRQ mapping for every GPIO on DT When a GPIO is defined as an interrupt line using Device Tree, a call to irq_create_of_mapping() is made that calls irq_create_mapping(). So, is not necessary to do the mapping for all OMAP GPIO lines and explicitly call irq_create_mapping() on the driver probe() when booting with Device Tree. Add a custom IRQ domain .map function handler that will be called by irq_create_mapping() to map the GPIO lines used as IRQ. This also allows to execute needed setup code such as configuring a GPIO as input and enabling the GPIO bank. Changes since v3: - Use bank->chip.of_node instead of_have_populated_dt() to check DT or legacy boot as suggested by Jean-Christophe PLAGNIOL-VILLARD Changes since v2: - Unconditionally do the IRQ setup in the .map() function and only call irq_create_mapping() in the gpio chip init to avoid code duplication as suggested by Grant Likely. Changes since v1: - Split the addition of the .map function handler and the automatic gpio request in two different patches. - Add GPIO IRQ setup logic to the irq domain mapping function. - Only call irq_create_mapping for every GPIO on legacy boot. - Only setup a GPIO IRQ on the .map function for DeviceTree boot. Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Tested-by: Enric Balletbo i Serra <eballetbo@gmail.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
397eada9 |
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24-Jun-2013 |
Javier Martinez Canillas <javier@osg.samsung.com> |
gpio/omap: don't use linear domain mapping for OMAP1 Commit ede4d7a5 ("gpio/omap: convert gpio irq domain to linear mapping") converted the OMAP GPIO driver to use a linear mapping for the GPIO IRQ domain instead of using a legacy mapping. Not using a legacy mapping has a number of benefits but it requires the platform to support SPARSE_IRQ which currently is not supported on OMAP1. So this change caused a regression on OMAP1 platforms [1]. Since this issue is not present on all OMAP2+ platforms, there is no need to revert the driver to use legacy domain mapping for all the platforms. [1]: http://www.mail-archive.com/linux-omap@vger.kernel.org/msg89005.html Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Tested-by: Aaro Koskinen <aaro.koskinen@iki.fi> Signed-off-by: Tony Lindgren <tony@atomide.com>
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#
ea4a21a2 |
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31-May-2013 |
Arnd Bergmann <arnd@arndb.de> |
gpio/omap: omap_gpio_init_context stub must be inline The bug fix 352a2d5bf "gpio/omap: ensure gpio context is initialised" has caused a new warning for omap1_defconfig: drivers/gpio/gpio-omap.c:1465:13: warning: 'omap_gpio_init_context' defined but not used [-Wunused-function] static void omap_gpio_init_context(struct gpio_bank *p) {} ^ The solution is to mark the stub function as 'static inline' so it gets left out of the build when unused. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
352a2d5b |
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15-Apr-2013 |
Jon Hunter <jon-hunter@ti.com> |
gpio/omap: ensure gpio context is initialised Commit a2797be (gpio/omap: force restore if context loss is not detectable) broke gpio support for OMAP when booting with device-tree because a restore of the gpio context being performed without ever initialising the gpio context. In other words, the context restored was bad. This problem could also occur in the non device-tree case, however, it is much less likely because when booting without device-tree we can detect context loss via a platform specific API and so context restore is performed less often. Nevertheless we should ensure that the gpio context is initialised on the first pm-runtime resume for gpio banks that could lose their state regardless of whether we are booting with device-tree or not. The context loss count was being initialised on the first pm-runtime suspend following a resume, by populating the get_count_loss_count() function pointer after the first pm-runtime resume. To make the code more readable and logical, initialise the context loss count on the first pm-runtime resume if the context is not yet valid. Reported-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-by: Santosh Shilimkar<santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@linaro.org> Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
a2797bea |
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04-Apr-2013 |
Jon Hunter <jon-hunter@ti.com> |
gpio/omap: force restore if context loss is not detectable When booting with device-tree the function pointer for detecting context loss is not populated. Ideally, the pm_runtime framework should be enhanced to allow a means for reporting context/state loss and we could avoid populating such function pointers altogether. In the interim until a generic non-device specific solution is in place, force a restore of the gpio bank when enabling the gpio controller. Adds a new device-tree property for the OMAP GPIO controller to indicate if the GPIO controller is located in a power-domain that never loses power and hence will always maintain its logic state. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
3513cdec |
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04-Apr-2013 |
Jon Hunter <jon-hunter@ti.com> |
gpio/omap: optimise interrupt service routine The OMAP GPIO interrupt service routine is checking each bit in the GPIO interrupt status register to see which bits are set. It is not efficient to check every bit especially if only a few bits are set. Therefore, instead of checking every bit use the __ffs() function, which returns the location of the first set bit, to find all the set bits. This optimisation was suggested-by and developed in collaboration with Felipe Balbi. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Reviewed-by: Felipe Balbi <balbi@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
60b18b9a |
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04-Apr-2013 |
Tarun Kanti DebBarma <tarun.kanti@ti.com> |
gpio/omap: remove extra context restores in *_runtime_resume() 68942edb09f69b6e09522d1d346665eb3aadde49 (gpio/omap: fix wakeups on level-triggered GPIOs) already restores the fallingdetect and risingdetect contexts in *_runtime_resume(). These registers were modified in *_runtime_suspend() to include even those configured as level-triggered since only edge-triggered gpios can generate wakeup events. Therefore, the old context restores of the same registers present later in the code is not needed any more. Remove them. Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
879fe324 |
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04-Apr-2013 |
Jon Hunter <jon-hunter@ti.com> |
gpio/omap: free irq domain in probe() failure paths Currently the IRQ domain is not freed once allocated, in the case where omap_gpio_probe() fails. Therefore, ensure we free the domain if the probe does fail. Furthermore, the local variable "ret" is not needed and so remove this. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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e83507b7 |
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20-Mar-2013 |
Laurent Navet <laurent.navet@gmail.com> |
gpio: gpio-omap.c: fix checkpatch error Fix : gpio/gpio-omap.c:697: ERROR: space required before the open parenthesis '(' Signed-off-by: Laurent Navet <laurent.navet@gmail.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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de88cbb7 |
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18-Jan-2013 |
Catalin Marinas <catalin.marinas@arm.com> |
arm: Move chained_irq_(enter|exit) to a generic file These functions have been introduced by commit 10a8c383 (irq: introduce entry and exit functions for chained handlers) in asm/mach/irq.h. This patch moves them to linux/irqchip/chained_irq.h so that generic irqchip drivers do not rely on architecture specific header files. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Tested-by: Marc Zyngier <marc.zyngier@arm.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Rob Herring <rob.herring@calxeda.com>
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#
8d4c277e |
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01-Mar-2013 |
Jon Hunter <jon-hunter@ti.com> |
gpio/omap: warn if bank is not enabled on setting irq type For OMAP devices, if a gpio is being used as an interrupt source but has not been requested by calling gpio_request(), a call to request_irq() may cause the kernel hang because the gpio bank may be disabled and hence the register access will fail. To prevent such hangs, test for this case and warn if this is detected. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Reviewed-by: Felipe Balbi <balbi@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Kevin Hilman <khilman@linaro.org> Tested-by: Javier Martinez Canillas <javier@dowhile0.org> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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#
ede4d7a5 |
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01-Mar-2013 |
Jon Hunter <jon-hunter@ti.com> |
gpio/omap: convert gpio irq domain to linear mapping Currently the OMAP GPIO driver uses a legacy mapping for the GPIO IRQ domain. This is not necessary because we do not need to assign a specific interrupt number to the GPIO IRQ domain. Therefore, convert the OMAP GPIO driver to use a linear mapping instead. Please note that this also allows to simplify the logic in the OMAP gpio_irq_handler() routine, by using irq_find_mapping() to obtain the virtual irq number from the GPIO bank and bank index. Reported-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Jon Hunter <jon-hunter@ti.com> Reviewed-by: Felipe Balbi <balbi@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Kevin Hilman <khilman@linaro.org> Tested-by: Javier Martinez Canillas <javier@dowhile0.org> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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#
e9a65bb6 |
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06-Feb-2013 |
Chen Gang <gang.chen@asianux.com> |
gpio: using common order: let 'static const' instead of 'const static' 'const static ' is not a common order, better to use 'static const' instead. building: make EXTRA_CFLAGS=-W ARCH=arm drivers/gpio/gpio-omap.c:1479: warning: 'static' is not at beginning of declaration drivers/gpio/gpio-omap.c:1485: warning: 'static' is not at beginning of declaration drivers/gpio/gpio-omap.c:1491: warning: 'static' is not at beginning of declaration Signed-off-by: Chen Gang <gang.chen@asianux.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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#
3836309d |
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19-Nov-2012 |
Bill Pemberton <wfp5p@virginia.edu> |
gpio: remove use of __devinit CONFIG_HOTPLUG is going away as an option so __devinit is no longer needed. Signed-off-by: Bill Pemberton <wfp5p@virginia.edu> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Peter Tyser <ptyser@xes-inc.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Kevin Hilman <khilman@ti.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
c9c55d92 |
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26-Oct-2012 |
Jon Hunter <jon-hunter@ti.com> |
gpio/omap: fix off-mode bug: clear debounce settings on free/reset This change was originally titled "gpio/omap: fix off-mode bug: clear debounce clock enable mask on free/reset". The title has been updated slightly to reflect (what should be) the final fix. When a GPIO is freed or shutdown, we need to ensure that any debounce settings are cleared and if the GPIO is the only GPIO in the bank that is currently using debounce, then disable the debounce clock as well to save power. Currently, the debounce settings are not cleared on a GPIO free or shutdown and so during a context restore on subsequent off-mode transition, the previous debounce values are restored from the shadow copies (bank->context.debounce*) leading to mismatch state between driver state and hardware state. This was discovered when board code was doing gpio_request_one() gpio_set_debounce() gpio_free() which was leaving the GPIO debounce settings in a confused state. If that GPIO bank is subsequently used with off-mode enabled, bogus state would be restored, leaving GPIO debounce enabled which then prevented the CORE powerdomain from transitioning. To fix this, introduce a new function called _clear_gpio_debounce() to clear any debounce settings when the GPIO is freed or shutdown. If this GPIO is the last debounce-enabled GPIO in the bank, the debounce will also be cut. Please note that we cannot use _gpio_dbck_disable() to disable the debounce clock because this has been specifically created for the gpio suspend path and is intended to shutdown the debounce clock while debounce is enabled. Special thanks to Kevin Hilman for root causing the bug. This fix is a collaborative effort with inputs from Kevin Hilman, Grazvydas Ignotas and Santosh Shilimkar. Testing: - This has been unit tested on an OMAP3430 Beagle board, by requesting a gpio, enabling debounce and then freeing the gpio and checking the register contents, the saved register context and the debounce clock state. - Kevin Hilman tested on 37xx/EVM board which configures GPIO debounce for the ads7846 touchscreen in its board file using the above sequence, and so was failing off-mode tests in dynamic idle. Verified that off-mode tests are passing with this patch. V5 changes: - Corrected author Reported-by: Paul Walmsley <paul@pwsan.com> Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Grazvydas Ignotas <notasas@gmail.com> Cc: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Jon Hunter <jon-hunter@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Tested-by: Kevin Hilman <khilman@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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086d585f |
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05-Oct-2012 |
Tobias Klauser <tklauser@distanz.ch> |
gpio/gpio-omap: Use existing pointer to struct device A pointer to "pdev->dev" is already stored in "dev", so use it in devm_kzalloc. Signed-off-by: Tobias Klauser <tklauser@distanz.ch> Acked-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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4b25408f |
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30-Aug-2012 |
Tony Lindgren <tony@atomide.com> |
ARM: OMAP: Move gpio.h to include/linux/platform_data This way we can remove includes of plat/gpio.h which won't work with the single zImage support. Note that we also remove the cpu_class_is_omap2() check in gpio-omap.c as the drivers should not call it as we need to make it local to arch/arm/mach-omap2 for single zImage support. While at it, arrange the related includes in the standard way. Cc: Grant Likely <grant.likely@secretlab.ca> Cc: linux-mtd@lists.infradead.org Cc: alsa-devel@alsa-project.org Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
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c06e6769 |
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06-Jul-2012 |
Uwe Kleine-König <u.kleine-koenig@pengutronix.de> |
gpio/gpio-omap: make platformdata used as *of_device_id.data const Since of_device_id.data is declared as a pointer to const data a few more consts can be added in this driver. Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
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f6817a2c |
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21-May-2012 |
Uwe Kleine-König <u.kleine-koenig@pengutronix.de> |
gpio/gpio-omap.c: add a const qualifier This prepares *of_device_id.data becoming const. Without this change the following warning would occur: drivers/gpio/gpio-omap.c: In function 'omap_gpio_probe': drivers/gpio/gpio-omap.c:1060: warning: assignment discards qualifiers from pointer target type Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
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#
34672013 |
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11-Jul-2012 |
Tarun Kanti DebBarma <tarun.kanti@ti.com> |
gpio/omap: move bank->dbck initialization to omap_gpio_mod_init() Since the bank->dbck initialization in a one time operation there is no need to keep this within gpio_debounce(). Therefore, moving clk_get(bank->dbck) to omap_gpio_mod_init(). Since the value of bank->dbck would be NULL at the beginning, this check has been removed. Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reported-by: Paul Walmsley <paul@pwsan.com> Reviewed-by: Jon Hunter <jon-hunter@ti.com> Cc: Kevin Hilman <khilman@ti.com> Cc: Rajendra Nayak <rnayak@ti.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Cousson, Benoit <b-cousson@ti.com> Reviewed-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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#
7b86cef3 |
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03-Jul-2012 |
Jon Hunter <jon-hunter@ti.com> |
gpio/omap: fix invalid context restore of gpio bank-0 Currently the gpio _runtime_resume/suspend functions are calling the get_context_loss_count() platform function if the function is populated for a gpio bank. This function is used to determine if the gpio bank logic state needs to be restored due to a power transition. This function will be populated for all banks, but it should only be called for banks that have the "loses_context" variable set. It is pointless to call this if loses_context is false as we know the context will never be lost and will not need restoring. For all OMAP2+ devices gpio bank-0 is in an always-on power domain and so will never lose context. We found that the get_context_loss_count() was being called for bank-0 during the probe and returning 1 instead of 0 indicating that the context had been lost. This was causing the context restore function to be called at probe time for this bank and because the context had never been saved, was restoring an invalid state. This ultimately resulted in a crash [1]. This issue is a regression that was exposed by commit 1b1287032 (gpio/omap: fix missing check in *_runtime_suspend()). There are multiple bugs here that need to be addressed ... 1. Why the always-on power domain returns a context loss count of 1? This needs to be fixed in the power domain code [2]. However, the gpio driver should not assume the loss count is 0 to begin with. 2. The omap gpio driver should never be calling get_context_loss_count for a gpio bank in a always-on domain. This is pointless and adds unneccessary overhead. 3. The OMAP gpio driver assumes that the initial power domain context loss count will be 0 at the time the gpio driver is probed. However, it could be possible that this is not the case and an invalid context restore could be performed during the probe. To avoid this only populate the get_context_loss_count() function pointer after the initial call to pm_runtime_get() has occurred. This will ensure that the first pm_runtime_put() initialised the loss count correctly. This patch addresses issues 2 and 3 above. [1] http://marc.info/?l=linux-omap&m=134065775323775&w=2 [2] http://marc.info/?l=linux-omap&m=134100413303810&w=2 Cc: Kevin Hilman <khilman@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Linus Walleij <linus.walleij@stericsson.com> Cc: Tarun Kanti DebBarma <tarun.kanti@ti.com> Cc: Franky Lin <frankyl@broadcom.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: NeilBrown <neilb@suse.de> Reported-by: Franky Lin <frankyl@broadcom.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Franky Lin <frankyl@broadcom.com> Acked-by: Kevin Hilman <khilman@ti.com> Tested-by: NeilBrown <neilb@suse.de> Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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#
9e303f22 |
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16-Jun-2012 |
Grazvydas Ignotas <notasas@gmail.com> |
gpio/omap: fix irq loss while in idle with debounce on It seems that currently GPIO module is not working correctly during idle when debounce is enabled - the system almost never responds to button presses (observed on OMAP3530 ES2.1 and OMAP3630 ES1.2 pandora boards). Even though wakeups are probably working, it seems that the GPIO module itself is unable to detect input events and generate interrupts. OMAP35x TRM also states that: "If the debounce clock is inactive, the debounce cell gates all input signals and thus cannot be used." So whenever we are disabling debounce clocks (for PM or other reasons), be sure the module's debounce feature is disabled too. Cc: Kevin Hilman <khilman@ti.com> Signed-off-by: Grazvydas Ignotas <notasas@gmail.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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#
b3c64bc3 |
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17-May-2012 |
Kevin Hilman <khilman@ti.com> |
gpio/omap: (re)fix wakeups on level-triggered GPIOs commit 1b1287032 (gpio/omap: fix missing check in *_runtime_suspend()) broke wakeups on level-triggered GPIOs by adding the enabled non-wakeup GPIO check before the workaround that enables wakeups on level-triggered IRQs, effectively disabling that workaround. To fix, move the enabled non-wakeup GPIO check after the level-triggered IRQ workaround. Reported-by: Tony Lindgren <tony@atomide.com> Tested-by: Tony Lindgren <tony@atomide.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Tested-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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#
22770de1 |
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17-May-2012 |
Kevin Hilman <khilman@ti.com> |
gpio/omap: fix broken context restore for non-OFF mode transitions The fix in commit 1b1287032 (gpio/omap: fix missing check in *_runtime_suspend()) exposed another bug in the context restore path. Currently, the per-bank context restore happens whenever the context loss count is different in runtime suspend and runtime resume *and* whenever the per-bank contex_loss_count == 0: if (context_lost_cnt_after != bank->context_loss_count || !context_lost_cnt_after) { omap_gpio_restore_context(bank); Restoring context when the context_lost_cnt_after == 0 is clearly wrong, since this will be true until the first off-mode transition (which could be never, if off-mode is never enabled.) This check causes the context to be restored on *every* runtime PM transition. Before commit 1b1287032 (gpio/omap: fix missing check in *_runtime_suspend()), this code was never executed in non-OFF mode, so there were never spurious context restores happening. After that change though, spurious context restores could happen. To fix, simply remove the !context_lost_cnt_after check. It is not needed. This bug was found when noticing that the smc911x NIC on 3530/Overo was not working, and git bisect tracked it down to this patch. It seems that the spurious context restore was causing the smsc911x to not be properly probed on this platform. Tested-by: Tony Lindgren <tony@atomide.com> Acked-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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#
1b128703 |
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27-Apr-2012 |
Tarun Kanti DebBarma <tarun.kanti@ti.com> |
gpio/omap: fix missing check in *_runtime_suspend() We do checking for bank->enabled_non_wakeup_gpios in order to skip redundant operations. Somehow, the check got missed while doing the cleanup series. Just to make sure that we do context restore correctly in *_runtime_resume(), the bank->workaround_enabled check is moved after context restore. Otherwise, it would prevent context restore when bank->enabled_non_wakeup_gpios is 0. Cc: Kevin Hilman <khilman@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Cousson, Benoit <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Govindraj.R <govindraj.raja@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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#
4e962e89 |
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27-Apr-2012 |
Tarun Kanti DebBarma <tarun.kanti@ti.com> |
gpio/omap: remove cpu_is_omapxxxx() checks from *_runtime_resume() Add register offsets for GPIO_IRQSTATUS_RAW_0, GPIO_IRQSTATUS_RAW_0 which are present on OMAP4+ processors. Now we can distinguish conditions applicable to OMAP4,5 and those specific to OMAP24xx and OMAP3xxx. Cc: Kevin Hilman <khilman@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Cousson, Benoit <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Govindraj.R <govindraj.raja@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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#
9c4ed9e6 |
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27-Apr-2012 |
Tarun Kanti DebBarma <tarun.kanti@ti.com> |
gpio/omap: remove suspend/resume callbacks Both omap_gpio_suspend() and omap_gpio_resume() does programming of wakeup_en register. _gpio_rmw(base, bank->regs->wkup_en, 0xffffffff, 0); _gpio_rmw(base, bank->regs->wkup_en, bank->context.wake_en, 1); This is redundant in omap_gpio_suspend() because wakeup_en register automatically gets initialized in _set_gpio_wakeup() and set_gpio_trigger() while being called either from chip.irq_set_wake() or chip.irq_set_type(). This is also redundant in omap_gpio_resume() because wakeup_en register is programmed in omap_gpio_restore_context() called which is called from runtime resume callback. Cc: Kevin Hilman <khilman@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Cousson, Benoit <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Govindraj.R <govindraj.raja@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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#
b1a8e3d2 |
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27-Apr-2012 |
Tarun Kanti DebBarma <tarun.kanti@ti.com> |
gpio/omap: remove retrigger variable in gpio_irq_handler commit 672e302e3c (ARM: OMAP: use edge/level handlers from generic IRQ framework) removed retrigger support in favor of using generic IRQ framework. This patch cleans up some unused remnants of that removal. Cc: Kevin Hilman <khilman@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Cousson, Benoit <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Felipe Balbi <balbi@ti.com> Tested-by: Govindraj.R <govindraj.raja@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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#
499fa287 |
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27-Apr-2012 |
Tarun Kanti DebBarma <tarun.kanti@ti.com> |
gpio/omap: remove saved_wakeup field from struct gpio_bank There is no more need to have saved_wakeup because bank->context.wake_en already holds that value. So getting rid of read/write operation associated with this field. Cc: Kevin Hilman <khilman@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Cousson, Benoit <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Felipe Balbi <balbi@ti.com> Tested-by: Govindraj.R <govindraj.raja@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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#
0aa27273 |
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27-Apr-2012 |
Tarun Kanti DebBarma <tarun.kanti@ti.com> |
gpio/omap: remove suspend_wakeup field from struct gpio_bank Since we already have bank->context.wake_en to keep track of gpios which are wakeup enabled, there is no need to have this field any more. Cc: Kevin Hilman <khilman@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Cousson, Benoit <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Felipe Balbi <balbi@ti.com> Tested-by: Govindraj.R <govindraj.raja@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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#
c6f31c9e |
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27-Apr-2012 |
Tarun Kanti DebBarma <tarun.kanti@ti.com> |
gpio/omap: remove saved_fallingdetect, saved_risingdetect Since we already have context.fallingdetect and context.risingdetect there is no more need to have these additional fields. Also, getting rid of extra reads associated with them. Cc: Kevin Hilman <khilman@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Cousson, Benoit <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Felipe Balbi <balbi@ti.com> Tested-by: Govindraj.R <govindraj.raja@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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#
6edd94db |
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29-Apr-2012 |
Tarun Kanti DebBarma <tarun.kanti@ti.com> |
gpio/omap: fix incorrect initialization of omap_gpio_mod_init Initialization of irqenable, irqstatus registers is the common operation done in this function for all OMAP platforms, viz. OMAP1, OMAP2+. The latter _gpio_rmw()'s which supposedly got introduced wrongly to take care of OMAP2+ platforms were overwriting initially programmed OMAP1 value breaking functionality on OMAP1. Somehow incorrect assumption was made that each _gpio_rmw()'s were mutually exclusive. On close observation it is found that the first _gpio_rmw() which is supposedly done to take care of OMAP1 platform is generic enough and takes care of OMAP2+ platform as well. Therefore remove the latter _gpio_rmw() to irqenable as they are redundant now. Writing to ctrl and debounce_en registers for OMAP2+ platforms are modified to match the original(pre-cleanup) code where the registers are initialized with 0. In the cleanup series since we are using _gpio_rmw(reg, 0, 1), instead of __raw_writel(), we are just reading and writing the same values to ctrl and debounce_en. This is not an issue for debounce_en register because it has 0x0 as the default value. But in the case of ctrl register the default value is 0x2 (GATINGRATIO = 0x1) so that we end up writing 0x2 instead of intended 0 value. Therefore changing back to __raw_writel() as this is sufficient for this case besides simpler to understand. Also, change irqstatus initalization logic that avoids comparison with bool, besides making it fit in a single line. Cc: stable@vger.kernel.org Cc: Tony Lindgren <tony@atomide.com> Cc: Kevin Hilman <khilman@ti.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca> Reported-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl> Tested-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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#
7fcca715 |
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26-Feb-2012 |
Tarun Kanti DebBarma <tarun.kanti@ti.com> |
gpio/omap: fix redundant decoding of gpio offset In gpio_get(), _get_gpio_datain() and _get_gpio_dataout() get rid of un-necessary operation to compute gpio mask. The gpio offset passed to gpio_get() is sufficient to do that. Here is Russell's original comment: Can someone explain to me this: static int _get_gpio_datain(struct gpio_bank *bank, int gpio) { void __iomem *reg = bank->base + bank->regs->datain; return (__raw_readl(reg) & GPIO_BIT(bank, gpio)) != 0; } static int gpio_get(struct gpio_chip *chip, unsigned offset) { struct gpio_bank *bank = container_of(chip, struct gpio_bank, chip); void __iomem *reg = bank->base; int gpio = chip->base + offset; u32 mask = GPIO_BIT(bank, gpio); if (gpio_is_input(bank, mask)) return _get_gpio_datain(bank, gpio); else return _get_gpio_dataout(bank, gpio); } Given that bank->width on OMAP is either 32 or 16, and GPIO numbers for any GPIO chip are always aligned to 32 or 16, why does this code bother adding the chips base gpio number and then modulo the width? Surely this means if - for argument sake - you registered a GPIO chip with 8 lines followed by one with 16 lines, GPIO0..7 would be chip 0 bit 0..7, GPIO8..15 would be chip 1 bit 8..15, GPIO16..23 would be chip 1 bit 0..7. However, if you registered a GPIO chip with 16 lines first, it would mean GPIO0..15 would be chip 0 bit 0..15, and GPIO16..31 would be chip 1 bit 0..15. Surely this kind of behaviour is not intended? Is there a reason why the bitmask can't just be (1 << offset) where offset is passed into these functions as GPIO number - chip->base ? Reported-by: Russell King - ARM Linux <linux@arm.linux.org.uk> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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#
2a900eb7 |
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05-Mar-2012 |
Tarun Kanti DebBarma <tarun.kanti@ti.com> |
gpio/omap: fix incorrect update to context.irqenable1 In _enable_gpio_irqbank() when bank->regs->set_irqenable is TRUE, gpio_mask can be directly set by writing to set_irqenable register without overwriting current value. In order to ensure the same is stored in context.irqenable1, we must avoid overwriting it with gpio_mask at the end of the function. Instead, update irqenable1 appropriately by OR'ing with gpio_mask. For the case where bank->regs->set_irqenable is FALSE, irqenable1 can be directly overwritten with 'l' which holds correct computed value. if (bank->regs->set_irqenable) { reg += bank->regs->set_irqenable; l = gpio_mask; } else { reg += bank->regs->irqenable; l = __raw_readl(reg); if (bank->regs->irqenable_inv) l &= ~gpio_mask; else l |= gpio_mask; } Make similar change for _disable_gpio_irqbank(). Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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#
960edffe |
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05-Mar-2012 |
Tarun Kanti DebBarma <tarun.kanti@ti.com> |
gpio/omap: fix incorrect context restore logic in omap_gpio_runtime_* In omap_gpio_runtime_suspend/resume() the context save/restore should be independent of bank->enabled_non_wakeup_gpios. This was preventing context restore of GPIO lines which are not wakeup enabled. Reported-by: Govindraj Raja <govindraj.raja@ti.com> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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#
2c836f7e |
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01-Mar-2012 |
Tarun Kanti DebBarma <tarun.kanti@ti.com> |
gpio/omap: fix missing dataout context save in _set_gpio_dataout_reg There are two functions, _set_gpio_dataout_reg() and _set_gpio_dataout_mask() which writes to dataout register and the dataout context must be saved. It is missing in the first function, _set_gpio_dataout_reg(). Fix this. Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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#
8276536c |
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25-Nov-2011 |
Tarun Kanti DebBarma <tarun.kanti@ti.com> |
gpio/omap: fix _set_gpio_irqenable implementation This function should be capable of both enabling and disabling interrupts based upon the *enable* parameter. Right now the function only enables the interrupt and *enable* is not used at all. So add the interrupt disable capability also using the parameter. Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Felipe Balbi <balbi@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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#
00ece7e4 |
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25-Nov-2011 |
Tarun Kanti DebBarma <tarun.kanti@ti.com> |
gpio/omap: fix trigger type to unsigned The GPIO trigger parameter is of type unsigned. enum { IRQ_TYPE_NONE = 0x00000000, IRQ_TYPE_EDGE_RISING = 0x00000001, IRQ_TYPE_EDGE_FALLING = 0x00000002, IRQ_TYPE_EDGE_BOTH = (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING), IRQ_TYPE_LEVEL_HIGH = 0x00000004, IRQ_TYPE_LEVEL_LOW = 0x00000008, IRQ_TYPE_LEVEL_MASK = (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH), IRQ_TYPE_SENSE_MASK = 0x0000000f, IRQ_TYPE_PROBE = 0x00000010, ... }; Even though gpio_irq_type(struct irq_data *d, unsigned type) has the right type of parameter, the subsequent called functions set_gpio_triggering() and set_gpio_trigger() wrongly makes it signed integer. Fix this. Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Felipe Balbi <balbi@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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#
381a752f |
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29-Feb-2012 |
Tarun Kanti DebBarma <tarun.kanti@ti.com> |
gpio/omap: fix wakeup_en register update in _set_gpio_wakeup() There are two ways through which wakeup_en register can be programmed using gpiolib APIs as shown below. It is seen that in the second case in _set_gpio_wakeup(), even though bank->suspend_wakeup is updated correctly, its value is not programmed in wakeup_en register. Fix this. irq_set_type()->gpio_irq_type()->_set_gpio_triggering()->set_gpio_trigger() irq_set_wake()->gpio_wake_enable()->_set_gpio_wakeup() Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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#
8805f410 |
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05-Mar-2012 |
Tony Lindgren <tony@atomide.com> |
gpio/omap: Fix section warning for omap_mpuio_alloc_gc() Make omap_mpuio_alloc_gc() __devinit as omap_gpio_chip_init() is __devinit. Otherwise we get: WARNING: vmlinux.o(.devinit.text+0xa10): Section mismatch in reference from the function omap_gpio_chip_init() to the function .init.text:omap_mpuio_alloc_gc() The function __devinit omap_gpio_chip_init() references a function __init omap_mpuio_alloc_gc(). If omap_mpuio_alloc_gc is only used by omap_gpio_chip_init then annotate omap_mpuio_alloc_gc with a matching annotation. Signed-off-by: Tony Lindgren <tony@atomide.com> Acked-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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68942edb |
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05-Mar-2012 |
Kevin Hilman <khilman@ti.com> |
gpio/omap: fix wakeups on level-triggered GPIOs While both level- and edge-triggered GPIOs are capable of generating interrupts, only edge-triggered GPIOs are capable of generating a module-level wakeup to the PRCM (c.f. 34xx NDA TRM section 25.5.3.2.) In order to ensure that devices using level-triggered GPIOs as interrupts can also cause wakeups (e.g. from idle), this patch enables edge-triggering for wakeup-enabled, level-triggered GPIOs when a GPIO bank is runtime-suspended (which also happens during idle.) This fixes a problem found in GPMC-connected network cards with GPIO interrupts (e.g. smsc911x on Zoom3, Overo, ...) where network booting with NFSroot was very slow since the GPIO IRQs used by the NIC were not generating PRCM wakeups, and thus not waking the system from idle. NOTE: until v3.3, this boot-time problem was somewhat masked because the UART init prevented WFI during boot until the full serial driver was available. Preventing WFI allowed regular GPIO interrupts to fire and this problem was not seen. After the UART runtime PM cleanups, we no longer avoid WFI during boot, so GPIO IRQs that were not causing wakeups resulted in very slow IRQ response times. Tested on platforms using level-triggered GPIOs for network IRQs using the SMSC911x NIC: 3530/Overo and 3630/Zoom3. Reported-by: Tony Lindgren <tony@atomide.com> Tested-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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#
25db711d |
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23-Feb-2012 |
Benoit Cousson <b-cousson@ti.com> |
gpio/omap: Fix IRQ handling for SPARSE_IRQ The driver is still relying on internal OMAP IRQ defines that are not relevant anymore if OMAP is built with SPARSE_IRQ. Replace the defines with the proper IRQ base number. Clean some comment style issue. Remove some hidden and ugly cpu_class_is_omap1() inside the gpio header. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Tested-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
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384ebe1c |
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16-Aug-2011 |
Benoit Cousson <b-cousson@ti.com> |
gpio/omap: Add DT support to GPIO driver Adapt the GPIO driver to retrieve information from a DT file. Allocate the irq_base dynamically and rename bank->virtual_irq_start to bank->irq_base. Change irq_base type to int instead of u16 to match irq_alloc_descs output. Add documentation for GPIO properties specific to OMAP. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Tarun Kanti DebBarma <tarun.kanti@ti.com> Acked-by: Rob Herring <rob.herring@calxeda.com>
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96751fcb |
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01-Feb-2012 |
Benoit Cousson <b-cousson@ti.com> |
gpio/omap: Use devm_ API and add request_mem_region Replace the regular kzalloc and ioremap with the devm_ equivalent to simplify error handling. Add the missing devm_request_mem_region to reserve the region used by the driver. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Tarun Kanti DebBarma <tarun.kanti@ti.com>
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862ff640 |
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01-Feb-2012 |
Benoit Cousson <b-cousson@ti.com> |
gpio/omap: Remove bank->id information and misc cleanup The driver does not need anymore any id to identify the GPIO instance. Remove every occurence of the bank->id inside the driver. Remove two trailing spaces. Add a dev variable for better readability in probe. Remove unused variable bank->pbase. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
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#
63325ff2 |
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24-Feb-2012 |
Tony Lindgren <tony@atomide.com> |
ARM: OMAP1: Move 16xx GPIO system clock to platform init code This way we can remove omap_read/write call from the GPIO driver and remove include to linux/io.h. Cc: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Tony Lindgren <tony@atomide.com>
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#
f86bcc30 |
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09-Sep-2011 |
Nishanth Menon <nm@ti.com> |
gpio/omap: handle set_dataout reg capable IP on restore GPIO IP revisions such as those used in OMAP4 have a set_dataout while the previous revisions used a single dataout register. Depending on what is available restore the dataout settings to the right register. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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#
6d13eaaf |
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29-Aug-2011 |
Nishanth Menon <nm@ti.com> |
gpio/omap: restore OE only after setting the output level Setup the dataout register before restoring OE. This is to make sure that we have valid data in dataout register which would be made available in output pins as soon as OE is enabled. Else, there is risk of unknown data getting out into gpio pins. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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#
ba805be5 |
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29-Aug-2011 |
Nishanth Menon <nm@ti.com> |
gpio/omap: enable irq at the end of all configuration in restore Setup the interrupt enable registers only after we have configured the required edge and required configurations, not before, to prevent spurious events as part of restore routine. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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#
ae547354 |
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09-Sep-2011 |
Nishanth Menon <nm@ti.com> |
gpio/omap: save and restore debounce registers GPIO debounce registers need to be saved and restored for proper functioning of driver. Signed-off-by: Nishanth Menon <nm@ti.com> tarun.kanti@ti.com: Debounce context save is moved to _set_gpio_debounce() as part of dynamic context save to remove overhead. Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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#
41d87cbd |
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14-Nov-2011 |
Tarun Kanti DebBarma <tarun.kanti@ti.com> |
gpio/omap: remove omap_gpio_save_context overhead Context is now saved dynamically in respective functions whenever and whichever registers are modified. This avoid overhead of saving all registers context in the runtime suspend callback. Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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#
6fd9c421 |
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23-Nov-2011 |
Tarun Kanti DebBarma <tarun.kanti@ti.com> |
gpio/omap: fix incorrect access of debounce module Enable debounce clock before writing/reading debounce registers. Disable the clock at the end so that it is synchronized with the pm_runtime_get/put_sync calls. Enable debounce clock per module. This call is mandatory because in omap_gpio_request() when *_runtime_get_sync() is called, _gpio_dbck_enable() within runtime callbck fails to turn on dbck because dbck_enable_mask used within _gpio_dbck_enable() is still not initialized at that point. Therefore we have to enable dbck here. Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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#
72f83af9 |
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23-Nov-2011 |
Tarun Kanti DebBarma <tarun.kanti@ti.com> |
gpio/omap: fix debounce clock handling The dbck_enable_mask indicates which all GPIOs within a bank have debounce enabled and dbck is enabled/disabled based upon this. But there is no mechanism to track the dbck state. In order to manage the dbck state we need additional flag and logic so that turning off/on dbck is synchronized with pm_runtime_put/get_sync calls. Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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#
2dc983c5 |
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23-Nov-2011 |
Tarun Kanti DebBarma <tarun.kanti@ti.com> |
gpio/omap: cleanup prepare_for_idle and resume_after_idle Since *_prepare_for_idle() and *_resume_after_idle() are called with interrupts disabled they should be kept as simple as possible. So, moving most of the stuff to *_runtime_suspend/resume() callbacks. To avoid invalid context restore happening in *_runtime_resume() callback as a result of *_get_sync() call in *_gpio_probe(), update bank->context_loss_count. This would make context restore condition check false in the callback and skip restore until further initialization take place. The workaround_enabled static variable is now a member of struct gpio_bank. Unlike most GPIO registers the OE has 0xffffffff as the default value. To make sure invalid context is not restored, updating the OE context with default value. Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Signed-off-by: Charulatha V <charu@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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#
065cd795 |
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23-Nov-2011 |
Tarun Kanti DebBarma <tarun.kanti@ti.com> |
gpio/omap: optimize suspend and resume functions There is no need to operate on all the banks every time the function is called. Just operate on the current bank passed by the framework. Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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#
55b93c32 |
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28-Sep-2011 |
Tarun Kanti DebBarma <tarun.kanti@ti.com> |
gpio/omap: use pm-runtime framework Call runtime pm APIs pm_runtime_get_sync() and pm_runtime_put() for enabling/disabling clocks appropriately. Remove syscore_ops and instead use SET_RUNTIME_PM_OPS macro. There is no more need to call omap_device_disable_idle_on_suspend since driver is PM runtime adapted now. Signed-off-by: Charulatha V <charu@ti.com> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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#
d0d665a8 |
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30-Aug-2011 |
Charulatha V <charu@ti.com> |
gpio/omap: remove bank->method & METHOD_* macros The only bank->type (method) used in the OMAP GPIO driver is MPUIO type as they need to be handled separately. Identify the same using a flag and remove all METHOD_* macros. mpuio_init() function is defined under #ifdefs. It is required only in case of MPUIO bank type and only when PM operations are supported by it. This is applicable only in case of OMAP16xx SoC's MPUIO GPIO bank type. For all the other cases it is a dummy function. Hence clean up the same and remove all the OMAP SoC specific #ifdefs. Signed-off-by: Charulatha V <charu@ti.com> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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#
d3901eaf |
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26-Sep-2011 |
Tarun Kanti DebBarma <tarun.kanti@ti.com> |
gpio/omap: remove unnecessary bit-masking for read access Remove un-necessary bit masking. Since the register are 4 byte aligned and readl would work as is. The 'enabled' mask is already taking care to mask for bank width. Signed-off-by: Charulatha V <charu@ti.com> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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#
fad96ea8 |
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24-May-2011 |
Charulatha V <charu@ti.com> |
gpio/omap: use pinctrl offset instead of macro Use regs->pinctrl field instead of using the macro OMAP1510_GPIO_PIN_CONTROL Signed-off-by: Charulatha V <charu@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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#
ab985f0f |
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13-Sep-2011 |
Tarun Kanti DebBarma <tarun.kanti@ti.com> |
gpio/omap: cleanup omap_gpio_mod_init function With register offsets now defined for respective OMAP versions we can get rid of cpu_class_* checks. This function now has common initialization code for all OMAP versions. Initialization specific to OMAP16xx has been moved within omap16xx_gpio_init(). Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Signed-off-by: Charulatha V <charu@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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#
5e571f38 |
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13-Sep-2011 |
Tarun Kanti DebBarma <tarun.kanti@ti.com> |
gpio/omap: cleanup set_gpio_triggering function Getting rid of ifdefs within the function by adding register offset intctrl and associating OMAPXXXX_GPIO_INT_CONTROL in respective SoC specific files. Also, use wkup_status register consistently instead of referring to wakeup clear and wakeup set register offsets. Get rid of cpu_is_xxxx checks in set_gpio_trigger() using irqctrl. Signed-off-by: Charulatha V <charu@ti.com> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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#
ae10f233 |
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30-Aug-2011 |
Tarun Kanti DebBarma <tarun.kanti@ti.com> |
gpio/omap: remove hardcoded offsets in context save/restore It is not required to use hard-coded offsets any more in context save and restore functions and instead use the generic offsets which have been correctly initialized during device registration. Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Signed-off-by: Charulatha V <charu@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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#
9ea14d8c |
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30-Aug-2011 |
Tarun Kanti DebBarma <tarun.kanti@ti.com> |
gpio/omap: use level/edge detect reg offsets By adding level and edge detection register offsets and then initializing them correctly according to OMAP versions during device registrations we can now remove lot of revision checks in these functions. Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Signed-off-by: Charulatha V <charu@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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#
6ed87c5b |
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13-Sep-2011 |
Tarun Kanti DebBarma <tarun.kanti@ti.com> |
gpio/omap: further cleanup using wkup_en register Wakeup enable register offset initialized according to OMAP versions during device registration. Use this to avoid version checks. Starting with OMAP4, legacy registers should not be used in combination with the updated regsiters. Use wkup_en register consistently for all SoCs wherever applicable. Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Signed-off-by: Charulatha V <charu@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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#
c8eef65a |
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02-May-2011 |
Charulatha V <charu@ti.com> |
gpio/omap: avoid cpu checks during module ena/disable Remove cpu-is checks while enabling/disabling OMAP GPIO module during a gpio request/free. Signed-off-by: Charulatha V <charu@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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#
803a2434 |
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05-May-2011 |
Charulatha V <charu@ti.com> |
gpio/omap: make non-wakeup GPIO part of pdata Non-wakeup GPIOs are available only in OMAP2. Avoid cpu_is checks by making non_wakeup_gpios as part of pdata. Signed-off-by: Charulatha V <charu@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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#
60a3437d |
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28-Sep-2011 |
Tarun Kanti DebBarma <tarun.kanti@ti.com> |
gpio/omap: handle save/restore context in GPIO driver Modify omap_gpio_prepare_for_idle() & omap_gpio_resume_after_idle() functions to handle save context & restore context respectively in the OMAP GPIO driver itself instead of calling these functions from pm specific files. For this, in gpio_prepare_for_idle(), call *_get_context_loss_count() and in gpio_resume_after_idle() call it again. If the count is different, do restore context. Signed-off-by: Charulatha V <charu@ti.com> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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#
6d62e216 |
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18-Apr-2011 |
Charulatha V <charu@ti.com> |
gpio/omap: make gpio_context part of gpio_bank structure Currently gpio_context array used to save gpio bank's context, is used only for OMAP3 architecture. Move gpio_context as part of gpio_bank structure so that it can be specific to each gpio bank and can be used for any OMAP architecture Signed-off-by: Charulatha V <charu@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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#
0cde8d03 |
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05-May-2011 |
Charulatha V <charu@ti.com> |
gpio/omap: use flag to identify wakeup domain In omap3, save/restore context is implemented for GPIO banks 2-6 as GPIO bank1 is in wakeup domain. Instead of identifying bank's power domain by bank id, use 'loses_context' flag which is filled by pwrdm_can_ever_lose_context() during dev_init. For getting the powerdomain pointer, omap_hwmod_get_pwrdm() is used. omap_device_get_pwrdm() could not be used as the pwrdm information needs to be filled in pdata, whereas omap_device_get_pwrdm() could be used only after omap_device_build() call. Signed-off-by: Charulatha V <charu@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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#
03e128ca |
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05-May-2011 |
Charulatha V <charu@ti.com> |
gpio/omap: remove dependency on gpio_bank_count The gpio_bank_count is the count of number of GPIO devices in a SoC. Remove this dependency from the driver by using list. Also remove the dependency on array of pointers to gpio_bank struct of all GPIO devices. Signed-off-by: Charulatha V <charu@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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#
78a43158 |
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23-Aug-2011 |
Janusz Krzysztofik <jkrzyszt@tis.icnet.pl> |
gpio/omap: fix build error with certain OMAP1 configs With commit f64ad1a0e21a, "gpio/omap: cleanup _set_gpio_wakeup(), remove ifdefs", access to build time conditionally omitted 'suspend_wakeup' member of the 'gpio_bank' structure has been placed unconditionally in function _set_gpio_wakeup(), which is always built. This resulted in the driver compilation broken for certain OMAP1, i.e., non-OMAP16xx, configurations. Really required or not in previously excluded cases, define this structure member unconditionally as a fix. Tested with a custom OMAP1510 only configuration. Signed-off-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl> Acked-by: Kevin Hilman <khilman@ti.com> Tested-by: Aaro Koskinen <aaro.koskinen@iki.fi> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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#
83233749 |
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18-Jul-2011 |
Todd Poynor <toddpoynor@google.com> |
gpio/omap: check return value from irq_alloc_generic_chip Ensure return value of irq_alloc_generic_chip() is checked before continuing on to use it. Signed-off-by: Todd Poynor <toddpoynor@google.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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#
ece9528e |
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12-Jul-2011 |
Kevin Hilman <khilman@ti.com> |
gpio/omap: replace MOD_REG_BIT macro with static inline This macro is ugly and confusing, especially since it passes in most arguments, but uses an implied 'base' from the caller. Replace it with an equivalent static inline. Signed-off-by: Kevin Hilman <khilman@ti.com>
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#
1bc857f7 |
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26-Jul-2011 |
Russell King <rmk+kernel@arm.linux.org.uk> |
ARM: gpio: omap: convert drivers to use asm/gpio.h rather than mach/gpio.h Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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#
e5ff4440 |
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22-Apr-2011 |
Kevin Hilman <khilman@ti.com> |
gpio/omap: cleanup show revision, remove cpu_is checks, display only once Remove cpu_is_* checks from gpio_show_revision() by passing in the revision address offset from platform data. SoCs with no revision register (15xx, 7xx, and all MPUIOs) use -1 (actually, USHRT_MAX) to signify no register. While here, all GPIO banks are assumed to be the same revision, so fix show_revision() to only show the revision for the first bank it finds. This removes duplicate GPIO revision prints during boot. Thanks to Charulatha V <charu@ti.com> for finding/fixing a few -1s that were missed in the original patch. Signed-off-by: Kevin Hilman <khilman@ti.com>
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#
9942da0e |
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22-Apr-2011 |
Kevin Hilman <khilman@ti.com> |
gpio/omap: debounce remove SoC specific registers, use pdata Use register offsets passed in from pdata for accessing debounce registers. Signed-off-by: Kevin Hilman <khilman@ti.com>
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#
f64ad1a0 |
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22-Apr-2011 |
Kevin Hilman <khilman@ti.com> |
gpio/omap: cleanup _set_gpio_wakeup(), remove ifdefs Make _set_gpio_wakeup() generic by removing ifdefs. Code for the various SoCs/bank-methods was already the same, except for the non-wakeup GPIO checking. But that flag is set on a per-SoC basis, so can be used for all SoCs. While here, use dev_err() and remove GPIO bank calculation assumption based on subtracting bank pointers. Signed-off-by: Kevin Hilman <khilman@ti.com>
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#
7a6f8416 |
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22-Apr-2011 |
Kevin Hilman <khilman@ti.com> |
gpio/omap: remove useless gpio_valid() & check_gpio() checks These functions are useless. They are only called in a few places, and where they are called, the GPIO has already been converted from an IRQ or masked, so these functions will never fail. Signed-off-by: Kevin Hilman <khilman@ti.com>
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#
f8b46b58 |
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21-Apr-2011 |
Kevin Hilman <khilman@ti.com> |
gpio/omap: convert MPUIO IRQ over to generic irq_chip MPUIO banks have their own dedicated IRQ chip interface, separate from the "normal" GPIO banks. Convert the MPUIO IRQ chip over to using the new generic IRQ chip interface. Signed-off-by: Kevin Hilman <khilman@ti.com>
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#
28f3b5a0 |
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21-Apr-2011 |
Kevin Hilman <khilman@ti.com> |
gpio/omap: conslidate enable/disable of GPIO IRQs, remove ifdefs Cleanup GPIO IRQ enable/disable handling by removing SoC-specific Also split enable/disable IRQ into separate functions for better readability and also facilitate potentially moving to generic irq_chip in the future. Signed-off-by: Kevin Hilman <khilman@ti.com>
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#
eef4bec7 |
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21-Apr-2011 |
Kevin Hilman <khilman@ti.com> |
gpio/omap: consolidate IRQ status handling, remove #ifdefs Cleanup IRQ status handling by passing IRQ status register offsets via platform data. Cleans up clearing of GPIO IRQ status and GPIO ISR handler. Signed-off-by: Kevin Hilman <khilman@ti.com>
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#
fa87931a |
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20-Apr-2011 |
Kevin Hilman <khilman@ti.com> |
gpio/omap: consolidate direction, input, output, remove #ifdefs Add register offset fields to GPIO platform_data for registers. This patch adds registers that control direction, input and output data. Using these register offsets in the common driver allows removal of #ifdefs and greatly improves readability. Also create dedicated data out functions: one for banks with dedicated set/clear registers, and another for banks with a single mask register. Signed-off-by: Kevin Hilman <khilman@ti.com>
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#
a8be8daf |
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22-Apr-2011 |
Charulatha V <charu@ti.com> |
gpio/omap: remove get_gpio_bank() use chip info to get the pointer to the struct gpio_bank for a given GPIO bank and remove get_gpio_bank(). Signed-off-by: Charulatha V <charu@ti.com>
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#
129fd223 |
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22-Apr-2011 |
Kevin Hilman <khilman@ti.com> |
gpio/omap: replace get_gpio_index() by using bank width The get_gpio_index() function, littered with cpu_is_* checks can be easily replaced by using bitops based on the GPIO bank width. Do so. Signed-off-by: Kevin Hilman <khilman@ti.com>
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#
c390aad0 |
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21-Apr-2011 |
Kevin Hilman <khilman@ti.com> |
gpio/omap: _get_gpio_irqbank_mask: replace hard-coded mask with bank->width Replace hard-coded mask values with bank->width which is already coming from platform_data. Signed-off-by: Kevin Hilman <khilman@ti.com>
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#
d5f46247 |
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21-Apr-2011 |
Kevin Hilman <khilman@ti.com> |
gpio/omap: move bank width into struct gpio_bank Rather than having a file-global bank_width variable, move it into struct gpio_bank so it can be bank-specific. Note the bank width is already passed per-bank via platform_data, so current code would be incorrect if any banks had different width. Signed-off-by: Kevin Hilman <khilman@ti.com>
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#
bdba15db |
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21-Apr-2011 |
Kevin Hilman <khilman@ti.com> |
gpio/omap: remove MPUIO handling from _clear_gpio_irqbank() Remove the OMAP1 #ifdef and MPUIO special case for _clear_gpio_irqbank() The MPUIOs do not need a register access to ack/clear the IRQ status, since reading the IRQ status clears it. In addition, the MPUIO irq_chip has an empty ack method, so _clear_gpio_irqbank() is never used for MPUIOs. Signed-off-by: Kevin Hilman <khilman@ti.com>
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#
df3c8517 |
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21-Apr-2011 |
Kevin Hilman <khilman@ti.com> |
gpio/omap: _clear_gpio_irqbank: fix flushing of posted write In commit 78a1a6d3411de1a8b0dc1cb92754b5f12f251912 (ARM: OMAP4: Update the GPIO support) braces were mistakenly added to included the register read-back inside the cpu_is_* checking. Remove the braces, ensuring that a register read-back is done, even when the IRQSTATUS2 register is not written. Note that the register read-back might be IRQSTATUS1 or IRQSTATUS2 depending on the CPU, but a read-back of any register in that region will cause a flush of the posted writes. Signed-off-by: Kevin Hilman <khilman@ti.com>
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#
55b220ca |
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15-Jun-2011 |
Ambresh K <ambresh@ti.com> |
gpio/omap4: Fix missing interrupts during device wakeup due to IOPAD. If gpio pins from bank[2-5] are marked as wakeup enable and if the wake is through gpio IO pad wakeup, then that wakeup gpio interrupt is lost. In the current implementation, GPIO driver stores the context of DATAIN of all the gpio in the bank. During GPIO resuming, it checks DATAIN with wakeup enabled pins of gpio bank. If there is status change, then manually toggle GPIO_LEVELDETECT to generate pseudo interrupt. Reported-by: Philippe Mazet <p-mazet@ti.com> Tested-by: Philippe Mazet <p-mazet@ti.com> Signed-off-by: Ambresh K <ambresh@ti.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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#
85ec7b97 |
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06-Jun-2011 |
Colin Cross <ccross@android.com> |
GPIO: OMAP: add locking around calls to _set_gpio_triggering _set_gpio_triggering uses read-modify-write on bank registers, lock bank->lock around all calls to it to prevent register corruption if two cpus access gpios in the same bank at the same time. Signed-off-by: Colin Cross <ccross@android.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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#
0622b25b |
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06-Jun-2011 |
Colin Cross <ccross@android.com> |
GPIO: OMAP: fix setting IRQWAKEN bits for OMAP4 Setting the IRQWAKEN bit was overwriting previous IRQWAKEN bits, causing only the last bit set to take effect, resulting in lost wakeups when the GPIO controller is in idle. Replace direct writes to IRQWAKEN with MOD_REG_BIT calls to perform a read-modify-write on the register. Signed-off-by: Colin Cross <ccross@android.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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#
d52b31de |
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27-May-2011 |
Russell King <rmk+kernel@arm.linux.org.uk> |
GPIO: OMAP: fix section mismatch warnings WARNING: arch/arm/plat-omap/built-in.o(.devinit.text+0x46c): Section mismatch in reference from the function omap_gpio_probe() to the function .init.text:omap_gpio_chip_init() The function __devinit omap_gpio_probe() references a function __init omap_gpio_chip_init(). If omap_gpio_chip_init is only used by omap_gpio_probe then annotate omap_gpio_chip_init with a matching annotation. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Kevin Hilman <khilman@ti.com>
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#
e5cdb13f |
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20-May-2011 |
Kevin Hilman <khilman@ti.com> |
GPIO: OMAP: move to drivers/gpio Move OMAP GPIO driver to drivers/gpio. Builds whenever CONFIG_ARCH_OMAP=y. Signed-off-by: Kevin Hilman <khilman@ti.com>
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