boot/bios_ia32: basic support la57 aka 5-level paging for x86_64 kernels

la57 kernel support is required. we simply add a 5th level and enable the cr4
feature. the safemode option "256tb_memory_limit" is named after the 4gb one,
but the current support is limited to 512GB as before (this can be later extended).

Change-Id: I922774473c4a6112a0e4ff74162285ad58aa53af
Reviewed-on: https://review.haiku-os.org/c/haiku/+/3552
Reviewed-by: Adrien Destugues <pulkomandy@gmail.com>
Reviewed-by: Axel Dörfler <axeld@pinc-software.de>

x86[_64]: Separate bootloader and kernel GDT and IDT logic

From now on bootloader sets up its own minimal valid GDT and IDT. Then
the kernel replaces them with its own tables.

x86: Let each CPU have its own GDT

Implemented TLS for x86_64.

Support for SMP on x86_64.

No major changes to the kernel: just compiled in arch_smp.cpp and fixed the
IDT load in arch_cpu_init_percpu to use the correct limit for x86_64 (uses
sizeof(interrupt_descriptor)). In the boot loader, changed smp_boot_other_cpus
to construct a temporary GDT and get the page directory address from CR3, as
what's in kernel_args will be 64-bit stuff and will not work to switch the
CPUs into 32-bit mode in the trampoline code. Refactored 64-bit kernel entry
code to not use the stack after disabling paging, as the secondary CPUs are
given a 32-bit virtual stack address by the SMP trampoline code which will
no longer work.

Some fixes to the long mode switch code.

* Wasn't storing the fixed virtual address of the PML4 in kernel_args.
* After switching to long mode, reload GDTR with the virtual address of
the GDT. This was working fine until now because the physical address
was identity mapped, but broke as soon as I removed the identity
mapping.

Should enable CR4.PGE while switching to the kernel.

Removed the x86_64 headers/source directories, now all merged with x86.

Style fixes.

Implemented long mode setup/switch code, the bootloader can now start the 64-bit kernel!

The setup procedure is fairly simple: create a 64-bit GDT and 64-bit page
tables that include all kernel mappings from the 32-bit address space, but at
the correct 64-bit address, then go through kernel_args and changes all virtual
addresses to 64-bit addresses, and finally switch to long mode and jump to the
kernel.

x86[_64]: Separate bootloader and kernel GDT and IDT logic

From now on bootloader sets up its own minimal valid GDT and IDT. Then
the kernel replaces them with its own tables.

x86: Let each CPU have its own GDT

Implemented TLS for x86_64.

Support for SMP on x86_64.

No major changes to the kernel: just compiled in arch_smp.cpp and fixed the
IDT load in arch_cpu_init_percpu to use the correct limit for x86_64 (uses
sizeof(interrupt_descriptor)). In the boot loader, changed smp_boot_other_cpus
to construct a temporary GDT and get the page directory address from CR3, as
what's in kernel_args will be 64-bit stuff and will not work to switch the
CPUs into 32-bit mode in the trampoline code. Refactored 64-bit kernel entry
code to not use the stack after disabling paging, as the secondary CPUs are
given a 32-bit virtual stack address by the SMP trampoline code which will
no longer work.

Some fixes to the long mode switch code.

* Wasn't storing the fixed virtual address of the PML4 in kernel_args.
* After switching to long mode, reload GDTR with the virtual address of
the GDT. This was working fine until now because the physical address
was identity mapped, but broke as soon as I removed the identity
mapping.

Should enable CR4.PGE while switching to the kernel.

Removed the x86_64 headers/source directories, now all merged with x86.

Style fixes.

Implemented long mode setup/switch code, the bootloader can now start the 64-bit kernel!

The setup procedure is fairly simple: create a 64-bit GDT and 64-bit page
tables that include all kernel mappings from the 32-bit address space, but at
the correct 64-bit address, then go through kernel_args and changes all virtual
addresses to 64-bit addresses, and finally switch to long mode and jump to the
kernel.