intrng: Allow alternative IPI PICs to be registered and used

On RISC-V, the root PIC (whether the PLIC or, as will be the case in
future, the local interrupt controller) cannot send IPIs, relying on
another means to trigger the necessary software interrupts (firmware
calls), but there are upcoming standard devices that will be able to
inject them, so we can't just put the firmware calls in the root PIC
driver.

Thus, split out a new intr_ipi_dev from intr_irq_root_dev to use for
sending IPIs. New devices can be registered with a given priority up
until the first IPI is set up, when the best device seen so far gets
frozen as the IPI device to use.

Reviewed by: mhorne
MFC after: 1 month
Differential Revision: https://reviews.freebsd.org/D35899

intrng: Remove irq_root_ipicount and corresponding intr_pic_claim_root arg

The static irq_root_ipicount variable is only ever written to (with the
value passed to irq_root_ipicount), never read. Moreover, the bcm2836
driver, as used by the Raspberry Pi 2B and 3A/B (but not 4, which uses a
GIC-400, though does have the legacy interrupt controller present too)
passes 0 as ipicount, despite implementing IPIs. It's thus inaccurate
and serves no purpose, so should be removed.

Reviewed by: mmel, imp, mhorne
MFC after: 1 month
Differential Revision: https://reviews.freebsd.org/D35897

sys: Automated cleanup of cdefs and other formatting

Apply the following automated changes to try to eliminate
no-longer-needed sys/cdefs.h includes as well as now-empty
blank lines in a row.

Remove /^#if.*\n#endif.*\n#include\s+<sys/cdefs.h>.*\n/
Remove /\n+#include\s+<sys/cdefs.h>.*\n+#if.*\n#endif.*\n+/
Remove /\n+#if.*\n#endif.*\n+/
Remove /^#if.*\n#endif.*\n/
Remove /\n+#include\s+<sys/cdefs.h>\n#include\s+<sys/types.h>/
Remove /\n+#include\s+<sys/cdefs.h>\n#include\s+<sys/param.h>/
Remove /\n+#include\s+<sys/cdefs.h>\n#include\s+<sys/capsicum.h>/

Sponsored by: Netflix

sys: Remove $FreeBSD$: one-line .c pattern

Remove /^[\s*]*__FBSDID\("\$FreeBSD\$"\);?\s*\n/

arm64/gicv3: correct the size of the distributor resource

Use the GICD_SIZE macro (0x10000), which is half the size of the current
fixed-sized mapping (128 * 1024 == 0x20000).

In ARM64 Hyper-V instances, it seems the Distributor's registers are
located immediately preceding a range of physical memory in the bus
address space. Thus, when ram0 is attaching and attempts to reserve
SYS_RES_MEMORY resources corresponding to its physmem ranges, it fails,
because the first 0x10000 bytes of this range are already owned by gic0.

PR: 270415
Reported by: whu
Tested by: whu
Differential Revision: https://reviews.freebsd.org/D39260

Check for the IORT before adding the ITS driver

Before adding the ITS interrupt controller driver to handle MSI/MSI-X
interrupts check if it is present in the IO Remapping Table (IORT).
If not don't attach as devices expect to use this table to find the
correct MSI interrupt controller.

Sponsored by: Arm Ltd
Differential Revision: https://reviews.freebsd.org/D37772

arm64: Hyper-V: vPCI: Fix typo and some indentations

Fix a typo and some indentation errors in the previous commits.

Reported by: jrtc27
Fixes: db247798c5640 ("arm64: Hyper-V: vPCI: SPI MSI mapping for gic v3 acpi in arm64")
Fixes: 6e5b082cab8d9 ("arm64: Hyper-V: vPCI: Adding Hyper-V PCI protocol 1.4")
Sponsored by: Microsoft

arm64: Hyper-V: vPCI: SPI MSI mapping for gic v3 acpi in arm64

Microsoft Azure Hyper-V uses SPI to map MSI in ARM64, instead of
using LPI IDS. To enable that we need to have gic registered with
ACPI_MSI_XREF and gic acpi to map SPI for MSI.

This is the 1st of the three patchs to enable Hyper-V vPCI support
in arm64.

Reviewed by: andrew, emaste, whu
Tested by: Souradeep Chakrabarti <schakrabarti@microsoft.com>
Obtained from: Souradeep Chakrabarti <schakrabarti@microsoft.com>
Sponsored by: Microsoft
Differential Revision: https://reviews.freebsd.org/D37763

Make adding children consistant in the GICv3 drivers

Reorder statements to make them consistant between the ACPI and FDT
GICv3 attachments.

Reported by: jrtc27
Sponsored by: Innovate UK

Teach the GICv3 driver to translate memory ranges

As with the GICv1/2 driver teach the GICv3 driver to translate memory
ranges of children. This allows us to create a common
bus_alloc_resource implementation for bot hACPI and FDT attachments.

Sponsored by: The FreeBSD Foundation

Add bus_get_resource_list functions to the GICv3 driver

This will be used to reduce code duplication between the ACPI and FDT
attachments.

Sponsored by: The FreeBSD Foundation

Teach the GICv3 driver about a vgic child

This will be used by bhyve to attach a virtual GIC driver.

Sponsored by: Innovate UK
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D36590

arm64: Remove unused devclass arguments to DRIVER_MODULE.

Remove "All Rights Reserved" from FreeBSD Foundation sys/ copyrights

These ones were unambiguous cases where the Foundation was the only
listed copyright holder (in the associated license block).

Sponsored by: The FreeBSD Foundation

Fall back to use the GICR address from the generic interrupt struct

When there is no ACPI redistributor sub-table in the MADT we need to
fall back to use the GICR base address from the GIC CPU interface
structure.

Handle this fallback when adding memory to the device and when counting
the number of redistributors.

PR: 251171
Reported by: Andrey Fesenko <f0andrey_gmail.com>
Sponsored by: Innovate UK
Differential Revision: https://reviews.freebsd.org/D27247

Stop calling gic_v3_detach when we haven't called gic_v3_attach

The former tries to dereference memory allocated by the latter. If counting
the redistributor fails it may try to dereference memory that was never
allocated.

Sponsored by: Innovate UK

Allow the GICv3 ACPI driver to attach to a GICv4

The same driver works on both, allow the driver to attach to a GICv4
controller with the ACPI attachment.

Reported by: Andrey Fesenko <f0andrey_gmail.com>
Sponsored by: Innovate UK

arm64: clean up empty lines in .c and .h files

arm64 gicv3: add IORT and NUMA support

acpi_iort.c has added support to query GIC proximity and MSI XREF
ID for GIC ITS blocks. Use this when GIC ITS blocks are initialized
from ACPI.

Reviewed by: andrew
Differential Revision: https://reviews.freebsd.org/D18003

Create macros for the ACPI interrupt cross references. This is considered a
band aid until a better solution to find the correct interrupt controller
can be found.

While here fix one place in the GICv3 ITS driver where the offset wasn't
correctly applied.

Sponsored by: DARPA, AFRL
Sponsored by: Cavium (Hardware)

In the ACPI GICv3 attach function call device_get_children to get the list
of children. We expect this to be populated when configuring the secondary
cores.

Sponsored by: DARPA, AFRL
Sponsored by: Cavium (Hardware)

Add the missing GICv3 dev info struct to the ACPI dev info.Previously we
would read from the resource list when querying from this.

Sponsored by: ABT Systems Ltd
Sponsored by: Cavium (Hardware)

Count the number of children in the GICv3 ACPI attachment. This is needed
later for assigning IRQ vector space.

Sponsored by: DARPA, AFRL
Sponsored by: Cavium (Hardware)

Count the number of GIC redistributors in the ACPI tables. The GICv3 driver
needs this to allocate memory, and connect the CPUs to the interrupt
controller.

Sponsored by: DARPA, AFRL
Sponsored by: Cavium (Hardware)

iAdd ACPI attachments the the GIC and GICv3 interrupt controller drivers.
For each we need to walk the MADT to find which we have, then add the
driver as needed. As each may have a child they will each walk the same
table to find these details.

Reviewed by: mmel
Obtained from: ABT Systems Ltd
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D8720