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338514 |
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06-Sep-2018 |
jhb |
MFC 332906,332907,332976,333679,336053: Expand testing of breakpoints.
332906: Extend support for ptrace() tests using breakpoints.
- Use a single list of platforms to define HAVE_BREAKPOINT for platforms that expose a functional breakpoint() inline to userland. Replace existing lists of platform tests with HAVE_BREAKPOINT instead. - Add support for advancing PC past a breakpoint inserted via breakpoint() to support the existing ptrace__PT_CONTINUE_different_thread test on non-x86 platforms (x86 advances the PC past the breakpoint instruction, but other platforms do not). This is implemented by defining a new SKIP_BREAK macro which accepts a pointer to a 'struct reg' as its sole argument and modifies the contents to advance the PC. The intention is to use it in between PT_GETREGS and PT_SETREGS.
332907: Expose breakpoint() to userland from <machine/cpufunc.h> on MIPS.
Enable ptrace() tests using breakpoint on MIPS as well.
332976: Shorten some recently-added lines that are an extra indent over 80 columns.
333679: Export a breakpoint() function to userland for riscv.
As a result, enable tests using breakpoint() on riscv.
336053: Export a breakpoint() function to userland for arm and arm64.
Enable ptrace() tests using breakpoint() on these architectures.
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319202 |
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30-May-2017 |
andrew |
MFC r316732, r316756: Enable Privileged Access Never on arm64.
r316732: Use the unprivileged variant of the load and store instructions most places possible in the kernel. This forces these functions to fail if userspace is unable to access a given memory location, even if it is in the user memory range.
This will simplify adding Privileged Access Never support later.
r316756: In ARMv8.1 ARM has added a process state bit to disable access to userspace from the kernel. Make use of this to restrict accessing userspace to just the functions that explicitly handle crossing the user kernel boundary.
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299683 |
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13-May-2016 |
andrew |
Add support to the arm64 busdma to handle the cache. For now this is disabled, however when we enable it it will default to assume memory is not cache-coherent, unless either the tag was created or the parent was marked as cache-coherent.
Obtained from: ABT Systems Ltd Relnotes: yes Sponsored by: The FreeBSD Foundation
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281494 |
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13-Apr-2015 |
andrew |
Bring in the start of the arm64 kernel.
This is only the minimum set of files needed to boot in qemu. As such it is missing a few things.
The bus_dma code is currently only stub functions with a full implementation from the development tree to follow.
The gic driver has been copied as the interrupt framework is different. It is expected the two drivers will be merged by the arm intrng project, however this will need to be imported into the tree and support for arm64 would need to be added.
This includes code developed by myself, SemiHalf, Ed Maste, and Robin Randhawa from ARM. This has been funded by the FreeBSD Foundation, with early development by myself in my spare time with assistance from Robin.
Differential Revision: https://reviews.freebsd.org/D2199 Reviewed by: emaste, imp Relnotes: yes Sponsored by: The FreeBSD Foundation
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