Copy stable/10@r272459 to releng/10.1 as part ofthe 10.1-RELEASE process.Approved by: re (implicit)Sponsored by: The FreeBSD Foundation
MFC 260239,261268,265058:Expand the support for PCI INTx interrupts including providing interruptrouting information for INTx interrupts to I/O APIC pins and enablingINTx interrupts in the virtio and AHCI backends.
Enhance the support for PCI legacy INTx interrupts and enable them inthe virtio backends.- Add a new ioctl to export the count of pins on the I/O APIC from vmm to the hypervisor.- Use pins on the I/O APIC >= 16 for PCI interrupts leaving 0-15 for ISA interrupts.- Populate the MP Table with I/O interrupt entries for any PCI INTx interrupts.- Create a _PRT table under the PCI root bridge in ACPI to route any PCI INTx interrupts appropriately.- Track which INTx interrupts are in use per-slot so that functions that share a slot attempt to distribute their INTx interrupts across the four available pins.- Implicitly mask INTx interrupts if either MSI or MSI-X is enabled and when the INTx DIS bit is set in a function's PCI command register. Either assert or deassert the associated I/O APIC pin when the state of one of those conditions changes.- Add INTx support to the virtio backends.- Always advertise the MSI capability in the virtio backends.Submitted by: neel (7)Reviewed by: neelMFC after: 2 weeks