Copy stable/10@r272459 to releng/10.1 as part of
the 10.1-RELEASE process.

Approved by: re (implicit)
Sponsored by: The FreeBSD Foundation

Copy head (r256279) to stable/10 as part of the 10.0-RELEASE cycle.

Approved by: re (implicit)
Sponsored by: The FreeBSD Foundation

Update AP96 to directly attach an arswitch.

Add switch support to AP96.

Disable the pll_1000 hint for now, the upcoming work enables it and it
breaks without the switch PHY code.

* Force the ethernet MII configuration to be RGMII
* Populate the "pll_1000" field, which will soon be used to override the
PLL configuration from the default value.

Obtained from: Linux OpenWRT

Convert AP96 to use the mdioproxy and ARGE_MDIO option.

arge1 still works (it's the standalone PHY) but arge0 and the other switch
ports don't work. They're enumerated though, demonstrating that the
mdiobus abstraction is correctly working.

Add in the AP96 phy configuration from openwrt.

* arge0 doesn't (yet) work via the switch PHY ports; I'm not sure why.
* arge1 maps to the WAN port. That works.

TODO:

* The PLL register needs a different (non-default) value for Gigabit
Ethernet. The board setup code needs to be extended a bit to allow
for non-default pll_1000 values - right now, those values come out
of hard-coded values in the per-chip set_pll_ge() routines.

Obtained from: Linux / OpenWRT

Flesh out the rest of the AP96 board/config.

Introduce configuration files for AP94 and AP96.

This uses the new firmware(9) method for squirreling away the EEPROM
contents from SPI flash so ath(4) can get to them later.

It won't work out of the box just yet - you have to add this to
if_ath_pci.c:

#define ATH_EEPROM_FIRMWARE

.. until I've added it as a configuration option and updated things.