Copy stable/10@r272459 to releng/10.1 as part of
the 10.1-RELEASE process.

Approved by: re (implicit)
Sponsored by: The FreeBSD Foundation

Copy head (r256279) to stable/10 as part of the 10.0-RELEASE cycle.

Approved by: re (implicit)
Sponsored by: The FreeBSD Foundation

Rework MIPS PMC code:

- Replace MIPS24K-specific code with more generic framework that will
make adding new CPU support easier
- Add MIPS24K support for new framework
- Limit backtrace depth to 1 for stability reasons and add option
HWPMC_MIPS_BACKTRACE to override this limitation

This header file no longer exists when doing cross builds, so remove it.

mips24k hwpmc now compiles again.

Flip on processing interrupt profile events for mips24k.

This is a bit hackish and should be made more generic (ie, support more than
two hard-coded performance counter+config register pairs) so it can be used
for mips74k and other chips.

All this does is process the initial interrupt event. It doesn't (yet) handle
callgraph events, so even if you route the exception/interrupt to this routine
and flip the bit on, it will hang and crash pmc unless you disable callgraph
support when you enable a sample based PMC.

Add support for hwpmc(4) on the MIPS 24K, 32 bit, embedded processor.

Add macros for properly accessing coprocessor 0 registers that
support performance counters.

Reviewed by: jkoshy rpaulo fabien imp
MFC after: 1 month