Copy stable/10@r272459 to releng/10.1 as part of
the 10.1-RELEASE process.

Approved by: re (implicit)
Sponsored by: The FreeBSD Foundation

Copy head (r256279) to stable/10 as part of the 10.0-RELEASE cycle.

Approved by: re (implicit)
Sponsored by: The FreeBSD Foundation

- With the demise of !ATA_CAM, ATA_STATIC_ID is the only ata(4) related
option left but actually consumed by ada(4), so move it to opt_ada.h
and get rid of opt_ata.h.
- Fix stand-alone build of atacore(4) by adding opt_cam.h.
- Use __FBSDID.
- Use DEVMETHOD_END.
- Use NULL instead of 0 for pointers.

Implement CAM_ATAIO_NEEDRESULT (fetching full set of result registers) for
ata(4) driver in ATA_CAM mode. That slighty improves error reporting and
also should fix `smartctl -l scterc /dev/adaX` operation.

MFC after: 3 weeks

- First pass at const'ifying ata(4) as appropriate.
- Use DEVMETHOD_END.
- Use NULL instead of 0 for pointers

MFC after: 1 week

Fix names of some Marvell SATA chips. It looks like chips with proprietary
interface supported by mvs(4) are 88SX, while AHCI-like chips are 88SE.

PR: kern/165271
Submitted by: Jia-Shiun Li <jiashiun@gmail.com>
MFC after: 1 week

Convert files to UTF-8

Add missing bus_dmamap_sync() calls for the work DMA map.

MFC after: 2 weeks

Several chipset drivers alter parameters relevant for the DMA tag creation,
i.e. alignment, max_address, max_iosize and segsize (only max_address is
thought to have an negative impact regarding this issue though), after
calling ata_dmainit() either directly or indirectly so these values have
no effect or at least no effect on the DMA tags and the defaults are used
for the latter instead. So change the drivers to set these parameters
up-front and ata_dmainit() to honor them.

Reviewd by: mav
MFC after: 1 month

Set of legacy mode SATA enchancements:
- Implement proper combined mode decoding for Intel controllers to properly
identify SATA and PATA channels and associate ATA channels with SATA ports.
This fixes wrong reporting and in some cases hard resets to wrong SATA ports.
- Improve SATA registers support to handle hot-plug events and potentially
interface errors. For ICH5/6300ESB chipsets these registers accessible via
PCI config space. For later ones they may be accessible via PCI BAR(5).
- For controllers not generating interrupts on hot-plug events, implement
periodic status polling. Use it to detect hot-plug on Intel and VIA
controllers. Same probably could also be used for Serverworks and SIS.

Add missing le32toh(), same as recently done in ata-siliconimage.c.

Increase device reset timeout from 10 to 15 seconds, same as in ahci(4).
Some devices found need about 10-12 seconds to spinup.

Remove extraneous semicolons, no functional changes.

Submitted by: Marc Balmer <marc@msys.ch>
MFC after: 1 week

MFp4:
Introduce ATA_CAM kernel option, turning ata(4) controller drivers into
cam(4) interface modules. When enabled, this options deprecates all ata(4)
peripheral drivers (ad, acd, ...) and interfaces and allows cam(4) drivers
(ada, cd, ...) and interfaces to be natively used instead.

As side effect of this, ata(4) mode setting code was completely rewritten
to make controller API more strict and permit above change. While doing
this, SATA revision was separated from PATA mode. It allows DMA-incapable
SATA devices to operate and makes hw.ata.atapi_dma tunable work again.

Also allow ata(4) controller drivers (except some specific or broken ones)
to handle larger data transfers. Previous constraint of 64K was artificial
and is not really required by PCI ATA BM specification or hardware.

Submitted by: nwitehorn (powerpc part)

On Soft Reset, read device signature from FIS receive area, instead of
PxSIG register. It works better for NVidia chipsets. ahci(4) does the same.

PR: kern/140472, i386/138668

Change the way in which AHCI+PATA combined controllers, such as JMicron
and Marvell handled. Instead of trying to attach two different drivers to
single device, wrapping each call, make one of them (atajmicron, atamarvell)
attach do device solely, but create child device for AHCI driver,
passing it all required resources. It is quite easy, as none of
resources are shared, except IRQ.

As result, it:
- makes drivers operation more independent and straitforward,
- allows to use new ahci(4) driver with such devices, adding support for
new features, such as PMP and NCQ, same time keeping legacy PATA support,
- will allow to just drop old ataahci driver, when it's time come.

Disable PMP probing for Marvell AHCI controllers.
It is not working for some reason. Linux does the same.

MFp4:
- Remove most of direct relations between ATA(4) peripherial and controller
levels. It makes logic more transparent and is a mandatory step to wrap
ATA(4) controller level into ATA-native CAM SIM.
- Tune AHCI and SATA2 SiI drivers memory allocation a bit to allow bigger
I/O transaction sizes without additional cost.

Fix kernel panic, when ataahci driver is used on system with increased
MAXPHYS. Current ataahci driver memory allocation scheme includes only
64 items in DMA S/G table, and so not guarantied to support transactions
with more then 252K data.

Approved by: re (kensmith)
MFC after: 2 weeks

MFp4.

Log supported AHCI controller capabilities.

Add experimental support for SATA interface power management.
Feature is controlled by hint.ata.X.pm_level tunable:
0 - PM disabled, old behaviour, default.
1 - device is allowed to initiate PM state change, host is passive.
2 - host initiates PARTIAL state transition every time port is idle.
3 - host initiates SLUMBER state transition every time port is idle.

PARTIAL state has up to 100us (50us for me) wakeup latency, but for my
ICH8M saves 0.5W of power per drive. SLUMBER state has up to 10ms (3.5ms
for me) wakeup latency, but saves 0.8W of power.

Modes 2 and 3 are implemented only for AHCI driver now.

Interface power management is incompatible with device presence detection
(host receives no signal from drive, so unable to monitor it), so later is
disabled when PM is used.

Use cached progif instead of reading it again.

- Give generic AHCI driver lower priority than device-specific drivers.
- Consistently use BUS_PROBE_GENERIC instead of -100.

- Always force AHCI mode on a ATI/AMD SB600/700/800 SATA controller. These
controllers may be configured as legacy IDE mode by modifying subclass and
progif without actually changing PCI device IDs. Instead of complicating
code, we always force AHCI mode while probing. Also we restore AHCI mode
while resuming per ATI/AMD register programming/requirement guides.
- Fix SB700/800 "combined" mode. Unlike SB600, this PATA controller can
combine two SATA ports and emulate one PATA channel as primary or secondary
depending on BIOS configuration. When the combined mode is disabled, this
channel disappears and it works just like SB600 PATA controller, however.
- Add more PCI device IDs for SB700/800 and adjust device descriptions.
SB800 shares the same PCI device IDs and added two more SATA IDs.

Integrate user/mav/ata branch:

Add ch_suspend/ch_resume methods for PCI controllers and implement them
for AHCI. Refactor AHCI channel initialization according to it.

Fix Port Multipliers operation. It is far from perfect yet, but works now.
Tested with JMicron JMB363 AHCI + SiI 3726 PMP pair.
Previous version was also tested with SiI 4726 PMP.

Hardware sponsored by: Vitsch Electronics / VEHosting.nl

Remove the local management of INTx as this is now taken care of by pci.

Reviewed by: jhb
MFC after: 3 days

Give controller a chance to issue Soft Reset clear command before checking
ready status. Most of controllers managed to issue coommand and set BUSY
bit almost simultaneously, before we will read it, but at least JMicron JMB363
don't. Ignore timeout errors to keep old behavior when error there was
impossible.

For me this fixes timeout errors on the first command after channel attach
or reinit. Boot in my case is not affected, as there is much time passing
between reset and next command giving reset time to complete.

Comment out enabling FIS Based Switching inside ata_ahci_issue_cmd() as it
done in other places. Until we have no support for command queueing we have
no any benefit from FBS, while enabling it only here somehow leads to
"port not ready" errors on Intel 63XXESB2 controller.

Tested by: Larry Rosenman <ler AT lerctr.org>

Fix spelling.

Submitted by: gavin

Tune AHCI verbose messages to make log more readable.

Use only higher half of device signature to identify device type. Some
devices return incorrect values in lower part confusing detection, while
higher part itself gives enough information for proper detetion.

Increase initial busy waiting time. If drive was hot-plugged, it may need
much time to spin-up.

Disable port hardware on detach. First switch it to slumber mode to
power-down peer transmitter, then disable completely.
Side effect of this is saving about 0.5W of power per detached device.

Reduce soft-reset assertion time from 5ms to 50us.
ATA specification declares minimal reset time of 5us. SATA keeps it, but
requires devices to handle commands transmitted even one by one without
any gap.

Disable port interrupts before doing PHY reset.
PHY reset causes drive connect/disconnect events, unwanted at this moment.

Quite mechanical ch_detach implementations for all atapci subdrivers.
Some dmainit call fixes for previous commit.

As soon as they called in only same one place (ata_pcichannel_attach()),
join allocate() and dmainit() atapci subdriver's channel initialization
methods into single ch_attach() method.

As opposite to ch_attach() add new ch_detach() method to deallocate/disable
channel.

Give atapci knowledge about set of implemented AHCI ports. It is possible
to not allocate them after the recent ata channels enumeration changes.
It allows to save some resources, not bother user with unexisting hardware
and not check unimplemented ports status on every interrupt.

Remove unneeded AND operation. We have already checked that bit is set.

Add workaround for some ATI chips, failing to soft-reset
when port multiplicator supported, but absent.

Tunes to AHCI reset sequences:
- specification claims that 1 second is just a maximum controller reset time;
implement controller reset properly to save almost 1 second of boot, and
about half second of resume time;
- enable channel interrupts only after channel status reset to fix duplicate
device creation on resume due to unwanted device connection event;
- as described in specification, wait for disk ready status after channel
power-up; it is not so important when disk already touched by BIOS, but
solves device not ready problems on resume and probably some other cases.
- uncomment channel stop/start on soft-reset as it is declared mandatory by
specification; it was commented due to some random drive detection problems
on VIA and JMicron controllers, but I hope it is fixed by previous point.

Before modularization commit, atapci driver was attaching only to devices of
storage class. This check was lost. It is not important for the most cases,
but as it was reported on current@, it does important for sis driver and
surely inportant for AHCI driver. So restore it there.

Submitted by: Toshikazu ICHINOSEKI, Andrey V. Elsukov
Discussed on: current@

Improve error handling at ata_ahci_chipinit().

Submitted by: Andrey V. Elsukov

This is the roumored ATA modulerisation works, and it needs a little explanation.

If you just config KERNEL as usual there should be no apparent changes, you'll get all chipset support code compiled in.

However there is now a way to only compile in code for chipsets needed on a pr vendor basis. ATA now has the following "device" entries:

atacore: ATA core functionality, always needed for any ATA setup

atacard: CARDBUS support
atacbus: PC98 cbus support
ataisa: ISA bus support
atapci: PCI bus support only generic chipset support.

ataahci: AHCI support, also pulled in by some vendor modules.

ataacard, ataacerlabs, ataadaptec, ataamd, ataati, atacenatek, atacypress, atacyrix, atahighpoint, ataintel, ataite, atajmicron, atamarvell, atamicron, atanational, atanetcell, atanvidia, atapromise, ataserverworks, atasiliconimage, atasis, atavia; Vendor support, ie atavia for VIA chipsets

atadisk: ATA disk driver
ataraid: ATA softraid driver

atapicd: ATAPI cd/dvd driver
atapifd: ATAPI floppy/flashdisk driver
atapist: ATAPI tape driver

atausb: ATA<>USB bridge
atapicam: ATA<>CAM bridge

This makes it possible to config a kernel with just VIA chipset support by having the following ATA lines in the kernel config file:

device atacore
device atapci
device atavia

And then you need the atadisk, atapicd etc lines in there just as usual.

If you use ATA as modules loaded at boot there is few changes except the rename of the "ata" module to "atacore", things looks just as usual.
However under atapci you now have a whole bunch of vendor specific drivers, that you can kldload individually depending on you needs. Drivers have the same names as used in the kernel config explained above.