Copy stable/10@r272459 to releng/10.1 as part of
the 10.1-RELEASE process.

Approved by: re (implicit)
Sponsored by: The FreeBSD Foundation

MFC r270862, r270878: MMU fixes for kernel startup.

Fix the handling of MMU type in the AP entry code. The ARM_MMU_V6/V7
symbols are always #defined to 0 or 1, so use #if SYM not #if defined(SYM).
Also, it helps if you include the header file that defines the symbols.

The Marvell PJ4B cpu family is armv7, not armv6.

Approved by: re(gjb)

MFC r269390: Fix unwind info in hand-written asm (avoid nested functions).

MFC 265694, 265705, 265784:

Move the mptramp code which is specific to the Marvell ArmadaXP SoC out of
the common locore.S file and into the mv/armadaxp directory.

Consolidate all the AP core startup stuff under a single #ifdef SMP block

Call idcache_inv_all from the AP core entry code before turning on the MMU.
Also, enable instruction and branch caches, which should be safe now that
they're properly initialized/invalidated first.

MFC 262695, 262708, 262709, 262710, 262711, 262728, 262870, 262877, 262880,
262885, 262891, 262903,

imx6: Add a tunable to set the number of active cores, enable SMP by default.

ffec: Fix multicast filtering.

Allwinner a10/a20...
- Add gpio and clock bits for A10/A20's EMAC ethernet controller driver
- EMAC gpio configuration
- EMAC clock activation
- Add Static Random Access Memory controller driver for A10/A20.
A10/A20's SRAM is used by devices, such as CPU, EMAC,
for extra fast memory or as cache.
- Add EMAC 10/100 Ethernet controller driver for A10/A20.
It is available mostly in A10 devices like Hackberry, Marsboard,
Mele A1000, A2000, A100 HTPC, cubieboard1 and A20 device
like cubieboard2.
TX performance can be improved using both channels 0 and 1.
RX performance is poor and needs improvement with the assistance of
external DMA controller in case there
- Add EMAC and SRAM controller entries to FDT.
- Add EMAC device to kernel config files and enable EMAC, SRAM drivers.

OMAP: When calculating the MPU freq, make sure not to overflow.

Vybrid:
- Add driver for Port control and interrupts (PORT).
- Export panel info to DTS
- Reset all the layers before setup first one
- Enable display

nandfs: Slight code reordering to make error branch last.

Add option TMPFS to arm/conf/DEFAULTS, remove it from the few configs
that have it individually. Concensus on freebsd-arm@ is that it should
be included in all ARM kernels.

Fix the arm sys_sigreturn(): its argument is a struct ucontext, not a
struct sigframe containing the struct ucontext.

MFC r262409, r262411, r262413, r262420, r262426, r262427, r262440, r262456,
r262482, r262483, r262531,

Move the declaration for mpentry() into a header file instead of pasting
it into a bunch of different .c files.

If the L2 cache type is PIPT, pass a physical address for a flush.

Actually set the proper bit to indicate TTB shared memory.

Add a new cache maintenance function, idcache_inv_all, to the table, and
implementations for each of the chips we support.

Invalidate caches immediately upon entry to init_secondary(). Also set
the Bufferable bit in the PDE entries of the secondary processor startup
pagetables.

Add the bits needed to run SMP on imx6.

Invalidate the SCU cache tag ram on all 4 cores, not just 1-3.

Minor tweaks to the imx GPT timer

Vybrid enhancements...
- Pin configuration is a complete iomux register now and includes
drive strength, pull mode, mux mode, speed, etc.
- Add i2c devices to the tree
- Add IPG clock
- Add support for Quartz Module.
- Pin configuration is a complete iomux register now and includes
drive strength, pull mode, mux mode, speed, etc.
- Add i2c devices to the tree
- Add IPG clock

MFC r261803, r261808, r261814, r261815, r261816, r261817, r261818, r261826,
r261848, r261855

On armv6 and later, use the WriteNotRead bit of the fault status register
to decide what protections are required by the faulting access.

Use the right symbols for determining arm architecture. Include the
necessary header file which has the new FAULT_WNR symbol defined in it.

Allow the kernel to be loaded at any 1MiB address. This requirement is
because we use the 1MiB section maps as they only need a single pagetable.

Add function for configuring Vybrid PLL4 (Audio) clock frequency output.

imx6 changes ...

- Fix the definition of the SDHCI_STATE_DAT and SDHCI_STATE_CMD fields,
and add SDHCI_RETUNE_REQUEST. None of these are actually used in the
code yet.

- Write translation code for the SDHCI_PRESENT_STATE register.
Freescale moved some bits around in their version of the register,
adjust things so that the sdhci code sees the standard layout.

- Add standard non-removable and cd-gpios properties to the usdhc
devices. That generates references to gpio devices, so uncomment them
even though there isn't a gpio driver to do anything with them yet.

- Add handling of standard "non-removable" property, and also some
workaround code so that if card detect is wired to a gpio pin, for now
we just treat it the same as non-removable (because there isn't a gpio
driver yet).

- Enable both sdcard slots, but not the sdio-based wifi that we don't
yet have a driver for.

- Remove a couple obsolete function declarations.

MFC r261681, r261682, r261683, r261684, r261685, r261686, r261687, r261688,
r261689, r261690, r261783, r261791, r261836, r261837, r261841,

Add FDT matching code to AT91 device drivers.

Better nomatch messages: include compat string. Also, flag devices as
disabled in the successful probe message, but leave what that means to
the actual driver (no semantic changes).

Fix Embest board name and id.

Honor the disabled status by only grabbing resources and returning
when running under FDT in the AT91 SPI driver.

MFC r261643, r261646, r261648, r261649, r261651, r261656, r261657, r261663,
r261676, r261677, r261698, r261778

Consolidate code related to setting up physical memory configuration into
a new physmem.c file.

Replace compile-time constant KERNPHYSADDR with abp_physaddr

Calculate the kernel's load address from the PC in the elf / gzip
trampoline instead of relying on KERNPHYSADDR as a compile-time constant.

It turns out a global variable is the only straightforward way to
communicate the kernel's physical load address from where it's known in
initarm() into cpu_mp_start() which is called from non-arm code and
takes no parameters.

Remove the now unused MMU_INIT macro.

Use vm_paddr_t, not vm_offset_t, when dealing with physical addresses.

No need to set physmem in each initarm() instance anymore, it's handled
in common code now.

Pass the pagetable used from locore.S to initarm to allow it to map data
in as required.

Fix the physmem exclude-region clipping logic for the edge-trim case.

Add some extra debugging output when DEBUG is defined.

Update legacy platforms to use new arm_physmem helper routines.

MFC r261423, r261424, r261516, r261513, r261562, r261563, r261564, r261565,
r261596, r261606

Add the imx sdhci controller.

Move Open Firmware device root on PowerPC, ARM, and MIPS systems to
a sub-node of nexus (ofwbus) rather than direct attach under nexus. This
fixes FDT on x86 and will make coexistence with ACPI on ARM systems easier.
SPARC is unchanged.

Add the missing ')' at end of sentence. Reword it to use a more common idiom.

Pass the kernel physical address to initarm through the boot param struct.

Make functions only used in vfp.c static, and remove vfp_enable.

Fix __syscall on armeb EABI. As it returns a 64-bit value it needs to
place 32-bit data in r1, not r0. 64-bit data is already packed correctly.

Use abp_physaddr for the physical address over KERNPHYSADDR. This helps us
remove the need to load the kernel at a fixed address.

Remove references to PHYSADDR where it's used only in debugging output.

Dynamically generate the page table. This will allow us to detect the
physical address we are loaded at to change the mapping.

MFC r261137, r261393

Correct the alignment of sp through functions that use UNWINDSVCFRAME.

Update all arm code that manipulates the PSR registers to use modern syntax.

MFC r261252, r261279, r261304, r261305, r261322, r261336, r261337, r261338,
r261353

Fix the name of the dts file for the HL201...

When mapping an address, the bsh needs the same offset we do for other things.

Add explicit depends on bus_if.h and device_if.h to avoid a
chicken and egg problem in some compilation environments.

Switch to using PAs rather than VAs for the addresses we map for
devices. This is a nop, except for what's reported by atmelbus for the
resources.

Comment cleanups. Move things around for diff reduction against FDT work.

MFC r261038, r261039, r261040, r261041

Implement generic support for early printf.

MFC r258359, r258742, r258845, r259936, r259640

Apply access flags for managed and unmanaged pages properly on ARMv6/v7

Set the PGA_WRITEABLE flag when the protections indicate write access, not
just when the current access is a write.

Enable missing Access Flag for secondary cores on ARMv6/v7

Add identification and necessary type checks for Krait CPU cores.

MFC r257170, r257171, r257172, r257240, r257278, r257279, r257280, r257281,
r257282, r257332

Wait for DesignWare UART transfers completion before accessing line control

Enable UART busy detection handling for Armada XP - based board

Enable SATA interface on Armada XP
Run mvs SATA driver on Armada XP instead of old mv_sata

Retire arm_remap_nocache() and the data and constants associated with it.

Remove hard-coded mappings related to Armada XP support

Fix-up DTB for Armada XP registers' base according to the actual settings

Change Armada XP kernel load address to the u-boot's end address

Remove not working and deprecated PJ4Bv6 support

Switch off explicit broadcasting of the TLB flush operations for PJ4B CPU

Add missing ARMv6 CPU functions to ARM Makefile

MFC r256628:
Fix a register name typo. The effect was that CPU_CONTROL_AFLT_ENABLE
wasn't being set, but it was almost assuredly already turned on anyway
by the bootloader.

Copy head (r256279) to stable/10 as part of the 10.0-RELEASE cycle.

Approved by: re (implicit)
Sponsored by: The FreeBSD Foundation

Switch to AP[2:1] access permissions model. Store "referenced"
bit in PTE.

Enable Access Flag in CPU control. With AF enabled each valid mapping
needs to have referenced bit in PTE set in order to be able to cache
it in the TLB.

AP[0] bit is to be used as reference flag.
All access permissions are encoded by AP[2:1] wherein AP[1] is in fact
"user enable" and AP[2](APX) is "write disable".

All mappings are always set to be valid. Reference emulation is performed
by setting/clearing reference flag in PTE.

md.pvh_attrs are no longer necessary however pv_flags are still being used
for now.

Marking vm_page as "dirty" or "referenced" is being performed on:
- page or flag fault servicing in pmap_fault_fixup(), basing on the fault
type
- vm_fault servicing in pmap_enter() according to the desired protections
and faulty access type
Redundant page marking has been removed as on ARM we know exactly when the
particular page is referenced or is going to be written.

Submitted by: Zbigniew Bodek <zbb@semihalf.com>
Sponsored by: The FreeBSD Foundation, Semihalf

Correct comment about initial VA=>PA mapping

Properly initialize Armada XP MP subsystem.

- correct setting of Auxiliary Control Register for MP mode
- correct setting of Auxiliarty Debug registers
- cleanup management of memory contains bootup code
- early initialization of Coherency Fabric (MP and not-MP mode)
- enable Snoop Filtering

Obtained from: Semihalf

Insert STOP_UNWINDING directives in the _start (kernel entry point) and
fork_trampoline (thread entry point) assembler routines, because it's
not possible to unwind beyond those points.

Also insert STOP_UNWINDING in the exception_exit routine, to prevent an
unwind-loop at that point. This is just a stopgap until we get around
to instrumenting all assembler functions with proper unwind metadata.

When running on armv6, set alignment checking to modulo-4 mode rather
than modulo-8, because clang emits ldrd and strd instructions for
addresses that are only 4-byte aligned.

Add an END macro to ARM. This is mostly used to tell gas where the bounds
of the functions are when creating the EABI unwind tables.

Ensure the stack is correctly aligned before calling the first C function.

Update sigcode to use both the current ABI and FreeBSD's version of the
ARM EABI syscall calling convention.

The current ABI encodes the syscall number in the instruction. This causes
issues with the thumb mode as it only has 8 bits to encode this value and
we have too many system calls and by using a register will simplify the
code to get the syscall number in the kernel.

With the ARM EABI we reuse the Linux calling convention by storing the
value in r7. Because of this we use both methods to encode the syscall
number in this function.

Replace generic ARM11 option with more specific
support for ARM1136 and ARM1176

Submitted by: Daisuke Aoyama <aoyama at peach.ne.jp>
Obtained from: NetBSD

Do not enable data cache until later in kernel init. Stale bits in
cache might cause erroneus behavior on early stage.

Submitted by: Ian Lepore
Tested on: Atmel, Marvell, and Eyxnos

Merging projects/armv6, part 1

Cummulative patch of changes that are not vendor-specific:
- ARMv6 and ARMv7 architecture support
- ARM SMP support
- VFP/Neon support
- ARM Generic Interrupt Controller driver
- Simplification of startup code for all platforms

Minor rearrangement of the locore <-> initarm interface. Pass in a
structure with the first 4 registers to allow a wider range of boot
loaders to work. Future commits will make use of this to centralize
support for the different loaders.

Remove unused cruft. We call through memcpy more directly when we
need to move the kernel, so we no longer need this.

This comment has become unmoored from the code to which it applies.
Move it back.

Accept r1 as having the metadata pointer argument if r0 is 0.
This provides backward compatibility with Juniper loaders.

Sponsored by: Juniper Networks

Disable interrupts to allow booting on firmware (e.g. U-Boot) that
has interrupts enabled and active.

Obtained from: Juniper Networks, Inc.

Use Oxf0000000 instead of 0xff000000 to guess the physical address, relative
to the virtual one. I may had a reason at some point to use the later, but
can't remember which, and it can leads to issues.

Reported by: Guillaume Ballet <gballet gmail com>

Initial support of loader(8) for ARM machines running U-Boot.

This uses the common U-Boot support lib (sys/boot/uboot, already used on
FreeBSD/powerpc), and assumes the underlying firmware has the modern API for
stand-alone apps enabled in the config (CONFIG_API).

Only netbooting is supported at the moment.

Obtained from: Marvell, Semihalf

One more L2 cache synchronization call that didn't make the previous commit.

Remove some long-dead code

Reviewed by: cognet

ARM locore cosmetics.

Approved by: cognet (mentor)

Fix a comment to reflect the truth.

Spotted out by: Marius Nuennerich <marius.nuennerich AT gmx D0T de>
Approved by: re (blanket)

Erm we can't change the value of arm_memcpy if we're running from flash.
Instead, make memcpy() check if we're running from flash, and avoid
using arm_memcpy if we're doing so.

Teach the kernel and the ELF trampoline how to boot from onboard flash.

Nitsville: the routine is called initarm, not init_arm, correct it in
a comment.

Ooops, I removed the wrong bits.
This unbreak boot from a VA which is different from the PA.

- Disable the instruction cache very early, until it's time to enable it again.
- Revamp the code that jumps from physical to virtual address.

Export the virtual and physical address in which the kernel was loaded,
needed for userland when reading kernel dumps.

fix up white space, I had a simple comment fix, but I might as well do the
rest while I'm here...

MFp4: get the code that set the pc correctly to work, remove a few IQ31244
specific mappings from locore.S, re-organize iq31244_machdep.c to work with
the new locore.S

Spotted out by: jmg

Make sure we can boot both with and without MMU enabled.

Start all license statements with /*-

Use the RET macro.

If we're still running at the physical address, jump to the virtual address
instead before calling initarm().
This removes the need to map virtual == physical in initarm().

Remove dead code.

Map the kernel very early if needed.
Implement sigcode.

Remove filename+line number from panic messages.

Import FreeBSD/arm kernel bits.
It only supports sa1110 (on simics) right now, but xscale support should come
soon.
Some of the initial work has been provided by :
Stephane Potvin <sepotvin at videotron.ca>
Most of this comes from NetBSD.