259065 |
07-Dec-2013 |
gjb |
- Copy stable/10 (r259064) to releng/10.0 as part of the 10.0-RELEASE cycle. - Update __FreeBSD_version [1] - Set branch name to -RC1
[1] 10.0-CURRENT __FreeBSD_version value ended at '55', so start releng/10.0 at '100' so the branch is started with a value ending in zero.
Approved by: re (implicit) Sponsored by: The FreeBSD Foundation |
256281 |
10-Oct-2013 |
gjb |
Copy head (r256279) to stable/10 as part of the 10.0-RELEASE cycle.
Approved by: re (implicit) Sponsored by: The FreeBSD Foundation
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249579 |
17-Apr-2013 |
adrian |
Use the TPC bank by default for AR9160.
Tested:
* AR9160, hostap, verified TX power using (2GHz) spectrum analyser
TODO:
* 5GHz verification!
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242412 |
31-Oct-2012 |
adrian |
Since the PLL changes aren't in here yet for the AR9130 half/quarter rate support, disable it.
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242409 |
31-Oct-2012 |
adrian |
Oops - missing from the last commit - add ANI immunity levels for AR9160.
Obtained from: Qualcomm Atheros
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230147 |
15-Jan-2012 |
adrian |
Break out the "memory" EEPROM data read method from being AR9130 specific to being more generic.
Other embedded SoCs also throw the configuration/PCI register info into flash.
For now I'm just hard-coding the AR9280 option (for on-board AR9220's on AP94 and commercial designs (eg D-Link DIR-825.))
TODO:
* Figure out how to support it for all 11n SoC NICs by doing it in ar5416InitState(); * Don't hard-code the EEPROM size - add another field which is set by the relevant chip initialisation code. * 'owl_eep_start_loc' may need to be overridden in some cases to 0x0. I need to do some further digging.
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226488 |
18-Oct-2011 |
adrian |
Implement the first part of the BB read workaround.
The AR5008/AR9001 series NICs have a bug where BB register reads will occasionally be corrupted. This could cause issues with things such as ANI, which adjust operational parameters based on the BB radio register reads. This was introduced in the AR5008 chip and fixed with the first released AR9002 series NIC (AR9280v2.)
A followup commit will implement the acutal WAR when reading BB registers. I'm still not sure how I'll implement it - whether it should be done in the osdep layer, or whether it should just live in the AR5416 HAL. Either way, they can use this capability bit to determine whether to implement the WAR or not.
Thankyou to various sources inside Atheros who have helped me track down what this particular issue is.
Obtained from: Atheros
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225883 |
30-Sep-2011 |
adrian |
Fix a corner case in the HAL debugging changes, where ah was NULL.
Although I tried to fix this earlier by introducing HALDEBUG_G(), it turns out there seem to be other cases where the pointer value is still NULL.
* Fix DO_HALDEBUG() and the HALDEBUG macro to check whether ah is NULL before deferencing it * Remove HALDEBUG_G() as it's no longer needed
This is hopefully a merge candidate for 9.0-RELEASE as enabling debugging at startup could result in a kernel panic.
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224243 |
21-Jul-2011 |
adrian |
Break out the PLL setup into (mostly) per-chip methods, rather than polluting the AR5416 code with later chipset support.
Note: ar9280InitPLL() supports Merlin (AR9280) and later (AR9285, AR9287.)
Submitted by: ssgriffonuser@gmail.com Approved by: re (kib)
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223466 |
23-Jun-2011 |
adrian |
Re-introduce a global ath_hal_debug again for now, whilst I figure out what to do about the few cases where the HAL state isn't available (regdomain) or isn't yet setup (probe/attach.)
The global ath_hal_debug now affects all instances of the HAL.
This also restores the ability for probe/attach debugging to work; as the sysctl tree may not be attached at that point. Users can just set the global "hw.ath.hal.debug" to a suitable value to enable probe/attach related debugging.
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222584 |
01-Jun-2011 |
adrian |
Add some missing DFS chipset functionality to the FreeBSD HAL.
Please note - this doesn't in any way constitute a full DFS implementation, it merely adds the relevant capability bits and radar detection threshold register access.
The particulars:
* Add new capability bits outlining what the DFS capabilities are of the various chipsets. * Add HAL methods to set and get the radar related register values. * Add AR5212 and AR5416+ DFS radar related register value routines. * Add a missing HAL phy error code that's related to radar event processing. * Add HAL_PHYERR_PARAM, a data type that encapsulates the radar register values.
The AR5212 routines are just for completeness. The AR5416 routines are a super-set of those; I may later on do a drive-by pass to tidy up duplicate code.
Obtained from: Linux, Atheros
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222276 |
25-May-2011 |
adrian |
Tidy up the ANI API in preparation for looking to expose some more of the ANI statistics and committing some tools which use these.
* Change HAL_ANI_* commands _back_ to be numerical, rather than a bitmap; * modify access to the ANI control bitmap to convert a command to a bitmap; * Fix the ANI noise immunity fiddling for CCK errors - it wasn't checking whether noise immunity was disabled or not.
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221603 |
07-May-2011 |
adrian |
Do a HAL capabilities sync pass based on the Atheros HAL.
* Shuffle some of the capability numbers around to match the Atheros HAL capability IDs, just for consistency.
* Add some new capabilities to FreeBSD from the Atheros HAL which will be be shortly used when new chipsets are added (HAL SGI-20 support is for Kiwi/AR9287 support); for TX aggregation (MBSSID aggregate support, WDS aggregation support); CST/GTT support for carrier sense/TX timeout.
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221596 |
07-May-2011 |
adrian |
Read in the extended regulatory domain flags so future code can use them.
These describe FCC/Japan channel and DFS behaviour.
The AR9285 and later chips don't set these bits in the eeprom, the correct behaviour is to just assume all five bits are enabled.
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221163 |
28-Apr-2011 |
adrian |
Introduce AR9130 (HOWL) WMAC support to the FreeBSD HAL.
The AR9130 is an AR9160/AR5416 family WMAC which is glued directly to the AR913x SoC peripheral bus (APB) rather than via a PCI/PCIe bridge.
The specifics:
* A new build option is required to use the AR9130 - AH_SUPPORT_AR9130. This is needed due to the different location the RTC registers live with this chip; hopefully this will be undone in the future. This does currently mean that enabling this option will break non-AR9130 builds, so don't enable it unless you're specifically building an image for the AR913x SoC.
* Add the new probe, attach, EEPROM and PLL methods specific to Howl.
* Add a work-around to ah_eeprom_v14.c which disables some of the checks for endian-ness and magic in the EEPROM image if an eepromdata block is provided. This'll be fixed at a later stage by porting the ath9k probe code and making sure it doesn't break in other setups (which my previous attempt at this did.)
* Sprinkle Howl modifications throughput the interrupt path - it doesn't implement the SYNC interrupt registers, so ignore those.
* Sprinkle Howl chip powerup/down throughout the reset path; the RTC methods were
* Sprinkle some other Howl workarounds in the reset path.
* Hard-code an alternative setup for the AR_CFG register for Howl, that sets up things suitable for Big-Endian MIPS (which is the only platform this chip is glued to.)
This has been tested on the AR913x based TP-Link WR-1043nd mode, in legacy, HT/20 and HT/40 modes.
Caveats:
* 2ghz has only been tested. I've not seen any 5ghz radios glued to this chipset so I can't test it.
* AR5416_INTERRUPT_MITIGATION is not supported on the AR9130. At least, it isn't implemented in ath9k. Please don't enable this.
* This hasn't been tested in MBSS mode or in RX/TX block-aggregation mode.
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220293 |
03-Apr-2011 |
adrian |
Add an explanation of the inivals
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219979 |
25-Mar-2011 |
adrian |
Flip ANI on for the AR5416 and later chips. I haven't verified it on the AR9285 so I'll leave it off for that.
Ath9k sources indiciate that one of the ANI modes interferes with RIFS detection, so match ath9k and disable that.
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219852 |
22-Mar-2011 |
adrian |
Even though it's very unlikely the misc mode register setting at -attach- would be a problem, make sure it isn't overwritten by whatever is in there at cold reset.
This brings the > ar5416 init path treatment of AR_MISC_MODE.
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218183 |
02-Feb-2011 |
adrian |
Call the correct ANI Attach routine.
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218150 |
01-Feb-2011 |
adrian |
Add a new capability which reports the number of spatial streams a device supports.
The higher levels (net80211, if_ath, ath_rate) need this to make correct choices about what MCS capabilities to advertise and what MCS rates are able to be TXed.
In summary:
* AR5416 - 2/3 antennas, 2x2 streams * AR9160 - 2/3 antennas, 2x2 streams * AR9220 - 2 antennas, 2x2 sstraems * AR9280 - 2 antennas, 2x2 streams * AR9285 - 2 antennas but with antenna diversity, 1x1 stream
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218068 |
29-Jan-2011 |
adrian |
Bring over some NF calibration changes from ath9k.
Each different radio chipset has a different "good" range of CCA (clear channel access) parameters where, if you write something out of range, it's possible the radio will go deaf.
Also, since apparently occasionally reading the NF calibration returns "wrong" values, so enforce those limits on what is being written into the CCA register.
Write a default value if there's no history available.
This isn't the case right now but it may be later on when "off-channel" scanning occurs without init'ing or changing the NF history buffer. (As each channel may have a different noise floor; so scanning or other off-channel activity shouldn't affect the NF history of the current channel.)
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217631 |
20-Jan-2011 |
adrian |
Push the non-AR5416 related stuff into chipset specific directories.
sys/dev/ath/ath_hal/ar5416/ is getting very crowded and further commits will make it even more crowded. Now is a good time to shuffle these files out before any more extensive work is done on them.
Create an ar9003 directory whilst I'm here; ar9003 specific chipset code will eventually live there.
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