- Copy stable/10 (r259064) to releng/10.0 as part of the
10.0-RELEASE cycle.
- Update __FreeBSD_version [1]
- Set branch name to -RC1

[1] 10.0-CURRENT __FreeBSD_version value ended at '55', so
start releng/10.0 at '100' so the branch is started with
a value ending in zero.

Approved by: re (implicit)
Sponsored by: The FreeBSD Foundation

Copy head (r256279) to stable/10 as part of the 10.0-RELEASE cycle.

Approved by: re (implicit)
Sponsored by: The FreeBSD Foundation

Rename device vfp to option VFP and retire the ARM_VFP_SUPPORT option. This
simplifies enabling as previously both options were required to be enabled,
now we only need a single option.

While here enable VFP on the PandaBoard.

Remove the ARMFPE option. It is unsupported, and appears to be broken as
arm_fpe_core_changecontext is not a function.

Port the new PV entry allocator from amd64/i386/mips to armv6/v7.

PV entries are now roughly half the size.
Instead of using a shared UMA zone for 28 byte pv entries
(two 8-byte tailq nodes, a 4 byte pointer, a 4 byte address and 4 byte
flags), we allocate a page at a time per process.
This provides 252 pv entries per process (actually, per pmap address space)
and eliminates one of the 8-byte tailq entries since we now can track
per-process pv entries implicitly.
The pointer to the pmap can be eliminated by doing address arithmetic to
find the metadata on the page headers to find a single pointer shared by
all 252 entries. There is an 8-int bitmap for the freelist of those 252
entries.
When in serious low memory condition, allocation of another pv_chunk is
possible by freeing some pages in pmap_pv_reclaim().

Added pv_entry/pv_chunk related statistics to pmap.
pv_entry/pv_chunk statistics can be accessed via sysctl vm.pmap.

Ported PTE freelist of KVA allocation and maintenance from i386.
Using an idea from Stephan Uphoff, use the empty pte's that correspond
to the unused kva in the pv memory block to thread a freelist through.
This allows us to free pages that used to be used for pv entry chunks
since we can now track holes in the kva memory block.

As both ARM pmap.c and pmap-v6.c use the same header and pv_entry, pmap and
md_page structures are different, it was needed to separate code designed
for ARMv6/7 from the one for other ARMs.

Submitted by: Zbigniew Bodek <zbb@semihalf.com>
Reviewed by: alc
Sponsored by: The FreeBSD Foundation, Semihalf

Replace generic ARM11 option with more specific
support for ARM1136 and ARM1176

Submitted by: Daisuke Aoyama <aoyama at peach.ne.jp>
Obtained from: NetBSD

Piggyback MIPS changes and add ARM syscons support for devices with
framebuffer

While here - sort #if defined() order alphabetically

Merging projects/armv6, part 1

Cummulative patch of changes that are not vendor-specific:
- ARMv6 and ARMv7 architecture support
- ARM SMP support
- VFP/Neon support
- ARM Generic Interrupt Controller driver
- Simplification of startup code for all platforms

Create a generic way to support multiple boards within an
arm platform. Add all the atmel boards to the ATMEL kernel for
testing purposes. Until boot loader arg parsing of baord type
is done, this won't actually be able to do the runtime selection.

These options are unused, and can safely be retired.

Add support for parsing Linux ATAGs such as you'd see from uboot or
redboot. Support is very preiminary and likely needs some work. Also,
do some minor code shuffling of the FreeBSD /boot/loader metadata
parsing code. This code is preliminary and should be used with
caution.

Create default_parse_boot_param which, if FreeBSD /boot/loader support
is enabled, sets values based on the metadata passed in. Otherwise
fake_preload_metadata is called. Change the default parse_boot_param
to default_parse_boot_param. Enable this functionality only on the mv
platform, which is where most of the code is from.

Reviewed by: cognet, Ian Lapore

Eliminate the now-unused AT91C_MASTER_CLOCK option and change the one
place in the source it was used to the more correct AT91C_MAIN_CLOCK.
Sort AT91C_MAIN_CLOCK into a better location in the options.arm file.

- Add new ARM kernel option QEMU_WORKAROUNDS which can be
used in the code which needs to implement some specific
behaviour when being run under QEMU.
- Make PXA UART probe code to work under QEMU gumstix, which
doesn't emulate all the ports properly.

Add options I missed in the additionnal AT91 support commits.

Submitted by: Greg Ansley

Now that we are fully FDT-driven on MRVL platforms, remove PHYSMEM_SIZE option.

Convert Marvell ARM platforms to FDT convention.

The following systems are involved:

- DB-88F5182
- DB-88F5281
- DB-88F6281
- DB-78100
- SheevaPlug

This overhaul covers the following major changes:

- All integrated peripherals drivers for Marvell ARM SoC, which are
currently in the FreeBSD source tree are reworked and adjusted so they
derive config data out of the device tree blob (instead of hard coded /
tabelarized values).

- Since the common FDT infrastrucutre (fdtbus, simplebus) is used we say
good by to obio / mbus drivers and numerous hard-coded config data.

Note that world needs to be built WITH_FDT for the affected platforms.

Reviewed by: imp
Sponsored by: The FreeBSD Foundation.

Add support for FA626TE.
Tested on GM8181 development board.

Add support for Cavium Econa CNS11XX ARM boards. These boards were
previously know by StarSemi STR9104.

Tested by the submitter on an Emprex NSD-100 board.

Submitted by: Yohanes Nugroho <yohanes at gmail.com>
Reviewed by: freebsd-arm, stas
Obtained from: //depot/projects/str91xx/...

Introduce MII_ADDR_BASE option on ARM, which allows to override the default
per platform requirements.

Notes:
- Only used by mge(4) at the moment.

- This is very simplified approach and should be replaced by some long-term
solution for managing the board/platform configuration (among others the
MAC-PHY binding info).

Submitted by: Michal Hajduk
Obtained from: Semihalf

add IXP4XX_FLASH_SIZE config knob that can be used to override the default
flash size; this is necessary at the moment because we map all of flash at
boot, eventually we'll do this on the fly

Merge support for Gateworks Cambria boards:
o add support for IXP435 cpu's (e.g. 64 irq's)
o add support for Cambria-specific devices: npe, led's (front panel and
octal latch), ehci, mcu, ide cf
o redo memory mapping for xscale/ixp4xx boards: previously memory
was assumed aliased to 0x10000000 but this appears to be true only
for ixp425 systems and breaks operation on others; rework so memory
is assumed to start at 0
o rework NPE configuration support to use NPE id's instead of port #'s;
these changes also rename the associated MAC's to follow the NPE's
they are attached to
o update npe firmware to latest rev (same license) and update default fw
imageid's to match; in particular this adds NPE-A and crypto support
o re-style NPE fw handling code and add a console msg identifying the
attributes of the loaded fw
o fix numerous problems with handling failures during npe setup
o fix npe rx q setup; need to spin waiting for mailbox responses during
early boot stages as qmgr interrupts are not delivered; this fixes
the problem where all 8 traffic classifications were not tied to the
rx q (and eliminates the console msg "remember to fix rx q setup")
o add DELAY to npe MII wait logic for IXP435
o strip down builtin phys->virt address translation table in resource
handling to just those resources that require it and add a console msg
to alert people when this (kludge) table needs to be extended
o purge a bunch of dead netbsd-ism's
o cleanup avila led driver
o add Cambria support to boot2 and rework code for better multi-board support

Notes:
1. NPE-A doesn't work and causes NPE-C to stop working; it is disabled
in the hints
2. USB isn't working yet; controller communicates ok but device
discovery fails
3. Cambria support must be configured separately from IXP425 boards;
multi-board support is TBD

Sponsored by: Hobnob, Gateworks (board donation)
Reviewed by: imp

- Obtain main clock frequency dynamically based on CKGR_MCFR register
contents.
- It is possible to override the dynamic configuration by using
AT91C_MAIN_CLOCK option in kernel config.

PR: arm/128961 (based on)
Submitted by: Bjorn Konig <bkoenig@alpha-tierchen.de>
Reviewed by: imp
Approved by: kib (mentor, implicit)

Introduce basic support for Marvell families of system-on-chip ARM devices:

* Orion
- 88F5181
- 88F5182
- 88F5281

* Kirkwood
- 88F6281

* Discovery
- MV78100

The above families of SOCs are built around CPU cores compliant with ARMv5TE
instruction set architecture definition. They share a number of integrated
peripherals. This commit brings support for the following basic elements:

* GPIO
* Interrupt controller
* L1, L2 cache
* Timers, watchdog, RTC
* TWSI (I2C)
* UART

Other peripherals drivers will be introduced separately.

Reviewed by: imp, marcel, stass (Thanks guys!)
Obtained from: Marvell, Semihalf

Support for the XScale PXA255 SoC as found on the Gumstix Basix and Connex
boards. This is enough to net-boot to multiuser.

Also supported is the SMSC LAN91C111 parts used on the netCF, netDUO and netMMC
add-on boards.

I'll be putting some instructions on how to boot this on the Gumstix boards
online soon.

This is still fairly rough and will be refined over time but I felt it was
better to get this out there where other people can help out.

Add CPU_ARM9E

Add an option to be able to override the value of the AT91 master clock
frequency. It'd be better to be able to calculate it at runtime, but we need
the information very early, to setup the uart.

Add CPU_XSCALE_81342 before I forget again.

Add two new options, FLASHADDR, which defines the address the flash is
mapped at, and LOADERRAMADDR, the address at which the loader maps the ram at
at the time the kernel is booted.
They are used to detect if the kernel is booted from the onboard flash.
Define those for the IQ31244

MFp4: add BWCT kernel configuration

add CPU_XSCALE_IXP425

Reviewed by: cognet, imp
MFC after: 1 month

Finally bring it support for the i80219 XScale processor.

Submitted by: Max M. Boyarov <m.boyarov bsd by>

Rewrite ARM_USE_SMALL_ALLOC so that instead of the current behavior, it maps
whole the physical memory, cached, using 1MB section mappings. This reduces
the address space available for user processes a bit, but given the amount of
memory a typical arm machine has, it is not (yet) a big issue.
It then provides a uma_small_alloc() that works as it does for architectures
which have a direct mapping.

For the moment, make board configuration a compile time option. This
saves space in the final kernel, but at the expense of flexibility to
boot the same kernel accross a family of boards.

Convert the last offender, the SA1110 port, to ARM32_NEW_VM_LAYOUT, and
completely nuke the !ARM32_NEW_VM_LAYOUT case.

Make VERBOSE_INIT_ARM compile by fixing various printf formats, and add it
as an option.

Submitted by: Max N. Boyarov <m.boyarov at bsd dot by>

Resurrect Skyeye support :
Add a new option, SKYEYE_WORKAROUNDS, which as the name suggests adds
workarounds for things skyeye doesn't simulate. Specifically :
- Use USART0 instead of DBGU as the console, make it not use DMA, and manually provoke an interrupt when we're done in the transmit function.
- Skyeye maintains an internal counter for clock, but apparently there's
no way to access it, so hack the timecounter code to return a value which
is increased at every clock interrupts. This is gross, but I didn't find a
better way to implement timecounters without hacking Skyeye to get the
counter value.
- Force the write-back of PTEs once we're done writing them, even if they
are supposed to be write-through. I don't know why I have to do that.

Add a new option, XSCALE_DISABLE_CCNT, to not use the xscale ccnt as a
timecounter (because gxemul doesn't emule it yet).

The IQ80321 clock is 200MHz, but the IQ80321 is 198MHz, so add a kernel option
to override the frequency

Add ARM_USE_SMALL_ALLOC.

Add a new option, ARM_CACHE_LOCK_ENABLE (I forgot it in my last commit).

Add a new option, ARM32_NEW_VM_LAYOUT. When set, we try to put up to 4
L2 tables in one page, instead of the old 1 L2 table <=> 1 page behavior.
While I'm there, add ARM9_CACHE_WRITE_THROUGH, which I forgot last time.

Add new options :
PHYSADDR : Address of the physical memory
KERNPHYSADDR : Physical address where the kernel starts
KERNVIRTADDR : Virtual address of the kernel
STARTUP_PAGETABLE_ADDR : Where to put the page table at bootstrap
+ Xscale specific options

Add config magic for arm.