1/* Copyright (c) 2018 The Chromium OS Authors. All rights reserved. 2 * Use of this source code is governed by a BSD-style license that can be 3 * found in the LICENSE file. 4 */ 5 6/* Host communication command constants for Chrome EC */ 7 8#ifndef __CROS_EC_COMMANDS_H 9#define __CROS_EC_COMMANDS_H 10 11/* 12 * Protocol overview 13 * 14 * request: CMD [ P0 P1 P2 ... Pn S ] 15 * response: ERR [ P0 P1 P2 ... Pn S ] 16 * 17 * where the bytes are defined as follow : 18 * - CMD is the command code. (defined by EC_CMD_ constants) 19 * - ERR is the error code. (defined by EC_RES_ constants) 20 * - Px is the optional payload. 21 * it is not sent if the error code is not success. 22 * (defined by ec_params_ and ec_response_ structures) 23 * - S is the checksum which is the sum of all payload bytes. 24 * 25 * On LPC, CMD and ERR are sent/received at EC_LPC_ADDR_KERNEL|USER_CMD 26 * and the payloads are sent/received at EC_LPC_ADDR_KERNEL|USER_PARAM. 27 * On I2C, all bytes are sent serially in the same message. 28 */ 29 30/* 31 * Current version of this protocol 32 * 33 * TODO(crosbug.com/p/11223): This is effectively useless; protocol is 34 * determined in other ways. Remove this once the kernel code no longer 35 * depends on it. 36 */ 37#define EC_PROTO_VERSION 0x00000002 38 39/* Command version mask */ 40#define EC_VER_MASK(version) (1UL << (version)) 41 42/* I/O addresses for ACPI commands */ 43#define EC_LPC_ADDR_ACPI_DATA 0x62 44#define EC_LPC_ADDR_ACPI_CMD 0x66 45 46/* I/O addresses for host command */ 47#define EC_LPC_ADDR_HOST_DATA 0x200 48#define EC_LPC_ADDR_HOST_CMD 0x204 49 50/* I/O addresses for host command args and params */ 51/* Protocol version 2 */ 52#define EC_LPC_ADDR_HOST_ARGS 0x800 /* And 0x801, 0x802, 0x803 */ 53#define EC_LPC_ADDR_HOST_PARAM 0x804 /* For version 2 params; size is 54 * EC_PROTO2_MAX_PARAM_SIZE */ 55/* Protocol version 3 */ 56#define EC_LPC_ADDR_HOST_PACKET 0x800 /* Offset of version 3 packet */ 57#define EC_LPC_HOST_PACKET_SIZE 0x100 /* Max size of version 3 packet */ 58 59/* The actual block is 0x800-0x8ff, but some BIOSes think it's 0x880-0x8ff 60 * and they tell the kernel that so we have to think of it as two parts. */ 61#define EC_HOST_CMD_REGION0 0x800 62#define EC_HOST_CMD_REGION1 0x880 63#define EC_HOST_CMD_REGION_SIZE 0x80 64 65/* EC command register bit functions */ 66#define EC_LPC_CMDR_DATA (1 << 0) /* Data ready for host to read */ 67#define EC_LPC_CMDR_PENDING (1 << 1) /* Write pending to EC */ 68#define EC_LPC_CMDR_BUSY (1 << 2) /* EC is busy processing a command */ 69#define EC_LPC_CMDR_CMD (1 << 3) /* Last host write was a command */ 70#define EC_LPC_CMDR_ACPI_BRST (1 << 4) /* Burst mode (not used) */ 71#define EC_LPC_CMDR_SCI (1 << 5) /* SCI event is pending */ 72#define EC_LPC_CMDR_SMI (1 << 6) /* SMI event is pending */ 73 74/* MEC uses 0x800/0x804 as register/index pair, thus an 8-byte resource */ 75#define MEC_EMI_BASE 0x800 76#define MEC_EMI_SIZE 8 77 78#define EC_LPC_ADDR_MEMMAP 0x900 79#define EC_MEMMAP_SIZE 255 /* ACPI IO buffer max is 255 bytes */ 80#define EC_MEMMAP_TEXT_MAX 8 /* Size of a string in the memory map */ 81 82/* The offset address of each type of data in mapped memory. */ 83#define EC_MEMMAP_TEMP_SENSOR 0x00 /* Temp sensors 0x00 - 0x0f */ 84#define EC_MEMMAP_FAN 0x10 /* Fan speeds 0x10 - 0x17 */ 85#define EC_MEMMAP_TEMP_SENSOR_B 0x18 /* More temp sensors 0x18 - 0x1f */ 86#define EC_MEMMAP_ID 0x20 /* 0x20 == 'E', 0x21 == 'C' */ 87#define EC_MEMMAP_ID_VERSION 0x22 /* Version of data in 0x20 - 0x2f */ 88#define EC_MEMMAP_THERMAL_VERSION 0x23 /* Version of data in 0x00 - 0x1f */ 89#define EC_MEMMAP_BATTERY_VERSION 0x24 /* Version of data in 0x40 - 0x7f */ 90#define EC_MEMMAP_SWITCHES_VERSION 0x25 /* Version of data in 0x30 - 0x33 */ 91#define EC_MEMMAP_EVENTS_VERSION 0x26 /* Version of data in 0x34 - 0x3f */ 92#define EC_MEMMAP_HOST_CMD_FLAGS 0x27 /* Host cmd interface flags (8 bits) */ 93/* Unused 0x28 - 0x2f */ 94#define EC_MEMMAP_SWITCHES 0x30 /* 8 bits */ 95/* Unused 0x31 - 0x33 */ 96#define EC_MEMMAP_HOST_EVENTS 0x34 /* 32 bits */ 97/* Reserve 0x38 - 0x3f for additional host event-related stuff */ 98/* Battery values are all 32 bits */ 99#define EC_MEMMAP_BATT_VOLT 0x40 /* Battery Present Voltage */ 100#define EC_MEMMAP_BATT_RATE 0x44 /* Battery Present Rate */ 101#define EC_MEMMAP_BATT_CAP 0x48 /* Battery Remaining Capacity */ 102#define EC_MEMMAP_BATT_FLAG 0x4c /* Battery State, defined below */ 103#define EC_MEMMAP_BATT_DCAP 0x50 /* Battery Design Capacity */ 104#define EC_MEMMAP_BATT_DVLT 0x54 /* Battery Design Voltage */ 105#define EC_MEMMAP_BATT_LFCC 0x58 /* Battery Last Full Charge Capacity */ 106#define EC_MEMMAP_BATT_CCNT 0x5c /* Battery Cycle Count */ 107/* Strings are all 8 bytes (EC_MEMMAP_TEXT_MAX) */ 108#define EC_MEMMAP_BATT_MFGR 0x60 /* Battery Manufacturer String */ 109#define EC_MEMMAP_BATT_MODEL 0x68 /* Battery Model Number String */ 110#define EC_MEMMAP_BATT_SERIAL 0x70 /* Battery Serial Number String */ 111#define EC_MEMMAP_BATT_TYPE 0x78 /* Battery Type String */ 112#define EC_MEMMAP_ALS 0x80 /* ALS readings in lux (2 X 16 bits) */ 113/* Unused 0x84 - 0x8f */ 114#define EC_MEMMAP_ACC_STATUS 0x90 /* Accelerometer status (8 bits )*/ 115/* Unused 0x91 */ 116#define EC_MEMMAP_ACC_DATA 0x92 /* Accelerometers data 0x92 - 0x9f */ 117/* 0x92: Lid Angle if available, LID_ANGLE_UNRELIABLE otherwise */ 118/* 0x94 - 0x99: 1st Accelerometer */ 119/* 0x9a - 0x9f: 2nd Accelerometer */ 120#define EC_MEMMAP_GYRO_DATA 0xa0 /* Gyroscope data 0xa0 - 0xa5 */ 121/* Unused 0xa6 - 0xdf */ 122 123/* 124 * ACPI is unable to access memory mapped data at or above this offset due to 125 * limitations of the ACPI protocol. Do not place data in the range 0xe0 - 0xfe 126 * which might be needed by ACPI. 127 */ 128#define EC_MEMMAP_NO_ACPI 0xe0 129 130/* Define the format of the accelerometer mapped memory status byte. */ 131#define EC_MEMMAP_ACC_STATUS_SAMPLE_ID_MASK 0x0f 132#define EC_MEMMAP_ACC_STATUS_BUSY_BIT (1 << 4) 133#define EC_MEMMAP_ACC_STATUS_PRESENCE_BIT (1 << 7) 134 135/* Number of temp sensors at EC_MEMMAP_TEMP_SENSOR */ 136#define EC_TEMP_SENSOR_ENTRIES 16 137/* 138 * Number of temp sensors at EC_MEMMAP_TEMP_SENSOR_B. 139 * 140 * Valid only if EC_MEMMAP_THERMAL_VERSION returns >= 2. 141 */ 142#define EC_TEMP_SENSOR_B_ENTRIES 8 143 144/* Special values for mapped temperature sensors */ 145#define EC_TEMP_SENSOR_NOT_PRESENT 0xff 146#define EC_TEMP_SENSOR_ERROR 0xfe 147#define EC_TEMP_SENSOR_NOT_POWERED 0xfd 148#define EC_TEMP_SENSOR_NOT_CALIBRATED 0xfc 149/* 150 * The offset of temperature value stored in mapped memory. This allows 151 * reporting a temperature range of 200K to 454K = -73C to 181C. 152 */ 153#define EC_TEMP_SENSOR_OFFSET 200 154 155/* 156 * Number of ALS readings at EC_MEMMAP_ALS 157 */ 158#define EC_ALS_ENTRIES 2 159 160/* 161 * The default value a temperature sensor will return when it is present but 162 * has not been read this boot. This is a reasonable number to avoid 163 * triggering alarms on the host. 164 */ 165#define EC_TEMP_SENSOR_DEFAULT (296 - EC_TEMP_SENSOR_OFFSET) 166 167#define EC_FAN_SPEED_ENTRIES 4 /* Number of fans at EC_MEMMAP_FAN */ 168#define EC_FAN_SPEED_NOT_PRESENT 0xffff /* Entry not present */ 169#define EC_FAN_SPEED_STALLED 0xfffe /* Fan stalled */ 170 171/* Battery bit flags at EC_MEMMAP_BATT_FLAG. */ 172#define EC_BATT_FLAG_AC_PRESENT 0x01 173#define EC_BATT_FLAG_BATT_PRESENT 0x02 174#define EC_BATT_FLAG_DISCHARGING 0x04 175#define EC_BATT_FLAG_CHARGING 0x08 176#define EC_BATT_FLAG_LEVEL_CRITICAL 0x10 177 178/* Switch flags at EC_MEMMAP_SWITCHES */ 179#define EC_SWITCH_LID_OPEN 0x01 180#define EC_SWITCH_POWER_BUTTON_PRESSED 0x02 181#define EC_SWITCH_WRITE_PROTECT_DISABLED 0x04 182/* Was recovery requested via keyboard; now unused. */ 183#define EC_SWITCH_IGNORE1 0x08 184/* Recovery requested via dedicated signal (from servo board) */ 185#define EC_SWITCH_DEDICATED_RECOVERY 0x10 186/* Was fake developer mode switch; now unused. Remove in next refactor. */ 187#define EC_SWITCH_IGNORE0 0x20 188 189/* Host command interface flags */ 190/* Host command interface supports LPC args (LPC interface only) */ 191#define EC_HOST_CMD_FLAG_LPC_ARGS_SUPPORTED 0x01 192/* Host command interface supports version 3 protocol */ 193#define EC_HOST_CMD_FLAG_VERSION_3 0x02 194 195/* Wireless switch flags */ 196#define EC_WIRELESS_SWITCH_ALL ~0x00 /* All flags */ 197#define EC_WIRELESS_SWITCH_WLAN 0x01 /* WLAN radio */ 198#define EC_WIRELESS_SWITCH_BLUETOOTH 0x02 /* Bluetooth radio */ 199#define EC_WIRELESS_SWITCH_WWAN 0x04 /* WWAN power */ 200#define EC_WIRELESS_SWITCH_WLAN_POWER 0x08 /* WLAN power */ 201 202/*****************************************************************************/ 203/* 204 * ACPI commands 205 * 206 * These are valid ONLY on the ACPI command/data port. 207 */ 208 209/* 210 * ACPI Read Embedded Controller 211 * 212 * This reads from ACPI memory space on the EC (EC_ACPI_MEM_*). 213 * 214 * Use the following sequence: 215 * 216 * - Write EC_CMD_ACPI_READ to EC_LPC_ADDR_ACPI_CMD 217 * - Wait for EC_LPC_CMDR_PENDING bit to clear 218 * - Write address to EC_LPC_ADDR_ACPI_DATA 219 * - Wait for EC_LPC_CMDR_DATA bit to set 220 * - Read value from EC_LPC_ADDR_ACPI_DATA 221 */ 222#define EC_CMD_ACPI_READ 0x0080 223 224/* 225 * ACPI Write Embedded Controller 226 * 227 * This reads from ACPI memory space on the EC (EC_ACPI_MEM_*). 228 * 229 * Use the following sequence: 230 * 231 * - Write EC_CMD_ACPI_WRITE to EC_LPC_ADDR_ACPI_CMD 232 * - Wait for EC_LPC_CMDR_PENDING bit to clear 233 * - Write address to EC_LPC_ADDR_ACPI_DATA 234 * - Wait for EC_LPC_CMDR_PENDING bit to clear 235 * - Write value to EC_LPC_ADDR_ACPI_DATA 236 */ 237#define EC_CMD_ACPI_WRITE 0x0081 238 239/* 240 * ACPI Burst Enable Embedded Controller 241 * 242 * This enables burst mode on the EC to allow the host to issue several 243 * commands back-to-back. While in this mode, writes to mapped multi-byte 244 * data are locked out to ensure data consistency. 245 */ 246#define EC_CMD_ACPI_BURST_ENABLE 0x0082 247 248/* 249 * ACPI Burst Disable Embedded Controller 250 * 251 * This disables burst mode on the EC and stops preventing EC writes to mapped 252 * multi-byte data. 253 */ 254#define EC_CMD_ACPI_BURST_DISABLE 0x0083 255 256/* 257 * ACPI Query Embedded Controller 258 * 259 * This clears the lowest-order bit in the currently pending host events, and 260 * sets the result code to the 1-based index of the bit (event 0x00000001 = 1, 261 * event 0x80000000 = 32), or 0 if no event was pending. 262 */ 263#define EC_CMD_ACPI_QUERY_EVENT 0x0084 264 265/* Valid addresses in ACPI memory space, for read/write commands */ 266 267/* Memory space version; set to EC_ACPI_MEM_VERSION_CURRENT */ 268#define EC_ACPI_MEM_VERSION 0x00 269/* 270 * Test location; writing value here updates test compliment byte to (0xff - 271 * value). 272 */ 273#define EC_ACPI_MEM_TEST 0x01 274/* Test compliment; writes here are ignored. */ 275#define EC_ACPI_MEM_TEST_COMPLIMENT 0x02 276 277/* Keyboard backlight brightness percent (0 - 100) */ 278#define EC_ACPI_MEM_KEYBOARD_BACKLIGHT 0x03 279/* DPTF Target Fan Duty (0-100, 0xff for auto/none) */ 280#define EC_ACPI_MEM_FAN_DUTY 0x04 281 282/* 283 * DPTF temp thresholds. Any of the EC's temp sensors can have up to two 284 * independent thresholds attached to them. The current value of the ID 285 * register determines which sensor is affected by the THRESHOLD and COMMIT 286 * registers. The THRESHOLD register uses the same EC_TEMP_SENSOR_OFFSET scheme 287 * as the memory-mapped sensors. The COMMIT register applies those settings. 288 * 289 * The spec does not mandate any way to read back the threshold settings 290 * themselves, but when a threshold is crossed the AP needs a way to determine 291 * which sensor(s) are responsible. Each reading of the ID register clears and 292 * returns one sensor ID that has crossed one of its threshold (in either 293 * direction) since the last read. A value of 0xFF means "no new thresholds 294 * have tripped". Setting or enabling the thresholds for a sensor will clear 295 * the unread event count for that sensor. 296 */ 297#define EC_ACPI_MEM_TEMP_ID 0x05 298#define EC_ACPI_MEM_TEMP_THRESHOLD 0x06 299#define EC_ACPI_MEM_TEMP_COMMIT 0x07 300/* 301 * Here are the bits for the COMMIT register: 302 * bit 0 selects the threshold index for the chosen sensor (0/1) 303 * bit 1 enables/disables the selected threshold (0 = off, 1 = on) 304 * Each write to the commit register affects one threshold. 305 */ 306#define EC_ACPI_MEM_TEMP_COMMIT_SELECT_MASK (1 << 0) 307#define EC_ACPI_MEM_TEMP_COMMIT_ENABLE_MASK (1 << 1) 308/* 309 * Example: 310 * 311 * Set the thresholds for sensor 2 to 50 C and 60 C: 312 * write 2 to [0x05] -- select temp sensor 2 313 * write 0x7b to [0x06] -- C_TO_K(50) - EC_TEMP_SENSOR_OFFSET 314 * write 0x2 to [0x07] -- enable threshold 0 with this value 315 * write 0x85 to [0x06] -- C_TO_K(60) - EC_TEMP_SENSOR_OFFSET 316 * write 0x3 to [0x07] -- enable threshold 1 with this value 317 * 318 * Disable the 60 C threshold, leaving the 50 C threshold unchanged: 319 * write 2 to [0x05] -- select temp sensor 2 320 * write 0x1 to [0x07] -- disable threshold 1 321 */ 322 323/* DPTF battery charging current limit */ 324#define EC_ACPI_MEM_CHARGING_LIMIT 0x08 325 326/* Charging limit is specified in 64 mA steps */ 327#define EC_ACPI_MEM_CHARGING_LIMIT_STEP_MA 64 328/* Value to disable DPTF battery charging limit */ 329#define EC_ACPI_MEM_CHARGING_LIMIT_DISABLED 0xff 330 331/* 332 * Report device orientation 333 * bit 0 device is tablet mode 334 */ 335#define EC_ACPI_MEM_DEVICE_ORIENTATION 0x09 336#define EC_ACPI_MEM_DEVICE_TABLET_MODE 0x01 337 338/* 339 * ACPI addresses 0x20 - 0xff map to EC_MEMMAP offset 0x00 - 0xdf. This data 340 * is read-only from the AP. Added in EC_ACPI_MEM_VERSION 2. 341 */ 342#define EC_ACPI_MEM_MAPPED_BEGIN 0x20 343#define EC_ACPI_MEM_MAPPED_SIZE 0xe0 344 345/* Current version of ACPI memory address space */ 346#define EC_ACPI_MEM_VERSION_CURRENT 2 347 348 349/* 350 * This header file is used in coreboot both in C and ACPI code. The ACPI code 351 * is pre-processed to handle constants but the ASL compiler is unable to 352 * handle actual C code so keep it separate. 353 */ 354#ifndef __ACPI__ 355 356/* 357 * Define __packed if someone hasn't beat us to it. Linux kernel style 358 * checking prefers __packed over __attribute__((packed)). 359 */ 360#ifndef __packed 361#define __packed __attribute__((packed)) 362#endif 363 364#ifndef __aligned 365#define __aligned(x) __attribute__((aligned(x))) 366#endif 367 368/* 369 * Attributes for EC request and response packets. Just defining __packed 370 * results in inefficient assembly code on ARM, if the structure is actually 371 * 32-bit aligned, as it should be for all buffers. 372 * 373 * Be very careful when adding these to existing structures. They will round 374 * up the structure size to the specified boundary. 375 * 376 * Also be very careful to make that if a structure is included in some other 377 * parent structure that the alignment will still be true given the packing of 378 * the parent structure. This is particularly important if the sub-structure 379 * will be passed as a pointer to another function, since that function will 380 * not know about the misaligment caused by the parent structure's packing. 381 * 382 * Also be very careful using __packed - particularly when nesting non-packed 383 * structures inside packed ones. In fact, DO NOT use __packed directly; 384 * always use one of these attributes. 385 * 386 * Once everything is annotated properly, the following search strings should 387 * not return ANY matches in this file other than right here: 388 * 389 * "__packed" - generates inefficient code; all sub-structs must also be packed 390 * 391 * "struct [^_]" - all structs should be annotated, except for structs that are 392 * members of other structs/unions (and their original declarations should be 393 * annotated). 394 */ 395#ifdef CONFIG_HOSTCMD_ALIGNED 396 397/* 398 * Packed structures where offset and size are always aligned to 1, 2, or 4 399 * byte boundary. 400 */ 401#define __ec_align1 __packed 402#define __ec_align2 __packed __aligned(2) 403#define __ec_align4 __packed __aligned(4) 404 405/* 406 * Packed structure which must be under-aligned, because its size is not a 407 * 4-byte multiple. This is sub-optimal because it forces byte-wise access 408 * of all multi-byte fields in it, even though they are themselves aligned. 409 * 410 * In theory, we could duplicate the structure with __aligned(4) for accessing 411 * its members, but use the __packed version for sizeof(). 412 */ 413#define __ec_align_size1 __packed 414 415/* 416 * Packed structure which must be under-aligned, because its offset inside a 417 * parent structure is not a 4-byte multiple. 418 */ 419#define __ec_align_offset1 __packed 420#define __ec_align_offset2 __packed __aligned(2) 421 422/* 423 * Structures which are complicated enough that I'm skipping them on the first 424 * pass. They are effectively unchanged from their previous definitions. 425 * 426 * TODO(rspangler): Figure out what to do with these. It's likely necessary 427 * to work out the size and offset of each member and add explicit padding to 428 * maintain those. 429 */ 430#define __ec_todo_packed __packed 431#define __ec_todo_unpacked 432 433#else /* !CONFIG_HOSTCMD_ALIGNED */ 434 435/* 436 * Packed structures make no assumption about alignment, so they do inefficient 437 * byte-wise reads. 438 */ 439#define __ec_align1 __packed 440#define __ec_align2 __packed 441#define __ec_align4 __packed 442#define __ec_align_size1 __packed 443#define __ec_align_offset1 __packed 444#define __ec_align_offset2 __packed 445#define __ec_todo_packed __packed 446#define __ec_todo_unpacked 447 448#endif /* !CONFIG_HOSTCMD_ALIGNED */ 449 450/* LPC command status byte masks */ 451/* EC has written a byte in the data register and host hasn't read it yet */ 452#define EC_LPC_STATUS_TO_HOST 0x01 453/* Host has written a command/data byte and the EC hasn't read it yet */ 454#define EC_LPC_STATUS_FROM_HOST 0x02 455/* EC is processing a command */ 456#define EC_LPC_STATUS_PROCESSING 0x04 457/* Last write to EC was a command, not data */ 458#define EC_LPC_STATUS_LAST_CMD 0x08 459/* EC is in burst mode */ 460#define EC_LPC_STATUS_BURST_MODE 0x10 461/* SCI event is pending (requesting SCI query) */ 462#define EC_LPC_STATUS_SCI_PENDING 0x20 463/* SMI event is pending (requesting SMI query) */ 464#define EC_LPC_STATUS_SMI_PENDING 0x40 465/* (reserved) */ 466#define EC_LPC_STATUS_RESERVED 0x80 467 468/* 469 * EC is busy. This covers both the EC processing a command, and the host has 470 * written a new command but the EC hasn't picked it up yet. 471 */ 472#define EC_LPC_STATUS_BUSY_MASK \ 473 (EC_LPC_STATUS_FROM_HOST | EC_LPC_STATUS_PROCESSING) 474 475/* Host command response codes (16-bit). Note that response codes should be 476 * stored in a uint16_t rather than directly in a value of this type. 477 */ 478enum ec_status { 479 EC_RES_SUCCESS = 0, 480 EC_RES_INVALID_COMMAND = 1, 481 EC_RES_ERROR = 2, 482 EC_RES_INVALID_PARAM = 3, 483 EC_RES_ACCESS_DENIED = 4, 484 EC_RES_INVALID_RESPONSE = 5, 485 EC_RES_INVALID_VERSION = 6, 486 EC_RES_INVALID_CHECKSUM = 7, 487 EC_RES_IN_PROGRESS = 8, /* Accepted, command in progress */ 488 EC_RES_UNAVAILABLE = 9, /* No response available */ 489 EC_RES_TIMEOUT = 10, /* We got a timeout */ 490 EC_RES_OVERFLOW = 11, /* Table / data overflow */ 491 EC_RES_INVALID_HEADER = 12, /* Header contains invalid data */ 492 EC_RES_REQUEST_TRUNCATED = 13, /* Didn't get the entire request */ 493 EC_RES_RESPONSE_TOO_BIG = 14, /* Response was too big to handle */ 494 EC_RES_BUS_ERROR = 15, /* Communications bus error */ 495 EC_RES_BUSY = 16 /* Up but too busy. Should retry */ 496}; 497 498/* 499 * Host event codes. Note these are 1-based, not 0-based, because ACPI query 500 * EC command uses code 0 to mean "no event pending". We explicitly specify 501 * each value in the enum listing so they won't change if we delete/insert an 502 * item or rearrange the list (it needs to be stable across platforms, not 503 * just within a single compiled instance). 504 */ 505enum host_event_code { 506 EC_HOST_EVENT_LID_CLOSED = 1, 507 EC_HOST_EVENT_LID_OPEN = 2, 508 EC_HOST_EVENT_POWER_BUTTON = 3, 509 EC_HOST_EVENT_AC_CONNECTED = 4, 510 EC_HOST_EVENT_AC_DISCONNECTED = 5, 511 EC_HOST_EVENT_BATTERY_LOW = 6, 512 EC_HOST_EVENT_BATTERY_CRITICAL = 7, 513 EC_HOST_EVENT_BATTERY = 8, 514 EC_HOST_EVENT_THERMAL_THRESHOLD = 9, 515 /* Event generated by a device attached to the EC */ 516 EC_HOST_EVENT_DEVICE = 10, 517 EC_HOST_EVENT_THERMAL = 11, 518 EC_HOST_EVENT_USB_CHARGER = 12, 519 EC_HOST_EVENT_KEY_PRESSED = 13, 520 /* 521 * EC has finished initializing the host interface. The host can check 522 * for this event following sending a EC_CMD_REBOOT_EC command to 523 * determine when the EC is ready to accept subsequent commands. 524 */ 525 EC_HOST_EVENT_INTERFACE_READY = 14, 526 /* Keyboard recovery combo has been pressed */ 527 EC_HOST_EVENT_KEYBOARD_RECOVERY = 15, 528 529 /* Shutdown due to thermal overload */ 530 EC_HOST_EVENT_THERMAL_SHUTDOWN = 16, 531 /* Shutdown due to battery level too low */ 532 EC_HOST_EVENT_BATTERY_SHUTDOWN = 17, 533 534 /* Suggest that the AP throttle itself */ 535 EC_HOST_EVENT_THROTTLE_START = 18, 536 /* Suggest that the AP resume normal speed */ 537 EC_HOST_EVENT_THROTTLE_STOP = 19, 538 539 /* Hang detect logic detected a hang and host event timeout expired */ 540 EC_HOST_EVENT_HANG_DETECT = 20, 541 /* Hang detect logic detected a hang and warm rebooted the AP */ 542 EC_HOST_EVENT_HANG_REBOOT = 21, 543 544 /* PD MCU triggering host event */ 545 EC_HOST_EVENT_PD_MCU = 22, 546 547 /* Battery Status flags have changed */ 548 EC_HOST_EVENT_BATTERY_STATUS = 23, 549 550 /* EC encountered a panic, triggering a reset */ 551 EC_HOST_EVENT_PANIC = 24, 552 553 /* Keyboard fastboot combo has been pressed */ 554 EC_HOST_EVENT_KEYBOARD_FASTBOOT = 25, 555 556 /* EC RTC event occurred */ 557 EC_HOST_EVENT_RTC = 26, 558 559 /* Emulate MKBP event */ 560 EC_HOST_EVENT_MKBP = 27, 561 562 /* EC desires to change state of host-controlled USB mux */ 563 EC_HOST_EVENT_USB_MUX = 28, 564 565 /* TABLET/LAPTOP mode event*/ 566 EC_HOST_EVENT_MODE_CHANGE = 29, 567 568 /* Keyboard recovery combo with hardware reinitialization */ 569 EC_HOST_EVENT_KEYBOARD_RECOVERY_HW_REINIT = 30, 570 571 /* 572 * Reserve this last bit to indicate that at least one bit in a 573 * secondary host event word is set. See crbug.com/633646. 574 */ 575 EC_HOST_EVENT_EXTENDED = 31, 576 577 /* 578 * The high bit of the event mask is not used as a host event code. If 579 * it reads back as set, then the entire event mask should be 580 * considered invalid by the host. This can happen when reading the 581 * raw event status via EC_MEMMAP_HOST_EVENTS but the LPC interface is 582 * not initialized on the EC, or improperly configured on the host. 583 */ 584 EC_HOST_EVENT_INVALID = 32 585}; 586/* Host event mask */ 587#define EC_HOST_EVENT_MASK(event_code) (1ULL << ((event_code) - 1)) 588 589/* Arguments at EC_LPC_ADDR_HOST_ARGS */ 590struct __ec_align4 ec_lpc_host_args { 591 uint8_t flags; 592 uint8_t command_version; 593 uint8_t data_size; 594 /* 595 * Checksum; sum of command + flags + command_version + data_size + 596 * all params/response data bytes. 597 */ 598 uint8_t checksum; 599}; 600 601/* Flags for ec_lpc_host_args.flags */ 602/* 603 * Args are from host. Data area at EC_LPC_ADDR_HOST_PARAM contains command 604 * params. 605 * 606 * If EC gets a command and this flag is not set, this is an old-style command. 607 * Command version is 0 and params from host are at EC_LPC_ADDR_OLD_PARAM with 608 * unknown length. EC must respond with an old-style response (that is, 609 * without setting EC_HOST_ARGS_FLAG_TO_HOST). 610 */ 611#define EC_HOST_ARGS_FLAG_FROM_HOST 0x01 612/* 613 * Args are from EC. Data area at EC_LPC_ADDR_HOST_PARAM contains response. 614 * 615 * If EC responds to a command and this flag is not set, this is an old-style 616 * response. Command version is 0 and response data from EC is at 617 * EC_LPC_ADDR_OLD_PARAM with unknown length. 618 */ 619#define EC_HOST_ARGS_FLAG_TO_HOST 0x02 620 621/*****************************************************************************/ 622/* 623 * Byte codes returned by EC over SPI interface. 624 * 625 * These can be used by the AP to debug the EC interface, and to determine 626 * when the EC is not in a state where it will ever get around to responding 627 * to the AP. 628 * 629 * Example of sequence of bytes read from EC for a current good transfer: 630 * 1. - - AP asserts chip select (CS#) 631 * 2. EC_SPI_OLD_READY - AP sends first byte(s) of request 632 * 3. - - EC starts handling CS# interrupt 633 * 4. EC_SPI_RECEIVING - AP sends remaining byte(s) of request 634 * 5. EC_SPI_PROCESSING - EC starts processing request; AP is clocking in 635 * bytes looking for EC_SPI_FRAME_START 636 * 6. - - EC finishes processing and sets up response 637 * 7. EC_SPI_FRAME_START - AP reads frame byte 638 * 8. (response packet) - AP reads response packet 639 * 9. EC_SPI_PAST_END - Any additional bytes read by AP 640 * 10 - - AP deasserts chip select 641 * 11 - - EC processes CS# interrupt and sets up DMA for 642 * next request 643 * 644 * If the AP is waiting for EC_SPI_FRAME_START and sees any value other than 645 * the following byte values: 646 * EC_SPI_OLD_READY 647 * EC_SPI_RX_READY 648 * EC_SPI_RECEIVING 649 * EC_SPI_PROCESSING 650 * 651 * Then the EC found an error in the request, or was not ready for the request 652 * and lost data. The AP should give up waiting for EC_SPI_FRAME_START, 653 * because the EC is unable to tell when the AP is done sending its request. 654 */ 655 656/* 657 * Framing byte which precedes a response packet from the EC. After sending a 658 * request, the AP will clock in bytes until it sees the framing byte, then 659 * clock in the response packet. 660 */ 661#define EC_SPI_FRAME_START 0xec 662 663/* 664 * Padding bytes which are clocked out after the end of a response packet. 665 */ 666#define EC_SPI_PAST_END 0xed 667 668/* 669 * EC is ready to receive, and has ignored the byte sent by the AP. EC expects 670 * that the AP will send a valid packet header (starting with 671 * EC_COMMAND_PROTOCOL_3) in the next 32 bytes. 672 */ 673#define EC_SPI_RX_READY 0xf8 674 675/* 676 * EC has started receiving the request from the AP, but hasn't started 677 * processing it yet. 678 */ 679#define EC_SPI_RECEIVING 0xf9 680 681/* EC has received the entire request from the AP and is processing it. */ 682#define EC_SPI_PROCESSING 0xfa 683 684/* 685 * EC received bad data from the AP, such as a packet header with an invalid 686 * length. EC will ignore all data until chip select deasserts. 687 */ 688#define EC_SPI_RX_BAD_DATA 0xfb 689 690/* 691 * EC received data from the AP before it was ready. That is, the AP asserted 692 * chip select and started clocking data before the EC was ready to receive it. 693 * EC will ignore all data until chip select deasserts. 694 */ 695#define EC_SPI_NOT_READY 0xfc 696 697/* 698 * EC was ready to receive a request from the AP. EC has treated the byte sent 699 * by the AP as part of a request packet, or (for old-style ECs) is processing 700 * a fully received packet but is not ready to respond yet. 701 */ 702#define EC_SPI_OLD_READY 0xfd 703 704/*****************************************************************************/ 705 706/* 707 * Protocol version 2 for I2C and SPI send a request this way: 708 * 709 * 0 EC_CMD_VERSION0 + (command version) 710 * 1 Command number 711 * 2 Length of params = N 712 * 3..N+2 Params, if any 713 * N+3 8-bit checksum of bytes 0..N+2 714 * 715 * The corresponding response is: 716 * 717 * 0 Result code (EC_RES_*) 718 * 1 Length of params = M 719 * 2..M+1 Params, if any 720 * M+2 8-bit checksum of bytes 0..M+1 721 */ 722#define EC_PROTO2_REQUEST_HEADER_BYTES 3 723#define EC_PROTO2_REQUEST_TRAILER_BYTES 1 724#define EC_PROTO2_REQUEST_OVERHEAD (EC_PROTO2_REQUEST_HEADER_BYTES + \ 725 EC_PROTO2_REQUEST_TRAILER_BYTES) 726 727#define EC_PROTO2_RESPONSE_HEADER_BYTES 2 728#define EC_PROTO2_RESPONSE_TRAILER_BYTES 1 729#define EC_PROTO2_RESPONSE_OVERHEAD (EC_PROTO2_RESPONSE_HEADER_BYTES + \ 730 EC_PROTO2_RESPONSE_TRAILER_BYTES) 731 732/* Parameter length was limited by the LPC interface */ 733#define EC_PROTO2_MAX_PARAM_SIZE 0xfc 734 735/* Maximum request and response packet sizes for protocol version 2 */ 736#define EC_PROTO2_MAX_REQUEST_SIZE (EC_PROTO2_REQUEST_OVERHEAD + \ 737 EC_PROTO2_MAX_PARAM_SIZE) 738#define EC_PROTO2_MAX_RESPONSE_SIZE (EC_PROTO2_RESPONSE_OVERHEAD + \ 739 EC_PROTO2_MAX_PARAM_SIZE) 740 741/*****************************************************************************/ 742 743/* 744 * Value written to legacy command port / prefix byte to indicate protocol 745 * 3+ structs are being used. Usage is bus-dependent. 746 */ 747#define EC_COMMAND_PROTOCOL_3 0xda 748 749#define EC_HOST_REQUEST_VERSION 3 750 751/* Version 3 request from host */ 752struct __ec_align4 ec_host_request { 753 /* Structure version (=3) 754 * 755 * EC will return EC_RES_INVALID_HEADER if it receives a header with a 756 * version it doesn't know how to parse. 757 */ 758 uint8_t struct_version; 759 760 /* 761 * Checksum of request and data; sum of all bytes including checksum 762 * should total to 0. 763 */ 764 uint8_t checksum; 765 766 /* Command code */ 767 uint16_t command; 768 769 /* Command version */ 770 uint8_t command_version; 771 772 /* Unused byte in current protocol version; set to 0 */ 773 uint8_t reserved; 774 775 /* Length of data which follows this header */ 776 uint16_t data_len; 777}; 778 779#define EC_HOST_RESPONSE_VERSION 3 780 781/* Version 3 response from EC */ 782struct __ec_align4 ec_host_response { 783 /* Structure version (=3) */ 784 uint8_t struct_version; 785 786 /* 787 * Checksum of response and data; sum of all bytes including checksum 788 * should total to 0. 789 */ 790 uint8_t checksum; 791 792 /* Result code (EC_RES_*) */ 793 uint16_t result; 794 795 /* Length of data which follows this header */ 796 uint16_t data_len; 797 798 /* Unused bytes in current protocol version; set to 0 */ 799 uint16_t reserved; 800}; 801 802/*****************************************************************************/ 803/* 804 * Notes on commands: 805 * 806 * Each command is an 16-bit command value. Commands which take params or 807 * return response data specify structures for that data. If no structure is 808 * specified, the command does not input or output data, respectively. 809 * Parameter/response length is implicit in the structs. Some underlying 810 * communication protocols (I2C, SPI) may add length or checksum headers, but 811 * those are implementation-dependent and not defined here. 812 * 813 * All commands MUST be #defined to be 4-digit UPPER CASE hex values 814 * (e.g., 0x00AB, not 0xab) for CONFIG_HOSTCMD_SECTION_SORTED to work. 815 */ 816 817/*****************************************************************************/ 818/* General / test commands */ 819 820/* 821 * Get protocol version, used to deal with non-backward compatible protocol 822 * changes. 823 */ 824#define EC_CMD_PROTO_VERSION 0x0000 825 826struct __ec_align4 ec_response_proto_version { 827 uint32_t version; 828}; 829 830/* 831 * Hello. This is a simple command to test the EC is responsive to 832 * commands. 833 */ 834#define EC_CMD_HELLO 0x0001 835 836struct __ec_align4 ec_params_hello { 837 uint32_t in_data; /* Pass anything here */ 838}; 839 840struct __ec_align4 ec_response_hello { 841 uint32_t out_data; /* Output will be in_data + 0x01020304 */ 842}; 843 844/* Get version number */ 845#define EC_CMD_GET_VERSION 0x0002 846 847enum ec_current_image { 848 EC_IMAGE_UNKNOWN = 0, 849 EC_IMAGE_RO, 850 EC_IMAGE_RW 851}; 852 853struct __ec_align4 ec_response_get_version { 854 /* Null-terminated version strings for RO, RW */ 855 char version_string_ro[32]; 856 char version_string_rw[32]; 857 char reserved[32]; /* Was previously RW-B string */ 858 uint32_t current_image; /* One of ec_current_image */ 859}; 860 861/* Read test */ 862#define EC_CMD_READ_TEST 0x0003 863 864struct __ec_align4 ec_params_read_test { 865 uint32_t offset; /* Starting value for read buffer */ 866 uint32_t size; /* Size to read in bytes */ 867}; 868 869struct __ec_align4 ec_response_read_test { 870 uint32_t data[32]; 871}; 872 873/* 874 * Get build information 875 * 876 * Response is null-terminated string. 877 */ 878#define EC_CMD_GET_BUILD_INFO 0x0004 879 880/* Get chip info */ 881#define EC_CMD_GET_CHIP_INFO 0x0005 882 883struct __ec_align4 ec_response_get_chip_info { 884 /* Null-terminated strings */ 885 char vendor[32]; 886 char name[32]; 887 char revision[32]; /* Mask version */ 888}; 889 890/* Get board HW version */ 891#define EC_CMD_GET_BOARD_VERSION 0x0006 892 893struct __ec_align2 ec_response_board_version { 894 uint16_t board_version; /* A monotonously incrementing number. */ 895}; 896 897/* 898 * Read memory-mapped data. 899 * 900 * This is an alternate interface to memory-mapped data for bus protocols 901 * which don't support direct-mapped memory - I2C, SPI, etc. 902 * 903 * Response is params.size bytes of data. 904 */ 905#define EC_CMD_READ_MEMMAP 0x0007 906 907struct __ec_align1 ec_params_read_memmap { 908 uint8_t offset; /* Offset in memmap (EC_MEMMAP_*) */ 909 uint8_t size; /* Size to read in bytes */ 910}; 911 912/* Read versions supported for a command */ 913#define EC_CMD_GET_CMD_VERSIONS 0x0008 914 915struct __ec_align1 ec_params_get_cmd_versions { 916 uint8_t cmd; /* Command to check */ 917}; 918 919struct __ec_align2 ec_params_get_cmd_versions_v1 { 920 uint16_t cmd; /* Command to check */ 921}; 922 923struct __ec_align4 ec_response_get_cmd_versions { 924 /* 925 * Mask of supported versions; use EC_VER_MASK() to compare with a 926 * desired version. 927 */ 928 uint32_t version_mask; 929}; 930 931/* 932 * Check EC communications status (busy). This is needed on i2c/spi but not 933 * on lpc since it has its own out-of-band busy indicator. 934 * 935 * lpc must read the status from the command register. Attempting this on 936 * lpc will overwrite the args/parameter space and corrupt its data. 937 */ 938#define EC_CMD_GET_COMMS_STATUS 0x0009 939 940/* Avoid using ec_status which is for return values */ 941enum ec_comms_status { 942 EC_COMMS_STATUS_PROCESSING = 1 << 0, /* Processing cmd */ 943}; 944 945struct __ec_align4 ec_response_get_comms_status { 946 uint32_t flags; /* Mask of enum ec_comms_status */ 947}; 948 949/* Fake a variety of responses, purely for testing purposes. */ 950#define EC_CMD_TEST_PROTOCOL 0x000A 951 952/* Tell the EC what to send back to us. */ 953struct __ec_align4 ec_params_test_protocol { 954 uint32_t ec_result; 955 uint32_t ret_len; 956 uint8_t buf[32]; 957}; 958 959/* Here it comes... */ 960struct __ec_align4 ec_response_test_protocol { 961 uint8_t buf[32]; 962}; 963 964/* Get protocol information */ 965#define EC_CMD_GET_PROTOCOL_INFO 0x000B 966 967/* Flags for ec_response_get_protocol_info.flags */ 968/* EC_RES_IN_PROGRESS may be returned if a command is slow */ 969#define EC_PROTOCOL_INFO_IN_PROGRESS_SUPPORTED (1 << 0) 970 971struct __ec_align4 ec_response_get_protocol_info { 972 /* Fields which exist if at least protocol version 3 supported */ 973 974 /* Bitmask of protocol versions supported (1 << n means version n)*/ 975 uint32_t protocol_versions; 976 977 /* Maximum request packet size, in bytes */ 978 uint16_t max_request_packet_size; 979 980 /* Maximum response packet size, in bytes */ 981 uint16_t max_response_packet_size; 982 983 /* Flags; see EC_PROTOCOL_INFO_* */ 984 uint32_t flags; 985}; 986 987 988/*****************************************************************************/ 989/* Get/Set miscellaneous values */ 990 991/* The upper byte of .flags tells what to do (nothing means "get") */ 992#define EC_GSV_SET 0x80000000 993 994/* The lower three bytes of .flags identifies the parameter, if that has 995 meaning for an individual command. */ 996#define EC_GSV_PARAM_MASK 0x00ffffff 997 998struct __ec_align4 ec_params_get_set_value { 999 uint32_t flags; 1000 uint32_t value; 1001}; 1002 1003struct __ec_align4 ec_response_get_set_value { 1004 uint32_t flags; 1005 uint32_t value; 1006}; 1007 1008/* More than one command can use these structs to get/set parameters. */ 1009#define EC_CMD_GSV_PAUSE_IN_S5 0x000C 1010 1011/*****************************************************************************/ 1012/* List the features supported by the firmware */ 1013#define EC_CMD_GET_FEATURES 0x000D 1014 1015/* Supported features */ 1016enum ec_feature_code { 1017 /* 1018 * This image contains a limited set of features. Another image 1019 * in RW partition may support more features. 1020 */ 1021 EC_FEATURE_LIMITED = 0, 1022 /* 1023 * Commands for probing/reading/writing/erasing the flash in the 1024 * EC are present. 1025 */ 1026 EC_FEATURE_FLASH = 1, 1027 /* 1028 * Can control the fan speed directly. 1029 */ 1030 EC_FEATURE_PWM_FAN = 2, 1031 /* 1032 * Can control the intensity of the keyboard backlight. 1033 */ 1034 EC_FEATURE_PWM_KEYB = 3, 1035 /* 1036 * Support Google lightbar, introduced on Pixel. 1037 */ 1038 EC_FEATURE_LIGHTBAR = 4, 1039 /* Control of LEDs */ 1040 EC_FEATURE_LED = 5, 1041 /* Exposes an interface to control gyro and sensors. 1042 * The host goes through the EC to access these sensors. 1043 * In addition, the EC may provide composite sensors, like lid angle. 1044 */ 1045 EC_FEATURE_MOTION_SENSE = 6, 1046 /* The keyboard is controlled by the EC */ 1047 EC_FEATURE_KEYB = 7, 1048 /* The AP can use part of the EC flash as persistent storage. */ 1049 EC_FEATURE_PSTORE = 8, 1050 /* The EC monitors BIOS port 80h, and can return POST codes. */ 1051 EC_FEATURE_PORT80 = 9, 1052 /* 1053 * Thermal management: include TMP specific commands. 1054 * Higher level than direct fan control. 1055 */ 1056 EC_FEATURE_THERMAL = 10, 1057 /* Can switch the screen backlight on/off */ 1058 EC_FEATURE_BKLIGHT_SWITCH = 11, 1059 /* Can switch the wifi module on/off */ 1060 EC_FEATURE_WIFI_SWITCH = 12, 1061 /* Monitor host events, through for example SMI or SCI */ 1062 EC_FEATURE_HOST_EVENTS = 13, 1063 /* The EC exposes GPIO commands to control/monitor connected devices. */ 1064 EC_FEATURE_GPIO = 14, 1065 /* The EC can send i2c messages to downstream devices. */ 1066 EC_FEATURE_I2C = 15, 1067 /* Command to control charger are included */ 1068 EC_FEATURE_CHARGER = 16, 1069 /* Simple battery support. */ 1070 EC_FEATURE_BATTERY = 17, 1071 /* 1072 * Support Smart battery protocol 1073 * (Common Smart Battery System Interface Specification) 1074 */ 1075 EC_FEATURE_SMART_BATTERY = 18, 1076 /* EC can detect when the host hangs. */ 1077 EC_FEATURE_HANG_DETECT = 19, 1078 /* Report power information, for pit only */ 1079 EC_FEATURE_PMU = 20, 1080 /* Another Cros EC device is present downstream of this one */ 1081 EC_FEATURE_SUB_MCU = 21, 1082 /* Support USB Power delivery (PD) commands */ 1083 EC_FEATURE_USB_PD = 22, 1084 /* Control USB multiplexer, for audio through USB port for instance. */ 1085 EC_FEATURE_USB_MUX = 23, 1086 /* Motion Sensor code has an internal software FIFO */ 1087 EC_FEATURE_MOTION_SENSE_FIFO = 24, 1088 /* Support temporary secure vstore */ 1089 EC_FEATURE_VSTORE = 25, 1090 /* EC decides on USB-C SS mux state, muxes configured by host */ 1091 EC_FEATURE_USBC_SS_MUX_VIRTUAL = 26, 1092 /* EC has RTC feature that can be controlled by host commands */ 1093 EC_FEATURE_RTC = 27, 1094 /* The MCU exposes a Fingerprint sensor */ 1095 EC_FEATURE_FINGERPRINT = 28, 1096 /* The MCU exposes a Touchpad */ 1097 EC_FEATURE_TOUCHPAD = 29, 1098 /* The MCU has RWSIG task enabled */ 1099 EC_FEATURE_RWSIG = 30, 1100 /* EC has device events support */ 1101 EC_FEATURE_DEVICE_EVENT = 31, 1102 /* EC supports the unified wake masks for LPC/eSPI systems */ 1103 EC_FEATURE_UNIFIED_WAKE_MASKS = 32, 1104 /* EC supports 64-bit host events */ 1105 EC_FEATURE_HOST_EVENT64 = 33, 1106 /* EC runs code in RAM (not in place, a.k.a. XIP) */ 1107 EC_FEATURE_EXEC_IN_RAM = 34, 1108 /* EC supports CEC commands */ 1109 EC_FEATURE_CEC = 35, 1110 /* EC supports tight sensor timestamping. */ 1111 EC_FEATURE_MOTION_SENSE_TIGHT_TIMESTAMPS = 36, 1112 /* 1113 * EC supports tablet mode detection aligned to Chrome and allows 1114 * setting of threshold by host command using 1115 * MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE. 1116 */ 1117 EC_FEATURE_REFINED_TABLET_MODE_HYSTERESIS = 37, 1118 /* 1119 * Early Firmware Selection ver.2. Enabled by CONFIG_VBOOT_EFS2. 1120 * Note this is a RO feature. So, a query (EC_CMD_GET_FEATURES) should 1121 * be sent to RO to be precise. 1122 */ 1123 EC_FEATURE_EFS2 = 38, 1124 /* The MCU is a System Companion Processor (SCP). */ 1125 EC_FEATURE_SCP = 39, 1126 /* The MCU is an Integrated Sensor Hub */ 1127 EC_FEATURE_ISH = 40, 1128 /* New TCPMv2 TYPEC_ prefaced commands supported */ 1129 EC_FEATURE_TYPEC_CMD = 41, 1130 /* 1131 * The EC will wait for direction from the AP to enter Type-C alternate 1132 * modes or USB4. 1133 */ 1134 EC_FEATURE_TYPEC_REQUIRE_AP_MODE_ENTRY = 42, 1135 /* 1136 * The EC will wait for an acknowledge from the AP after setting the 1137 * mux. 1138 */ 1139 EC_FEATURE_TYPEC_MUX_REQUIRE_AP_ACK = 43, 1140}; 1141 1142#define EC_FEATURE_MASK_0(event_code) BIT(event_code % 32) 1143#define EC_FEATURE_MASK_1(event_code) BIT(event_code - 32) 1144 1145struct ec_response_get_features { 1146 uint32_t flags[2]; 1147} __ec_align4; 1148 1149/*****************************************************************************/ 1150/* Get the board's SKU ID from EC */ 1151#define EC_CMD_GET_SKU_ID 0x000E 1152 1153/* Set SKU ID from AP */ 1154#define EC_CMD_SET_SKU_ID 0x000F 1155 1156struct __ec_align4 ec_sku_id_info { 1157 uint32_t sku_id; 1158}; 1159 1160/*****************************************************************************/ 1161/* Flash commands */ 1162 1163/* Get flash info */ 1164#define EC_CMD_FLASH_INFO 0x0010 1165#define EC_VER_FLASH_INFO 2 1166 1167/* Version 0 returns these fields */ 1168struct __ec_align4 ec_response_flash_info { 1169 /* Usable flash size, in bytes */ 1170 uint32_t flash_size; 1171 /* 1172 * Write block size. Write offset and size must be a multiple 1173 * of this. 1174 */ 1175 uint32_t write_block_size; 1176 /* 1177 * Erase block size. Erase offset and size must be a multiple 1178 * of this. 1179 */ 1180 uint32_t erase_block_size; 1181 /* 1182 * Protection block size. Protection offset and size must be a 1183 * multiple of this. 1184 */ 1185 uint32_t protect_block_size; 1186}; 1187 1188/* Flags for version 1+ flash info command */ 1189/* EC flash erases bits to 0 instead of 1 */ 1190#define EC_FLASH_INFO_ERASE_TO_0 (1 << 0) 1191 1192/* Flash must be selected for read/write/erase operations to succeed. This may 1193 * be necessary on a chip where write/erase can be corrupted by other board 1194 * activity, or where the chip needs to enable some sort of programming voltage, 1195 * or where the read/write/erase operations require cleanly suspending other 1196 * chip functionality. */ 1197#define EC_FLASH_INFO_SELECT_REQUIRED (1 << 1) 1198 1199/* 1200 * Version 1 returns the same initial fields as version 0, with additional 1201 * fields following. 1202 * 1203 * gcc anonymous structs don't seem to get along with the __packed directive; 1204 * if they did we'd define the version 0 structure as a sub-structure of this 1205 * one. 1206 * 1207 * Version 2 supports flash banks of different sizes: 1208 * The caller specified the number of banks it has preallocated 1209 * (num_banks_desc) 1210 * The EC returns the number of banks describing the flash memory. 1211 * It adds banks descriptions up to num_banks_desc. 1212 */ 1213struct __ec_align4 ec_response_flash_info_1 { 1214 /* Version 0 fields; see above for description */ 1215 uint32_t flash_size; 1216 uint32_t write_block_size; 1217 uint32_t erase_block_size; 1218 uint32_t protect_block_size; 1219 1220 /* Version 1 adds these fields: */ 1221 /* 1222 * Ideal write size in bytes. Writes will be fastest if size is 1223 * exactly this and offset is a multiple of this. For example, an EC 1224 * may have a write buffer which can do half-page operations if data is 1225 * aligned, and a slower word-at-a-time write mode. 1226 */ 1227 uint32_t write_ideal_size; 1228 1229 /* Flags; see EC_FLASH_INFO_* */ 1230 uint32_t flags; 1231}; 1232 1233struct __ec_align4 ec_params_flash_info_2 { 1234 /* Number of banks to describe */ 1235 uint16_t num_banks_desc; 1236 /* Reserved; set 0; ignore on read */ 1237 uint8_t reserved[2]; 1238}; 1239 1240struct ec_flash_bank { 1241 /* Number of sector is in this bank. */ 1242 uint16_t count; 1243 /* Size in power of 2 of each sector (8 --> 256 bytes) */ 1244 uint8_t size_exp; 1245 /* Minimal write size for the sectors in this bank */ 1246 uint8_t write_size_exp; 1247 /* Erase size for the sectors in this bank */ 1248 uint8_t erase_size_exp; 1249 /* Size for write protection, usually identical to erase size. */ 1250 uint8_t protect_size_exp; 1251 /* Reserved; set 0; ignore on read */ 1252 uint8_t reserved[2]; 1253}; 1254 1255struct __ec_align4 ec_response_flash_info_2 { 1256 /* Total flash in the EC. */ 1257 uint32_t flash_size; 1258 /* Flags; see EC_FLASH_INFO_* */ 1259 uint32_t flags; 1260 /* Maximum size to use to send data to write to the EC. */ 1261 uint32_t write_ideal_size; 1262 /* Number of banks present in the EC. */ 1263 uint16_t num_banks_total; 1264 /* Number of banks described in banks array. */ 1265 uint16_t num_banks_desc; 1266 struct ec_flash_bank banks[0]; 1267}; 1268 1269/* 1270 * Read flash 1271 * 1272 * Response is params.size bytes of data. 1273 */ 1274#define EC_CMD_FLASH_READ 0x0011 1275 1276struct __ec_align4 ec_params_flash_read { 1277 uint32_t offset; /* Byte offset to read */ 1278 uint32_t size; /* Size to read in bytes */ 1279}; 1280 1281/* Write flash */ 1282#define EC_CMD_FLASH_WRITE 0x0012 1283#define EC_VER_FLASH_WRITE 1 1284 1285/* Version 0 of the flash command supported only 64 bytes of data */ 1286#define EC_FLASH_WRITE_VER0_SIZE 64 1287 1288struct __ec_align4 ec_params_flash_write { 1289 uint32_t offset; /* Byte offset to write */ 1290 uint32_t size; /* Size to write in bytes */ 1291 /* Followed by data to write */ 1292}; 1293 1294/* Erase flash */ 1295#define EC_CMD_FLASH_ERASE 0x0013 1296 1297/* v0 */ 1298struct __ec_align4 ec_params_flash_erase { 1299 uint32_t offset; /* Byte offset to erase */ 1300 uint32_t size; /* Size to erase in bytes */ 1301}; 1302 1303 1304#define EC_VER_FLASH_WRITE 1 1305/* v1 add async erase: 1306 * subcommands can returns: 1307 * EC_RES_SUCCESS : erased (see ERASE_SECTOR_ASYNC case below). 1308 * EC_RES_INVALID_PARAM : offset/size are not aligned on a erase boundary. 1309 * EC_RES_ERROR : other errors. 1310 * EC_RES_BUSY : an existing erase operation is in progress. 1311 * EC_RES_ACCESS_DENIED: Trying to erase running image. 1312 * 1313 * When ERASE_SECTOR_ASYNC returns EC_RES_SUCCESS, the operation is just 1314 * properly queued. The user must call ERASE_GET_RESULT subcommand to get 1315 * the proper result. 1316 * When ERASE_GET_RESULT returns EC_RES_BUSY, the caller must wait and send 1317 * ERASE_GET_RESULT again to get the result of ERASE_SECTOR_ASYNC. 1318 * ERASE_GET_RESULT command may timeout on EC where flash access is not 1319 * permitted while erasing. (For instance, STM32F4). 1320 */ 1321enum ec_flash_erase_cmd { 1322 FLASH_ERASE_SECTOR, /* Erase and wait for result */ 1323 FLASH_ERASE_SECTOR_ASYNC, /* Erase and return immediately. */ 1324 FLASH_ERASE_GET_RESULT, /* Ask for last erase result */ 1325}; 1326 1327struct __ec_align4 ec_params_flash_erase_v1 { 1328 /* One of ec_flash_erase_cmd. */ 1329 uint8_t cmd; 1330 /* Pad byte; currently always contains 0 */ 1331 uint8_t reserved; 1332 /* No flags defined yet; set to 0 */ 1333 uint16_t flag; 1334 /* Same as v0 parameters. */ 1335 struct ec_params_flash_erase params; 1336}; 1337 1338/* 1339 * Get/set flash protection. 1340 * 1341 * If mask!=0, sets/clear the requested bits of flags. Depending on the 1342 * firmware write protect GPIO, not all flags will take effect immediately; 1343 * some flags require a subsequent hard reset to take effect. Check the 1344 * returned flags bits to see what actually happened. 1345 * 1346 * If mask=0, simply returns the current flags state. 1347 */ 1348#define EC_CMD_FLASH_PROTECT 0x0015 1349#define EC_VER_FLASH_PROTECT 1 /* Command version 1 */ 1350 1351/* Flags for flash protection */ 1352/* RO flash code protected when the EC boots */ 1353#define EC_FLASH_PROTECT_RO_AT_BOOT (1 << 0) 1354/* 1355 * RO flash code protected now. If this bit is set, at-boot status cannot 1356 * be changed. 1357 */ 1358#define EC_FLASH_PROTECT_RO_NOW (1 << 1) 1359/* Entire flash code protected now, until reboot. */ 1360#define EC_FLASH_PROTECT_ALL_NOW (1 << 2) 1361/* Flash write protect GPIO is asserted now */ 1362#define EC_FLASH_PROTECT_GPIO_ASSERTED (1 << 3) 1363/* Error - at least one bank of flash is stuck locked, and cannot be unlocked */ 1364#define EC_FLASH_PROTECT_ERROR_STUCK (1 << 4) 1365/* 1366 * Error - flash protection is in inconsistent state. At least one bank of 1367 * flash which should be protected is not protected. Usually fixed by 1368 * re-requesting the desired flags, or by a hard reset if that fails. 1369 */ 1370#define EC_FLASH_PROTECT_ERROR_INCONSISTENT (1 << 5) 1371/* Entire flash code protected when the EC boots */ 1372#define EC_FLASH_PROTECT_ALL_AT_BOOT (1 << 6) 1373/* RW flash code protected when the EC boots */ 1374#define EC_FLASH_PROTECT_RW_AT_BOOT (1 << 7) 1375/* RW flash code protected now. */ 1376#define EC_FLASH_PROTECT_RW_NOW (1 << 8) 1377/* Rollback information flash region protected when the EC boots */ 1378#define EC_FLASH_PROTECT_ROLLBACK_AT_BOOT (1 << 9) 1379/* Rollback information flash region protected now */ 1380#define EC_FLASH_PROTECT_ROLLBACK_NOW (1 << 10) 1381 1382struct __ec_align4 ec_params_flash_protect { 1383 uint32_t mask; /* Bits in flags to apply */ 1384 uint32_t flags; /* New flags to apply */ 1385}; 1386 1387struct __ec_align4 ec_response_flash_protect { 1388 /* Current value of flash protect flags */ 1389 uint32_t flags; 1390 /* 1391 * Flags which are valid on this platform. This allows the caller 1392 * to distinguish between flags which aren't set vs. flags which can't 1393 * be set on this platform. 1394 */ 1395 uint32_t valid_flags; 1396 /* Flags which can be changed given the current protection state */ 1397 uint32_t writable_flags; 1398}; 1399 1400/* 1401 * Note: commands 0x14 - 0x19 version 0 were old commands to get/set flash 1402 * write protect. These commands may be reused with version > 0. 1403 */ 1404 1405/* Get the region offset/size */ 1406#define EC_CMD_FLASH_REGION_INFO 0x0016 1407#define EC_VER_FLASH_REGION_INFO 1 1408 1409enum ec_flash_region { 1410 /* Region which holds read-only EC image */ 1411 EC_FLASH_REGION_RO = 0, 1412 /* Region which holds active rewritable EC image */ 1413 EC_FLASH_REGION_ACTIVE, 1414 /* 1415 * Region which should be write-protected in the factory (a superset of 1416 * EC_FLASH_REGION_RO) 1417 */ 1418 EC_FLASH_REGION_WP_RO, 1419 /* Region which holds updatable image */ 1420 EC_FLASH_REGION_UPDATE, 1421 /* Number of regions */ 1422 EC_FLASH_REGION_COUNT, 1423}; 1424 1425struct __ec_align4 ec_params_flash_region_info { 1426 uint32_t region; /* enum ec_flash_region */ 1427}; 1428 1429struct __ec_align4 ec_response_flash_region_info { 1430 uint32_t offset; 1431 uint32_t size; 1432}; 1433 1434/* Read/write VbNvContext */ 1435#define EC_CMD_VBNV_CONTEXT 0x0017 1436#define EC_VER_VBNV_CONTEXT 1 1437#define EC_VBNV_BLOCK_SIZE 16 1438#define EC_VBNV_BLOCK_SIZE_V2 64 1439 1440enum ec_vbnvcontext_op { 1441 EC_VBNV_CONTEXT_OP_READ, 1442 EC_VBNV_CONTEXT_OP_WRITE, 1443}; 1444 1445struct __ec_align4 ec_params_vbnvcontext { 1446 uint32_t op; 1447 uint8_t block[EC_VBNV_BLOCK_SIZE_V2]; 1448}; 1449 1450struct __ec_align4 ec_response_vbnvcontext { 1451 uint8_t block[EC_VBNV_BLOCK_SIZE_V2]; 1452}; 1453 1454 1455/* Get SPI flash information */ 1456#define EC_CMD_FLASH_SPI_INFO 0x0018 1457 1458struct __ec_align1 ec_response_flash_spi_info { 1459 /* JEDEC info from command 0x9F (manufacturer, memory type, size) */ 1460 uint8_t jedec[3]; 1461 1462 /* Pad byte; currently always contains 0 */ 1463 uint8_t reserved0; 1464 1465 /* Manufacturer / device ID from command 0x90 */ 1466 uint8_t mfr_dev_id[2]; 1467 1468 /* Status registers from command 0x05 and 0x35 */ 1469 uint8_t sr1, sr2; 1470}; 1471 1472 1473/* Select flash during flash operations */ 1474#define EC_CMD_FLASH_SELECT 0x0019 1475 1476struct __ec_align4 ec_params_flash_select { 1477 /* 1 to select flash, 0 to deselect flash */ 1478 uint8_t select; 1479}; 1480 1481/*****************************************************************************/ 1482/* PWM commands */ 1483 1484/* Get fan target RPM */ 1485#define EC_CMD_PWM_GET_FAN_TARGET_RPM 0x0020 1486 1487struct __ec_align4 ec_response_pwm_get_fan_rpm { 1488 uint32_t rpm; 1489}; 1490 1491/* Set target fan RPM */ 1492#define EC_CMD_PWM_SET_FAN_TARGET_RPM 0x0021 1493 1494/* Version 0 of input params */ 1495struct __ec_align4 ec_params_pwm_set_fan_target_rpm_v0 { 1496 uint32_t rpm; 1497}; 1498 1499/* Version 1 of input params */ 1500struct __ec_align_size1 ec_params_pwm_set_fan_target_rpm_v1 { 1501 uint32_t rpm; 1502 uint8_t fan_idx; 1503}; 1504 1505/* Get keyboard backlight */ 1506/* OBSOLETE - Use EC_CMD_PWM_SET_DUTY */ 1507#define EC_CMD_PWM_GET_KEYBOARD_BACKLIGHT 0x0022 1508 1509struct __ec_align1 ec_response_pwm_get_keyboard_backlight { 1510 uint8_t percent; 1511 uint8_t enabled; 1512}; 1513 1514/* Set keyboard backlight */ 1515/* OBSOLETE - Use EC_CMD_PWM_SET_DUTY */ 1516#define EC_CMD_PWM_SET_KEYBOARD_BACKLIGHT 0x0023 1517 1518struct __ec_align1 ec_params_pwm_set_keyboard_backlight { 1519 uint8_t percent; 1520}; 1521 1522/* Set target fan PWM duty cycle */ 1523#define EC_CMD_PWM_SET_FAN_DUTY 0x0024 1524 1525/* Version 0 of input params */ 1526struct __ec_align4 ec_params_pwm_set_fan_duty_v0 { 1527 uint32_t percent; 1528}; 1529 1530/* Version 1 of input params */ 1531struct __ec_align_size1 ec_params_pwm_set_fan_duty_v1 { 1532 uint32_t percent; 1533 uint8_t fan_idx; 1534}; 1535 1536#define EC_CMD_PWM_SET_DUTY 0x0025 1537/* 16 bit duty cycle, 0xffff = 100% */ 1538#define EC_PWM_MAX_DUTY 0xffff 1539 1540enum ec_pwm_type { 1541 /* All types, indexed by board-specific enum pwm_channel */ 1542 EC_PWM_TYPE_GENERIC = 0, 1543 /* Keyboard backlight */ 1544 EC_PWM_TYPE_KB_LIGHT, 1545 /* Display backlight */ 1546 EC_PWM_TYPE_DISPLAY_LIGHT, 1547 EC_PWM_TYPE_COUNT, 1548}; 1549 1550struct __ec_align4 ec_params_pwm_set_duty { 1551 uint16_t duty; /* Duty cycle, EC_PWM_MAX_DUTY = 100% */ 1552 uint8_t pwm_type; /* ec_pwm_type */ 1553 uint8_t index; /* Type-specific index, or 0 if unique */ 1554}; 1555 1556#define EC_CMD_PWM_GET_DUTY 0x0026 1557 1558struct __ec_align1 ec_params_pwm_get_duty { 1559 uint8_t pwm_type; /* ec_pwm_type */ 1560 uint8_t index; /* Type-specific index, or 0 if unique */ 1561}; 1562 1563struct __ec_align2 ec_response_pwm_get_duty { 1564 uint16_t duty; /* Duty cycle, EC_PWM_MAX_DUTY = 100% */ 1565}; 1566 1567/*****************************************************************************/ 1568/* 1569 * Lightbar commands. This looks worse than it is. Since we only use one HOST 1570 * command to say "talk to the lightbar", we put the "and tell it to do X" part 1571 * into a subcommand. We'll make separate structs for subcommands with 1572 * different input args, so that we know how much to expect. 1573 */ 1574#define EC_CMD_LIGHTBAR_CMD 0x0028 1575 1576struct __ec_todo_unpacked rgb_s { 1577 uint8_t r, g, b; 1578}; 1579 1580#define LB_BATTERY_LEVELS 4 1581/* List of tweakable parameters. NOTE: It's __packed so it can be sent in a 1582 * host command, but the alignment is the same regardless. Keep it that way. 1583 */ 1584struct __ec_todo_packed lightbar_params_v0 { 1585 /* Timing */ 1586 int32_t google_ramp_up; 1587 int32_t google_ramp_down; 1588 int32_t s3s0_ramp_up; 1589 int32_t s0_tick_delay[2]; /* AC=0/1 */ 1590 int32_t s0a_tick_delay[2]; /* AC=0/1 */ 1591 int32_t s0s3_ramp_down; 1592 int32_t s3_sleep_for; 1593 int32_t s3_ramp_up; 1594 int32_t s3_ramp_down; 1595 1596 /* Oscillation */ 1597 uint8_t new_s0; 1598 uint8_t osc_min[2]; /* AC=0/1 */ 1599 uint8_t osc_max[2]; /* AC=0/1 */ 1600 uint8_t w_ofs[2]; /* AC=0/1 */ 1601 1602 /* Brightness limits based on the backlight and AC. */ 1603 uint8_t bright_bl_off_fixed[2]; /* AC=0/1 */ 1604 uint8_t bright_bl_on_min[2]; /* AC=0/1 */ 1605 uint8_t bright_bl_on_max[2]; /* AC=0/1 */ 1606 1607 /* Battery level thresholds */ 1608 uint8_t battery_threshold[LB_BATTERY_LEVELS - 1]; 1609 1610 /* Map [AC][battery_level] to color index */ 1611 uint8_t s0_idx[2][LB_BATTERY_LEVELS]; /* AP is running */ 1612 uint8_t s3_idx[2][LB_BATTERY_LEVELS]; /* AP is sleeping */ 1613 1614 /* Color palette */ 1615 struct rgb_s color[8]; /* 0-3 are Google colors */ 1616}; 1617 1618struct __ec_todo_packed lightbar_params_v1 { 1619 /* Timing */ 1620 int32_t google_ramp_up; 1621 int32_t google_ramp_down; 1622 int32_t s3s0_ramp_up; 1623 int32_t s0_tick_delay[2]; /* AC=0/1 */ 1624 int32_t s0a_tick_delay[2]; /* AC=0/1 */ 1625 int32_t s0s3_ramp_down; 1626 int32_t s3_sleep_for; 1627 int32_t s3_ramp_up; 1628 int32_t s3_ramp_down; 1629 int32_t s5_ramp_up; 1630 int32_t s5_ramp_down; 1631 int32_t tap_tick_delay; 1632 int32_t tap_gate_delay; 1633 int32_t tap_display_time; 1634 1635 /* Tap-for-battery params */ 1636 uint8_t tap_pct_red; 1637 uint8_t tap_pct_green; 1638 uint8_t tap_seg_min_on; 1639 uint8_t tap_seg_max_on; 1640 uint8_t tap_seg_osc; 1641 uint8_t tap_idx[3]; 1642 1643 /* Oscillation */ 1644 uint8_t osc_min[2]; /* AC=0/1 */ 1645 uint8_t osc_max[2]; /* AC=0/1 */ 1646 uint8_t w_ofs[2]; /* AC=0/1 */ 1647 1648 /* Brightness limits based on the backlight and AC. */ 1649 uint8_t bright_bl_off_fixed[2]; /* AC=0/1 */ 1650 uint8_t bright_bl_on_min[2]; /* AC=0/1 */ 1651 uint8_t bright_bl_on_max[2]; /* AC=0/1 */ 1652 1653 /* Battery level thresholds */ 1654 uint8_t battery_threshold[LB_BATTERY_LEVELS - 1]; 1655 1656 /* Map [AC][battery_level] to color index */ 1657 uint8_t s0_idx[2][LB_BATTERY_LEVELS]; /* AP is running */ 1658 uint8_t s3_idx[2][LB_BATTERY_LEVELS]; /* AP is sleeping */ 1659 1660 /* s5: single color pulse on inhibited power-up */ 1661 uint8_t s5_idx; 1662 1663 /* Color palette */ 1664 struct rgb_s color[8]; /* 0-3 are Google colors */ 1665}; 1666 1667/* Lightbar command params v2 1668 * crbug.com/467716 1669 * 1670 * lightbar_parms_v1 was too big for i2c, therefore in v2, we split them up by 1671 * logical groups to make it more manageable ( < 120 bytes). 1672 * 1673 * NOTE: Each of these groups must be less than 120 bytes. 1674 */ 1675 1676struct __ec_todo_packed lightbar_params_v2_timing { 1677 /* Timing */ 1678 int32_t google_ramp_up; 1679 int32_t google_ramp_down; 1680 int32_t s3s0_ramp_up; 1681 int32_t s0_tick_delay[2]; /* AC=0/1 */ 1682 int32_t s0a_tick_delay[2]; /* AC=0/1 */ 1683 int32_t s0s3_ramp_down; 1684 int32_t s3_sleep_for; 1685 int32_t s3_ramp_up; 1686 int32_t s3_ramp_down; 1687 int32_t s5_ramp_up; 1688 int32_t s5_ramp_down; 1689 int32_t tap_tick_delay; 1690 int32_t tap_gate_delay; 1691 int32_t tap_display_time; 1692}; 1693 1694struct __ec_todo_packed lightbar_params_v2_tap { 1695 /* Tap-for-battery params */ 1696 uint8_t tap_pct_red; 1697 uint8_t tap_pct_green; 1698 uint8_t tap_seg_min_on; 1699 uint8_t tap_seg_max_on; 1700 uint8_t tap_seg_osc; 1701 uint8_t tap_idx[3]; 1702}; 1703 1704struct __ec_todo_packed lightbar_params_v2_oscillation { 1705 /* Oscillation */ 1706 uint8_t osc_min[2]; /* AC=0/1 */ 1707 uint8_t osc_max[2]; /* AC=0/1 */ 1708 uint8_t w_ofs[2]; /* AC=0/1 */ 1709}; 1710 1711struct __ec_todo_packed lightbar_params_v2_brightness { 1712 /* Brightness limits based on the backlight and AC. */ 1713 uint8_t bright_bl_off_fixed[2]; /* AC=0/1 */ 1714 uint8_t bright_bl_on_min[2]; /* AC=0/1 */ 1715 uint8_t bright_bl_on_max[2]; /* AC=0/1 */ 1716}; 1717 1718struct __ec_todo_packed lightbar_params_v2_thresholds { 1719 /* Battery level thresholds */ 1720 uint8_t battery_threshold[LB_BATTERY_LEVELS - 1]; 1721}; 1722 1723struct __ec_todo_packed lightbar_params_v2_colors { 1724 /* Map [AC][battery_level] to color index */ 1725 uint8_t s0_idx[2][LB_BATTERY_LEVELS]; /* AP is running */ 1726 uint8_t s3_idx[2][LB_BATTERY_LEVELS]; /* AP is sleeping */ 1727 1728 /* s5: single color pulse on inhibited power-up */ 1729 uint8_t s5_idx; 1730 1731 /* Color palette */ 1732 struct rgb_s color[8]; /* 0-3 are Google colors */ 1733}; 1734 1735/* Lightbyte program. */ 1736#define EC_LB_PROG_LEN 192 1737struct __ec_todo_unpacked lightbar_program { 1738 uint8_t size; 1739 uint8_t data[EC_LB_PROG_LEN]; 1740}; 1741 1742struct __ec_todo_packed ec_params_lightbar { 1743 uint8_t cmd; /* Command (see enum lightbar_command) */ 1744 union { 1745 struct __ec_todo_unpacked { 1746 /* no args */ 1747 } dump, off, on, init, get_seq, get_params_v0, get_params_v1, 1748 version, get_brightness, get_demo, suspend, resume, 1749 get_params_v2_timing, get_params_v2_tap, 1750 get_params_v2_osc, get_params_v2_bright, 1751 get_params_v2_thlds, get_params_v2_colors; 1752 1753 struct __ec_todo_unpacked { 1754 uint8_t num; 1755 } set_brightness, seq, demo; 1756 1757 struct __ec_todo_unpacked { 1758 uint8_t ctrl, reg, value; 1759 } reg; 1760 1761 struct __ec_todo_unpacked { 1762 uint8_t led, red, green, blue; 1763 } set_rgb; 1764 1765 struct __ec_todo_unpacked { 1766 uint8_t led; 1767 } get_rgb; 1768 1769 struct __ec_todo_unpacked { 1770 uint8_t enable; 1771 } manual_suspend_ctrl; 1772 1773 struct lightbar_params_v0 set_params_v0; 1774 struct lightbar_params_v1 set_params_v1; 1775 1776 struct lightbar_params_v2_timing set_v2par_timing; 1777 struct lightbar_params_v2_tap set_v2par_tap; 1778 struct lightbar_params_v2_oscillation set_v2par_osc; 1779 struct lightbar_params_v2_brightness set_v2par_bright; 1780 struct lightbar_params_v2_thresholds set_v2par_thlds; 1781 struct lightbar_params_v2_colors set_v2par_colors; 1782 1783 struct lightbar_program set_program; 1784 }; 1785}; 1786 1787struct __ec_todo_packed ec_response_lightbar { 1788 union { 1789 struct __ec_todo_unpacked { 1790 struct __ec_todo_unpacked { 1791 uint8_t reg; 1792 uint8_t ic0; 1793 uint8_t ic1; 1794 } vals[23]; 1795 } dump; 1796 1797 struct __ec_todo_unpacked { 1798 uint8_t num; 1799 } get_seq, get_brightness, get_demo; 1800 1801 struct lightbar_params_v0 get_params_v0; 1802 struct lightbar_params_v1 get_params_v1; 1803 1804 1805 struct lightbar_params_v2_timing get_params_v2_timing; 1806 struct lightbar_params_v2_tap get_params_v2_tap; 1807 struct lightbar_params_v2_oscillation get_params_v2_osc; 1808 struct lightbar_params_v2_brightness get_params_v2_bright; 1809 struct lightbar_params_v2_thresholds get_params_v2_thlds; 1810 struct lightbar_params_v2_colors get_params_v2_colors; 1811 1812 struct __ec_todo_unpacked { 1813 uint32_t num; 1814 uint32_t flags; 1815 } version; 1816 1817 struct __ec_todo_unpacked { 1818 uint8_t red, green, blue; 1819 } get_rgb; 1820 1821 struct __ec_todo_unpacked { 1822 /* no return params */ 1823 } off, on, init, set_brightness, seq, reg, set_rgb, 1824 demo, set_params_v0, set_params_v1, 1825 set_program, manual_suspend_ctrl, suspend, resume, 1826 set_v2par_timing, set_v2par_tap, 1827 set_v2par_osc, set_v2par_bright, set_v2par_thlds, 1828 set_v2par_colors; 1829 }; 1830}; 1831 1832/* Lightbar commands */ 1833enum lightbar_command { 1834 LIGHTBAR_CMD_DUMP = 0, 1835 LIGHTBAR_CMD_OFF = 1, 1836 LIGHTBAR_CMD_ON = 2, 1837 LIGHTBAR_CMD_INIT = 3, 1838 LIGHTBAR_CMD_SET_BRIGHTNESS = 4, 1839 LIGHTBAR_CMD_SEQ = 5, 1840 LIGHTBAR_CMD_REG = 6, 1841 LIGHTBAR_CMD_SET_RGB = 7, 1842 LIGHTBAR_CMD_GET_SEQ = 8, 1843 LIGHTBAR_CMD_DEMO = 9, 1844 LIGHTBAR_CMD_GET_PARAMS_V0 = 10, 1845 LIGHTBAR_CMD_SET_PARAMS_V0 = 11, 1846 LIGHTBAR_CMD_VERSION = 12, 1847 LIGHTBAR_CMD_GET_BRIGHTNESS = 13, 1848 LIGHTBAR_CMD_GET_RGB = 14, 1849 LIGHTBAR_CMD_GET_DEMO = 15, 1850 LIGHTBAR_CMD_GET_PARAMS_V1 = 16, 1851 LIGHTBAR_CMD_SET_PARAMS_V1 = 17, 1852 LIGHTBAR_CMD_SET_PROGRAM = 18, 1853 LIGHTBAR_CMD_MANUAL_SUSPEND_CTRL = 19, 1854 LIGHTBAR_CMD_SUSPEND = 20, 1855 LIGHTBAR_CMD_RESUME = 21, 1856 LIGHTBAR_CMD_GET_PARAMS_V2_TIMING = 22, 1857 LIGHTBAR_CMD_SET_PARAMS_V2_TIMING = 23, 1858 LIGHTBAR_CMD_GET_PARAMS_V2_TAP = 24, 1859 LIGHTBAR_CMD_SET_PARAMS_V2_TAP = 25, 1860 LIGHTBAR_CMD_GET_PARAMS_V2_OSCILLATION = 26, 1861 LIGHTBAR_CMD_SET_PARAMS_V2_OSCILLATION = 27, 1862 LIGHTBAR_CMD_GET_PARAMS_V2_BRIGHTNESS = 28, 1863 LIGHTBAR_CMD_SET_PARAMS_V2_BRIGHTNESS = 29, 1864 LIGHTBAR_CMD_GET_PARAMS_V2_THRESHOLDS = 30, 1865 LIGHTBAR_CMD_SET_PARAMS_V2_THRESHOLDS = 31, 1866 LIGHTBAR_CMD_GET_PARAMS_V2_COLORS = 32, 1867 LIGHTBAR_CMD_SET_PARAMS_V2_COLORS = 33, 1868 LIGHTBAR_NUM_CMDS 1869}; 1870 1871/*****************************************************************************/ 1872/* LED control commands */ 1873 1874#define EC_CMD_LED_CONTROL 0x0029 1875 1876enum ec_led_id { 1877 /* LED to indicate battery state of charge */ 1878 EC_LED_ID_BATTERY_LED = 0, 1879 /* 1880 * LED to indicate system power state (on or in suspend). 1881 * May be on power button or on C-panel. 1882 */ 1883 EC_LED_ID_POWER_LED, 1884 /* LED on power adapter or its plug */ 1885 EC_LED_ID_ADAPTER_LED, 1886 /* LED to indicate left side */ 1887 EC_LED_ID_LEFT_LED, 1888 /* LED to indicate right side */ 1889 EC_LED_ID_RIGHT_LED, 1890 /* LED to indicate recovery mode with HW_REINIT */ 1891 EC_LED_ID_RECOVERY_HW_REINIT_LED, 1892 /* LED to indicate sysrq debug mode. */ 1893 EC_LED_ID_SYSRQ_DEBUG_LED, 1894 1895 EC_LED_ID_COUNT 1896}; 1897 1898/* LED control flags */ 1899#define EC_LED_FLAGS_QUERY (1 << 0) /* Query LED capability only */ 1900#define EC_LED_FLAGS_AUTO (1 << 1) /* Switch LED back to automatic control */ 1901 1902enum ec_led_colors { 1903 EC_LED_COLOR_RED = 0, 1904 EC_LED_COLOR_GREEN, 1905 EC_LED_COLOR_BLUE, 1906 EC_LED_COLOR_YELLOW, 1907 EC_LED_COLOR_WHITE, 1908 EC_LED_COLOR_AMBER, 1909 1910 EC_LED_COLOR_COUNT 1911}; 1912 1913struct __ec_align1 ec_params_led_control { 1914 uint8_t led_id; /* Which LED to control */ 1915 uint8_t flags; /* Control flags */ 1916 1917 uint8_t brightness[EC_LED_COLOR_COUNT]; 1918}; 1919 1920struct __ec_align1 ec_response_led_control { 1921 /* 1922 * Available brightness value range. 1923 * 1924 * Range 0 means color channel not present. 1925 * Range 1 means on/off control. 1926 * Other values means the LED is control by PWM. 1927 */ 1928 uint8_t brightness_range[EC_LED_COLOR_COUNT]; 1929}; 1930 1931/*****************************************************************************/ 1932/* Verified boot commands */ 1933 1934/* 1935 * Note: command code 0x29 version 0 was VBOOT_CMD in Link EVT; it may be 1936 * reused for other purposes with version > 0. 1937 */ 1938 1939/* Verified boot hash command */ 1940#define EC_CMD_VBOOT_HASH 0x002A 1941 1942struct __ec_align4 ec_params_vboot_hash { 1943 uint8_t cmd; /* enum ec_vboot_hash_cmd */ 1944 uint8_t hash_type; /* enum ec_vboot_hash_type */ 1945 uint8_t nonce_size; /* Nonce size; may be 0 */ 1946 uint8_t reserved0; /* Reserved; set 0 */ 1947 uint32_t offset; /* Offset in flash to hash */ 1948 uint32_t size; /* Number of bytes to hash */ 1949 uint8_t nonce_data[64]; /* Nonce data; ignored if nonce_size=0 */ 1950}; 1951 1952struct __ec_align4 ec_response_vboot_hash { 1953 uint8_t status; /* enum ec_vboot_hash_status */ 1954 uint8_t hash_type; /* enum ec_vboot_hash_type */ 1955 uint8_t digest_size; /* Size of hash digest in bytes */ 1956 uint8_t reserved0; /* Ignore; will be 0 */ 1957 uint32_t offset; /* Offset in flash which was hashed */ 1958 uint32_t size; /* Number of bytes hashed */ 1959 uint8_t hash_digest[64]; /* Hash digest data */ 1960}; 1961 1962enum ec_vboot_hash_cmd { 1963 EC_VBOOT_HASH_GET = 0, /* Get current hash status */ 1964 EC_VBOOT_HASH_ABORT = 1, /* Abort calculating current hash */ 1965 EC_VBOOT_HASH_START = 2, /* Start computing a new hash */ 1966 EC_VBOOT_HASH_RECALC = 3, /* Synchronously compute a new hash */ 1967}; 1968 1969enum ec_vboot_hash_type { 1970 EC_VBOOT_HASH_TYPE_SHA256 = 0, /* SHA-256 */ 1971}; 1972 1973enum ec_vboot_hash_status { 1974 EC_VBOOT_HASH_STATUS_NONE = 0, /* No hash (not started, or aborted) */ 1975 EC_VBOOT_HASH_STATUS_DONE = 1, /* Finished computing a hash */ 1976 EC_VBOOT_HASH_STATUS_BUSY = 2, /* Busy computing a hash */ 1977}; 1978 1979/* 1980 * Special values for offset for EC_VBOOT_HASH_START and EC_VBOOT_HASH_RECALC. 1981 * If one of these is specified, the EC will automatically update offset and 1982 * size to the correct values for the specified image (RO or RW). 1983 */ 1984#define EC_VBOOT_HASH_OFFSET_RO 0xfffffffe 1985#define EC_VBOOT_HASH_OFFSET_ACTIVE 0xfffffffd 1986#define EC_VBOOT_HASH_OFFSET_UPDATE 0xfffffffc 1987 1988/*****************************************************************************/ 1989/* 1990 * Motion sense commands. We'll make separate structs for sub-commands with 1991 * different input args, so that we know how much to expect. 1992 */ 1993#define EC_CMD_MOTION_SENSE_CMD 0x002B 1994 1995/* Motion sense commands */ 1996enum motionsense_command { 1997 /* 1998 * Dump command returns all motion sensor data including motion sense 1999 * module flags and individual sensor flags. 2000 */ 2001 MOTIONSENSE_CMD_DUMP = 0, 2002 2003 /* 2004 * Info command returns data describing the details of a given sensor, 2005 * including enum motionsensor_type, enum motionsensor_location, and 2006 * enum motionsensor_chip. 2007 */ 2008 MOTIONSENSE_CMD_INFO = 1, 2009 2010 /* 2011 * EC Rate command is a setter/getter command for the EC sampling rate 2012 * in milliseconds. 2013 * It is per sensor, the EC run sample task at the minimum of all 2014 * sensors EC_RATE. 2015 * For sensors without hardware FIFO, EC_RATE should be equals to 1/ODR 2016 * to collect all the sensor samples. 2017 * For sensor with hardware FIFO, EC_RATE is used as the maximal delay 2018 * to process of all motion sensors in milliseconds. 2019 */ 2020 MOTIONSENSE_CMD_EC_RATE = 2, 2021 2022 /* 2023 * Sensor ODR command is a setter/getter command for the output data 2024 * rate of a specific motion sensor in millihertz. 2025 */ 2026 MOTIONSENSE_CMD_SENSOR_ODR = 3, 2027 2028 /* 2029 * Sensor range command is a setter/getter command for the range of 2030 * a specified motion sensor in +/-G's or +/- deg/s. 2031 */ 2032 MOTIONSENSE_CMD_SENSOR_RANGE = 4, 2033 2034 /* 2035 * Setter/getter command for the keyboard wake angle. When the lid 2036 * angle is greater than this value, keyboard wake is disabled in S3, 2037 * and when the lid angle goes less than this value, keyboard wake is 2038 * enabled. Note, the lid angle measurement is an approximate, 2039 * un-calibrated value, hence the wake angle isn't exact. 2040 */ 2041 MOTIONSENSE_CMD_KB_WAKE_ANGLE = 5, 2042 2043 /* 2044 * Returns a single sensor data. 2045 */ 2046 MOTIONSENSE_CMD_DATA = 6, 2047 2048 /* 2049 * Return sensor fifo info. 2050 */ 2051 MOTIONSENSE_CMD_FIFO_INFO = 7, 2052 2053 /* 2054 * Insert a flush element in the fifo and return sensor fifo info. 2055 * The host can use that element to synchronize its operation. 2056 */ 2057 MOTIONSENSE_CMD_FIFO_FLUSH = 8, 2058 2059 /* 2060 * Return a portion of the fifo. 2061 */ 2062 MOTIONSENSE_CMD_FIFO_READ = 9, 2063 2064 /* 2065 * Perform low level calibration. 2066 * On sensors that support it, ask to do offset calibration. 2067 */ 2068 MOTIONSENSE_CMD_PERFORM_CALIB = 10, 2069 2070 /* 2071 * Sensor Offset command is a setter/getter command for the offset 2072 * used for calibration. 2073 * The offsets can be calculated by the host, or via 2074 * PERFORM_CALIB command. 2075 */ 2076 MOTIONSENSE_CMD_SENSOR_OFFSET = 11, 2077 2078 /* 2079 * List available activities for a MOTION sensor. 2080 * Indicates if they are enabled or disabled. 2081 */ 2082 MOTIONSENSE_CMD_LIST_ACTIVITIES = 12, 2083 2084 /* 2085 * Activity management 2086 * Enable/Disable activity recognition. 2087 */ 2088 MOTIONSENSE_CMD_SET_ACTIVITY = 13, 2089 2090 /* 2091 * Lid Angle 2092 */ 2093 MOTIONSENSE_CMD_LID_ANGLE = 14, 2094 2095 /* 2096 * Allow the FIFO to trigger interrupt via MKBP events. 2097 * By default the FIFO does not send interrupt to process the FIFO 2098 * until the AP is ready or it is coming from a wakeup sensor. 2099 */ 2100 MOTIONSENSE_CMD_FIFO_INT_ENABLE = 15, 2101 2102 /* 2103 * Spoof the readings of the sensors. The spoofed readings can be set 2104 * to arbitrary values, or will lock to the last read actual values. 2105 */ 2106 MOTIONSENSE_CMD_SPOOF = 16, 2107 2108 /* Number of motionsense sub-commands. */ 2109 MOTIONSENSE_NUM_CMDS 2110}; 2111 2112/* List of motion sensor types. */ 2113enum motionsensor_type { 2114 MOTIONSENSE_TYPE_ACCEL = 0, 2115 MOTIONSENSE_TYPE_GYRO = 1, 2116 MOTIONSENSE_TYPE_MAG = 2, 2117 MOTIONSENSE_TYPE_PROX = 3, 2118 MOTIONSENSE_TYPE_LIGHT = 4, 2119 MOTIONSENSE_TYPE_ACTIVITY = 5, 2120 MOTIONSENSE_TYPE_BARO = 6, 2121 MOTIONSENSE_TYPE_MAX, 2122}; 2123 2124/* List of motion sensor locations. */ 2125enum motionsensor_location { 2126 MOTIONSENSE_LOC_BASE = 0, 2127 MOTIONSENSE_LOC_LID = 1, 2128 MOTIONSENSE_LOC_MAX, 2129}; 2130 2131/* List of motion sensor chips. */ 2132enum motionsensor_chip { 2133 MOTIONSENSE_CHIP_KXCJ9 = 0, 2134 MOTIONSENSE_CHIP_LSM6DS0 = 1, 2135 MOTIONSENSE_CHIP_BMI160 = 2, 2136 MOTIONSENSE_CHIP_SI1141 = 3, 2137 MOTIONSENSE_CHIP_SI1142 = 4, 2138 MOTIONSENSE_CHIP_SI1143 = 5, 2139 MOTIONSENSE_CHIP_KX022 = 6, 2140 MOTIONSENSE_CHIP_L3GD20H = 7, 2141 MOTIONSENSE_CHIP_BMA255 = 8, 2142 MOTIONSENSE_CHIP_BMP280 = 9, 2143 MOTIONSENSE_CHIP_OPT3001 = 10, 2144}; 2145 2146struct __ec_todo_packed ec_response_motion_sensor_data { 2147 /* Flags for each sensor. */ 2148 uint8_t flags; 2149 /* sensor number the data comes from */ 2150 uint8_t sensor_num; 2151 /* Each sensor is up to 3-axis. */ 2152 union { 2153 int16_t data[3]; 2154 struct __ec_todo_packed { 2155 uint16_t reserved; 2156 uint32_t timestamp; 2157 }; 2158 struct __ec_todo_unpacked { 2159 uint8_t activity; /* motionsensor_activity */ 2160 uint8_t state; 2161 int16_t add_info[2]; 2162 }; 2163 }; 2164}; 2165 2166/* Note: used in ec_response_get_next_data */ 2167struct __ec_todo_packed ec_response_motion_sense_fifo_info { 2168 /* Size of the fifo */ 2169 uint16_t size; 2170 /* Amount of space used in the fifo */ 2171 uint16_t count; 2172 /* Timestamp recorded in us */ 2173 uint32_t timestamp; 2174 /* Total amount of vector lost */ 2175 uint16_t total_lost; 2176 /* Lost events since the last fifo_info, per sensors */ 2177 uint16_t lost[0]; 2178}; 2179 2180struct __ec_todo_packed ec_response_motion_sense_fifo_data { 2181 uint32_t number_data; 2182 struct ec_response_motion_sensor_data data[0]; 2183}; 2184 2185/* List supported activity recognition */ 2186enum motionsensor_activity { 2187 MOTIONSENSE_ACTIVITY_RESERVED = 0, 2188 MOTIONSENSE_ACTIVITY_SIG_MOTION = 1, 2189 MOTIONSENSE_ACTIVITY_DOUBLE_TAP = 2, 2190}; 2191 2192struct __ec_todo_unpacked ec_motion_sense_activity { 2193 uint8_t sensor_num; 2194 uint8_t activity; /* one of enum motionsensor_activity */ 2195 uint8_t enable; /* 1: enable, 0: disable */ 2196 uint8_t reserved; 2197 uint16_t parameters[3]; /* activity dependent parameters */ 2198}; 2199 2200/* Module flag masks used for the dump sub-command. */ 2201#define MOTIONSENSE_MODULE_FLAG_ACTIVE (1<<0) 2202 2203/* Sensor flag masks used for the dump sub-command. */ 2204#define MOTIONSENSE_SENSOR_FLAG_PRESENT (1<<0) 2205 2206/* 2207 * Flush entry for synchronization. 2208 * data contains time stamp 2209 */ 2210#define MOTIONSENSE_SENSOR_FLAG_FLUSH (1<<0) 2211#define MOTIONSENSE_SENSOR_FLAG_TIMESTAMP (1<<1) 2212#define MOTIONSENSE_SENSOR_FLAG_WAKEUP (1<<2) 2213#define MOTIONSENSE_SENSOR_FLAG_TABLET_MODE (1<<3) 2214 2215/* 2216 * Send this value for the data element to only perform a read. If you 2217 * send any other value, the EC will interpret it as data to set and will 2218 * return the actual value set. 2219 */ 2220#define EC_MOTION_SENSE_NO_VALUE -1 2221 2222#define EC_MOTION_SENSE_INVALID_CALIB_TEMP 0x8000 2223 2224/* MOTIONSENSE_CMD_SENSOR_OFFSET subcommand flag */ 2225/* Set Calibration information */ 2226#define MOTION_SENSE_SET_OFFSET 1 2227 2228#define LID_ANGLE_UNRELIABLE 500 2229 2230enum motionsense_spoof_mode { 2231 /* Disable spoof mode. */ 2232 MOTIONSENSE_SPOOF_MODE_DISABLE = 0, 2233 2234 /* Enable spoof mode, but use provided component values. */ 2235 MOTIONSENSE_SPOOF_MODE_CUSTOM, 2236 2237 /* Enable spoof mode, but use the current sensor values. */ 2238 MOTIONSENSE_SPOOF_MODE_LOCK_CURRENT, 2239 2240 /* Query the current spoof mode status for the sensor. */ 2241 MOTIONSENSE_SPOOF_MODE_QUERY, 2242}; 2243 2244struct __ec_todo_packed ec_params_motion_sense { 2245 uint8_t cmd; 2246 union { 2247 /* Used for MOTIONSENSE_CMD_DUMP */ 2248 struct __ec_todo_unpacked { 2249 /* 2250 * Maximal number of sensor the host is expecting. 2251 * 0 means the host is only interested in the number 2252 * of sensors controlled by the EC. 2253 */ 2254 uint8_t max_sensor_count; 2255 } dump; 2256 2257 /* 2258 * Used for MOTIONSENSE_CMD_KB_WAKE_ANGLE. 2259 */ 2260 struct __ec_todo_unpacked { 2261 /* Data to set or EC_MOTION_SENSE_NO_VALUE to read. 2262 * kb_wake_angle: angle to wakup AP. 2263 */ 2264 int16_t data; 2265 } kb_wake_angle; 2266 2267 /* Used for MOTIONSENSE_CMD_INFO, MOTIONSENSE_CMD_DATA 2268 * and MOTIONSENSE_CMD_PERFORM_CALIB. */ 2269 struct __ec_todo_unpacked { 2270 uint8_t sensor_num; 2271 } info, info_3, data, fifo_flush, perform_calib, 2272 list_activities; 2273 2274 /* 2275 * Used for MOTIONSENSE_CMD_EC_RATE, MOTIONSENSE_CMD_SENSOR_ODR 2276 * and MOTIONSENSE_CMD_SENSOR_RANGE. 2277 */ 2278 struct __ec_todo_unpacked { 2279 uint8_t sensor_num; 2280 2281 /* Rounding flag, true for round-up, false for down. */ 2282 uint8_t roundup; 2283 2284 uint16_t reserved; 2285 2286 /* Data to set or EC_MOTION_SENSE_NO_VALUE to read. */ 2287 int32_t data; 2288 } ec_rate, sensor_odr, sensor_range; 2289 2290 /* Used for MOTIONSENSE_CMD_SENSOR_OFFSET */ 2291 struct __ec_todo_packed { 2292 uint8_t sensor_num; 2293 2294 /* 2295 * bit 0: If set (MOTION_SENSE_SET_OFFSET), set 2296 * the calibration information in the EC. 2297 * If unset, just retrieve calibration information. 2298 */ 2299 uint16_t flags; 2300 2301 /* 2302 * Temperature at calibration, in units of 0.01 C 2303 * 0x8000: invalid / unknown. 2304 * 0x0: 0C 2305 * 0x7fff: +327.67C 2306 */ 2307 int16_t temp; 2308 2309 /* 2310 * Offset for calibration. 2311 * Unit: 2312 * Accelerometer: 1/1024 g 2313 * Gyro: 1/1024 deg/s 2314 * Compass: 1/16 uT 2315 */ 2316 int16_t offset[3]; 2317 } sensor_offset; 2318 2319 /* Used for MOTIONSENSE_CMD_FIFO_INFO */ 2320 struct __ec_todo_unpacked { 2321 } fifo_info; 2322 2323 /* Used for MOTIONSENSE_CMD_FIFO_READ */ 2324 struct __ec_todo_unpacked { 2325 /* 2326 * Number of expected vector to return. 2327 * EC may return less or 0 if none available. 2328 */ 2329 uint32_t max_data_vector; 2330 } fifo_read; 2331 2332 struct ec_motion_sense_activity set_activity; 2333 2334 /* Used for MOTIONSENSE_CMD_LID_ANGLE */ 2335 struct __ec_todo_unpacked { 2336 } lid_angle; 2337 2338 /* Used for MOTIONSENSE_CMD_FIFO_INT_ENABLE */ 2339 struct __ec_todo_unpacked { 2340 /* 2341 * 1: enable, 0 disable fifo, 2342 * EC_MOTION_SENSE_NO_VALUE return value. 2343 */ 2344 int8_t enable; 2345 } fifo_int_enable; 2346 2347 /* Used for MOTIONSENSE_CMD_SPOOF */ 2348 struct __ec_todo_packed { 2349 uint8_t sensor_id; 2350 2351 /* See enum motionsense_spoof_mode. */ 2352 uint8_t spoof_enable; 2353 2354 /* Ignored, used for alignment. */ 2355 uint8_t reserved; 2356 2357 /* Individual component values to spoof. */ 2358 int16_t components[3]; 2359 } spoof; 2360 }; 2361}; 2362 2363struct __ec_todo_packed ec_response_motion_sense { 2364 union { 2365 /* Used for MOTIONSENSE_CMD_DUMP */ 2366 struct __ec_todo_unpacked { 2367 /* Flags representing the motion sensor module. */ 2368 uint8_t module_flags; 2369 2370 /* Number of sensors managed directly by the EC */ 2371 uint8_t sensor_count; 2372 2373 /* 2374 * sensor data is truncated if response_max is too small 2375 * for holding all the data. 2376 */ 2377 struct ec_response_motion_sensor_data sensor[0]; 2378 } dump; 2379 2380 /* Used for MOTIONSENSE_CMD_INFO. */ 2381 struct __ec_todo_unpacked { 2382 /* Should be element of enum motionsensor_type. */ 2383 uint8_t type; 2384 2385 /* Should be element of enum motionsensor_location. */ 2386 uint8_t location; 2387 2388 /* Should be element of enum motionsensor_chip. */ 2389 uint8_t chip; 2390 } info; 2391 2392 /* Used for MOTIONSENSE_CMD_INFO version 3 */ 2393 struct __ec_todo_unpacked { 2394 /* Should be element of enum motionsensor_type. */ 2395 uint8_t type; 2396 2397 /* Should be element of enum motionsensor_location. */ 2398 uint8_t location; 2399 2400 /* Should be element of enum motionsensor_chip. */ 2401 uint8_t chip; 2402 2403 /* Minimum sensor sampling frequency */ 2404 uint32_t min_frequency; 2405 2406 /* Maximum sensor sampling frequency */ 2407 uint32_t max_frequency; 2408 2409 /* Max number of sensor events that could be in fifo */ 2410 uint32_t fifo_max_event_count; 2411 } info_3; 2412 2413 /* Used for MOTIONSENSE_CMD_DATA */ 2414 struct ec_response_motion_sensor_data data; 2415 2416 /* 2417 * Used for MOTIONSENSE_CMD_EC_RATE, MOTIONSENSE_CMD_SENSOR_ODR, 2418 * MOTIONSENSE_CMD_SENSOR_RANGE, 2419 * MOTIONSENSE_CMD_KB_WAKE_ANGLE, 2420 * MOTIONSENSE_CMD_FIFO_INT_ENABLE and 2421 * MOTIONSENSE_CMD_SPOOF. 2422 */ 2423 struct __ec_todo_unpacked { 2424 /* Current value of the parameter queried. */ 2425 int32_t ret; 2426 } ec_rate, sensor_odr, sensor_range, kb_wake_angle, 2427 fifo_int_enable, spoof; 2428 2429 /* Used for MOTIONSENSE_CMD_SENSOR_OFFSET */ 2430 struct __ec_todo_unpacked { 2431 int16_t temp; 2432 int16_t offset[3]; 2433 } sensor_offset, perform_calib; 2434 2435 struct ec_response_motion_sense_fifo_info fifo_info, fifo_flush; 2436 2437 struct ec_response_motion_sense_fifo_data fifo_read; 2438 2439 struct __ec_todo_packed { 2440 uint16_t reserved; 2441 uint32_t enabled; 2442 uint32_t disabled; 2443 } list_activities; 2444 2445 struct __ec_todo_unpacked { 2446 } set_activity; 2447 2448 /* Used for MOTIONSENSE_CMD_LID_ANGLE */ 2449 struct __ec_todo_unpacked { 2450 /* 2451 * Angle between 0 and 360 degree if available, 2452 * LID_ANGLE_UNRELIABLE otherwise. 2453 */ 2454 uint16_t value; 2455 } lid_angle; 2456 }; 2457}; 2458 2459/*****************************************************************************/ 2460/* Force lid open command */ 2461 2462/* Make lid event always open */ 2463#define EC_CMD_FORCE_LID_OPEN 0x002C 2464 2465struct __ec_align1 ec_params_force_lid_open { 2466 uint8_t enabled; 2467}; 2468 2469/*****************************************************************************/ 2470/* Configure the behavior of the power button */ 2471#define EC_CMD_CONFIG_POWER_BUTTON 0x002D 2472 2473enum ec_config_power_button_flags { 2474 /* Enable/Disable power button pulses for x86 devices */ 2475 EC_POWER_BUTTON_ENABLE_PULSE = (1 << 0), 2476}; 2477 2478struct __ec_align1 ec_params_config_power_button { 2479 /* See enum ec_config_power_button_flags */ 2480 uint8_t flags; 2481}; 2482 2483/*****************************************************************************/ 2484/* USB charging control commands */ 2485 2486/* Set USB port charging mode */ 2487#define EC_CMD_USB_CHARGE_SET_MODE 0x0030 2488 2489struct __ec_align1 ec_params_usb_charge_set_mode { 2490 uint8_t usb_port_id; 2491 uint8_t mode; 2492}; 2493 2494/*****************************************************************************/ 2495/* Persistent storage for host */ 2496 2497/* Maximum bytes that can be read/written in a single command */ 2498#define EC_PSTORE_SIZE_MAX 64 2499 2500/* Get persistent storage info */ 2501#define EC_CMD_PSTORE_INFO 0x0040 2502 2503struct __ec_align4 ec_response_pstore_info { 2504 /* Persistent storage size, in bytes */ 2505 uint32_t pstore_size; 2506 /* Access size; read/write offset and size must be a multiple of this */ 2507 uint32_t access_size; 2508}; 2509 2510/* 2511 * Read persistent storage 2512 * 2513 * Response is params.size bytes of data. 2514 */ 2515#define EC_CMD_PSTORE_READ 0x0041 2516 2517struct __ec_align4 ec_params_pstore_read { 2518 uint32_t offset; /* Byte offset to read */ 2519 uint32_t size; /* Size to read in bytes */ 2520}; 2521 2522/* Write persistent storage */ 2523#define EC_CMD_PSTORE_WRITE 0x0042 2524 2525struct __ec_align4 ec_params_pstore_write { 2526 uint32_t offset; /* Byte offset to write */ 2527 uint32_t size; /* Size to write in bytes */ 2528 uint8_t data[EC_PSTORE_SIZE_MAX]; 2529}; 2530 2531/*****************************************************************************/ 2532/* Real-time clock */ 2533 2534/* RTC params and response structures */ 2535struct __ec_align4 ec_params_rtc { 2536 uint32_t time; 2537}; 2538 2539struct __ec_align4 ec_response_rtc { 2540 uint32_t time; 2541}; 2542 2543/* These use ec_response_rtc */ 2544#define EC_CMD_RTC_GET_VALUE 0x0044 2545#define EC_CMD_RTC_GET_ALARM 0x0045 2546 2547/* These all use ec_params_rtc */ 2548#define EC_CMD_RTC_SET_VALUE 0x0046 2549#define EC_CMD_RTC_SET_ALARM 0x0047 2550 2551/* Pass as time param to SET_ALARM to clear the current alarm */ 2552#define EC_RTC_ALARM_CLEAR 0 2553 2554/*****************************************************************************/ 2555/* Port80 log access */ 2556 2557/* Maximum entries that can be read/written in a single command */ 2558#define EC_PORT80_SIZE_MAX 32 2559 2560/* Get last port80 code from previous boot */ 2561#define EC_CMD_PORT80_LAST_BOOT 0x0048 2562#define EC_CMD_PORT80_READ 0x0048 2563 2564enum ec_port80_subcmd { 2565 EC_PORT80_GET_INFO = 0, 2566 EC_PORT80_READ_BUFFER, 2567}; 2568 2569struct __ec_todo_packed ec_params_port80_read { 2570 uint16_t subcmd; 2571 union { 2572 struct __ec_todo_unpacked { 2573 uint32_t offset; 2574 uint32_t num_entries; 2575 } read_buffer; 2576 }; 2577}; 2578 2579struct __ec_todo_packed ec_response_port80_read { 2580 union { 2581 struct __ec_todo_unpacked { 2582 uint32_t writes; 2583 uint32_t history_size; 2584 uint32_t last_boot; 2585 } get_info; 2586 struct __ec_todo_unpacked { 2587 uint16_t codes[EC_PORT80_SIZE_MAX]; 2588 } data; 2589 }; 2590}; 2591 2592struct __ec_align2 ec_response_port80_last_boot { 2593 uint16_t code; 2594}; 2595 2596/*****************************************************************************/ 2597/* Temporary secure storage for host verified boot use */ 2598 2599/* Number of bytes in a vstore slot */ 2600#define EC_VSTORE_SLOT_SIZE 64 2601 2602/* Maximum number of vstore slots */ 2603#define EC_VSTORE_SLOT_MAX 32 2604 2605/* Get persistent storage info */ 2606#define EC_CMD_VSTORE_INFO 0x0049 2607struct __ec_align_size1 ec_response_vstore_info { 2608 /* Indicates which slots are locked */ 2609 uint32_t slot_locked; 2610 /* Total number of slots available */ 2611 uint8_t slot_count; 2612}; 2613 2614/* 2615 * Read temporary secure storage 2616 * 2617 * Response is EC_VSTORE_SLOT_SIZE bytes of data. 2618 */ 2619#define EC_CMD_VSTORE_READ 0x004A 2620 2621struct __ec_align1 ec_params_vstore_read { 2622 uint8_t slot; /* Slot to read from */ 2623}; 2624 2625struct __ec_align1 ec_response_vstore_read { 2626 uint8_t data[EC_VSTORE_SLOT_SIZE]; 2627}; 2628 2629/* 2630 * Write temporary secure storage and lock it. 2631 */ 2632#define EC_CMD_VSTORE_WRITE 0x004B 2633 2634struct __ec_align1 ec_params_vstore_write { 2635 uint8_t slot; /* Slot to write to */ 2636 uint8_t data[EC_VSTORE_SLOT_SIZE]; 2637}; 2638 2639/*****************************************************************************/ 2640/* Thermal engine commands. Note that there are two implementations. We'll 2641 * reuse the command number, but the data and behavior is incompatible. 2642 * Version 0 is what originally shipped on Link. 2643 * Version 1 separates the CPU thermal limits from the fan control. 2644 */ 2645 2646#define EC_CMD_THERMAL_SET_THRESHOLD 0x0050 2647#define EC_CMD_THERMAL_GET_THRESHOLD 0x0051 2648 2649/* The version 0 structs are opaque. You have to know what they are for 2650 * the get/set commands to make any sense. 2651 */ 2652 2653/* Version 0 - set */ 2654struct __ec_align2 ec_params_thermal_set_threshold { 2655 uint8_t sensor_type; 2656 uint8_t threshold_id; 2657 uint16_t value; 2658}; 2659 2660/* Version 0 - get */ 2661struct __ec_align1 ec_params_thermal_get_threshold { 2662 uint8_t sensor_type; 2663 uint8_t threshold_id; 2664}; 2665 2666struct __ec_align2 ec_response_thermal_get_threshold { 2667 uint16_t value; 2668}; 2669 2670 2671/* The version 1 structs are visible. */ 2672enum ec_temp_thresholds { 2673 EC_TEMP_THRESH_WARN = 0, 2674 EC_TEMP_THRESH_HIGH, 2675 EC_TEMP_THRESH_HALT, 2676 2677 EC_TEMP_THRESH_COUNT 2678}; 2679 2680/* 2681 * Thermal configuration for one temperature sensor. Temps are in degrees K. 2682 * Zero values will be silently ignored by the thermal task. 2683 * 2684 * Note that this structure is a sub-structure of 2685 * ec_params_thermal_set_threshold_v1, but maintains its alignment there. 2686 */ 2687struct __ec_align4 ec_thermal_config { 2688 uint32_t temp_host[EC_TEMP_THRESH_COUNT]; /* levels of hotness */ 2689 uint32_t temp_fan_off; /* no active cooling needed */ 2690 uint32_t temp_fan_max; /* max active cooling needed */ 2691}; 2692 2693/* Version 1 - get config for one sensor. */ 2694struct __ec_align4 ec_params_thermal_get_threshold_v1 { 2695 uint32_t sensor_num; 2696}; 2697/* This returns a struct ec_thermal_config */ 2698 2699/* Version 1 - set config for one sensor. 2700 * Use read-modify-write for best results! */ 2701struct __ec_align4 ec_params_thermal_set_threshold_v1 { 2702 uint32_t sensor_num; 2703 struct ec_thermal_config cfg; 2704}; 2705/* This returns no data */ 2706 2707/****************************************************************************/ 2708 2709/* Toggle automatic fan control */ 2710#define EC_CMD_THERMAL_AUTO_FAN_CTRL 0x0052 2711 2712/* Version 1 of input params */ 2713struct __ec_align1 ec_params_auto_fan_ctrl_v1 { 2714 uint8_t fan_idx; 2715}; 2716 2717/* Get/Set TMP006 calibration data */ 2718#define EC_CMD_TMP006_GET_CALIBRATION 0x0053 2719#define EC_CMD_TMP006_SET_CALIBRATION 0x0054 2720 2721/* 2722 * The original TMP006 calibration only needed four params, but now we need 2723 * more. Since the algorithm is nothing but magic numbers anyway, we'll leave 2724 * the params opaque. The v1 "get" response will include the algorithm number 2725 * and how many params it requires. That way we can change the EC code without 2726 * needing to update this file. We can also use a different algorithm on each 2727 * sensor. 2728 */ 2729 2730/* This is the same struct for both v0 and v1. */ 2731struct __ec_align1 ec_params_tmp006_get_calibration { 2732 uint8_t index; 2733}; 2734 2735/* Version 0 */ 2736struct __ec_align4 ec_response_tmp006_get_calibration_v0 { 2737 float s0; 2738 float b0; 2739 float b1; 2740 float b2; 2741}; 2742 2743struct __ec_align4 ec_params_tmp006_set_calibration_v0 { 2744 uint8_t index; 2745 uint8_t reserved[3]; 2746 float s0; 2747 float b0; 2748 float b1; 2749 float b2; 2750}; 2751 2752/* Version 1 */ 2753struct __ec_align4 ec_response_tmp006_get_calibration_v1 { 2754 uint8_t algorithm; 2755 uint8_t num_params; 2756 uint8_t reserved[2]; 2757 float val[0]; 2758}; 2759 2760struct __ec_align4 ec_params_tmp006_set_calibration_v1 { 2761 uint8_t index; 2762 uint8_t algorithm; 2763 uint8_t num_params; 2764 uint8_t reserved; 2765 float val[0]; 2766}; 2767 2768 2769/* Read raw TMP006 data */ 2770#define EC_CMD_TMP006_GET_RAW 0x0055 2771 2772struct __ec_align1 ec_params_tmp006_get_raw { 2773 uint8_t index; 2774}; 2775 2776struct __ec_align4 ec_response_tmp006_get_raw { 2777 int32_t t; /* In 1/100 K */ 2778 int32_t v; /* In nV */ 2779}; 2780 2781/*****************************************************************************/ 2782/* MKBP - Matrix KeyBoard Protocol */ 2783 2784/* 2785 * Read key state 2786 * 2787 * Returns raw data for keyboard cols; see ec_response_mkbp_info.cols for 2788 * expected response size. 2789 * 2790 * NOTE: This has been superseded by EC_CMD_MKBP_GET_NEXT_EVENT. If you wish 2791 * to obtain the instantaneous state, use EC_CMD_MKBP_INFO with the type 2792 * EC_MKBP_INFO_CURRENT and event EC_MKBP_EVENT_KEY_MATRIX. 2793 */ 2794#define EC_CMD_MKBP_STATE 0x0060 2795 2796/* 2797 * Provide information about various MKBP things. See enum ec_mkbp_info_type. 2798 */ 2799#define EC_CMD_MKBP_INFO 0x0061 2800 2801struct __ec_align_size1 ec_response_mkbp_info { 2802 uint32_t rows; 2803 uint32_t cols; 2804 /* Formerly "switches", which was 0. */ 2805 uint8_t reserved; 2806}; 2807 2808struct __ec_align1 ec_params_mkbp_info { 2809 uint8_t info_type; 2810 uint8_t event_type; 2811}; 2812 2813enum ec_mkbp_info_type { 2814 /* 2815 * Info about the keyboard matrix: number of rows and columns. 2816 * 2817 * Returns struct ec_response_mkbp_info. 2818 */ 2819 EC_MKBP_INFO_KBD = 0, 2820 2821 /* 2822 * For buttons and switches, info about which specifically are 2823 * supported. event_type must be set to one of the values in enum 2824 * ec_mkbp_event. 2825 * 2826 * For EC_MKBP_EVENT_BUTTON and EC_MKBP_EVENT_SWITCH, returns a 4 byte 2827 * bitmask indicating which buttons or switches are present. See the 2828 * bit inidices below. 2829 */ 2830 EC_MKBP_INFO_SUPPORTED = 1, 2831 2832 /* 2833 * Instantaneous state of buttons and switches. 2834 * 2835 * event_type must be set to one of the values in enum ec_mkbp_event. 2836 * 2837 * For EC_MKBP_EVENT_KEY_MATRIX, returns uint8_t key_matrix[13] 2838 * indicating the current state of the keyboard matrix. 2839 * 2840 * For EC_MKBP_EVENT_HOST_EVENT, return uint32_t host_event, the raw 2841 * event state. 2842 * 2843 * For EC_MKBP_EVENT_BUTTON, returns uint32_t buttons, indicating the 2844 * state of supported buttons. 2845 * 2846 * For EC_MKBP_EVENT_SWITCH, returns uint32_t switches, indicating the 2847 * state of supported switches. 2848 */ 2849 EC_MKBP_INFO_CURRENT = 2, 2850}; 2851 2852/* Simulate key press */ 2853#define EC_CMD_MKBP_SIMULATE_KEY 0x0062 2854 2855struct __ec_align1 ec_params_mkbp_simulate_key { 2856 uint8_t col; 2857 uint8_t row; 2858 uint8_t pressed; 2859}; 2860 2861/* Configure keyboard scanning */ 2862#define EC_CMD_MKBP_SET_CONFIG 0x0064 2863#define EC_CMD_MKBP_GET_CONFIG 0x0065 2864 2865/* flags */ 2866enum mkbp_config_flags { 2867 EC_MKBP_FLAGS_ENABLE = 1, /* Enable keyboard scanning */ 2868}; 2869 2870enum mkbp_config_valid { 2871 EC_MKBP_VALID_SCAN_PERIOD = 1 << 0, 2872 EC_MKBP_VALID_POLL_TIMEOUT = 1 << 1, 2873 EC_MKBP_VALID_MIN_POST_SCAN_DELAY = 1 << 3, 2874 EC_MKBP_VALID_OUTPUT_SETTLE = 1 << 4, 2875 EC_MKBP_VALID_DEBOUNCE_DOWN = 1 << 5, 2876 EC_MKBP_VALID_DEBOUNCE_UP = 1 << 6, 2877 EC_MKBP_VALID_FIFO_MAX_DEPTH = 1 << 7, 2878}; 2879 2880/* 2881 * Configuration for our key scanning algorithm. 2882 * 2883 * Note that this is used as a sub-structure of 2884 * ec_{params/response}_mkbp_get_config. 2885 */ 2886struct __ec_align_size1 ec_mkbp_config { 2887 uint32_t valid_mask; /* valid fields */ 2888 uint8_t flags; /* some flags (enum mkbp_config_flags) */ 2889 uint8_t valid_flags; /* which flags are valid */ 2890 uint16_t scan_period_us; /* period between start of scans */ 2891 /* revert to interrupt mode after no activity for this long */ 2892 uint32_t poll_timeout_us; 2893 /* 2894 * minimum post-scan relax time. Once we finish a scan we check 2895 * the time until we are due to start the next one. If this time is 2896 * shorter this field, we use this instead. 2897 */ 2898 uint16_t min_post_scan_delay_us; 2899 /* delay between setting up output and waiting for it to settle */ 2900 uint16_t output_settle_us; 2901 uint16_t debounce_down_us; /* time for debounce on key down */ 2902 uint16_t debounce_up_us; /* time for debounce on key up */ 2903 /* maximum depth to allow for fifo (0 = no keyscan output) */ 2904 uint8_t fifo_max_depth; 2905}; 2906 2907struct __ec_align_size1 ec_params_mkbp_set_config { 2908 struct ec_mkbp_config config; 2909}; 2910 2911struct __ec_align_size1 ec_response_mkbp_get_config { 2912 struct ec_mkbp_config config; 2913}; 2914 2915/* Run the key scan emulation */ 2916#define EC_CMD_KEYSCAN_SEQ_CTRL 0x0066 2917 2918enum ec_keyscan_seq_cmd { 2919 EC_KEYSCAN_SEQ_STATUS = 0, /* Get status information */ 2920 EC_KEYSCAN_SEQ_CLEAR = 1, /* Clear sequence */ 2921 EC_KEYSCAN_SEQ_ADD = 2, /* Add item to sequence */ 2922 EC_KEYSCAN_SEQ_START = 3, /* Start running sequence */ 2923 EC_KEYSCAN_SEQ_COLLECT = 4, /* Collect sequence summary data */ 2924}; 2925 2926enum ec_collect_flags { 2927 /* 2928 * Indicates this scan was processed by the EC. Due to timing, some 2929 * scans may be skipped. 2930 */ 2931 EC_KEYSCAN_SEQ_FLAG_DONE = 1 << 0, 2932}; 2933 2934struct __ec_align1 ec_collect_item { 2935 uint8_t flags; /* some flags (enum ec_collect_flags) */ 2936}; 2937 2938struct __ec_todo_packed ec_params_keyscan_seq_ctrl { 2939 uint8_t cmd; /* Command to send (enum ec_keyscan_seq_cmd) */ 2940 union { 2941 struct __ec_align1 { 2942 uint8_t active; /* still active */ 2943 uint8_t num_items; /* number of items */ 2944 /* Current item being presented */ 2945 uint8_t cur_item; 2946 } status; 2947 struct __ec_todo_unpacked { 2948 /* 2949 * Absolute time for this scan, measured from the 2950 * start of the sequence. 2951 */ 2952 uint32_t time_us; 2953 uint8_t scan[0]; /* keyscan data */ 2954 } add; 2955 struct __ec_align1 { 2956 uint8_t start_item; /* First item to return */ 2957 uint8_t num_items; /* Number of items to return */ 2958 } collect; 2959 }; 2960}; 2961 2962struct __ec_todo_packed ec_result_keyscan_seq_ctrl { 2963 union { 2964 struct __ec_todo_unpacked { 2965 uint8_t num_items; /* Number of items */ 2966 /* Data for each item */ 2967 struct ec_collect_item item[0]; 2968 } collect; 2969 }; 2970}; 2971 2972/* 2973 * Get the next pending MKBP event. 2974 * 2975 * Returns EC_RES_UNAVAILABLE if there is no event pending. 2976 */ 2977#define EC_CMD_GET_NEXT_EVENT 0x0067 2978 2979enum ec_mkbp_event { 2980 /* Keyboard matrix changed. The event data is the new matrix state. */ 2981 EC_MKBP_EVENT_KEY_MATRIX = 0, 2982 2983 /* New host event. The event data is 4 bytes of host event flags. */ 2984 EC_MKBP_EVENT_HOST_EVENT = 1, 2985 2986 /* New Sensor FIFO data. The event data is fifo_info structure. */ 2987 EC_MKBP_EVENT_SENSOR_FIFO = 2, 2988 2989 /* The state of the non-matrixed buttons have changed. */ 2990 EC_MKBP_EVENT_BUTTON = 3, 2991 2992 /* The state of the switches have changed. */ 2993 EC_MKBP_EVENT_SWITCH = 4, 2994 2995 /* New Fingerprint sensor event, the event data is fp_events bitmap. */ 2996 EC_MKBP_EVENT_FINGERPRINT = 5, 2997 2998 /* 2999 * Sysrq event: send emulated sysrq. The event data is sysrq, 3000 * corresponding to the key to be pressed. 3001 */ 3002 EC_MKBP_EVENT_SYSRQ = 6, 3003 3004 /* Number of MKBP events */ 3005 EC_MKBP_EVENT_COUNT, 3006}; 3007 3008union __ec_align_offset1 ec_response_get_next_data { 3009 uint8_t key_matrix[13]; 3010 3011 /* Unaligned */ 3012 uint32_t host_event; 3013 3014 struct __ec_todo_unpacked { 3015 /* For aligning the fifo_info */ 3016 uint8_t reserved[3]; 3017 struct ec_response_motion_sense_fifo_info info; 3018 } sensor_fifo; 3019 3020 uint32_t buttons; 3021 3022 uint32_t switches; 3023 3024 uint32_t fp_events; 3025 3026 uint32_t sysrq; 3027}; 3028 3029struct __ec_align1 ec_response_get_next_event { 3030 uint8_t event_type; 3031 /* Followed by event data if any */ 3032 union ec_response_get_next_data data; 3033}; 3034 3035/* Bit indices for buttons and switches.*/ 3036/* Buttons */ 3037#define EC_MKBP_POWER_BUTTON 0 3038#define EC_MKBP_VOL_UP 1 3039#define EC_MKBP_VOL_DOWN 2 3040#define EC_MKBP_RECOVERY 3 3041 3042/* Switches */ 3043#define EC_MKBP_LID_OPEN 0 3044#define EC_MKBP_TABLET_MODE 1 3045 3046/* Run keyboard factory test scanning */ 3047#define EC_CMD_KEYBOARD_FACTORY_TEST 0x0068 3048 3049struct __ec_align2 ec_response_keyboard_factory_test { 3050 uint16_t shorted; /* Keyboard pins are shorted */ 3051}; 3052 3053/* Fingerprint events in 'fp_events' for EC_MKBP_EVENT_FINGERPRINT */ 3054#define EC_MKBP_FP_RAW_EVENT(fp_events) ((fp_events) & 0x00FFFFFF) 3055#define EC_MKBP_FP_FINGER_DOWN (1 << 29) 3056#define EC_MKBP_FP_FINGER_UP (1 << 30) 3057#define EC_MKBP_FP_IMAGE_READY (1 << 31) 3058 3059/*****************************************************************************/ 3060/* Temperature sensor commands */ 3061 3062/* Read temperature sensor info */ 3063#define EC_CMD_TEMP_SENSOR_GET_INFO 0x0070 3064 3065struct __ec_align1 ec_params_temp_sensor_get_info { 3066 uint8_t id; 3067}; 3068 3069struct __ec_align1 ec_response_temp_sensor_get_info { 3070 char sensor_name[32]; 3071 uint8_t sensor_type; 3072}; 3073 3074/*****************************************************************************/ 3075 3076/* 3077 * Note: host commands 0x80 - 0x87 are reserved to avoid conflict with ACPI 3078 * commands accidentally sent to the wrong interface. See the ACPI section 3079 * below. 3080 */ 3081 3082/*****************************************************************************/ 3083/* Host event commands */ 3084 3085 3086/* Obsolete. New implementation should use EC_CMD_PROGRAM_HOST_EVENT instead */ 3087/* 3088 * Host event mask params and response structures, shared by all of the host 3089 * event commands below. 3090 */ 3091struct __ec_align4 ec_params_host_event_mask { 3092 uint32_t mask; 3093}; 3094 3095struct __ec_align4 ec_response_host_event_mask { 3096 uint32_t mask; 3097}; 3098 3099/* These all use ec_response_host_event_mask */ 3100#define EC_CMD_HOST_EVENT_GET_B 0x0087 3101#define EC_CMD_HOST_EVENT_GET_SMI_MASK 0x0088 3102#define EC_CMD_HOST_EVENT_GET_SCI_MASK 0x0089 3103#define EC_CMD_HOST_EVENT_GET_WAKE_MASK 0x008D 3104 3105/* These all use ec_params_host_event_mask */ 3106#define EC_CMD_HOST_EVENT_SET_SMI_MASK 0x008A 3107#define EC_CMD_HOST_EVENT_SET_SCI_MASK 0x008B 3108#define EC_CMD_HOST_EVENT_CLEAR 0x008C 3109#define EC_CMD_HOST_EVENT_SET_WAKE_MASK 0x008E 3110#define EC_CMD_HOST_EVENT_CLEAR_B 0x008F 3111 3112/* 3113 * Unified host event programming interface - Should be used by newer versions 3114 * of BIOS/OS to program host events and masks 3115 */ 3116 3117struct __ec_align4 ec_params_host_event { 3118 3119 /* Action requested by host - one of enum ec_host_event_action. */ 3120 uint8_t action; 3121 3122 /* 3123 * Mask type that the host requested the action on - one of 3124 * enum ec_host_event_mask_type. 3125 */ 3126 uint8_t mask_type; 3127 3128 /* Set to 0, ignore on read */ 3129 uint16_t reserved; 3130 3131 /* Value to be used in case of set operations. */ 3132 uint64_t value; 3133}; 3134 3135/* 3136 * Response structure returned by EC_CMD_HOST_EVENT. 3137 * Update the value on a GET request. Set to 0 on GET/CLEAR 3138 */ 3139 3140struct __ec_align4 ec_response_host_event { 3141 3142 /* Mask value in case of get operation */ 3143 uint64_t value; 3144}; 3145 3146enum ec_host_event_action { 3147 /* 3148 * params.value is ignored. Value of mask_type populated 3149 * in response.value 3150 */ 3151 EC_HOST_EVENT_GET, 3152 3153 /* Bits in params.value are set */ 3154 EC_HOST_EVENT_SET, 3155 3156 /* Bits in params.value are cleared */ 3157 EC_HOST_EVENT_CLEAR, 3158}; 3159 3160enum ec_host_event_mask_type { 3161 3162 /* Main host event copy */ 3163 EC_HOST_EVENT_MAIN, 3164 3165 /* Copy B of host events */ 3166 EC_HOST_EVENT_B, 3167 3168 /* SCI Mask */ 3169 EC_HOST_EVENT_SCI_MASK, 3170 3171 /* SMI Mask */ 3172 EC_HOST_EVENT_SMI_MASK, 3173 3174 /* Mask of events that should be always reported in hostevents */ 3175 EC_HOST_EVENT_ALWAYS_REPORT_MASK, 3176 3177 /* Active wake mask */ 3178 EC_HOST_EVENT_ACTIVE_WAKE_MASK, 3179 3180 /* Lazy wake mask for S0ix */ 3181 EC_HOST_EVENT_LAZY_WAKE_MASK_S0IX, 3182 3183 /* Lazy wake mask for S3 */ 3184 EC_HOST_EVENT_LAZY_WAKE_MASK_S3, 3185 3186 /* Lazy wake mask for S5 */ 3187 EC_HOST_EVENT_LAZY_WAKE_MASK_S5, 3188}; 3189 3190#define EC_CMD_HOST_EVENT 0x00A4 3191 3192/*****************************************************************************/ 3193/* Switch commands */ 3194 3195/* Enable/disable LCD backlight */ 3196#define EC_CMD_SWITCH_ENABLE_BKLIGHT 0x0090 3197 3198struct __ec_align1 ec_params_switch_enable_backlight { 3199 uint8_t enabled; 3200}; 3201 3202/* Enable/disable WLAN/Bluetooth */ 3203#define EC_CMD_SWITCH_ENABLE_WIRELESS 0x0091 3204#define EC_VER_SWITCH_ENABLE_WIRELESS 1 3205 3206/* Version 0 params; no response */ 3207struct __ec_align1 ec_params_switch_enable_wireless_v0 { 3208 uint8_t enabled; 3209}; 3210 3211/* Version 1 params */ 3212struct __ec_align1 ec_params_switch_enable_wireless_v1 { 3213 /* Flags to enable now */ 3214 uint8_t now_flags; 3215 3216 /* Which flags to copy from now_flags */ 3217 uint8_t now_mask; 3218 3219 /* 3220 * Flags to leave enabled in S3, if they're on at the S0->S3 3221 * transition. (Other flags will be disabled by the S0->S3 3222 * transition.) 3223 */ 3224 uint8_t suspend_flags; 3225 3226 /* Which flags to copy from suspend_flags */ 3227 uint8_t suspend_mask; 3228}; 3229 3230/* Version 1 response */ 3231struct __ec_align1 ec_response_switch_enable_wireless_v1 { 3232 /* Flags to enable now */ 3233 uint8_t now_flags; 3234 3235 /* Flags to leave enabled in S3 */ 3236 uint8_t suspend_flags; 3237}; 3238 3239/*****************************************************************************/ 3240/* GPIO commands. Only available on EC if write protect has been disabled. */ 3241 3242/* Set GPIO output value */ 3243#define EC_CMD_GPIO_SET 0x0092 3244 3245struct __ec_align1 ec_params_gpio_set { 3246 char name[32]; 3247 uint8_t val; 3248}; 3249 3250/* Get GPIO value */ 3251#define EC_CMD_GPIO_GET 0x0093 3252 3253/* Version 0 of input params and response */ 3254struct __ec_align1 ec_params_gpio_get { 3255 char name[32]; 3256}; 3257 3258struct __ec_align1 ec_response_gpio_get { 3259 uint8_t val; 3260}; 3261 3262/* Version 1 of input params and response */ 3263struct __ec_align1 ec_params_gpio_get_v1 { 3264 uint8_t subcmd; 3265 union { 3266 struct __ec_align1 { 3267 char name[32]; 3268 } get_value_by_name; 3269 struct __ec_align1 { 3270 uint8_t index; 3271 } get_info; 3272 }; 3273}; 3274 3275struct __ec_todo_packed ec_response_gpio_get_v1 { 3276 union { 3277 struct __ec_align1 { 3278 uint8_t val; 3279 } get_value_by_name, get_count; 3280 struct __ec_todo_unpacked { 3281 uint8_t val; 3282 char name[32]; 3283 uint32_t flags; 3284 } get_info; 3285 }; 3286}; 3287 3288enum gpio_get_subcmd { 3289 EC_GPIO_GET_BY_NAME = 0, 3290 EC_GPIO_GET_COUNT = 1, 3291 EC_GPIO_GET_INFO = 2, 3292}; 3293 3294/*****************************************************************************/ 3295/* I2C commands. Only available when flash write protect is unlocked. */ 3296 3297/* 3298 * CAUTION: These commands are deprecated, and are not supported anymore in EC 3299 * builds >= 8398.0.0 (see crosbug.com/p/23570). 3300 * 3301 * Use EC_CMD_I2C_PASSTHRU instead. 3302 */ 3303 3304/* Read I2C bus */ 3305#define EC_CMD_I2C_READ 0x0094 3306 3307struct __ec_align_size1 ec_params_i2c_read { 3308 uint16_t addr; /* 8-bit address (7-bit shifted << 1) */ 3309 uint8_t read_size; /* Either 8 or 16. */ 3310 uint8_t port; 3311 uint8_t offset; 3312}; 3313 3314struct __ec_align2 ec_response_i2c_read { 3315 uint16_t data; 3316}; 3317 3318/* Write I2C bus */ 3319#define EC_CMD_I2C_WRITE 0x0095 3320 3321struct __ec_align_size1 ec_params_i2c_write { 3322 uint16_t data; 3323 uint16_t addr; /* 8-bit address (7-bit shifted << 1) */ 3324 uint8_t write_size; /* Either 8 or 16. */ 3325 uint8_t port; 3326 uint8_t offset; 3327}; 3328 3329/*****************************************************************************/ 3330/* Charge state commands. Only available when flash write protect unlocked. */ 3331 3332/* Force charge state machine to stop charging the battery or force it to 3333 * discharge the battery. 3334 */ 3335#define EC_CMD_CHARGE_CONTROL 0x0096 3336#define EC_VER_CHARGE_CONTROL 1 3337 3338enum ec_charge_control_mode { 3339 CHARGE_CONTROL_NORMAL = 0, 3340 CHARGE_CONTROL_IDLE, 3341 CHARGE_CONTROL_DISCHARGE, 3342}; 3343 3344struct __ec_align4 ec_params_charge_control { 3345 uint32_t mode; /* enum charge_control_mode */ 3346}; 3347 3348/*****************************************************************************/ 3349/* Console commands. Only available when flash write protect is unlocked. */ 3350 3351/* Snapshot console output buffer for use by EC_CMD_CONSOLE_READ. */ 3352#define EC_CMD_CONSOLE_SNAPSHOT 0x0097 3353 3354/* 3355 * Read data from the saved snapshot. If the subcmd parameter is 3356 * CONSOLE_READ_NEXT, this will return data starting from the beginning of 3357 * the latest snapshot. If it is CONSOLE_READ_RECENT, it will start from the 3358 * end of the previous snapshot. 3359 * 3360 * The params are only looked at in version >= 1 of this command. Prior 3361 * versions will just default to CONSOLE_READ_NEXT behavior. 3362 * 3363 * Response is null-terminated string. Empty string, if there is no more 3364 * remaining output. 3365 */ 3366#define EC_CMD_CONSOLE_READ 0x0098 3367 3368enum ec_console_read_subcmd { 3369 CONSOLE_READ_NEXT = 0, 3370 CONSOLE_READ_RECENT 3371}; 3372 3373struct __ec_align1 ec_params_console_read_v1 { 3374 uint8_t subcmd; /* enum ec_console_read_subcmd */ 3375}; 3376 3377/*****************************************************************************/ 3378 3379/* 3380 * Cut off battery power immediately or after the host has shut down. 3381 * 3382 * return EC_RES_INVALID_COMMAND if unsupported by a board/battery. 3383 * EC_RES_SUCCESS if the command was successful. 3384 * EC_RES_ERROR if the cut off command failed. 3385 */ 3386#define EC_CMD_BATTERY_CUT_OFF 0x0099 3387 3388#define EC_BATTERY_CUTOFF_FLAG_AT_SHUTDOWN (1 << 0) 3389 3390struct __ec_align1 ec_params_battery_cutoff { 3391 uint8_t flags; 3392}; 3393 3394/*****************************************************************************/ 3395/* USB port mux control. */ 3396 3397/* 3398 * Switch USB mux or return to automatic switching. 3399 */ 3400#define EC_CMD_USB_MUX 0x009A 3401 3402struct __ec_align1 ec_params_usb_mux { 3403 uint8_t mux; 3404}; 3405 3406/*****************************************************************************/ 3407/* LDOs / FETs control. */ 3408 3409enum ec_ldo_state { 3410 EC_LDO_STATE_OFF = 0, /* the LDO / FET is shut down */ 3411 EC_LDO_STATE_ON = 1, /* the LDO / FET is ON / providing power */ 3412}; 3413 3414/* 3415 * Switch on/off a LDO. 3416 */ 3417#define EC_CMD_LDO_SET 0x009B 3418 3419struct __ec_align1 ec_params_ldo_set { 3420 uint8_t index; 3421 uint8_t state; 3422}; 3423 3424/* 3425 * Get LDO state. 3426 */ 3427#define EC_CMD_LDO_GET 0x009C 3428 3429struct __ec_align1 ec_params_ldo_get { 3430 uint8_t index; 3431}; 3432 3433struct __ec_align1 ec_response_ldo_get { 3434 uint8_t state; 3435}; 3436 3437/*****************************************************************************/ 3438/* Power info. */ 3439 3440/* 3441 * Get power info. 3442 */ 3443#define EC_CMD_POWER_INFO 0x009D 3444 3445struct __ec_align4 ec_response_power_info { 3446 uint32_t usb_dev_type; 3447 uint16_t voltage_ac; 3448 uint16_t voltage_system; 3449 uint16_t current_system; 3450 uint16_t usb_current_limit; 3451}; 3452 3453/*****************************************************************************/ 3454/* I2C passthru command */ 3455 3456#define EC_CMD_I2C_PASSTHRU 0x009E 3457 3458/* Read data; if not present, message is a write */ 3459#define EC_I2C_FLAG_READ (1 << 15) 3460 3461/* Mask for address */ 3462#define EC_I2C_ADDR_MASK 0x3ff 3463 3464#define EC_I2C_STATUS_NAK (1 << 0) /* Transfer was not acknowledged */ 3465#define EC_I2C_STATUS_TIMEOUT (1 << 1) /* Timeout during transfer */ 3466 3467/* Any error */ 3468#define EC_I2C_STATUS_ERROR (EC_I2C_STATUS_NAK | EC_I2C_STATUS_TIMEOUT) 3469 3470struct __ec_align2 ec_params_i2c_passthru_msg { 3471 uint16_t addr_flags; /* I2C slave address (7 or 10 bits) and flags */ 3472 uint16_t len; /* Number of bytes to read or write */ 3473}; 3474 3475struct __ec_align2 ec_params_i2c_passthru { 3476 uint8_t port; /* I2C port number */ 3477 uint8_t num_msgs; /* Number of messages */ 3478 struct ec_params_i2c_passthru_msg msg[]; 3479 /* Data to write for all messages is concatenated here */ 3480}; 3481 3482struct __ec_align1 ec_response_i2c_passthru { 3483 uint8_t i2c_status; /* Status flags (EC_I2C_STATUS_...) */ 3484 uint8_t num_msgs; /* Number of messages processed */ 3485 uint8_t data[]; /* Data read by messages concatenated here */ 3486}; 3487 3488/*****************************************************************************/ 3489/* Power button hang detect */ 3490 3491#define EC_CMD_HANG_DETECT 0x009F 3492 3493/* Reasons to start hang detection timer */ 3494/* Power button pressed */ 3495#define EC_HANG_START_ON_POWER_PRESS (1 << 0) 3496 3497/* Lid closed */ 3498#define EC_HANG_START_ON_LID_CLOSE (1 << 1) 3499 3500 /* Lid opened */ 3501#define EC_HANG_START_ON_LID_OPEN (1 << 2) 3502 3503/* Start of AP S3->S0 transition (booting or resuming from suspend) */ 3504#define EC_HANG_START_ON_RESUME (1 << 3) 3505 3506/* Reasons to cancel hang detection */ 3507 3508/* Power button released */ 3509#define EC_HANG_STOP_ON_POWER_RELEASE (1 << 8) 3510 3511/* Any host command from AP received */ 3512#define EC_HANG_STOP_ON_HOST_COMMAND (1 << 9) 3513 3514/* Stop on end of AP S0->S3 transition (suspending or shutting down) */ 3515#define EC_HANG_STOP_ON_SUSPEND (1 << 10) 3516 3517/* 3518 * If this flag is set, all the other fields are ignored, and the hang detect 3519 * timer is started. This provides the AP a way to start the hang timer 3520 * without reconfiguring any of the other hang detect settings. Note that 3521 * you must previously have configured the timeouts. 3522 */ 3523#define EC_HANG_START_NOW (1 << 30) 3524 3525/* 3526 * If this flag is set, all the other fields are ignored (including 3527 * EC_HANG_START_NOW). This provides the AP a way to stop the hang timer 3528 * without reconfiguring any of the other hang detect settings. 3529 */ 3530#define EC_HANG_STOP_NOW (1 << 31) 3531 3532struct __ec_align4 ec_params_hang_detect { 3533 /* Flags; see EC_HANG_* */ 3534 uint32_t flags; 3535 3536 /* Timeout in msec before generating host event, if enabled */ 3537 uint16_t host_event_timeout_msec; 3538 3539 /* Timeout in msec before generating warm reboot, if enabled */ 3540 uint16_t warm_reboot_timeout_msec; 3541}; 3542 3543/*****************************************************************************/ 3544/* Commands for battery charging */ 3545 3546/* 3547 * This is the single catch-all host command to exchange data regarding the 3548 * charge state machine (v2 and up). 3549 */ 3550#define EC_CMD_CHARGE_STATE 0x00A0 3551 3552/* Subcommands for this host command */ 3553enum charge_state_command { 3554 CHARGE_STATE_CMD_GET_STATE, 3555 CHARGE_STATE_CMD_GET_PARAM, 3556 CHARGE_STATE_CMD_SET_PARAM, 3557 CHARGE_STATE_NUM_CMDS 3558}; 3559 3560/* 3561 * Known param numbers are defined here. Ranges are reserved for board-specific 3562 * params, which are handled by the particular implementations. 3563 */ 3564enum charge_state_params { 3565 CS_PARAM_CHG_VOLTAGE, /* charger voltage limit */ 3566 CS_PARAM_CHG_CURRENT, /* charger current limit */ 3567 CS_PARAM_CHG_INPUT_CURRENT, /* charger input current limit */ 3568 CS_PARAM_CHG_STATUS, /* charger-specific status */ 3569 CS_PARAM_CHG_OPTION, /* charger-specific options */ 3570 CS_PARAM_LIMIT_POWER, /* 3571 * Check if power is limited due to 3572 * low battery and / or a weak external 3573 * charger. READ ONLY. 3574 */ 3575 /* How many so far? */ 3576 CS_NUM_BASE_PARAMS, 3577 3578 /* Range for CONFIG_CHARGER_PROFILE_OVERRIDE params */ 3579 CS_PARAM_CUSTOM_PROFILE_MIN = 0x10000, 3580 CS_PARAM_CUSTOM_PROFILE_MAX = 0x1ffff, 3581 3582 /* Other custom param ranges go here... */ 3583}; 3584 3585struct __ec_todo_packed ec_params_charge_state { 3586 uint8_t cmd; /* enum charge_state_command */ 3587 union { 3588 struct __ec_align1 { 3589 /* no args */ 3590 } get_state; 3591 3592 struct __ec_todo_unpacked { 3593 uint32_t param; /* enum charge_state_param */ 3594 } get_param; 3595 3596 struct __ec_todo_unpacked { 3597 uint32_t param; /* param to set */ 3598 uint32_t value; /* value to set */ 3599 } set_param; 3600 }; 3601}; 3602 3603struct __ec_align4 ec_response_charge_state { 3604 union { 3605 struct __ec_align4 { 3606 int ac; 3607 int chg_voltage; 3608 int chg_current; 3609 int chg_input_current; 3610 int batt_state_of_charge; 3611 } get_state; 3612 3613 struct __ec_align4 { 3614 uint32_t value; 3615 } get_param; 3616 struct __ec_align4 { 3617 /* no return values */ 3618 } set_param; 3619 }; 3620}; 3621 3622 3623/* 3624 * Set maximum battery charging current. 3625 */ 3626#define EC_CMD_CHARGE_CURRENT_LIMIT 0x00A1 3627 3628struct __ec_align4 ec_params_current_limit { 3629 uint32_t limit; /* in mA */ 3630}; 3631 3632/* 3633 * Set maximum external voltage / current. 3634 */ 3635#define EC_CMD_EXTERNAL_POWER_LIMIT 0x00A2 3636 3637/* Command v0 is used only on Spring and is obsolete + unsupported */ 3638struct __ec_align2 ec_params_external_power_limit_v1 { 3639 uint16_t current_lim; /* in mA, or EC_POWER_LIMIT_NONE to clear limit */ 3640 uint16_t voltage_lim; /* in mV, or EC_POWER_LIMIT_NONE to clear limit */ 3641}; 3642 3643#define EC_POWER_LIMIT_NONE 0xffff 3644 3645/* 3646 * Set maximum voltage & current of a dedicated charge port 3647 */ 3648#define EC_CMD_OVERRIDE_DEDICATED_CHARGER_LIMIT 0x00A3 3649 3650struct __ec_align2 ec_params_dedicated_charger_limit { 3651 uint16_t current_lim; /* in mA */ 3652 uint16_t voltage_lim; /* in mV */ 3653}; 3654 3655/*****************************************************************************/ 3656/* Hibernate/Deep Sleep Commands */ 3657 3658/* Set the delay before going into hibernation. */ 3659#define EC_CMD_HIBERNATION_DELAY 0x00A8 3660 3661struct __ec_align4 ec_params_hibernation_delay { 3662 /* 3663 * Seconds to wait in G3 before hibernate. Pass in 0 to read the 3664 * current settings without changing them. 3665 */ 3666 uint32_t seconds; 3667}; 3668 3669struct __ec_align4 ec_response_hibernation_delay { 3670 /* 3671 * The current time in seconds in which the system has been in the G3 3672 * state. This value is reset if the EC transitions out of G3. 3673 */ 3674 uint32_t time_g3; 3675 3676 /* 3677 * The current time remaining in seconds until the EC should hibernate. 3678 * This value is also reset if the EC transitions out of G3. 3679 */ 3680 uint32_t time_remaining; 3681 3682 /* 3683 * The current time in seconds that the EC should wait in G3 before 3684 * hibernating. 3685 */ 3686 uint32_t hibernate_delay; 3687}; 3688 3689/* Inform the EC when entering a sleep state */ 3690#define EC_CMD_HOST_SLEEP_EVENT 0x00A9 3691 3692enum host_sleep_event { 3693 HOST_SLEEP_EVENT_S3_SUSPEND = 1, 3694 HOST_SLEEP_EVENT_S3_RESUME = 2, 3695 HOST_SLEEP_EVENT_S0IX_SUSPEND = 3, 3696 HOST_SLEEP_EVENT_S0IX_RESUME = 4 3697}; 3698 3699struct __ec_align1 ec_params_host_sleep_event { 3700 uint8_t sleep_event; 3701}; 3702 3703/*****************************************************************************/ 3704/* Device events */ 3705#define EC_CMD_DEVICE_EVENT 0x00AA 3706 3707enum ec_device_event { 3708 EC_DEVICE_EVENT_TRACKPAD, 3709 EC_DEVICE_EVENT_DSP, 3710 EC_DEVICE_EVENT_WIFI, 3711}; 3712 3713enum ec_device_event_param { 3714 /* Get and clear pending device events */ 3715 EC_DEVICE_EVENT_PARAM_GET_CURRENT_EVENTS, 3716 /* Get device event mask */ 3717 EC_DEVICE_EVENT_PARAM_GET_ENABLED_EVENTS, 3718 /* Set device event mask */ 3719 EC_DEVICE_EVENT_PARAM_SET_ENABLED_EVENTS, 3720}; 3721 3722#define EC_DEVICE_EVENT_MASK(event_code) (1UL << (event_code % 32)) 3723 3724struct __ec_align_size1 ec_params_device_event { 3725 uint32_t event_mask; 3726 uint8_t param; 3727}; 3728 3729struct __ec_align4 ec_response_device_event { 3730 uint32_t event_mask; 3731}; 3732 3733/*****************************************************************************/ 3734/* Smart battery pass-through */ 3735 3736/* Get / Set 16-bit smart battery registers */ 3737#define EC_CMD_SB_READ_WORD 0x00B0 3738#define EC_CMD_SB_WRITE_WORD 0x00B1 3739 3740/* Get / Set string smart battery parameters 3741 * formatted as SMBUS "block". 3742 */ 3743#define EC_CMD_SB_READ_BLOCK 0x00B2 3744#define EC_CMD_SB_WRITE_BLOCK 0x00B3 3745 3746struct __ec_align1 ec_params_sb_rd { 3747 uint8_t reg; 3748}; 3749 3750struct __ec_align2 ec_response_sb_rd_word { 3751 uint16_t value; 3752}; 3753 3754struct __ec_align1 ec_params_sb_wr_word { 3755 uint8_t reg; 3756 uint16_t value; 3757}; 3758 3759struct __ec_align1 ec_response_sb_rd_block { 3760 uint8_t data[32]; 3761}; 3762 3763struct __ec_align1 ec_params_sb_wr_block { 3764 uint8_t reg; 3765 uint16_t data[32]; 3766}; 3767 3768/*****************************************************************************/ 3769/* Battery vendor parameters 3770 * 3771 * Get or set vendor-specific parameters in the battery. Implementations may 3772 * differ between boards or batteries. On a set operation, the response 3773 * contains the actual value set, which may be rounded or clipped from the 3774 * requested value. 3775 */ 3776 3777#define EC_CMD_BATTERY_VENDOR_PARAM 0x00B4 3778 3779enum ec_battery_vendor_param_mode { 3780 BATTERY_VENDOR_PARAM_MODE_GET = 0, 3781 BATTERY_VENDOR_PARAM_MODE_SET, 3782}; 3783 3784struct __ec_align_size1 ec_params_battery_vendor_param { 3785 uint32_t param; 3786 uint32_t value; 3787 uint8_t mode; 3788}; 3789 3790struct __ec_align4 ec_response_battery_vendor_param { 3791 uint32_t value; 3792}; 3793 3794/*****************************************************************************/ 3795/* 3796 * Smart Battery Firmware Update Commands 3797 */ 3798#define EC_CMD_SB_FW_UPDATE 0x00B5 3799 3800enum ec_sb_fw_update_subcmd { 3801 EC_SB_FW_UPDATE_PREPARE = 0x0, 3802 EC_SB_FW_UPDATE_INFO = 0x1, /*query sb info */ 3803 EC_SB_FW_UPDATE_BEGIN = 0x2, /*check if protected */ 3804 EC_SB_FW_UPDATE_WRITE = 0x3, /*check if protected */ 3805 EC_SB_FW_UPDATE_END = 0x4, 3806 EC_SB_FW_UPDATE_STATUS = 0x5, 3807 EC_SB_FW_UPDATE_PROTECT = 0x6, 3808 EC_SB_FW_UPDATE_MAX = 0x7, 3809}; 3810 3811#define SB_FW_UPDATE_CMD_WRITE_BLOCK_SIZE 32 3812#define SB_FW_UPDATE_CMD_STATUS_SIZE 2 3813#define SB_FW_UPDATE_CMD_INFO_SIZE 8 3814 3815struct __ec_align4 ec_sb_fw_update_header { 3816 uint16_t subcmd; /* enum ec_sb_fw_update_subcmd */ 3817 uint16_t fw_id; /* firmware id */ 3818}; 3819 3820struct __ec_align4 ec_params_sb_fw_update { 3821 struct ec_sb_fw_update_header hdr; 3822 union { 3823 /* EC_SB_FW_UPDATE_PREPARE = 0x0 */ 3824 /* EC_SB_FW_UPDATE_INFO = 0x1 */ 3825 /* EC_SB_FW_UPDATE_BEGIN = 0x2 */ 3826 /* EC_SB_FW_UPDATE_END = 0x4 */ 3827 /* EC_SB_FW_UPDATE_STATUS = 0x5 */ 3828 /* EC_SB_FW_UPDATE_PROTECT = 0x6 */ 3829 struct __ec_align4 { 3830 /* no args */ 3831 } dummy; 3832 3833 /* EC_SB_FW_UPDATE_WRITE = 0x3 */ 3834 struct __ec_align4 { 3835 uint8_t data[SB_FW_UPDATE_CMD_WRITE_BLOCK_SIZE]; 3836 } write; 3837 }; 3838}; 3839 3840struct __ec_align1 ec_response_sb_fw_update { 3841 union { 3842 /* EC_SB_FW_UPDATE_INFO = 0x1 */ 3843 struct __ec_align1 { 3844 uint8_t data[SB_FW_UPDATE_CMD_INFO_SIZE]; 3845 } info; 3846 3847 /* EC_SB_FW_UPDATE_STATUS = 0x5 */ 3848 struct __ec_align1 { 3849 uint8_t data[SB_FW_UPDATE_CMD_STATUS_SIZE]; 3850 } status; 3851 }; 3852}; 3853 3854/* 3855 * Entering Verified Boot Mode Command 3856 * Default mode is VBOOT_MODE_NORMAL if EC did not receive this command. 3857 * Valid Modes are: normal, developer, and recovery. 3858 */ 3859#define EC_CMD_ENTERING_MODE 0x00B6 3860 3861struct __ec_align4 ec_params_entering_mode { 3862 int vboot_mode; 3863}; 3864 3865#define VBOOT_MODE_NORMAL 0 3866#define VBOOT_MODE_DEVELOPER 1 3867#define VBOOT_MODE_RECOVERY 2 3868 3869/*****************************************************************************/ 3870/* 3871 * I2C passthru protection command: Protects I2C tunnels against access on 3872 * certain addresses (board-specific). 3873 */ 3874#define EC_CMD_I2C_PASSTHRU_PROTECT 0x00B7 3875 3876enum ec_i2c_passthru_protect_subcmd { 3877 EC_CMD_I2C_PASSTHRU_PROTECT_STATUS = 0x0, 3878 EC_CMD_I2C_PASSTHRU_PROTECT_ENABLE = 0x1, 3879}; 3880 3881struct __ec_align1 ec_params_i2c_passthru_protect { 3882 uint8_t subcmd; 3883 uint8_t port; /* I2C port number */ 3884}; 3885 3886struct __ec_align1 ec_response_i2c_passthru_protect { 3887 uint8_t status; /* Status flags (0: unlocked, 1: locked) */ 3888}; 3889 3890/*****************************************************************************/ 3891/* System commands */ 3892 3893/* 3894 * TODO(crosbug.com/p/23747): This is a confusing name, since it doesn't 3895 * necessarily reboot the EC. Rename to "image" or something similar? 3896 */ 3897#define EC_CMD_REBOOT_EC 0x00D2 3898 3899/* Command */ 3900enum ec_reboot_cmd { 3901 EC_REBOOT_CANCEL = 0, /* Cancel a pending reboot */ 3902 EC_REBOOT_JUMP_RO = 1, /* Jump to RO without rebooting */ 3903 EC_REBOOT_JUMP_RW = 2, /* Jump to RW without rebooting */ 3904 /* (command 3 was jump to RW-B) */ 3905 EC_REBOOT_COLD = 4, /* Cold-reboot */ 3906 EC_REBOOT_DISABLE_JUMP = 5, /* Disable jump until next reboot */ 3907 EC_REBOOT_HIBERNATE = 6, /* Hibernate EC */ 3908 EC_REBOOT_HIBERNATE_CLEAR_AP_OFF = 7, /* and clears AP_OFF flag */ 3909}; 3910 3911/* Flags for ec_params_reboot_ec.reboot_flags */ 3912#define EC_REBOOT_FLAG_RESERVED0 (1 << 0) /* Was recovery request */ 3913#define EC_REBOOT_FLAG_ON_AP_SHUTDOWN (1 << 1) /* Reboot after AP shutdown */ 3914#define EC_REBOOT_FLAG_SWITCH_RW_SLOT (1 << 2) /* Switch RW slot */ 3915 3916struct __ec_align1 ec_params_reboot_ec { 3917 uint8_t cmd; /* enum ec_reboot_cmd */ 3918 uint8_t flags; /* See EC_REBOOT_FLAG_* */ 3919}; 3920 3921/* 3922 * Get information on last EC panic. 3923 * 3924 * Returns variable-length platform-dependent panic information. See panic.h 3925 * for details. 3926 */ 3927#define EC_CMD_GET_PANIC_INFO 0x00D3 3928 3929/*****************************************************************************/ 3930/* 3931 * Special commands 3932 * 3933 * These do not follow the normal rules for commands. See each command for 3934 * details. 3935 */ 3936 3937/* 3938 * Reboot NOW 3939 * 3940 * This command will work even when the EC LPC interface is busy, because the 3941 * reboot command is processed at interrupt level. Note that when the EC 3942 * reboots, the host will reboot too, so there is no response to this command. 3943 * 3944 * Use EC_CMD_REBOOT_EC to reboot the EC more politely. 3945 */ 3946#define EC_CMD_REBOOT 0x00D1 /* Think "die" */ 3947 3948/* 3949 * Resend last response (not supported on LPC). 3950 * 3951 * Returns EC_RES_UNAVAILABLE if there is no response available - for example, 3952 * there was no previous command, or the previous command's response was too 3953 * big to save. 3954 */ 3955#define EC_CMD_RESEND_RESPONSE 0x00DB 3956 3957/* 3958 * This header byte on a command indicate version 0. Any header byte less 3959 * than this means that we are talking to an old EC which doesn't support 3960 * versioning. In that case, we assume version 0. 3961 * 3962 * Header bytes greater than this indicate a later version. For example, 3963 * EC_CMD_VERSION0 + 1 means we are using version 1. 3964 * 3965 * The old EC interface must not use commands 0xdc or higher. 3966 */ 3967#define EC_CMD_VERSION0 0x00DC 3968 3969/*****************************************************************************/ 3970/* 3971 * PD commands 3972 * 3973 * These commands are for PD MCU communication. 3974 */ 3975 3976/* EC to PD MCU exchange status command */ 3977#define EC_CMD_PD_EXCHANGE_STATUS 0x0100 3978#define EC_VER_PD_EXCHANGE_STATUS 2 3979 3980enum pd_charge_state { 3981 PD_CHARGE_NO_CHANGE = 0, /* Don't change charge state */ 3982 PD_CHARGE_NONE, /* No charging allowed */ 3983 PD_CHARGE_5V, /* 5V charging only */ 3984 PD_CHARGE_MAX /* Charge at max voltage */ 3985}; 3986 3987/* Status of EC being sent to PD */ 3988#define EC_STATUS_HIBERNATING (1 << 0) 3989 3990struct __ec_align1 ec_params_pd_status { 3991 uint8_t status; /* EC status */ 3992 int8_t batt_soc; /* battery state of charge */ 3993 uint8_t charge_state; /* charging state (from enum pd_charge_state) */ 3994}; 3995 3996/* Status of PD being sent back to EC */ 3997#define PD_STATUS_HOST_EVENT (1 << 0) /* Forward host event to AP */ 3998#define PD_STATUS_IN_RW (1 << 1) /* Running RW image */ 3999#define PD_STATUS_JUMPED_TO_IMAGE (1 << 2) /* Current image was jumped to */ 4000#define PD_STATUS_TCPC_ALERT_0 (1 << 3) /* Alert active in port 0 TCPC */ 4001#define PD_STATUS_TCPC_ALERT_1 (1 << 4) /* Alert active in port 1 TCPC */ 4002#define PD_STATUS_TCPC_ALERT_2 (1 << 5) /* Alert active in port 2 TCPC */ 4003#define PD_STATUS_TCPC_ALERT_3 (1 << 6) /* Alert active in port 3 TCPC */ 4004#define PD_STATUS_EC_INT_ACTIVE (PD_STATUS_TCPC_ALERT_0 | \ 4005 PD_STATUS_TCPC_ALERT_1 | \ 4006 PD_STATUS_HOST_EVENT) 4007struct __ec_align_size1 ec_response_pd_status { 4008 uint32_t curr_lim_ma; /* input current limit */ 4009 uint16_t status; /* PD MCU status */ 4010 int8_t active_charge_port; /* active charging port */ 4011}; 4012 4013/* AP to PD MCU host event status command, cleared on read */ 4014#define EC_CMD_PD_HOST_EVENT_STATUS 0x0104 4015 4016/* PD MCU host event status bits */ 4017#define PD_EVENT_UPDATE_DEVICE (1 << 0) 4018#define PD_EVENT_POWER_CHANGE (1 << 1) 4019#define PD_EVENT_IDENTITY_RECEIVED (1 << 2) 4020#define PD_EVENT_DATA_SWAP (1 << 3) 4021struct __ec_align4 ec_response_host_event_status { 4022 uint32_t status; /* PD MCU host event status */ 4023}; 4024 4025/* Set USB type-C port role and muxes */ 4026#define EC_CMD_USB_PD_CONTROL 0x0101 4027 4028enum usb_pd_control_role { 4029 USB_PD_CTRL_ROLE_NO_CHANGE = 0, 4030 USB_PD_CTRL_ROLE_TOGGLE_ON = 1, /* == AUTO */ 4031 USB_PD_CTRL_ROLE_TOGGLE_OFF = 2, 4032 USB_PD_CTRL_ROLE_FORCE_SINK = 3, 4033 USB_PD_CTRL_ROLE_FORCE_SOURCE = 4, 4034 USB_PD_CTRL_ROLE_COUNT 4035}; 4036 4037enum usb_pd_control_mux { 4038 USB_PD_CTRL_MUX_NO_CHANGE = 0, 4039 USB_PD_CTRL_MUX_NONE = 1, 4040 USB_PD_CTRL_MUX_USB = 2, 4041 USB_PD_CTRL_MUX_DP = 3, 4042 USB_PD_CTRL_MUX_DOCK = 4, 4043 USB_PD_CTRL_MUX_AUTO = 5, 4044 USB_PD_CTRL_MUX_COUNT 4045}; 4046 4047enum usb_pd_control_swap { 4048 USB_PD_CTRL_SWAP_NONE = 0, 4049 USB_PD_CTRL_SWAP_DATA = 1, 4050 USB_PD_CTRL_SWAP_POWER = 2, 4051 USB_PD_CTRL_SWAP_VCONN = 3, 4052 USB_PD_CTRL_SWAP_COUNT 4053}; 4054 4055struct __ec_align1 ec_params_usb_pd_control { 4056 uint8_t port; 4057 uint8_t role; 4058 uint8_t mux; 4059 uint8_t swap; 4060}; 4061 4062#define PD_CTRL_RESP_ENABLED_COMMS (1 << 0) /* Communication enabled */ 4063#define PD_CTRL_RESP_ENABLED_CONNECTED (1 << 1) /* Device connected */ 4064#define PD_CTRL_RESP_ENABLED_PD_CAPABLE (1 << 2) /* Partner is PD capable */ 4065 4066#define PD_CTRL_RESP_ROLE_POWER (1 << 0) /* 0=SNK/1=SRC */ 4067#define PD_CTRL_RESP_ROLE_DATA (1 << 1) /* 0=UFP/1=DFP */ 4068#define PD_CTRL_RESP_ROLE_VCONN (1 << 2) /* Vconn status */ 4069#define PD_CTRL_RESP_ROLE_DR_POWER (1 << 3) /* Partner is dualrole power */ 4070#define PD_CTRL_RESP_ROLE_DR_DATA (1 << 4) /* Partner is dualrole data */ 4071#define PD_CTRL_RESP_ROLE_USB_COMM (1 << 5) /* Partner USB comm capable */ 4072#define PD_CTRL_RESP_ROLE_EXT_POWERED (1 << 6) /* Partner externally powerd */ 4073 4074struct __ec_align1 ec_response_usb_pd_control { 4075 uint8_t enabled; 4076 uint8_t role; 4077 uint8_t polarity; 4078 uint8_t state; 4079}; 4080 4081struct __ec_align1 ec_response_usb_pd_control_v1 { 4082 uint8_t enabled; 4083 uint8_t role; 4084 uint8_t polarity; 4085 char state[32]; 4086}; 4087 4088#define EC_CMD_USB_PD_PORTS 0x0102 4089 4090/* Maximum number of PD ports on a device, num_ports will be <= this */ 4091#define EC_USB_PD_MAX_PORTS 8 4092 4093struct __ec_align1 ec_response_usb_pd_ports { 4094 uint8_t num_ports; 4095}; 4096 4097#define EC_CMD_USB_PD_POWER_INFO 0x0103 4098 4099#define PD_POWER_CHARGING_PORT 0xff 4100struct __ec_align1 ec_params_usb_pd_power_info { 4101 uint8_t port; 4102}; 4103 4104enum usb_chg_type { 4105 USB_CHG_TYPE_NONE, 4106 USB_CHG_TYPE_PD, 4107 USB_CHG_TYPE_C, 4108 USB_CHG_TYPE_PROPRIETARY, 4109 USB_CHG_TYPE_BC12_DCP, 4110 USB_CHG_TYPE_BC12_CDP, 4111 USB_CHG_TYPE_BC12_SDP, 4112 USB_CHG_TYPE_OTHER, 4113 USB_CHG_TYPE_VBUS, 4114 USB_CHG_TYPE_UNKNOWN, 4115}; 4116enum usb_power_roles { 4117 USB_PD_PORT_POWER_DISCONNECTED, 4118 USB_PD_PORT_POWER_SOURCE, 4119 USB_PD_PORT_POWER_SINK, 4120 USB_PD_PORT_POWER_SINK_NOT_CHARGING, 4121}; 4122 4123struct __ec_align2 usb_chg_measures { 4124 uint16_t voltage_max; 4125 uint16_t voltage_now; 4126 uint16_t current_max; 4127 uint16_t current_lim; 4128}; 4129 4130struct __ec_align4 ec_response_usb_pd_power_info { 4131 uint8_t role; 4132 uint8_t type; 4133 uint8_t dualrole; 4134 uint8_t reserved1; 4135 struct usb_chg_measures meas; 4136 uint32_t max_power; 4137}; 4138 4139/* Write USB-PD device FW */ 4140#define EC_CMD_USB_PD_FW_UPDATE 0x0110 4141 4142enum usb_pd_fw_update_cmds { 4143 USB_PD_FW_REBOOT, 4144 USB_PD_FW_FLASH_ERASE, 4145 USB_PD_FW_FLASH_WRITE, 4146 USB_PD_FW_ERASE_SIG, 4147}; 4148 4149struct __ec_align4 ec_params_usb_pd_fw_update { 4150 uint16_t dev_id; 4151 uint8_t cmd; 4152 uint8_t port; 4153 uint32_t size; /* Size to write in bytes */ 4154 /* Followed by data to write */ 4155}; 4156 4157/* Write USB-PD Accessory RW_HASH table entry */ 4158#define EC_CMD_USB_PD_RW_HASH_ENTRY 0x0111 4159/* RW hash is first 20 bytes of SHA-256 of RW section */ 4160#define PD_RW_HASH_SIZE 20 4161struct __ec_align1 ec_params_usb_pd_rw_hash_entry { 4162 uint16_t dev_id; 4163 uint8_t dev_rw_hash[PD_RW_HASH_SIZE]; 4164 uint8_t reserved; /* For alignment of current_image 4165 * TODO(rspangler) but it's not aligned! 4166 * Should have been reserved[2]. */ 4167 uint32_t current_image; /* One of ec_current_image */ 4168}; 4169 4170/* Read USB-PD Accessory info */ 4171#define EC_CMD_USB_PD_DEV_INFO 0x0112 4172 4173struct __ec_align1 ec_params_usb_pd_info_request { 4174 uint8_t port; 4175}; 4176 4177/* Read USB-PD Device discovery info */ 4178#define EC_CMD_USB_PD_DISCOVERY 0x0113 4179struct __ec_align_size1 ec_params_usb_pd_discovery_entry { 4180 uint16_t vid; /* USB-IF VID */ 4181 uint16_t pid; /* USB-IF PID */ 4182 uint8_t ptype; /* product type (hub,periph,cable,ama) */ 4183}; 4184 4185/* Override default charge behavior */ 4186#define EC_CMD_PD_CHARGE_PORT_OVERRIDE 0x0114 4187 4188/* Negative port parameters have special meaning */ 4189enum usb_pd_override_ports { 4190 OVERRIDE_DONT_CHARGE = -2, 4191 OVERRIDE_OFF = -1, 4192 /* [0, CONFIG_USB_PD_PORT_COUNT): Port# */ 4193}; 4194 4195struct __ec_align2 ec_params_charge_port_override { 4196 int16_t override_port; /* Override port# */ 4197}; 4198 4199/* Read (and delete) one entry of PD event log */ 4200#define EC_CMD_PD_GET_LOG_ENTRY 0x0115 4201 4202struct __ec_align4 ec_response_pd_log { 4203 uint32_t timestamp; /* relative timestamp in milliseconds */ 4204 uint8_t type; /* event type : see PD_EVENT_xx below */ 4205 uint8_t size_port; /* [7:5] port number [4:0] payload size in bytes */ 4206 uint16_t data; /* type-defined data payload */ 4207 uint8_t payload[0]; /* optional additional data payload: 0..16 bytes */ 4208}; 4209 4210 4211/* The timestamp is the microsecond counter shifted to get about a ms. */ 4212#define PD_LOG_TIMESTAMP_SHIFT 10 /* 1 LSB = 1024us */ 4213 4214#define PD_LOG_SIZE_MASK 0x1f 4215#define PD_LOG_PORT_MASK 0xe0 4216#define PD_LOG_PORT_SHIFT 5 4217#define PD_LOG_PORT_SIZE(port, size) (((port) << PD_LOG_PORT_SHIFT) | \ 4218 ((size) & PD_LOG_SIZE_MASK)) 4219#define PD_LOG_PORT(size_port) ((size_port) >> PD_LOG_PORT_SHIFT) 4220#define PD_LOG_SIZE(size_port) ((size_port) & PD_LOG_SIZE_MASK) 4221 4222/* PD event log : entry types */ 4223/* PD MCU events */ 4224#define PD_EVENT_MCU_BASE 0x00 4225#define PD_EVENT_MCU_CHARGE (PD_EVENT_MCU_BASE+0) 4226#define PD_EVENT_MCU_CONNECT (PD_EVENT_MCU_BASE+1) 4227/* Reserved for custom board event */ 4228#define PD_EVENT_MCU_BOARD_CUSTOM (PD_EVENT_MCU_BASE+2) 4229/* PD generic accessory events */ 4230#define PD_EVENT_ACC_BASE 0x20 4231#define PD_EVENT_ACC_RW_FAIL (PD_EVENT_ACC_BASE+0) 4232#define PD_EVENT_ACC_RW_ERASE (PD_EVENT_ACC_BASE+1) 4233/* PD power supply events */ 4234#define PD_EVENT_PS_BASE 0x40 4235#define PD_EVENT_PS_FAULT (PD_EVENT_PS_BASE+0) 4236/* PD video dongles events */ 4237#define PD_EVENT_VIDEO_BASE 0x60 4238#define PD_EVENT_VIDEO_DP_MODE (PD_EVENT_VIDEO_BASE+0) 4239#define PD_EVENT_VIDEO_CODEC (PD_EVENT_VIDEO_BASE+1) 4240/* Returned in the "type" field, when there is no entry available */ 4241#define PD_EVENT_NO_ENTRY 0xff 4242 4243/* 4244 * PD_EVENT_MCU_CHARGE event definition : 4245 * the payload is "struct usb_chg_measures" 4246 * the data field contains the port state flags as defined below : 4247 */ 4248/* Port partner is a dual role device */ 4249#define CHARGE_FLAGS_DUAL_ROLE (1 << 15) 4250/* Port is the pending override port */ 4251#define CHARGE_FLAGS_DELAYED_OVERRIDE (1 << 14) 4252/* Port is the override port */ 4253#define CHARGE_FLAGS_OVERRIDE (1 << 13) 4254/* Charger type */ 4255#define CHARGE_FLAGS_TYPE_SHIFT 3 4256#define CHARGE_FLAGS_TYPE_MASK (0xf << CHARGE_FLAGS_TYPE_SHIFT) 4257/* Power delivery role */ 4258#define CHARGE_FLAGS_ROLE_MASK (7 << 0) 4259 4260/* 4261 * PD_EVENT_PS_FAULT data field flags definition : 4262 */ 4263#define PS_FAULT_OCP 1 4264#define PS_FAULT_FAST_OCP 2 4265#define PS_FAULT_OVP 3 4266#define PS_FAULT_DISCH 4 4267 4268/* 4269 * PD_EVENT_VIDEO_CODEC payload is "struct mcdp_info". 4270 */ 4271struct __ec_align4 mcdp_version { 4272 uint8_t major; 4273 uint8_t minor; 4274 uint16_t build; 4275}; 4276 4277struct __ec_align4 mcdp_info { 4278 uint8_t family[2]; 4279 uint8_t chipid[2]; 4280 struct mcdp_version irom; 4281 struct mcdp_version fw; 4282}; 4283 4284/* struct mcdp_info field decoding */ 4285#define MCDP_CHIPID(chipid) ((chipid[0] << 8) | chipid[1]) 4286#define MCDP_FAMILY(family) ((family[0] << 8) | family[1]) 4287 4288/* Get/Set USB-PD Alternate mode info */ 4289#define EC_CMD_USB_PD_GET_AMODE 0x0116 4290struct __ec_align_size1 ec_params_usb_pd_get_mode_request { 4291 uint16_t svid_idx; /* SVID index to get */ 4292 uint8_t port; /* port */ 4293}; 4294 4295struct __ec_align4 ec_params_usb_pd_get_mode_response { 4296 uint16_t svid; /* SVID */ 4297 uint16_t opos; /* Object Position */ 4298 uint32_t vdo[6]; /* Mode VDOs */ 4299}; 4300 4301#define EC_CMD_USB_PD_SET_AMODE 0x0117 4302 4303enum pd_mode_cmd { 4304 PD_EXIT_MODE = 0, 4305 PD_ENTER_MODE = 1, 4306 /* Not a command. Do NOT remove. */ 4307 PD_MODE_CMD_COUNT, 4308}; 4309 4310struct __ec_align4 ec_params_usb_pd_set_mode_request { 4311 uint32_t cmd; /* enum pd_mode_cmd */ 4312 uint16_t svid; /* SVID to set */ 4313 uint8_t opos; /* Object Position */ 4314 uint8_t port; /* port */ 4315}; 4316 4317/* Ask the PD MCU to record a log of a requested type */ 4318#define EC_CMD_PD_WRITE_LOG_ENTRY 0x0118 4319 4320struct __ec_align1 ec_params_pd_write_log_entry { 4321 uint8_t type; /* event type : see PD_EVENT_xx above */ 4322 uint8_t port; /* port#, or 0 for events unrelated to a given port */ 4323}; 4324 4325 4326/* Control USB-PD chip */ 4327#define EC_CMD_PD_CONTROL 0x0119 4328 4329enum ec_pd_control_cmd { 4330 PD_SUSPEND = 0, /* Suspend the PD chip (EC: stop talking to PD) */ 4331 PD_RESUME, /* Resume the PD chip (EC: start talking to PD) */ 4332 PD_RESET, /* Force reset the PD chip */ 4333 PD_CONTROL_DISABLE /* Disable further calls to this command */ 4334}; 4335 4336struct __ec_align1 ec_params_pd_control { 4337 uint8_t chip; /* chip id (should be 0) */ 4338 uint8_t subcmd; 4339}; 4340 4341/* Get info about USB-C SS muxes */ 4342#define EC_CMD_USB_PD_MUX_INFO 0x011A 4343 4344struct __ec_align1 ec_params_usb_pd_mux_info { 4345 uint8_t port; /* USB-C port number */ 4346}; 4347 4348/* Flags representing mux state */ 4349#define USB_PD_MUX_USB_ENABLED (1 << 0) 4350#define USB_PD_MUX_DP_ENABLED (1 << 1) 4351#define USB_PD_MUX_POLARITY_INVERTED (1 << 2) 4352#define USB_PD_MUX_HPD_IRQ (1 << 3) 4353 4354struct __ec_align1 ec_response_usb_pd_mux_info { 4355 uint8_t flags; /* USB_PD_MUX_*-encoded USB mux state */ 4356}; 4357 4358#define EC_CMD_PD_CHIP_INFO 0x011B 4359 4360struct __ec_align1 ec_params_pd_chip_info { 4361 uint8_t port; /* USB-C port number */ 4362 uint8_t renew; /* Force renewal */ 4363}; 4364 4365struct __ec_align2 ec_response_pd_chip_info { 4366 uint16_t vendor_id; 4367 uint16_t product_id; 4368 uint16_t device_id; 4369 union { 4370 uint8_t fw_version_string[8]; 4371 uint64_t fw_version_number; 4372 }; 4373}; 4374 4375/* Run RW signature verification and get status */ 4376#define EC_CMD_RWSIG_CHECK_STATUS 0x011C 4377 4378struct __ec_align4 ec_response_rwsig_check_status { 4379 uint32_t status; 4380}; 4381 4382/* For controlling RWSIG task */ 4383#define EC_CMD_RWSIG_ACTION 0x011D 4384 4385enum rwsig_action { 4386 RWSIG_ACTION_ABORT = 0, /* Abort RWSIG and prevent jumping */ 4387 RWSIG_ACTION_CONTINUE = 1, /* Jump to RW immediately */ 4388}; 4389 4390struct __ec_align4 ec_params_rwsig_action { 4391 uint32_t action; 4392}; 4393 4394/* Run verification on a slot */ 4395#define EC_CMD_EFS_VERIFY 0x011E 4396 4397struct __ec_align1 ec_params_efs_verify { 4398 uint8_t region; /* enum ec_flash_region */ 4399}; 4400 4401/* 4402 * Retrieve info from Cros Board Info store. Response is based on the data 4403 * type. Integers return a uint32. Strings return a string, using the response 4404 * size to determine how big it is. 4405 */ 4406#define EC_CMD_GET_CROS_BOARD_INFO 0x011F 4407/* 4408 * Write info into Cros Board Info on EEPROM. Write fails if the board has 4409 * hardware write-protect enabled. 4410 */ 4411#define EC_CMD_SET_CROS_BOARD_INFO 0x0120 4412 4413enum cbi_data_tag { 4414 CBI_TAG_BOARD_VERSION = 0, /* uint16_t or uint8_t[] = {minor,major} */ 4415 CBI_TAG_OEM_ID = 1, /* uint8_t */ 4416 CBI_TAG_SKU_ID = 2, /* uint8_t */ 4417 CBI_TAG_COUNT, 4418}; 4419 4420/* 4421 * Flags to control read operation 4422 * 4423 * RELOAD: Invalidate cache and read data from EEPROM. Useful to verify 4424 * write was successful without reboot. 4425 */ 4426#define CBI_GET_RELOAD (1 << 0) 4427 4428struct __ec_align4 ec_params_get_cbi { 4429 uint32_t type; /* enum cbi_data_tag */ 4430 uint32_t flag; /* CBI_GET_* */ 4431}; 4432 4433/* 4434 * Flags to control write behavior. 4435 * 4436 * NO_SYNC: Makes EC update data in RAM but skip writing to EEPROM. It's 4437 * useful when writing multiple fields in a row. 4438 * INIT: Needs to be set when creating a new CBI from scratch. All fields 4439 * will be initialized to zero first. 4440 */ 4441#define CBI_SET_NO_SYNC (1 << 0) 4442#define CBI_SET_INIT (1 << 1) 4443 4444struct __ec_align1 ec_params_set_cbi { 4445 uint32_t tag; /* enum cbi_data_tag */ 4446 uint32_t flag; /* CBI_SET_* */ 4447 uint32_t size; /* Data size */ 4448 uint8_t data[]; /* For string and raw data */ 4449}; 4450 4451/*****************************************************************************/ 4452/* The command range 0x200-0x2FF is reserved for Rotor. */ 4453 4454/*****************************************************************************/ 4455/* 4456 * Reserve a range of host commands for the CR51 firmware. 4457 */ 4458#define EC_CMD_CR51_BASE 0x0300 4459#define EC_CMD_CR51_LAST 0x03FF 4460 4461/*****************************************************************************/ 4462/* Fingerprint MCU commands: range 0x0400-0x040x */ 4463 4464/* Fingerprint SPI sensor passthru command: prototyping ONLY */ 4465#define EC_CMD_FP_PASSTHRU 0x0400 4466 4467#define EC_FP_FLAG_NOT_COMPLETE 0x1 4468 4469struct __ec_align2 ec_params_fp_passthru { 4470 uint16_t len; /* Number of bytes to write then read */ 4471 uint16_t flags; /* EC_FP_FLAG_xxx */ 4472 uint8_t data[]; /* Data to send */ 4473}; 4474 4475/* Fingerprint sensor configuration command: prototyping ONLY */ 4476#define EC_CMD_FP_SENSOR_CONFIG 0x0401 4477 4478#define EC_FP_SENSOR_CONFIG_MAX_REGS 16 4479 4480struct __ec_align2 ec_params_fp_sensor_config { 4481 uint8_t count; /* Number of setup registers */ 4482 /* 4483 * the value to send to each of the 'count' setup registers 4484 * is stored in the 'data' array for 'len' bytes just after 4485 * the previous one. 4486 */ 4487 uint8_t len[EC_FP_SENSOR_CONFIG_MAX_REGS]; 4488 uint8_t data[]; 4489}; 4490 4491/* Configure the Fingerprint MCU behavior */ 4492#define EC_CMD_FP_MODE 0x0402 4493 4494/* Put the sensor in its lowest power mode */ 4495#define FP_MODE_DEEPSLEEP (1<<0) 4496/* Wait to see a finger on the sensor */ 4497#define FP_MODE_FINGER_DOWN (1<<1) 4498/* Poll until the finger has left the sensor */ 4499#define FP_MODE_FINGER_UP (1<<2) 4500/* Capture the current finger image */ 4501#define FP_MODE_CAPTURE (1<<3) 4502/* special value: don't change anything just read back current mode */ 4503#define FP_MODE_DONT_CHANGE (1<<31) 4504 4505struct __ec_align4 ec_params_fp_mode { 4506 uint32_t mode; /* as defined by FP_MODE_ constants */ 4507 /* TBD */ 4508}; 4509 4510struct __ec_align4 ec_response_fp_mode { 4511 uint32_t mode; /* as defined by FP_MODE_ constants */ 4512 /* TBD */ 4513}; 4514 4515/* Retrieve Fingerprint sensor information */ 4516#define EC_CMD_FP_INFO 0x0403 4517 4518struct __ec_align2 ec_response_fp_info { 4519 /* Sensor identification */ 4520 uint32_t vendor_id; 4521 uint32_t product_id; 4522 uint32_t model_id; 4523 uint32_t version; 4524 /* Image frame characteristics */ 4525 uint32_t frame_size; 4526 uint32_t pixel_format; /* using V4L2_PIX_FMT_ */ 4527 uint16_t width; 4528 uint16_t height; 4529 uint16_t bpp; 4530}; 4531 4532/* Get the last captured finger frame: TODO: will be AES-encrypted */ 4533#define EC_CMD_FP_FRAME 0x0404 4534 4535struct __ec_align4 ec_params_fp_frame { 4536 uint32_t offset; 4537 uint32_t size; 4538}; 4539 4540/*****************************************************************************/ 4541/* Touchpad MCU commands: range 0x0500-0x05FF */ 4542 4543/* Perform touchpad self test */ 4544#define EC_CMD_TP_SELF_TEST 0x0500 4545 4546/* Get number of frame types, and the size of each type */ 4547#define EC_CMD_TP_FRAME_INFO 0x0501 4548 4549struct __ec_align4 ec_response_tp_frame_info { 4550 uint32_t n_frames; 4551 uint32_t frame_sizes[0]; 4552}; 4553 4554/* Create a snapshot of current frame readings */ 4555#define EC_CMD_TP_FRAME_SNAPSHOT 0x0502 4556 4557/* Read the frame */ 4558#define EC_CMD_TP_FRAME_GET 0x0503 4559 4560struct __ec_align4 ec_params_tp_frame_get { 4561 uint32_t frame_index; 4562 uint32_t offset; 4563 uint32_t size; 4564}; 4565 4566/*****************************************************************************/ 4567/* 4568 * Reserve a range of host commands for board-specific, experimental, or 4569 * special purpose features. These can be (re)used without updating this file. 4570 * 4571 * CAUTION: Don't go nuts with this. Shipping products should document ALL 4572 * their EC commands for easier development, testing, debugging, and support. 4573 * 4574 * All commands MUST be #defined to be 4-digit UPPER CASE hex values 4575 * (e.g., 0x00AB, not 0xab) for CONFIG_HOSTCMD_SECTION_SORTED to work. 4576 * 4577 * In your experimental code, you may want to do something like this: 4578 * 4579 * #define EC_CMD_MAGIC_FOO 0x0000 4580 * #define EC_CMD_MAGIC_BAR 0x0001 4581 * #define EC_CMD_MAGIC_HEY 0x0002 4582 * 4583 * DECLARE_PRIVATE_HOST_COMMAND(EC_CMD_MAGIC_FOO, magic_foo_handler, 4584 * EC_VER_MASK(0); 4585 * 4586 * DECLARE_PRIVATE_HOST_COMMAND(EC_CMD_MAGIC_BAR, magic_bar_handler, 4587 * EC_VER_MASK(0); 4588 * 4589 * DECLARE_PRIVATE_HOST_COMMAND(EC_CMD_MAGIC_HEY, magic_hey_handler, 4590 * EC_VER_MASK(0); 4591 */ 4592#define EC_CMD_BOARD_SPECIFIC_BASE 0x3E00 4593#define EC_CMD_BOARD_SPECIFIC_LAST 0x3FFF 4594 4595/* 4596 * Given the private host command offset, calculate the true private host 4597 * command value. 4598 */ 4599#define EC_PRIVATE_HOST_COMMAND_VALUE(command) \ 4600 (EC_CMD_BOARD_SPECIFIC_BASE + (command)) 4601 4602/*****************************************************************************/ 4603/* 4604 * Passthru commands 4605 * 4606 * Some platforms have sub-processors chained to each other. For example. 4607 * 4608 * AP <--> EC <--> PD MCU 4609 * 4610 * The top 2 bits of the command number are used to indicate which device the 4611 * command is intended for. Device 0 is always the device receiving the 4612 * command; other device mapping is board-specific. 4613 * 4614 * When a device receives a command to be passed to a sub-processor, it passes 4615 * it on with the device number set back to 0. This allows the sub-processor 4616 * to remain blissfully unaware of whether the command originated on the next 4617 * device up the chain, or was passed through from the AP. 4618 * 4619 * In the above example, if the AP wants to send command 0x0002 to the PD MCU, 4620 * AP sends command 0x4002 to the EC 4621 * EC sends command 0x0002 to the PD MCU 4622 * EC forwards PD MCU response back to the AP 4623 */ 4624 4625/* Offset and max command number for sub-device n */ 4626#define EC_CMD_PASSTHRU_OFFSET(n) (0x4000 * (n)) 4627#define EC_CMD_PASSTHRU_MAX(n) (EC_CMD_PASSTHRU_OFFSET(n) + 0x3fff) 4628 4629/*****************************************************************************/ 4630/* 4631 * Deprecated constants. These constants have been renamed for clarity. The 4632 * meaning and size has not changed. Programs that use the old names should 4633 * switch to the new names soon, as the old names may not be carried forward 4634 * forever. 4635 */ 4636#define EC_HOST_PARAM_SIZE EC_PROTO2_MAX_PARAM_SIZE 4637#define EC_LPC_ADDR_OLD_PARAM EC_HOST_CMD_REGION1 4638#define EC_OLD_PARAM_SIZE EC_HOST_CMD_REGION_SIZE 4639 4640#endif /* !__ACPI__ && !__KERNEL__ */ 4641 4642#endif /* __CROS_EC_COMMANDS_H */ 4643