1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (C) 2021 Jernej Skrabec <jernej.skrabec@siol.net>
4 */
5
6#include <common.h>
7#include <clk-uclass.h>
8#include <dm.h>
9#include <errno.h>
10#include <clk/sunxi.h>
11#include <dt-bindings/clock/sun50i-h616-ccu.h>
12#include <dt-bindings/reset/sun50i-h616-ccu.h>
13#include <linux/bitops.h>
14
15static struct ccu_clk_gate h616_gates[] = {
16	[CLK_PLL_PERIPH0]	= GATE(0x020, BIT(31) | BIT(27)),
17
18	[CLK_APB1]		= GATE_DUMMY,
19
20	[CLK_DE]		= GATE(0x600, BIT(31)),
21	[CLK_BUS_DE]		= GATE(0x60c, BIT(0)),
22
23	[CLK_NAND0]		= GATE(0x810, BIT(31)),
24	[CLK_NAND1]		= GATE(0x814, BIT(31)),
25	[CLK_BUS_NAND]		= GATE(0x82c, BIT(0)),
26
27	[CLK_BUS_MMC0]		= GATE(0x84c, BIT(0)),
28	[CLK_BUS_MMC1]		= GATE(0x84c, BIT(1)),
29	[CLK_BUS_MMC2]		= GATE(0x84c, BIT(2)),
30
31	[CLK_BUS_UART0]		= GATE(0x90c, BIT(0)),
32	[CLK_BUS_UART1]		= GATE(0x90c, BIT(1)),
33	[CLK_BUS_UART2]		= GATE(0x90c, BIT(2)),
34	[CLK_BUS_UART3]		= GATE(0x90c, BIT(3)),
35	[CLK_BUS_UART4]		= GATE(0x90c, BIT(4)),
36	[CLK_BUS_UART5]		= GATE(0x90c, BIT(5)),
37
38	[CLK_BUS_I2C0]		= GATE(0x91c, BIT(0)),
39	[CLK_BUS_I2C1]		= GATE(0x91c, BIT(1)),
40	[CLK_BUS_I2C2]		= GATE(0x91c, BIT(2)),
41	[CLK_BUS_I2C3]		= GATE(0x91c, BIT(3)),
42	[CLK_BUS_I2C4]		= GATE(0x91c, BIT(4)),
43
44	[CLK_SPI0]		= GATE(0x940, BIT(31)),
45	[CLK_SPI1]		= GATE(0x944, BIT(31)),
46
47	[CLK_BUS_SPI0]		= GATE(0x96c, BIT(0)),
48	[CLK_BUS_SPI1]		= GATE(0x96c, BIT(1)),
49
50	[CLK_BUS_EMAC0]		= GATE(0x97c, BIT(0)),
51	[CLK_BUS_EMAC1]		= GATE(0x97c, BIT(1)),
52
53	[CLK_USB_PHY0]		= GATE(0xa70, BIT(29)),
54	[CLK_USB_OHCI0]		= GATE(0xa70, BIT(31)),
55
56	[CLK_USB_PHY1]		= GATE(0xa74, BIT(29)),
57	[CLK_USB_OHCI1]		= GATE(0xa74, BIT(31)),
58
59	[CLK_USB_PHY2]		= GATE(0xa78, BIT(29)),
60	[CLK_USB_OHCI2]		= GATE(0xa78, BIT(31)),
61
62	[CLK_USB_PHY3]		= GATE(0xa7c, BIT(29)),
63	[CLK_USB_OHCI3]		= GATE(0xa7c, BIT(31)),
64
65	[CLK_BUS_OHCI0]		= GATE(0xa8c, BIT(0)),
66	[CLK_BUS_OHCI1]		= GATE(0xa8c, BIT(1)),
67	[CLK_BUS_OHCI2]		= GATE(0xa8c, BIT(2)),
68	[CLK_BUS_OHCI3]		= GATE(0xa8c, BIT(3)),
69	[CLK_BUS_EHCI0]		= GATE(0xa8c, BIT(4)),
70	[CLK_BUS_EHCI1]		= GATE(0xa8c, BIT(5)),
71	[CLK_BUS_EHCI2]		= GATE(0xa8c, BIT(6)),
72	[CLK_BUS_EHCI3]		= GATE(0xa8c, BIT(7)),
73	[CLK_BUS_OTG]		= GATE(0xa8c, BIT(8)),
74
75	[CLK_HDMI]		= GATE(0xb00, BIT(31)),
76	[CLK_HDMI_SLOW]		= GATE(0xb04, BIT(31)),
77	[CLK_HDMI_CEC]		= GATE(0xb10, BIT(31)),
78	[CLK_BUS_HDMI]		= GATE(0xb1c, BIT(0)),
79	[CLK_BUS_TCON_TOP]	= GATE(0xb5c, BIT(0)),
80	[CLK_TCON_TV0]		= GATE(0xb80, BIT(31)),
81	[CLK_TCON_TV1]		= GATE(0xb84, BIT(31)),
82	[CLK_BUS_TCON_TV0]	= GATE(0xb9c, BIT(0)),
83	[CLK_BUS_TCON_TV1]	= GATE(0xb9c, BIT(1)),
84};
85
86static struct ccu_reset h616_resets[] = {
87	[RST_BUS_DE]		= RESET(0x60c, BIT(16)),
88	[RST_BUS_NAND]		= RESET(0x82c, BIT(16)),
89
90	[RST_BUS_MMC0]		= RESET(0x84c, BIT(16)),
91	[RST_BUS_MMC1]		= RESET(0x84c, BIT(17)),
92	[RST_BUS_MMC2]		= RESET(0x84c, BIT(18)),
93
94	[RST_BUS_UART0]		= RESET(0x90c, BIT(16)),
95	[RST_BUS_UART1]		= RESET(0x90c, BIT(17)),
96	[RST_BUS_UART2]		= RESET(0x90c, BIT(18)),
97	[RST_BUS_UART3]		= RESET(0x90c, BIT(19)),
98	[RST_BUS_UART4]		= RESET(0x90c, BIT(20)),
99	[RST_BUS_UART5]		= RESET(0x90c, BIT(21)),
100
101	[RST_BUS_I2C0]		= RESET(0x91c, BIT(16)),
102	[RST_BUS_I2C1]		= RESET(0x91c, BIT(17)),
103	[RST_BUS_I2C2]		= RESET(0x91c, BIT(18)),
104	[RST_BUS_I2C3]		= RESET(0x91c, BIT(19)),
105	[RST_BUS_I2C4]		= RESET(0x91c, BIT(20)),
106
107	[RST_BUS_SPI0]		= RESET(0x96c, BIT(16)),
108	[RST_BUS_SPI1]		= RESET(0x96c, BIT(17)),
109
110	[RST_BUS_EMAC0]		= RESET(0x97c, BIT(16)),
111	[RST_BUS_EMAC1]		= RESET(0x97c, BIT(17)),
112
113	[RST_USB_PHY0]		= RESET(0xa70, BIT(30)),
114
115	[RST_USB_PHY1]		= RESET(0xa74, BIT(30)),
116
117	[RST_USB_PHY2]		= RESET(0xa78, BIT(30)),
118
119	[RST_USB_PHY3]		= RESET(0xa7c, BIT(30)),
120
121	[RST_BUS_OHCI0]		= RESET(0xa8c, BIT(16)),
122	[RST_BUS_OHCI1]		= RESET(0xa8c, BIT(17)),
123	[RST_BUS_OHCI2]		= RESET(0xa8c, BIT(18)),
124	[RST_BUS_OHCI3]		= RESET(0xa8c, BIT(19)),
125	[RST_BUS_EHCI0]		= RESET(0xa8c, BIT(20)),
126	[RST_BUS_EHCI1]		= RESET(0xa8c, BIT(21)),
127	[RST_BUS_EHCI2]		= RESET(0xa8c, BIT(22)),
128	[RST_BUS_EHCI3]		= RESET(0xa8c, BIT(23)),
129	[RST_BUS_OTG]		= RESET(0xa8c, BIT(24)),
130
131	[RST_BUS_HDMI]		= RESET(0xb1c, BIT(16)),
132	[RST_BUS_HDMI_SUB]	= RESET(0xb1c, BIT(17)),
133	[RST_BUS_TCON_TOP]	= RESET(0xb5c, BIT(16)),
134	[RST_BUS_TCON_TV0]	= RESET(0xb9c, BIT(16)),
135	[RST_BUS_TCON_TV1]	= RESET(0xb9c, BIT(17)),
136};
137
138const struct ccu_desc h616_ccu_desc = {
139	.gates = h616_gates,
140	.resets = h616_resets,
141	.num_gates = ARRAY_SIZE(h616_gates),
142	.num_resets = ARRAY_SIZE(h616_resets),
143};
144