1// SPDX-License-Identifier: (GPL-2.0+) 2/* 3 * Copyright (C) 2019 George Hilliard <thirtythreeforty@gmail.com>. 4 */ 5 6#include <common.h> 7#include <clk-uclass.h> 8#include <dm.h> 9#include <errno.h> 10#include <clk/sunxi.h> 11#include <dt-bindings/clock/suniv-ccu-f1c100s.h> 12#include <dt-bindings/reset/suniv-ccu-f1c100s.h> 13 14static struct ccu_clk_gate f1c100s_gates[] = { 15 [CLK_BUS_MMC0] = GATE(0x060, BIT(8)), 16 [CLK_BUS_MMC1] = GATE(0x060, BIT(9)), 17 [CLK_BUS_SPI0] = GATE(0x060, BIT(20)), 18 [CLK_BUS_SPI1] = GATE(0x060, BIT(21)), 19 [CLK_BUS_OTG] = GATE(0x060, BIT(24)), 20 21 [CLK_BUS_I2C0] = GATE(0x068, BIT(16)), 22 [CLK_BUS_I2C1] = GATE(0x068, BIT(17)), 23 [CLK_BUS_I2C2] = GATE(0x068, BIT(18)), 24 [CLK_BUS_PIO] = GATE(0x068, BIT(19)), 25 26 [CLK_BUS_UART0] = GATE(0x06c, BIT(20)), 27 [CLK_BUS_UART1] = GATE(0x06c, BIT(21)), 28 [CLK_BUS_UART2] = GATE(0x06c, BIT(22)), 29 30 [CLK_USB_PHY0] = GATE(0x0cc, BIT(1)), 31}; 32 33static struct ccu_reset f1c100s_resets[] = { 34 [RST_USB_PHY0] = RESET(0x0cc, BIT(0)), 35 36 [RST_BUS_MMC0] = RESET(0x2c0, BIT(8)), 37 [RST_BUS_MMC1] = RESET(0x2c0, BIT(9)), 38 [RST_BUS_SPI0] = RESET(0x2c0, BIT(20)), 39 [RST_BUS_SPI1] = RESET(0x2c0, BIT(21)), 40 [RST_BUS_OTG] = RESET(0x2c0, BIT(24)), 41 42 [RST_BUS_I2C0] = RESET(0x2d0, BIT(16)), 43 [RST_BUS_I2C1] = RESET(0x2d0, BIT(17)), 44 [RST_BUS_I2C2] = RESET(0x2d0, BIT(18)), 45 [RST_BUS_UART0] = RESET(0x2d0, BIT(20)), 46 [RST_BUS_UART1] = RESET(0x2d0, BIT(21)), 47 [RST_BUS_UART2] = RESET(0x2d0, BIT(22)), 48}; 49 50const struct ccu_desc f1c100s_ccu_desc = { 51 .gates = f1c100s_gates, 52 .resets = f1c100s_resets, 53 .num_gates = ARRAY_SIZE(f1c100s_gates), 54 .num_resets = ARRAY_SIZE(f1c100s_resets), 55}; 56