1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (C) 2018 Amarula Solutions. 4 * Author: Jagan Teki <jagan@amarulasolutions.com> 5 */ 6 7#include <common.h> 8#include <clk-uclass.h> 9#include <dm.h> 10#include <errno.h> 11#include <clk/sunxi.h> 12#include <dt-bindings/clock/sun5i-ccu.h> 13#include <dt-bindings/reset/sun5i-ccu.h> 14#include <linux/bitops.h> 15 16static struct ccu_clk_gate a10s_gates[] = { 17 [CLK_AHB_OTG] = GATE(0x060, BIT(0)), 18 [CLK_AHB_EHCI] = GATE(0x060, BIT(1)), 19 [CLK_AHB_OHCI] = GATE(0x060, BIT(2)), 20 [CLK_AHB_MMC0] = GATE(0x060, BIT(8)), 21 [CLK_AHB_MMC1] = GATE(0x060, BIT(9)), 22 [CLK_AHB_MMC2] = GATE(0x060, BIT(10)), 23 [CLK_AHB_NAND] = GATE(0x060, BIT(13)), 24 [CLK_AHB_EMAC] = GATE(0x060, BIT(17)), 25 [CLK_AHB_SPI0] = GATE(0x060, BIT(20)), 26 [CLK_AHB_SPI1] = GATE(0x060, BIT(21)), 27 [CLK_AHB_SPI2] = GATE(0x060, BIT(22)), 28 29 [CLK_APB0_PIO] = GATE(0x068, BIT(5)), 30 31 [CLK_APB1_I2C0] = GATE(0x06c, BIT(0)), 32 [CLK_APB1_I2C1] = GATE(0x06c, BIT(1)), 33 [CLK_APB1_I2C2] = GATE(0x06c, BIT(2)), 34 [CLK_APB1_UART0] = GATE(0x06c, BIT(16)), 35 [CLK_APB1_UART1] = GATE(0x06c, BIT(17)), 36 [CLK_APB1_UART2] = GATE(0x06c, BIT(18)), 37 [CLK_APB1_UART3] = GATE(0x06c, BIT(19)), 38 39 [CLK_NAND] = GATE(0x080, BIT(31)), 40 [CLK_SPI0] = GATE(0x0a0, BIT(31)), 41 [CLK_SPI1] = GATE(0x0a4, BIT(31)), 42 [CLK_SPI2] = GATE(0x0a8, BIT(31)), 43 44 [CLK_USB_OHCI] = GATE(0x0cc, BIT(6)), 45 [CLK_USB_PHY0] = GATE(0x0cc, BIT(8)), 46 [CLK_USB_PHY1] = GATE(0x0cc, BIT(9)), 47}; 48 49static struct ccu_reset a10s_resets[] = { 50 [RST_USB_PHY0] = RESET(0x0cc, BIT(0)), 51 [RST_USB_PHY1] = RESET(0x0cc, BIT(1)), 52}; 53 54const struct ccu_desc a10s_ccu_desc = { 55 .gates = a10s_gates, 56 .resets = a10s_resets, 57 .num_gates = ARRAY_SIZE(a10s_gates), 58 .num_resets = ARRAY_SIZE(a10s_resets), 59}; 60