1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * OMAP EHCI port support
4 * Based on LINUX KERNEL
5 * drivers/usb/host/ehci-omap.c and drivers/mfd/omap-usb-host.c
6 *
7 * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com*
8 * Author: Govindraj R <govindraj.raja@ti.com>
9 */
10
11#ifndef _OMAP_COMMON_EHCI_H_
12#define _OMAP_COMMON_EHCI_H_
13
14enum usbhs_omap_port_mode {
15	OMAP_USBHS_PORT_MODE_UNUSED,
16	OMAP_EHCI_PORT_MODE_PHY,
17	OMAP_EHCI_PORT_MODE_TLL,
18	OMAP_EHCI_PORT_MODE_HSIC,
19};
20
21#define OMAP_HS_USB_PORTS	3
22
23#define is_ehci_phy_mode(x)	((x) == OMAP_EHCI_PORT_MODE_PHY)
24#define is_ehci_tll_mode(x)	((x) == OMAP_EHCI_PORT_MODE_TLL)
25#define is_ehci_hsic_mode(x)	((x) == OMAP_EHCI_PORT_MODE_HSIC)
26
27/* Values of UHH_REVISION - Note: these are not given in the TRM */
28#define OMAP_USBHS_REV1					0x00000010 /* OMAP3 */
29#define OMAP_USBHS_REV2					0x50700100 /* OMAP4 */
30#define OMAP_USBHS_REV2_1				0x50700101 /* OMAP5 */
31
32/* UHH Register Set */
33#define OMAP_UHH_HOSTCONFIG_INCR4_BURST_EN		(1 << 2)
34#define OMAP_UHH_HOSTCONFIG_INCR8_BURST_EN		(1 << 3)
35#define OMAP_UHH_HOSTCONFIG_INCR16_BURST_EN		(1 << 4)
36#define OMAP_UHH_HOSTCONFIG_INCRX_ALIGN_EN		(1 << 5)
37
38#define OMAP_UHH_HOSTCONFIG_ULPI_P1_BYPASS		1
39#define OMAP_UHH_HOSTCONFIG_ULPI_P2_BYPASS		(1 << 11)
40#define OMAP_UHH_HOSTCONFIG_ULPI_P3_BYPASS		(1 << 12)
41#define OMAP4_UHH_HOSTCONFIG_APP_START_CLK		(1 << 31)
42
43#define OMAP_P1_MODE_CLEAR				(3 << 16)
44#define OMAP_P1_MODE_TLL				(1 << 16)
45#define OMAP_P1_MODE_HSIC				(3 << 16)
46#define OMAP_P2_MODE_CLEAR				(3 << 18)
47#define OMAP_P2_MODE_TLL				(1 << 18)
48#define OMAP_P2_MODE_HSIC				(3 << 18)
49#define OMAP_P3_MODE_CLEAR				(3 << 20)
50#define OMAP_P3_MODE_HSIC				(3 << 20)
51
52/* EHCI Register Set */
53#define EHCI_INSNREG04_DISABLE_UNSUSPEND		(1 << 5)
54#define EHCI_INSNREG05_ULPI_CONTROL_SHIFT		31
55#define EHCI_INSNREG05_ULPI_PORTSEL_SHIFT		24
56#define EHCI_INSNREG05_ULPI_OPSEL_SHIFT			22
57#define EHCI_INSNREG05_ULPI_REGADD_SHIFT		16
58
59#define OMAP_REV1_TLL_CHANNEL_COUNT			3
60#define OMAP_REV2_TLL_CHANNEL_COUNT			2
61
62/* TLL Register Set */
63#define OMAP_TLL_CHANNEL_CONF(num)			(0x004 * num)
64#define OMAP_TLL_CHANNEL_CONF_DRVVBUS			(1 << 16)
65#define OMAP_TLL_CHANNEL_CONF_CHRGVBUS			(1 << 15)
66#define OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF		(1 << 11)
67#define OMAP_TLL_CHANNEL_CONF_CHANMODE_TRANSPARENT_UTMI	(2 << 1)
68#define OMAP_TLL_CHANNEL_CONF_CHANEN			1
69
70struct omap_usbhs_board_data {
71	enum usbhs_omap_port_mode port_mode[OMAP_HS_USB_PORTS];
72};
73
74struct omap_usbtll {
75	u32 rev;		/* 0x00 */
76	u32 hwinfo;		/* 0x04 */
77	u8 reserved1[0x8];
78	u32 sysc;		/* 0x10 */
79	u32 syss;		/* 0x14 */
80	u32 irqst;		/* 0x18 */
81	u32 irqen;		/* 0x1c */
82	u8 reserved2[0x10];
83	u32 shared_conf;	/* 0x30 */
84	u8 reserved3[0xc];
85	u32 channel_conf;	/* 0x40 */
86};
87
88struct omap_uhh {
89	u32 rev;	/* 0x00 */
90	u32 hwinfo;	/* 0x04 */
91	u8 reserved1[0x8];
92	u32 sysc;	/* 0x10 */
93	u32 syss;	/* 0x14 */
94	u8 reserved2[0x28];
95	u32 hostconfig;	/* 0x40 */
96	u32 debugcsr;	/* 0x44 */
97};
98
99struct omap_ehci {
100	u32 hccapbase;		/* 0x00 */
101	u32 hcsparams;		/* 0x04 */
102	u32 hccparams;		/* 0x08 */
103	u8 reserved1[0x04];
104	u32 usbcmd;		/* 0x10 */
105	u32 usbsts;		/* 0x14 */
106	u32 usbintr;		/* 0x18 */
107	u32 frindex;		/* 0x1c */
108	u32 ctrldssegment;	/* 0x20 */
109	u32 periodiclistbase;	/* 0x24 */
110	u32 asysnclistaddr;	/* 0x28 */
111	u8 reserved2[0x24];
112	u32 configflag;		/* 0x50 */
113	u32 portsc_i;		/* 0x54 */
114	u8 reserved3[0x38];
115	u32 insreg00;		/* 0x90 */
116	u32 insreg01;		/* 0x94 */
117	u32 insreg02;		/* 0x98 */
118	u32 insreg03;		/* 0x9c */
119	u32 insreg04;		/* 0xa0 */
120	u32 insreg05_utmi_ulpi;	/* 0xa4 */
121	u32 insreg06;		/* 0xa8 */
122	u32 insreg07;		/* 0xac */
123	u32 insreg08;		/* 0xb0 */
124};
125
126#endif /* _OMAP_COMMON_EHCI_H_ */
127