1/* SPDX-License-Identifier: GPL-2.0+ */ 2/* 3 * (C) Copyright 2007-2011 4 * Allwinner Technology Co., Ltd. <www.allwinnertech.com> 5 * Tom Cubie <tangliang@allwinnertech.com> 6 */ 7 8#ifndef _SUNXI_CPU_SUN4I_H 9#define _SUNXI_CPU_SUN4I_H 10 11#define SUNXI_SRAM_A1_BASE 0x00000000 12#define SUNXI_SRAM_A1_SIZE (16 * 1024) /* 16 kiB */ 13 14#if defined(CONFIG_SUNXI_GEN_SUN6I) && \ 15 !defined(CONFIG_MACH_SUN8I_R40) && \ 16 !defined(CONFIG_MACH_SUN8I_V3S) 17#define SUNXI_SRAM_A2_BASE 0x00040000 18#ifdef CONFIG_MACH_SUN8I_H3 19#define SUNXI_SRAM_A2_SIZE (48 * 1024) /* 16+32 kiB */ 20#else 21#define SUNXI_SRAM_A2_SIZE (80 * 1024) /* 16+64 kiB */ 22#endif 23#else 24#define SUNXI_SRAM_A2_BASE 0x00004000 /* 16 kiB */ 25#endif 26#define SUNXI_SRAM_A3_BASE 0x00008000 /* 13 kiB */ 27#define SUNXI_SRAM_A4_BASE 0x0000b400 /* 3 kiB */ 28#define SUNXI_SRAM_D_BASE 0x00010000 /* 4 kiB */ 29#define SUNXI_SRAM_B_BASE 0x00020000 /* 64 kiB (secure) */ 30 31#define SUNXI_DE2_BASE 0x01000000 32 33#ifdef CONFIG_MACH_SUN8I_A83T 34#define SUNXI_CPUCFG_BASE 0x01700000 35#endif 36 37#define SUNXI_SRAMC_BASE 0x01c00000 38#define SUNXI_DRAMC_BASE 0x01c01000 39#define SUNXI_NFC_BASE 0x01c03000 40#ifndef CONFIG_MACH_SUNXI_H3_H5 41#define SUNXI_TVE0_BASE 0x01c0a000 42#endif 43#define SUNXI_LCD0_BASE 0x01c0C000 44#define SUNXI_LCD1_BASE 0x01c0d000 45#define SUNXI_MMC0_BASE 0x01c0f000 46#define SUNXI_MMC1_BASE 0x01c10000 47#define SUNXI_MMC2_BASE 0x01c11000 48#define SUNXI_MMC3_BASE 0x01c12000 49#define SUNXI_SS_BASE 0x01c15000 50#if !defined(CONFIG_MACH_SUNXI_H3_H5) && !defined(CONFIG_MACH_SUN50I) 51#define SUNXI_HDMI_BASE 0x01c16000 52#endif 53 54#define SUNXI_CCM_BASE 0x01c20000 55#define SUNXI_INTC_BASE 0x01c20400 56#define SUNXI_TIMER_BASE 0x01c20c00 57#ifndef CONFIG_SUNXI_GEN_SUN6I 58#define SUNXI_PWM_BASE 0x01c20e00 59#endif 60#define SUNXI_SPDIF_BASE 0x01c21000 61#ifdef CONFIG_SUNXI_GEN_SUN6I 62#define SUNXI_PWM_BASE 0x01c21400 63#else 64#define SUNXI_AC97_BASE 0x01c21400 65#endif 66#define SUNXI_IR0_BASE 0x01c21800 67#define SUNXI_IR1_BASE 0x01c21c00 68 69#define SUNXI_IIS_BASE 0x01c22400 70#define SUNXI_LRADC_BASE 0x01c22800 71#define SUNXI_AD_DA_BASE 0x01c22c00 72#define SUNXI_KEYPAD_BASE 0x01c23000 73#define SUNXI_TZPC_BASE 0x01c23400 74 75#if defined(CONFIG_MACH_SUN8I_A83T) || defined(CONFIG_MACH_SUNXI_H3_H5) || \ 76defined(CONFIG_MACH_SUN50I) 77/* SID address space starts at 0x01c1400, but e-fuse is at offset 0x200 */ 78#define SUNXI_SIDC_BASE 0x01c14000 79#define SUNXI_SID_BASE 0x01c14200 80#else 81#define SUNXI_SID_BASE 0x01c23800 82#endif 83 84#define SUNXI_SJTAG_BASE 0x01c23c00 85 86#define SUNXI_TP_BASE 0x01c25000 87#define SUNXI_PMU_BASE 0x01c25400 88 89#if defined CONFIG_MACH_SUN7I || defined CONFIG_MACH_SUN8I_R40 90#define SUNXI_CPUCFG_BASE 0x01c25c00 91#endif 92 93#define SUNXI_PS2_0_BASE 0x01c2a000 94#define SUNXI_PS2_1_BASE 0x01c2a400 95 96#define SUNXI_TWI0_BASE 0x01c2ac00 97#define SUNXI_TWI1_BASE 0x01c2b000 98#define SUNXI_TWI2_BASE 0x01c2b400 99#ifdef CONFIG_MACH_SUN6I 100#define SUNXI_TWI3_BASE 0x01c0b800 101#endif 102#ifdef CONFIG_MACH_SUN7I 103#define SUNXI_TWI3_BASE 0x01c2b800 104#define SUNXI_TWI4_BASE 0x01c2c000 105#endif 106 107#define SUNXI_CAN_BASE 0x01c2bc00 108 109#define SUNXI_SCR_BASE 0x01c2c400 110 111#ifndef CONFIG_MACH_SUN6I 112#define SUNXI_GPS_BASE 0x01c30000 113#define SUNXI_MALI400_BASE 0x01c40000 114#define SUNXI_GMAC_BASE 0x01c50000 115#else 116#define SUNXI_GMAC_BASE 0x01c30000 117#endif 118 119#define SUNXI_DRAM_COM_BASE 0x01c62000 120#define SUNXI_DRAM_CTL0_BASE 0x01c63000 121#define SUNXI_DRAM_CTL1_BASE 0x01c64000 122#define SUNXI_DRAM_PHY0_BASE 0x01c65000 123#define SUNXI_DRAM_PHY1_BASE 0x01c66000 124 125#define SUNXI_GIC400_BASE 0x01c80000 126 127/* module sram */ 128#define SUNXI_SRAM_C_BASE 0x01d00000 129 130#ifndef CONFIG_MACH_SUN8I_H3 131#define SUNXI_DE_FE0_BASE 0x01e00000 132#else 133#define SUNXI_TVE0_BASE 0x01e00000 134#endif 135#define SUNXI_DE_FE1_BASE 0x01e20000 136#define SUNXI_DE_BE0_BASE 0x01e60000 137#ifndef CONFIG_MACH_SUN50I_H5 138#define SUNXI_DE_BE1_BASE 0x01e40000 139#else 140#define SUNXI_TVE0_BASE 0x01e40000 141#endif 142 143#if defined(CONFIG_MACH_SUNXI_H3_H5) || defined(CONFIG_MACH_SUN50I) 144#define SUNXI_HDMI_BASE 0x01ee0000 145#endif 146 147#define SUNXI_RTC_BASE 0x01f00000 148#define SUNXI_PRCM_BASE 0x01f01400 149 150#if defined CONFIG_SUNXI_GEN_SUN6I && \ 151 !defined CONFIG_MACH_SUN8I_A83T && \ 152 !defined CONFIG_MACH_SUN8I_R40 153#define SUNXI_CPUCFG_BASE 0x01f01c00 154#endif 155 156#define SUNXI_R_TWI_BASE 0x01f02400 157#define SUN6I_P2WI_BASE 0x01f03400 158#define SUNXI_RSB_BASE 0x01f03400 159 160#define SUNXI_CPU_CFG (SUNXI_TIMER_BASE + 0x13c) 161 162/* SS bonding ids used for cpu identification */ 163#define SUNXI_SS_BOND_ID_A31 4 164#define SUNXI_SS_BOND_ID_A31S 5 165 166#ifndef __ASSEMBLY__ 167void sunxi_board_init(void); 168void sunxi_reset(void); 169int sunxi_get_ss_bonding_id(void); 170int sunxi_get_sid(unsigned int *sid); 171unsigned int sunxi_get_sram_id(void); 172#endif /* __ASSEMBLY__ */ 173 174#endif /* _SUNXI_CPU_SUN4I_H */ 175