1#
2# Copyright 2018, Data61
3# Commonwealth Scientific and Industrial Research Organisation (CSIRO)
4# ABN 41 687 119 230.
5#
6# This software may be distributed and modified according to the terms of
7# the GNU General Public License version 2. Note that NO WARRANTY is provided.
8# See "LICENSE_GPLv2.txt" for details.
9#
10# @TAG(DATA61_GPL)
11#
12
13cmake_minimum_required(VERSION 3.7.2)
14
15config_choice(KernelRiscVSel4Arch RISCV_SEL4_ARCH "Architecture mode for building the kernel"
16    "riscv32;KernelSel4ArchRiscV32;ARCH_RISCV32;KernelArchRiscV"
17    "riscv64;KernelSel4ArchRiscV64;ARCH_RISCV64;KernelArchRiscV"
18)
19
20config_choice(KernelRiscVPlatform RISCV_PLAT "Select the platform for the architecture"
21    "spike;KernelPlatformSpike;PLAT_SPIKE;KernelArchRiscV"
22)
23
24if(KernelArchRiscV)
25    config_set(KernelSel4Arch SEL4_ARCH "${KernelRiscVSel4Arch}")
26endif()
27
28if(KernelSel4ArchRiscV32)
29    set_kernel_32()
30elseif(KernelSel4ArchRiscV64)
31    set_kernel_64()
32endif()
33
34# Include all the platforms.
35include(src/plat/spike/config.cmake)
36
37
38config_string(KernelPTLevels PT_LEVELS "Number of page \
39    table levels for RISC-V depends on the mode. For example there are: \
40    2, 3 and 4 levels on Sv32, Sv39, Sv48 RISC-V paging modes respectively."
41    DEFAULT 3
42    UNDEF_DISABLED
43    UNQUOTE
44    DEPENDS "KernelArchRiscV"
45)
46
47if (KernelSel4ArchRiscV32)
48    set(KernelPTLevels 2 CACHE STRING "" FORCE)
49endif()
50
51add_sources(
52    DEP "KernelArchRiscV"
53    PREFIX src/arch/riscv
54    CFILES
55        c_traps.c
56        idle.c
57        api/faults.c
58        api/benchmark.c
59        kernel/boot.c
60        kernel/thread.c
61        kernel/vspace.c
62        machine/capdl.c
63        machine/hardware.c
64        machine/registerset.c
65        machine/io.c
66        model/statedata.c
67        object/interrupt.c
68        object/objecttype.c
69        object/tcb.c
70    ASMFILES
71        halt.S
72        head.S
73        traps.S
74)
75
76add_bf_source_old("KernelArchRiscV" "structures.bf" "include/arch/riscv" "arch/object")
77add_bf_source_old("KernelArchRiscV" "hardware.bf" "include/plat/${KernelPlatform}" "plat/machine")
78
79