1/* 2 * Copyright 2017, Data61 3 * Commonwealth Scientific and Industrial Research Organisation (CSIRO) 4 * ABN 41 687 119 230. 5 * 6 * This software may be distributed and modified according to the terms of 7 * the BSD 2-Clause license. Note that NO WARRANTY is provided. 8 * See "LICENSE_BSD2.txt" for details. 9 * 10 * @TAG(DATA61_BSD) 11 */ 12 13#ifndef __LIBSEL4_SEL4_SEL4_ARCH_SYSCALLS_SYSENTER_H_ 14#define __LIBSEL4_SEL4_SEL4_ARCH_SYSCALLS_SYSENTER_H_ 15 16#include <autoconf.h> 17#include <sel4/arch/functions.h> 18#include <sel4/types.h> 19 20static inline void 21x64_sys_send(seL4_Word sys, seL4_Word dest, seL4_Word info, seL4_Word msg0, seL4_Word msg1, seL4_Word msg2, seL4_Word msg3) 22{ 23 register seL4_Word mr0 asm("r10") = msg0; 24 register seL4_Word mr1 asm("r8") = msg1; 25 register seL4_Word mr2 asm("r9") = msg2; 26 register seL4_Word mr3 asm("r15") = msg3; 27 28 asm volatile ( 29 "movq %%rsp, %%rcx \n" 30 "leaq 1f, %%rdx \n" 31 "1: \n" 32 "sysenter \n" 33 : 34 : "a" (sys), 35 "D" (dest), 36 "S" (info), 37 "r" (mr0), 38 "r" (mr1), 39 "r" (mr2), 40 "r" (mr3) 41 : "%rcx", "%rdx" 42 ); 43} 44 45static inline void 46x64_sys_send_null(seL4_Word sys, seL4_Word dest, seL4_Word info) 47{ 48 asm volatile ( 49 "movq %%rsp, %%rcx \n" 50 "leaq 1f, %%rdx \n" 51 "1: \n" 52 "sysenter \n" 53 : 54 : "a" (sys), 55 "D" (dest), 56 "S" (info) 57 : "%rcx", "%rdx" 58 ); 59} 60 61static inline void 62x64_sys_recv(seL4_Word sys, seL4_Word src, seL4_Word *out_badge, seL4_Word *out_info, seL4_Word *out_mr0, seL4_Word *out_mr1, seL4_Word *out_mr2, seL4_Word *out_mr3, seL4_Word reply) 63{ 64 register seL4_Word mr0 asm("r10"); 65 register seL4_Word mr1 asm("r8"); 66 register seL4_Word mr2 asm("r9"); 67 register seL4_Word mr3 asm("r15"); 68 register seL4_Word reply_reg asm("r12") = reply; 69 70 asm volatile ( 71 "movq %%rsp, %%rcx \n" 72 "leaq 1f, %%rdx \n" 73 "1: \n" 74 "sysenter \n" 75 : "=D" (*out_badge), 76 "=S" (*out_info), 77 "=r" (mr0), 78 "=r" (mr1), 79 "=r" (mr2), 80 "=r" (mr3) 81 : "a" (sys), 82 "D" (src), 83 "r" (reply_reg) 84 : "%rcx", "%rdx", "memory" 85 ); 86 87 *out_mr0 = mr0; 88 *out_mr1 = mr1; 89 *out_mr2 = mr2; 90 *out_mr3 = mr3; 91} 92 93static inline void 94x64_sys_send_recv(seL4_Word sys, seL4_Word dest, seL4_Word *out_dest, seL4_Word info, seL4_Word *out_info, seL4_Word *in_out_mr0, seL4_Word *in_out_mr1, seL4_Word *in_out_mr2, seL4_Word *in_out_mr3, seL4_Word reply) 95{ 96 register seL4_Word mr0 asm("r10") = *in_out_mr0; 97 register seL4_Word mr1 asm("r8") = *in_out_mr1; 98 register seL4_Word mr2 asm("r9") = *in_out_mr2; 99 register seL4_Word mr3 asm("r15") = *in_out_mr3; 100 register seL4_Word reply_reg asm("r12") = reply; 101 102 asm volatile ( 103 "movq %%rsp, %%rcx \n" 104 "leaq 1f, %%rdx \n" 105 "1: \n" 106 "sysenter \n" 107 : "=S" (*out_info), 108 "=r" (mr0), 109 "=r" (mr1), 110 "=r" (mr2), 111 "=r" (mr3), 112 "=D" (*out_dest) 113 : "a" (sys), 114 "D" (dest), 115 "S" (info), 116 "r" (mr0), 117 "r" (mr1), 118 "r" (mr2), 119 "r" (mr3), 120 "r" (reply_reg) 121 : "%rcx", "%rdx", "memory" 122 ); 123 124 *in_out_mr0 = mr0; 125 *in_out_mr1 = mr1; 126 *in_out_mr2 = mr2; 127 *in_out_mr3 = mr3; 128} 129 130static inline void 131x64_sys_nbsend_recv(seL4_Word sys, seL4_Word dest, seL4_Word src, seL4_Word *out_dest, seL4_Word info, seL4_Word *out_info, seL4_Word *in_out_mr0, seL4_Word *in_out_mr1, seL4_Word *in_out_mr2, seL4_Word *in_out_mr3, seL4_Word reply) 132{ 133 register seL4_Word mr0 asm("r10") = *in_out_mr0; 134 register seL4_Word mr1 asm("r8") = *in_out_mr1; 135 register seL4_Word mr2 asm("r9") = *in_out_mr2; 136 register seL4_Word mr3 asm("r15") = *in_out_mr3; 137 register seL4_Word reply_reg asm("r12") = reply; 138 register seL4_Word dest_reg asm("r13") = dest; 139 140 asm volatile ( 141 "movq %%rsp, %%rcx \n" 142 "leaq 1f, %%rdx \n" 143 "1: \n" 144 "sysenter \n" 145 : "=S" (*out_info), 146 "=r" (mr0), 147 "=r" (mr1), 148 "=D" (*out_dest) 149 : "a" (sys), 150 "D" (src), 151 "S" (info), 152 "r" (mr0), 153 "r" (mr1), 154 "r" (reply_reg), 155 "r" (dest_reg) 156 : "%rcx", "%rdx", "memory" 157 ); 158 159 *in_out_mr0 = mr0; 160 *in_out_mr1 = mr1; 161 *in_out_mr2 = mr2; 162 *in_out_mr3 = mr3; 163} 164 165static inline void 166x64_sys_null(seL4_Word sys) 167{ 168 asm volatile ( 169 "movq %%rsp, %%rcx \n" 170 "leaq 1f, %%rdx \n" 171 "1: \n" 172 "sysenter \n" 173 : 174 : "a" (sys) 175 : "%rbx", "%rcx", "%rdx", "%rsi", "%rdi", "memory" 176 ); 177} 178 179#endif /* __LIBSEL4_SEL4_SEL4_ARCH_SYSCALLS_SYSENTER_H_ */ 180