1/*
2 * CRIS pgtable.h - macros and functions to manipulate page tables.
3 */
4
5#ifndef _CRIS_PGTABLE_H
6#define _CRIS_PGTABLE_H
7
8#include <asm/page.h>
9#include <asm-generic/pgtable-nopmd.h>
10
11#ifndef __ASSEMBLY__
12#include <linux/sched.h>
13#include <asm/mmu.h>
14#endif
15#include <asm/arch/pgtable.h>
16
17/*
18 * The Linux memory management assumes a three-level page table setup. On
19 * CRIS, we use that, but "fold" the mid level into the top-level page
20 * table. Since the MMU TLB is software loaded through an interrupt, it
21 * supports any page table structure, so we could have used a three-level
22 * setup, but for the amounts of memory we normally use, a two-level is
23 * probably more efficient.
24 *
25 * This file contains the functions and defines necessary to modify and use
26 * the CRIS page table tree.
27 */
28#ifndef __ASSEMBLY__
29extern void paging_init(void);
30#endif
31
32/* Certain architectures need to do special things when pte's
33 * within a page table are directly modified.  Thus, the following
34 * hook is made available.
35 */
36#define set_pte(pteptr, pteval) ((*(pteptr)) = (pteval))
37#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
38
39/*
40 * (pmds are folded into pgds so this doesn't get actually called,
41 * but the define is needed for a generic inline function.)
42 */
43#define set_pmd(pmdptr, pmdval) (*(pmdptr) = pmdval)
44#define set_pgu(pudptr, pudval) (*(pudptr) = pudval)
45
46/* PGDIR_SHIFT determines the size of the area a second-level page table can
47 * map. It is equal to the page size times the number of PTE's that fit in
48 * a PMD page. A PTE is 4-bytes in CRIS. Hence the following number.
49 */
50
51#define PGDIR_SHIFT	(PAGE_SHIFT + (PAGE_SHIFT-2))
52#define PGDIR_SIZE	(1UL << PGDIR_SHIFT)
53#define PGDIR_MASK	(~(PGDIR_SIZE-1))
54
55/*
56 * entries per page directory level: we use a two-level, so
57 * we don't really have any PMD directory physically.
58 * pointers are 4 bytes so we can use the page size and
59 * divide it by 4 (shift by 2).
60 */
61#define PTRS_PER_PTE	(1UL << (PAGE_SHIFT-2))
62#define PTRS_PER_PGD	(1UL << (PAGE_SHIFT-2))
63
64/* calculate how many PGD entries a user-level program can use
65 * the first mappable virtual address is 0
66 * (TASK_SIZE is the maximum virtual address space)
67 */
68
69#define USER_PTRS_PER_PGD       (TASK_SIZE/PGDIR_SIZE)
70#define FIRST_USER_ADDRESS      0
71
72/* zero page used for uninitialized stuff */
73#ifndef __ASSEMBLY__
74extern unsigned long empty_zero_page;
75#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
76#endif
77
78/* number of bits that fit into a memory pointer */
79#define BITS_PER_PTR			(8*sizeof(unsigned long))
80
81/* to align the pointer to a pointer address */
82#define PTR_MASK			(~(sizeof(void*)-1))
83
84/* sizeof(void*)==1<<SIZEOF_PTR_LOG2 */
85/* 64-bit machines, beware!  SRB. */
86#define SIZEOF_PTR_LOG2			2
87
88/* to find an entry in a page-table */
89#define PAGE_PTR(address) \
90((unsigned long)(address)>>(PAGE_SHIFT-SIZEOF_PTR_LOG2)&PTR_MASK&~PAGE_MASK)
91
92/* to set the page-dir */
93#define SET_PAGE_DIR(tsk,pgdir)
94
95#define pte_none(x)	(!pte_val(x))
96#define pte_present(x)	(pte_val(x) & _PAGE_PRESENT)
97#define pte_clear(mm,addr,xp)	do { pte_val(*(xp)) = 0; } while (0)
98
99#define pmd_none(x)     (!pmd_val(x))
100/* by removing the _PAGE_KERNEL bit from the comparision, the same pmd_bad
101 * works for both _PAGE_TABLE and _KERNPG_TABLE pmd entries.
102 */
103#define	pmd_bad(x)	((pmd_val(x) & (~PAGE_MASK & ~_PAGE_KERNEL)) != _PAGE_TABLE)
104#define pmd_present(x)	(pmd_val(x) & _PAGE_PRESENT)
105#define pmd_clear(xp)	do { pmd_val(*(xp)) = 0; } while (0)
106
107#ifndef __ASSEMBLY__
108
109/*
110 * The following only work if pte_present() is true.
111 * Undefined behaviour if not..
112 */
113
114static inline int pte_read(pte_t pte)           { return pte_val(pte) & _PAGE_READ; }
115static inline int pte_write(pte_t pte)          { return pte_val(pte) & _PAGE_WRITE; }
116static inline int pte_exec(pte_t pte)           { return pte_val(pte) & _PAGE_READ; }
117static inline int pte_dirty(pte_t pte)          { return pte_val(pte) & _PAGE_MODIFIED; }
118static inline int pte_young(pte_t pte)          { return pte_val(pte) & _PAGE_ACCESSED; }
119static inline int pte_file(pte_t pte)           { return pte_val(pte) & _PAGE_FILE; }
120
121static inline pte_t pte_wrprotect(pte_t pte)
122{
123        pte_val(pte) &= ~(_PAGE_WRITE | _PAGE_SILENT_WRITE);
124        return pte;
125}
126
127static inline pte_t pte_rdprotect(pte_t pte)
128{
129        pte_val(pte) &= ~(_PAGE_READ | _PAGE_SILENT_READ);
130	return pte;
131}
132
133static inline pte_t pte_exprotect(pte_t pte)
134{
135        pte_val(pte) &= ~(_PAGE_READ | _PAGE_SILENT_READ);
136	return pte;
137}
138
139static inline pte_t pte_mkclean(pte_t pte)
140{
141	pte_val(pte) &= ~(_PAGE_MODIFIED | _PAGE_SILENT_WRITE);
142	return pte;
143}
144
145static inline pte_t pte_mkold(pte_t pte)
146{
147	pte_val(pte) &= ~(_PAGE_ACCESSED | _PAGE_SILENT_READ);
148	return pte;
149}
150
151static inline pte_t pte_mkwrite(pte_t pte)
152{
153        pte_val(pte) |= _PAGE_WRITE;
154        if (pte_val(pte) & _PAGE_MODIFIED)
155                pte_val(pte) |= _PAGE_SILENT_WRITE;
156        return pte;
157}
158
159static inline pte_t pte_mkread(pte_t pte)
160{
161        pte_val(pte) |= _PAGE_READ;
162        if (pte_val(pte) & _PAGE_ACCESSED)
163                pte_val(pte) |= _PAGE_SILENT_READ;
164        return pte;
165}
166
167static inline pte_t pte_mkexec(pte_t pte)
168{
169        pte_val(pte) |= _PAGE_READ;
170        if (pte_val(pte) & _PAGE_ACCESSED)
171                pte_val(pte) |= _PAGE_SILENT_READ;
172        return pte;
173}
174
175static inline pte_t pte_mkdirty(pte_t pte)
176{
177        pte_val(pte) |= _PAGE_MODIFIED;
178        if (pte_val(pte) & _PAGE_WRITE)
179                pte_val(pte) |= _PAGE_SILENT_WRITE;
180        return pte;
181}
182
183static inline pte_t pte_mkyoung(pte_t pte)
184{
185        pte_val(pte) |= _PAGE_ACCESSED;
186        if (pte_val(pte) & _PAGE_READ)
187        {
188                pte_val(pte) |= _PAGE_SILENT_READ;
189                if ((pte_val(pte) & (_PAGE_WRITE | _PAGE_MODIFIED)) ==
190		    (_PAGE_WRITE | _PAGE_MODIFIED))
191                        pte_val(pte) |= _PAGE_SILENT_WRITE;
192        }
193        return pte;
194}
195
196/*
197 * Conversion functions: convert a page and protection to a page entry,
198 * and a page entry and page directory to the page they refer to.
199 */
200
201/* What actually goes as arguments to the various functions is less than
202 * obvious, but a rule of thumb is that struct page's goes as struct page *,
203 * really physical DRAM addresses are unsigned long's, and DRAM "virtual"
204 * addresses (the 0xc0xxxxxx's) goes as void *'s.
205 */
206
207static inline pte_t __mk_pte(void * page, pgprot_t pgprot)
208{
209	pte_t pte;
210	/* the PTE needs a physical address */
211	pte_val(pte) = __pa(page) | pgprot_val(pgprot);
212	return pte;
213}
214
215#define mk_pte(page, pgprot) __mk_pte(page_address(page), (pgprot))
216
217#define mk_pte_phys(physpage, pgprot) \
218({                                                                      \
219        pte_t __pte;                                                    \
220                                                                        \
221        pte_val(__pte) = (physpage) + pgprot_val(pgprot);               \
222        __pte;                                                          \
223})
224
225static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
226{ pte_val(pte) = (pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot); return pte; }
227
228
229/* pte_val refers to a page in the 0x4xxxxxxx physical DRAM interval
230 * __pte_page(pte_val) refers to the "virtual" DRAM interval
231 * pte_pagenr refers to the page-number counted starting from the virtual DRAM start
232 */
233
234static inline unsigned long __pte_page(pte_t pte)
235{
236	/* the PTE contains a physical address */
237	return (unsigned long)__va(pte_val(pte) & PAGE_MASK);
238}
239
240#define pte_pagenr(pte)         ((__pte_page(pte) - PAGE_OFFSET) >> PAGE_SHIFT)
241
242/* permanent address of a page */
243
244#define __page_address(page)    (PAGE_OFFSET + (((page) - mem_map) << PAGE_SHIFT))
245#define pte_page(pte)           (mem_map+pte_pagenr(pte))
246
247/* only the pte's themselves need to point to physical DRAM (see above)
248 * the pagetable links are purely handled within the kernel SW and thus
249 * don't need the __pa and __va transformations.
250 */
251
252static inline void pmd_set(pmd_t * pmdp, pte_t * ptep)
253{ pmd_val(*pmdp) = _PAGE_TABLE | (unsigned long) ptep; }
254
255#define pmd_page(pmd)		(pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT))
256#define pmd_page_vaddr(pmd)	((unsigned long) __va(pmd_val(pmd) & PAGE_MASK))
257
258/* to find an entry in a page-table-directory. */
259#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
260
261/* to find an entry in a page-table-directory */
262static inline pgd_t * pgd_offset(struct mm_struct * mm, unsigned long address)
263{
264	return mm->pgd + pgd_index(address);
265}
266
267/* to find an entry in a kernel page-table-directory */
268#define pgd_offset_k(address) pgd_offset(&init_mm, address)
269
270/* Find an entry in the third-level page table.. */
271#define __pte_offset(address) \
272	(((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
273#define pte_offset_kernel(dir, address) \
274	((pte_t *) pmd_page_vaddr(*(dir)) +  __pte_offset(address))
275#define pte_offset_map(dir, address) \
276	((pte_t *)page_address(pmd_page(*(dir))) + __pte_offset(address))
277#define pte_offset_map_nested(dir, address) pte_offset_map(dir, address)
278
279#define pte_unmap(pte) do { } while (0)
280#define pte_unmap_nested(pte) do { } while (0)
281#define pte_pfn(x)		((unsigned long)(__va((x).pte)) >> PAGE_SHIFT)
282#define pfn_pte(pfn, prot)	__pte((__pa((pfn) << PAGE_SHIFT)) | pgprot_val(prot))
283
284#define pte_ERROR(e) \
285        printk("%s:%d: bad pte %p(%08lx).\n", __FILE__, __LINE__, &(e), pte_val(e))
286#define pgd_ERROR(e) \
287        printk("%s:%d: bad pgd %p(%08lx).\n", __FILE__, __LINE__, &(e), pgd_val(e))
288
289
290extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; /* defined in head.S */
291
292/*
293 * CRIS doesn't have any external MMU info: the kernel page
294 * tables contain all the necessary information.
295 *
296 * Actually I am not sure on what this could be used for.
297 */
298static inline void update_mmu_cache(struct vm_area_struct * vma,
299	unsigned long address, pte_t pte)
300{
301}
302
303/* Encode and de-code a swap entry (must be !pte_none(e) && !pte_present(e)) */
304/* Since the PAGE_PRESENT bit is bit 4, we can use the bits above */
305
306#define __swp_type(x)			(((x).val >> 5) & 0x7f)
307#define __swp_offset(x)			((x).val >> 12)
308#define __swp_entry(type, offset)	((swp_entry_t) { ((type) << 5) | ((offset) << 12) })
309#define __pte_to_swp_entry(pte)		((swp_entry_t) { pte_val(pte) })
310#define __swp_entry_to_pte(x)		((pte_t) { (x).val })
311
312#define kern_addr_valid(addr)   (1)
313
314#include <asm-generic/pgtable.h>
315
316/*
317 * No page table caches to initialise
318 */
319#define pgtable_cache_init()   do { } while (0)
320
321#define pte_to_pgoff(x)	(pte_val(x) >> 6)
322#define pgoff_to_pte(x)	__pte(((x) << 6) | _PAGE_FILE)
323
324typedef pte_t *pte_addr_t;
325
326#endif /* __ASSEMBLY__ */
327#endif /* _CRIS_PGTABLE_H */
328