1/* 2 * tms380tr.h: TI TMS380 Token Ring driver for Linux 3 * 4 * Authors: 5 * - Christoph Goos <cgoos@syskonnect.de> 6 * - Adam Fritzler <mid@auk.cx> 7 */ 8 9#ifndef __LINUX_TMS380TR_H 10#define __LINUX_TMS380TR_H 11 12#ifdef __KERNEL__ 13 14#include <linux/interrupt.h> 15 16/* module prototypes */ 17int tms380tr_open(struct net_device *dev); 18int tms380tr_close(struct net_device *dev); 19irqreturn_t tms380tr_interrupt(int irq, void *dev_id); 20int tmsdev_init(struct net_device *dev, struct device *pdev); 21void tmsdev_term(struct net_device *dev); 22void tms380tr_wait(unsigned long time); 23 24#define TMS380TR_MAX_ADAPTERS 7 25 26#define SEND_TIMEOUT 10*HZ 27 28#define TR_RCF_LONGEST_FRAME_MASK 0x0070 29#define TR_RCF_FRAME4K 0x0030 30 31/*------------------------------------------------------------------*/ 32/* Bit order for adapter communication with DMA */ 33/* -------------------------------------------------------------- */ 34/* Bit 8 | 9| 10| 11|| 12| 13| 14| 15|| 0| 1| 2| 3|| 4| 5| 6| 7| */ 35/* -------------------------------------------------------------- */ 36/* The bytes in a word must be byte swapped. Also, if a double */ 37/* word is used for storage, then the words, as well as the bytes, */ 38/* must be swapped. */ 39/* Bit order for adapter communication with DIO */ 40/* -------------------------------------------------------------- */ 41/* Bit 0 | 1| 2| 3|| 4| 5| 6| 7|| 8| 9| 10| 11|| 12| 13| 14| 15| */ 42/* -------------------------------------------------------------- */ 43/*------------------------------------------------------------------*/ 44 45/* Swap words of a long. */ 46#define SWAPW(x) (((x) << 16) | ((x) >> 16)) 47 48/* Get the low byte of a word. */ 49#define LOBYTE(w) ((unsigned char)(w)) 50 51/* Get the high byte of a word. */ 52#define HIBYTE(w) ((unsigned char)((unsigned short)(w) >> 8)) 53 54/* Get the low word of a long. */ 55#define LOWORD(l) ((unsigned short)(l)) 56 57/* Get the high word of a long. */ 58#define HIWORD(l) ((unsigned short)((unsigned long)(l) >> 16)) 59 60 61 62/* Token ring adapter I/O addresses for normal mode. */ 63 64/* 65 * The SIF registers. Common to all adapters. 66 */ 67/* Basic SIF (SRSX = 0) */ 68#define SIFDAT 0x00 /* SIF/DMA data. */ 69#define SIFINC 0x02 /* IO Word data with auto increment. */ 70#define SIFINH 0x03 /* IO Byte data with auto increment. */ 71#define SIFADR 0x04 /* SIF/DMA Address. */ 72#define SIFCMD 0x06 /* SIF Command. */ 73#define SIFSTS 0x06 /* SIF Status. */ 74 75/* "Extended" SIF (SRSX = 1) */ 76#define SIFACL 0x08 /* SIF Adapter Control Register. */ 77#define SIFADD 0x0a /* SIF/DMA Address. -- 0x0a */ 78#define SIFADX 0x0c /* 0x0c */ 79#define DMALEN 0x0e /* SIF DMA length. -- 0x0e */ 80 81/* 82 * POS Registers. Only for ISA Adapters. 83 */ 84#define POSREG 0x10 /* Adapter Program Option Select (POS) 85 * Register: base IO address + 16 byte. 86 */ 87#define POSREG_2 24L /* only for TR4/16+ adapter 88 * base IO address + 24 byte. -- 0x18 89 */ 90 91/* SIFCMD command codes (high-low) */ 92#define CMD_INTERRUPT_ADAPTER 0x8000 /* Cause internal adapter interrupt */ 93#define CMD_ADAPTER_RESET 0x4000 /* Hardware reset of adapter */ 94#define CMD_SSB_CLEAR 0x2000 /* Acknowledge to adapter to 95 * system interrupts. 96 */ 97#define CMD_EXECUTE 0x1000 /* Execute SCB command */ 98#define CMD_SCB_REQUEST 0x0800 /* Request adapter to interrupt 99 * system when SCB is available for 100 * another command. 101 */ 102#define CMD_RX_CONTINUE 0x0400 /* Continue receive after odd pointer 103 * stop. (odd pointer receive method) 104 */ 105#define CMD_RX_VALID 0x0200 /* Now actual RPL is valid. */ 106#define CMD_TX_VALID 0x0100 /* Now actual TPL is valid. (valid 107 * bit receive/transmit method) 108 */ 109#define CMD_SYSTEM_IRQ 0x0080 /* Adapter-to-attached-system 110 * interrupt is reset. 111 */ 112#define CMD_CLEAR_SYSTEM_IRQ 0x0080 /* Clear SYSTEM_INTERRUPT bit. 113 * (write: 1=ignore, 0=reset) 114 */ 115#define EXEC_SOFT_RESET 0xFF00 /* adapter soft reset. (restart 116 * adapter after hardware reset) 117 */ 118 119 120/* ACL commands (high-low) */ 121#define ACL_SWHLDA 0x0800 /* Software hold acknowledge. */ 122#define ACL_SWDDIR 0x0400 /* Data transfer direction. */ 123#define ACL_SWHRQ 0x0200 /* Pseudo DMA operation. */ 124#define ACL_PSDMAEN 0x0100 /* Enable pseudo system DMA. */ 125#define ACL_ARESET 0x0080 /* Adapter hardware reset command. 126 * (held in reset condition as 127 * long as bit is set) 128 */ 129#define ACL_CPHALT 0x0040 /* Communication processor halt. 130 * (can only be set while ACL_ARESET 131 * bit is set; prevents adapter 132 * processor from executing code while 133 * downloading firmware) 134 */ 135#define ACL_BOOT 0x0020 136#define ACL_SINTEN 0x0008 /* System interrupt enable/disable 137 * (1/0): can be written if ACL_ARESET 138 * is zero. 139 */ 140#define ACL_PEN 0x0004 141 142#define ACL_NSELOUT0 0x0002 143#define ACL_NSELOUT1 0x0001 /* NSELOUTx have a card-specific 144 * meaning for setting ring speed. 145 */ 146 147#define PS_DMA_MASK (ACL_SWHRQ | ACL_PSDMAEN) 148 149 150/* SIFSTS register return codes (high-low) */ 151#define STS_SYSTEM_IRQ 0x0080 /* Adapter-to-attached-system 152 * interrupt is valid. 153 */ 154#define STS_INITIALIZE 0x0040 /* INITIALIZE status. (ready to 155 * initialize) 156 */ 157#define STS_TEST 0x0020 /* TEST status. (BUD not completed) */ 158#define STS_ERROR 0x0010 /* ERROR status. (unrecoverable 159 * HW error occurred) 160 */ 161#define STS_MASK 0x00F0 /* Mask interesting status bits. */ 162#define STS_ERROR_MASK 0x000F /* Get Error Code by masking the 163 * interrupt code bits. 164 */ 165#define ADAPTER_INT_PTRS 0x0A00 /* Address offset of adapter internal 166 * pointers 01:0a00 (high-low) have to 167 * be read after init and before open. 168 */ 169 170 171/* Interrupt Codes (only MAC IRQs) */ 172#define STS_IRQ_ADAPTER_CHECK 0x0000 /* unrecoverable hardware or 173 * software error. 174 */ 175#define STS_IRQ_RING_STATUS 0x0004 /* SSB is updated with ring status. */ 176#define STS_IRQ_LLC_STATUS 0x0005 /* Not used in MAC-only microcode */ 177#define STS_IRQ_SCB_CLEAR 0x0006 /* SCB clear, following an 178 * SCB_REQUEST IRQ. 179 */ 180#define STS_IRQ_TIMER 0x0007 /* Not normally used in MAC ucode */ 181#define STS_IRQ_COMMAND_STATUS 0x0008 /* SSB is updated with command 182 * status. 183 */ 184#define STS_IRQ_RECEIVE_STATUS 0x000A /* SSB is updated with receive 185 * status. 186 */ 187#define STS_IRQ_TRANSMIT_STATUS 0x000C /* SSB is updated with transmit 188 * status 189 */ 190#define STS_IRQ_RECEIVE_PENDING 0x000E /* Not used in MAC-only microcode */ 191#define STS_IRQ_MASK 0x000F /* = STS_ERROR_MASK. */ 192 193 194/* TRANSMIT_STATUS completion code: (SSB.Parm[0]) */ 195#define COMMAND_COMPLETE 0x0080 /* TRANSMIT command completed 196 * (avoid this!) issue another transmit 197 * to send additional frames. 198 */ 199#define FRAME_COMPLETE 0x0040 /* Frame has been transmitted; 200 * INTERRUPT_FRAME bit was set in the 201 * CSTAT request; indication of possibly 202 * more than one frame transmissions! 203 * SSB.Parm[0-1]: 32 bit pointer to 204 * TPL of last frame. 205 */ 206#define LIST_ERROR 0x0020 /* Error in one of the TPLs that 207 * compose the frame; TRANSMIT 208 * terminated; Parm[1-2]: 32bit pointer 209 * to TPL which starts the error 210 * frame; error details in bits 8-13. 211 * (14?) 212 */ 213#define FRAME_SIZE_ERROR 0x8000 /* FRAME_SIZE does not equal the sum of 214 * the valid DATA_COUNT fields; 215 * FRAME_SIZE less than header plus 216 * information field. (15 bytes + 217 * routing field) Or if FRAME_SIZE 218 * was specified as zero in one list. 219 */ 220#define TX_THRESHOLD 0x4000 /* FRAME_SIZE greater than (BUFFER_SIZE 221 * - 9) * TX_BUF_MAX. 222 */ 223#define ODD_ADDRESS 0x2000 /* Odd forward pointer value is 224 * read on a list without END_FRAME 225 * indication. 226 */ 227#define FRAME_ERROR 0x1000 /* START_FRAME bit (not) anticipated, 228 * but (not) set. 229 */ 230#define ACCESS_PRIORITY_ERROR 0x0800 /* Access priority requested has not 231 * been allowed. 232 */ 233#define UNENABLED_MAC_FRAME 0x0400 /* MAC frame has source class of zero 234 * or MAC frame PCF ATTN field is 235 * greater than one. 236 */ 237#define ILLEGAL_FRAME_FORMAT 0x0200 /* Bit 0 or FC field was set to one. */ 238 239 240/* 241 * Since we need to support some functions even if the adapter is in a 242 * CLOSED state, we have a (pseudo-) command queue which holds commands 243 * that are outstandig to be executed. 244 * 245 * Each time a command completes, an interrupt occurs and the next 246 * command is executed. The command queue is actually a simple word with 247 * a bit for each outstandig command. Therefore the commands will not be 248 * executed in the order they have been queued. 249 * 250 * The following defines the command code bits and the command queue: 251 */ 252#define OC_OPEN 0x0001 /* OPEN command */ 253#define OC_TRANSMIT 0x0002 /* TRANSMIT command */ 254#define OC_TRANSMIT_HALT 0x0004 /* TRANSMIT_HALT command */ 255#define OC_RECEIVE 0x0008 /* RECEIVE command */ 256#define OC_CLOSE 0x0010 /* CLOSE command */ 257#define OC_SET_GROUP_ADDR 0x0020 /* SET_GROUP_ADDR command */ 258#define OC_SET_FUNCT_ADDR 0x0040 /* SET_FUNCT_ADDR command */ 259#define OC_READ_ERROR_LOG 0x0080 /* READ_ERROR_LOG command */ 260#define OC_READ_ADAPTER 0x0100 /* READ_ADAPTER command */ 261#define OC_MODIFY_OPEN_PARMS 0x0400 /* MODIFY_OPEN_PARMS command */ 262#define OC_RESTORE_OPEN_PARMS 0x0800 /* RESTORE_OPEN_PARMS command */ 263#define OC_SET_FIRST_16_GROUP 0x1000 /* SET_FIRST_16_GROUP command */ 264#define OC_SET_BRIDGE_PARMS 0x2000 /* SET_BRIDGE_PARMS command */ 265#define OC_CONFIG_BRIDGE_PARMS 0x4000 /* CONFIG_BRIDGE_PARMS command */ 266 267#define OPEN 0x0300 /* C: open command. S: completion. */ 268#define TRANSMIT 0x0400 /* C: transmit command. S: completion 269 * status. (reject: COMMAND_REJECT if 270 * adapter not opened, TRANSMIT already 271 * issued or address passed in the SCB 272 * not word aligned) 273 */ 274#define TRANSMIT_HALT 0x0500 /* C: interrupt TX TPL chain; if no 275 * TRANSMIT command issued, the command 276 * is ignored (completion with TRANSMIT 277 * status (0x0400)!) 278 */ 279#define RECEIVE 0x0600 /* C: receive command. S: completion 280 * status. (reject: COMMAND_REJECT if 281 * adapter not opened, RECEIVE already 282 * issued or address passed in the SCB 283 * not word aligned) 284 */ 285#define CLOSE 0x0700 /* C: close adapter. S: completion. 286 * (COMMAND_REJECT if adapter not open) 287 */ 288#define SET_GROUP_ADDR 0x0800 /* C: alter adapter group address after 289 * OPEN. S: completion. (COMMAND_REJECT 290 * if adapter not open) 291 */ 292#define SET_FUNCT_ADDR 0x0900 /* C: alter adapter functional address 293 * after OPEN. S: completion. 294 * (COMMAND_REJECT if adapter not open) 295 */ 296#define READ_ERROR_LOG 0x0A00 /* C: read adapter error counters. 297 * S: completion. (command ignored 298 * if adapter not open!) 299 */ 300#define READ_ADAPTER 0x0B00 /* C: read data from adapter memory. 301 * (important: after init and before 302 * open!) S: completion. (ADAPTER_CHECK 303 * interrupt if undefined storage area 304 * read) 305 */ 306#define MODIFY_OPEN_PARMS 0x0D00 /* C: modify some adapter operational 307 * parameters. (bit correspondend to 308 * WRAP_INTERFACE is ignored) 309 * S: completion. (reject: 310 * COMMAND_REJECT) 311 */ 312#define RESTORE_OPEN_PARMS 0x0E00 /* C: modify some adapter operational 313 * parameters. (bit correspondend 314 * to WRAP_INTERFACE is ignored) 315 * S: completion. (reject: 316 * COMMAND_REJECT) 317 */ 318#define SET_FIRST_16_GROUP 0x0F00 /* C: alter the first two bytes in 319 * adapter group address. 320 * S: completion. (reject: 321 * COMMAND_REJECT) 322 */ 323#define SET_BRIDGE_PARMS 0x1000 /* C: values and conditions for the 324 * adapter hardware to use when frames 325 * are copied for forwarding. 326 * S: completion. (reject: 327 * COMMAND_REJECT) 328 */ 329#define CONFIG_BRIDGE_PARMS 0x1100 /* C: .. 330 * S: completion. (reject: 331 * COMMAND_REJECT) 332 */ 333 334#define SPEED_4 4 335#define SPEED_16 16 /* Default transmission speed */ 336 337 338/* Initialization Parameter Block (IPB); word alignment necessary! */ 339#define BURST_SIZE 0x0018 /* Default burst size */ 340#define BURST_MODE 0x9F00 /* Burst mode enable */ 341#define DMA_RETRIES 0x0505 /* Magic DMA retry number... */ 342 343#define CYCLE_TIME 3 /* Default AT-bus cycle time: 500 ns 344 * (later adapter version: fix cycle time!) 345 */ 346#define LINE_SPEED_BIT 0x80 347 348/* Macro definition for the wait function. */ 349#define ONE_SECOND_TICKS 1000000 350#define HALF_SECOND (ONE_SECOND_TICKS / 2) 351#define ONE_SECOND (ONE_SECOND_TICKS) 352#define TWO_SECONDS (ONE_SECOND_TICKS * 2) 353#define THREE_SECONDS (ONE_SECOND_TICKS * 3) 354#define FOUR_SECONDS (ONE_SECOND_TICKS * 4) 355#define FIVE_SECONDS (ONE_SECOND_TICKS * 5) 356 357#define BUFFER_SIZE 2048 /* Buffers on Adapter */ 358 359#pragma pack(1) 360typedef struct { 361 unsigned short Init_Options; /* Initialize with burst mode; 362 * LLC disabled. (MAC only) 363 */ 364 365 /* Interrupt vectors the adapter places on attached system bus. */ 366 u_int8_t CMD_Status_IV; /* Interrupt vector: command status. */ 367 u_int8_t TX_IV; /* Interrupt vector: transmit. */ 368 u_int8_t RX_IV; /* Interrupt vector: receive. */ 369 u_int8_t Ring_Status_IV; /* Interrupt vector: ring status. */ 370 u_int8_t SCB_Clear_IV; /* Interrupt vector: SCB clear. */ 371 u_int8_t Adapter_CHK_IV; /* Interrupt vector: adapter check. */ 372 373 u_int16_t RX_Burst_Size; /* Max. number of transfer cycles. */ 374 u_int16_t TX_Burst_Size; /* During DMA burst; even value! */ 375 u_int16_t DMA_Abort_Thrhld; /* Number of DMA retries. */ 376 377 u_int32_t SCB_Addr; /* SCB address: even, word aligned, high-low */ 378 u_int32_t SSB_Addr; /* SSB address: even, word aligned, high-low */ 379} IPB, *IPB_Ptr; 380#pragma pack() 381 382/* 383 * OPEN Command Parameter List (OCPL) (can be reused, if the adapter has to 384 * be reopened) 385 */ 386#define BUFFER_SIZE 2048 /* Buffers on Adapter. */ 387#define TPL_SIZE 8+6*TX_FRAG_NUM /* Depending on fragments per TPL. */ 388#define RPL_SIZE 14 /* (with TI firmware v2.26 handling 389 * up to nine fragments possible) 390 */ 391#define TX_BUF_MIN 20 /* ??? (Stephan: calculation with */ 392#define TX_BUF_MAX 40 /* BUFFER_SIZE and MAX_FRAME_SIZE) ??? 393 */ 394#define DISABLE_EARLY_TOKEN_RELEASE 0x1000 395 396/* OPEN Options (high-low) */ 397#define WRAP_INTERFACE 0x0080 /* Inserting omitted for test 398 * purposes; transmit data appears 399 * as receive data. (useful for 400 * testing; change: CLOSE necessary) 401 */ 402#define DISABLE_HARD_ERROR 0x0040 /* On HARD_ERROR & TRANSMIT_BEACON 403 * no RING.STATUS interrupt. 404 */ 405#define DISABLE_SOFT_ERROR 0x0020 /* On SOFT_ERROR, no RING.STATUS 406 * interrupt. 407 */ 408#define PASS_ADAPTER_MAC_FRAMES 0x0010 /* Passing unsupported MAC frames 409 * to system. 410 */ 411#define PASS_ATTENTION_FRAMES 0x0008 /* All changed attention MAC frames are 412 * passed to the system. 413 */ 414#define PAD_ROUTING_FIELD 0x0004 /* Routing field is padded to 18 415 * bytes. 416 */ 417#define FRAME_HOLD 0x0002 /*Adapter waits for entire frame before 418 * initiating DMA transfer; otherwise: 419 * DMA transfer initiation if internal 420 * buffer filled. 421 */ 422#define CONTENDER 0x0001 /* Adapter participates in the monitor 423 * contention process. 424 */ 425#define PASS_BEACON_MAC_FRAMES 0x8000 /* Adapter passes beacon MAC frames 426 * to the system. 427 */ 428#define EARLY_TOKEN_RELEASE 0x1000 /* Only valid in 16 Mbps operation; 429 * 0 = ETR. (no effect in 4 Mbps 430 * operation) 431 */ 432#define COPY_ALL_MAC_FRAMES 0x0400 /* All MAC frames are copied to 433 * the system. (after OPEN: duplicate 434 * address test (DAT) MAC frame is 435 * first received frame copied to the 436 * system) 437 */ 438#define COPY_ALL_NON_MAC_FRAMES 0x0200 /* All non MAC frames are copied to 439 * the system. 440 */ 441#define PASS_FIRST_BUF_ONLY 0x0100 /* Passes only first internal buffer 442 * of each received frame; FrameSize 443 * of RPLs must contain internal 444 * BUFFER_SIZE bits for promiscous mode. 445 */ 446#define ENABLE_FULL_DUPLEX_SELECTION 0x2000 447 /* Enable the use of full-duplex 448 * settings with bits in byte 22 in 449 * ocpl. (new feature in firmware 450 * version 3.09) 451 */ 452 453/* Full-duplex settings */ 454#define OPEN_FULL_DUPLEX_OFF 0x0000 455#define OPEN_FULL_DUPLEX_ON 0x00c0 456#define OPEN_FULL_DUPLEX_AUTO 0x0080 457 458#define PROD_ID_SIZE 18 /* Length of product ID. */ 459 460#define TX_FRAG_NUM 3 /* Number of fragments used in one TPL. */ 461#define TX_MORE_FRAGMENTS 0x8000 /* Bit set in DataCount to indicate more 462 * fragments following. 463 */ 464 465#define ISA_MAX_ADDRESS 0x00ffffff 466#define PCI_MAX_ADDRESS 0xffffffff 467 468#pragma pack(1) 469typedef struct { 470 u_int16_t OPENOptions; 471 u_int8_t NodeAddr[6]; /* Adapter node address; use ROM 472 * address 473 */ 474 u_int32_t GroupAddr; /* Multicast: high order 475 * bytes = 0xC000 476 */ 477 u_int32_t FunctAddr; /* High order bytes = 0xC000 */ 478 u_int16_t RxListSize; /* RPL size: 0 (=26), 14, 20 or 479 * 26 bytes read by the adapter. 480 * (Depending on the number of 481 * fragments/list) 482 */ 483 u_int16_t TxListSize; /* TPL size */ 484 u_int16_t BufSize; /* Is automatically rounded up to the 485 * nearest nK boundary. 486 */ 487 u_int16_t FullDuplex; 488 u_int16_t Reserved; 489 u_int8_t TXBufMin; /* Number of adapter buffers reserved 490 * for transmission a minimum of 2 491 * buffers must be allocated. 492 */ 493 u_int8_t TXBufMax; /* Maximum number of adapter buffers 494 * for transmit; a minimum of 2 buffers 495 * must be available for receive. 496 * Default: 6 497 */ 498 u_int16_t ProdIDAddr[2];/* Pointer to product ID. */ 499} OPB, *OPB_Ptr; 500#pragma pack() 501 502/* 503 * SCB: adapter commands enabled by the host system started by writing 504 * CMD_INTERRUPT_ADAPTER | CMD_EXECUTE (|SCB_REQUEST) to the SIFCMD IO 505 * register. (special case: | CMD_SYSTEM_IRQ for initialization) 506 */ 507#pragma pack(1) 508typedef struct { 509 u_int16_t CMD; /* Command code */ 510 u_int16_t Parm[2]; /* Pointer to Command Parameter Block */ 511} SCB; /* System Command Block (32 bit physical address; big endian)*/ 512#pragma pack() 513 514/* 515 * SSB: adapter command return status can be evaluated after COMMAND_STATUS 516 * adapter to system interrupt after reading SSB, the availability of the SSB 517 * has to be told the adapter by writing CMD_INTERRUPT_ADAPTER | CMD_SSB_CLEAR 518 * in the SIFCMD IO register. 519 */ 520#pragma pack(1) 521typedef struct { 522 u_int16_t STS; /* Status code */ 523 u_int16_t Parm[3]; /* Parameter or pointer to Status Parameter 524 * Block. 525 */ 526} SSB; /* System Status Block (big endian - physical address) */ 527#pragma pack() 528 529typedef struct { 530 unsigned short BurnedInAddrPtr; /* Pointer to adapter burned in 531 * address. (BIA) 532 */ 533 unsigned short SoftwareLevelPtr;/* Pointer to software level data. */ 534 unsigned short AdapterAddrPtr; /* Pointer to adapter addresses. */ 535 unsigned short AdapterParmsPtr; /* Pointer to adapter parameters. */ 536 unsigned short MACBufferPtr; /* Pointer to MAC buffer. (internal) */ 537 unsigned short LLCCountersPtr; /* Pointer to LLC counters. */ 538 unsigned short SpeedFlagPtr; /* Pointer to data rate flag. 539 * (4/16 Mbps) 540 */ 541 unsigned short AdapterRAMPtr; /* Pointer to adapter RAM found. (KB) */ 542} INTPTRS; /* Adapter internal pointers */ 543 544#pragma pack(1) 545typedef struct { 546 u_int8_t Line_Error; /* Line error: code violation in 547 * frame or in a token, or FCS error. 548 */ 549 u_int8_t Internal_Error; /* IBM specific. (Reserved_1) */ 550 u_int8_t Burst_Error; 551 u_int8_t ARI_FCI_Error; /* ARI/FCI bit zero in AMP or 552 * SMP MAC frame. 553 */ 554 u_int8_t AbortDelimeters; /* IBM specific. (Reserved_2) */ 555 u_int8_t Reserved_3; 556 u_int8_t Lost_Frame_Error; /* Receive of end of transmitted 557 * frame failed. 558 */ 559 u_int8_t Rx_Congest_Error; /* Adapter in repeat mode has not 560 * enough buffer space to copy incoming 561 * frame. 562 */ 563 u_int8_t Frame_Copied_Error; /* ARI bit not zero in frame 564 * addressed to adapter. 565 */ 566 u_int8_t Frequency_Error; /* IBM specific. (Reserved_4) */ 567 u_int8_t Token_Error; /* (active only in monitor station) */ 568 u_int8_t Reserved_5; 569 u_int8_t DMA_Bus_Error; /* DMA bus errors not exceeding the 570 * abort thresholds. 571 */ 572 u_int8_t DMA_Parity_Error; /* DMA parity errors not exceeding 573 * the abort thresholds. 574 */ 575} ERRORTAB; /* Adapter error counters */ 576#pragma pack() 577 578 579/*--------------------- Send and Receive definitions -------------------*/ 580#pragma pack(1) 581typedef struct { 582 u_int16_t DataCount; /* Value 0, even and odd values are 583 * permitted; value is unaltered most 584 * significant bit set: following 585 * fragments last fragment: most 586 * significant bit is not evaluated. 587 * (???) 588 */ 589 u_int32_t DataAddr; /* Pointer to frame data fragment; 590 * even or odd. 591 */ 592} Fragment; 593#pragma pack() 594 595#define MAX_FRAG_NUMBERS 9 /* Maximal number of fragments possible to use 596 * in one RPL/TPL. (depending on TI firmware 597 * version) 598 */ 599 600/* 601 * AC (1), FC (1), Dst (6), Src (6), RIF (18), Data (4472) = 4504 602 * The packet size can be one of the follows: 548, 1502, 2084, 4504, 8176, 603 * 11439, 17832. Refer to TMS380 Second Generation Token Ring User's Guide 604 * Page 2-27. 605 */ 606#define HEADER_SIZE (1 + 1 + 6 + 6) 607#define SRC_SIZE 18 608#define MIN_DATA_SIZE 516 609#define DEFAULT_DATA_SIZE 4472 610#define MAX_DATA_SIZE 17800 611 612#define DEFAULT_PACKET_SIZE (HEADER_SIZE + SRC_SIZE + DEFAULT_DATA_SIZE) 613#define MIN_PACKET_SIZE (HEADER_SIZE + SRC_SIZE + MIN_DATA_SIZE) 614#define MAX_PACKET_SIZE (HEADER_SIZE + SRC_SIZE + MAX_DATA_SIZE) 615 616/* 617 * Macros to deal with the frame status field. 618 */ 619#define AC_NOT_RECOGNIZED 0x00 620#define GROUP_BIT 0x80 621#define GET_TRANSMIT_STATUS_HIGH_BYTE(Ts) ((unsigned char)((Ts) >> 8)) 622#define GET_FRAME_STATUS_HIGH_AC(Fs) ((unsigned char)(((Fs) & 0xC0) >> 6)) 623#define GET_FRAME_STATUS_LOW_AC(Fs) ((unsigned char)(((Fs) & 0x0C) >> 2)) 624#define DIRECTED_FRAME(Context) (!((Context)->MData[2] & GROUP_BIT)) 625 626 627/*--------------------- Send Functions ---------------------------------*/ 628/* define TX_CSTAT _REQUEST (R) and _COMPLETE (C) values (high-low) */ 629 630#define TX_VALID 0x0080 /* R: set via TRANSMIT.VALID interrupt. 631 * C: always reset to zero! 632 */ 633#define TX_FRAME_COMPLETE 0x0040 /* R: must be reset to zero. 634 * C: set to one. 635 */ 636#define TX_START_FRAME 0x0020 /* R: start of a frame: 1 637 * C: unchanged. 638 */ 639#define TX_END_FRAME 0x0010 /* R: end of a frame: 1 640 * C: unchanged. 641 */ 642#define TX_FRAME_IRQ 0x0008 /* R: request interrupt generation 643 * after transmission. 644 * C: unchanged. 645 */ 646#define TX_ERROR 0x0004 /* R: reserved. 647 * C: set to one if Error occurred. 648 */ 649#define TX_INTERFRAME_WAIT 0x0004 650#define TX_PASS_CRC 0x0002 /* R: set if CRC value is already 651 * calculated. (valid only in 652 * FRAME_START TPL) 653 * C: unchanged. 654 */ 655#define TX_PASS_SRC_ADDR 0x0001 /* R: adapter uses explicit frame 656 * source address and does not overwrite 657 * with the adapter node address. 658 * (valid only in FRAME_START TPL) 659 * 660 * C: unchanged. 661 */ 662#define TX_STRIP_FS 0xFF00 /* R: reserved. 663 * C: if no Transmission Error, 664 * field contains copy of FS byte after 665 * stripping of frame. 666 */ 667 668/* 669 * Structure of Transmit Parameter Lists (TPLs) (only one frame every TPL, 670 * but possibly multiple TPLs for one frame) the length of the TPLs has to be 671 * initialized in the OPL. (OPEN parameter list) 672 */ 673#define TPL_NUM 3 /* Number of Transmit Parameter Lists. 674 * !! MUST BE >= 3 !! 675 */ 676 677#pragma pack(1) 678typedef struct s_TPL TPL; 679 680struct s_TPL { /* Transmit Parameter List (align on even word boundaries) */ 681 u_int32_t NextTPLAddr; /* Pointer to next TPL in chain; if 682 * pointer is odd: this is the last 683 * TPL. Pointing to itself can cause 684 * problems! 685 */ 686 volatile u_int16_t Status; /* Initialized by the adapter: 687 * CSTAT_REQUEST important: update least 688 * significant bit first! Set by the 689 * adapter: CSTAT_COMPLETE status. 690 */ 691 u_int16_t FrameSize; /* Number of bytes to be transmitted 692 * as a frame including AC/FC, 693 * Destination, Source, Routing field 694 * not including CRC, FS, End Delimiter 695 * (valid only if START_FRAME bit in 696 * CSTAT nonzero) must not be zero in 697 * any list; maximum value: (BUFFER_SIZE 698 * - 8) * TX_BUF_MAX sum of DataCount 699 * values in FragmentList must equal 700 * Frame_Size value in START_FRAME TPL! 701 * frame data fragment list. 702 */ 703 704 /* TPL/RPL size in OPEN parameter list depending on maximal 705 * numbers of fragments used in one parameter list. 706 */ 707 Fragment FragList[TX_FRAG_NUM]; /* Maximum: nine frame fragments in one 708 * TPL actual version of firmware: 9 709 * fragments possible. 710 */ 711#pragma pack() 712 713 /* Special proprietary data and precalculations */ 714 715 TPL *NextTPLPtr; /* Pointer to next TPL in chain. */ 716 unsigned char *MData; 717 struct sk_buff *Skb; 718 unsigned char TPLIndex; 719 volatile unsigned char BusyFlag;/* Flag: TPL busy? */ 720 dma_addr_t DMABuff; /* DMA IO bus address from dma_map */ 721}; 722 723/* ---------------------Receive Functions-------------------------------* 724 * define RECEIVE_CSTAT_REQUEST (R) and RECEIVE_CSTAT_COMPLETE (C) values. 725 * (high-low) 726 */ 727#define RX_VALID 0x0080 /* R: set; tell adapter with 728 * RECEIVE.VALID interrupt. 729 * C: reset to zero. 730 */ 731#define RX_FRAME_COMPLETE 0x0040 /* R: must be reset to zero, 732 * C: set to one. 733 */ 734#define RX_START_FRAME 0x0020 /* R: must be reset to zero. 735 * C: set to one on the list. 736 */ 737#define RX_END_FRAME 0x0010 /* R: must be reset to zero. 738 * C: set to one on the list 739 * that ends the frame. 740 */ 741#define RX_FRAME_IRQ 0x0008 /* R: request interrupt generation 742 * after receive. 743 * C: unchanged. 744 */ 745#define RX_INTERFRAME_WAIT 0x0004 /* R: after receiving a frame: 746 * interrupt and wait for a 747 * RECEIVE.CONTINUE. 748 * C: unchanged. 749 */ 750#define RX_PASS_CRC 0x0002 /* R: if set, the adapter includes 751 * the CRC in data passed. (last four 752 * bytes; valid only if FRAME_START is 753 * set) 754 * C: set, if CRC is included in 755 * received data. 756 */ 757#define RX_PASS_SRC_ADDR 0x0001 /* R: adapter uses explicit frame 758 * source address and does not 759 * overwrite with the adapter node 760 * address. (valid only if FRAME_START 761 * is set) 762 * C: unchanged. 763 */ 764#define RX_RECEIVE_FS 0xFC00 /* R: reserved; must be reset to zero. 765 * C: on lists with START_FRAME, field 766 * contains frame status field from 767 * received frame; otherwise cleared. 768 */ 769#define RX_ADDR_MATCH 0x0300 /* R: reserved; must be reset to zero. 770 * C: address match code mask. 771 */ 772#define RX_STATUS_MASK 0x00FF /* Mask for receive status bits. */ 773 774#define RX_INTERN_ADDR_MATCH 0x0100 /* C: internally address match. */ 775#define RX_EXTERN_ADDR_MATCH 0x0200 /* C: externally matched via 776 * XMATCH/XFAIL interface. 777 */ 778#define RX_INTEXT_ADDR_MATCH 0x0300 /* C: internally and externally 779 * matched. 780 */ 781#define RX_READY (RX_VALID | RX_FRAME_IRQ) /* Ready for receive. */ 782 783/* Constants for Command Status Interrupt. 784 * COMMAND_REJECT status field bit functions (SSB.Parm[0]) 785 */ 786#define ILLEGAL_COMMAND 0x0080 /* Set if an unknown command 787 * is issued to the adapter 788 */ 789#define ADDRESS_ERROR 0x0040 /* Set if any address field in 790 * the SCB is odd. (not word aligned) 791 */ 792#define ADAPTER_OPEN 0x0020 /* Command issued illegal with 793 * open adapter. 794 */ 795#define ADAPTER_CLOSE 0x0010 /* Command issued illegal with 796 * closed adapter. 797 */ 798#define SAME_COMMAND 0x0008 /* Command issued with same command 799 * already executing. 800 */ 801 802/* OPEN_COMPLETION values (SSB.Parm[0], MSB) */ 803#define NODE_ADDR_ERROR 0x0040 /* Wrong address or BIA read 804 * zero address. 805 */ 806#define LIST_SIZE_ERROR 0x0020 /* If List_Size value not in 0, 807 * 14, 20, 26. 808 */ 809#define BUF_SIZE_ERROR 0x0010 /* Not enough available memory for 810 * two buffers. 811 */ 812#define TX_BUF_COUNT_ERROR 0x0004 /* Remaining receive buffers less than 813 * two. 814 */ 815#define OPEN_ERROR 0x0002 /* Error during ring insertion; more 816 * information in bits 8-15. 817 */ 818 819/* Standard return codes */ 820#define GOOD_COMPLETION 0x0080 /* =OPEN_SUCCESSFULL */ 821#define INVALID_OPEN_OPTION 0x0001 /* OPEN options are not supported by 822 * the adapter. 823 */ 824 825/* OPEN phases; details of OPEN_ERROR (SSB.Parm[0], LSB) */ 826#define OPEN_PHASES_MASK 0xF000 /* Check only the bits 8-11. */ 827#define LOBE_MEDIA_TEST 0x1000 828#define PHYSICAL_INSERTION 0x2000 829#define ADDRESS_VERIFICATION 0x3000 830#define PARTICIPATION_IN_RING_POLL 0x4000 831#define REQUEST_INITIALISATION 0x5000 832#define FULLDUPLEX_CHECK 0x6000 833 834/* OPEN error codes; details of OPEN_ERROR (SSB.Parm[0], LSB) */ 835#define OPEN_ERROR_CODES_MASK 0x0F00 /* Check only the bits 12-15. */ 836#define OPEN_FUNCTION_FAILURE 0x0100 /* Unable to transmit to itself or 837 * frames received before insertion. 838 */ 839#define OPEN_SIGNAL_LOSS 0x0200 /* Signal loss condition detected at 840 * receiver. 841 */ 842#define OPEN_TIMEOUT 0x0500 /* Insertion timer expired before 843 * logical insertion. 844 */ 845#define OPEN_RING_FAILURE 0x0600 /* Unable to receive own ring purge 846 * MAC frames. 847 */ 848#define OPEN_RING_BEACONING 0x0700 /* Beacon MAC frame received after 849 * ring insertion. 850 */ 851#define OPEN_DUPLICATE_NODEADDR 0x0800 /* Other station in ring found 852 * with the same address. 853 */ 854#define OPEN_REQUEST_INIT 0x0900 /* RPS present but does not respond. */ 855#define OPEN_REMOVE_RECEIVED 0x0A00 /* Adapter received a remove adapter 856 * MAC frame. 857 */ 858#define OPEN_FULLDUPLEX_SET 0x0D00 /* Got this with full duplex on when 859 * trying to connect to a normal ring. 860 */ 861 862/* SET_BRIDGE_PARMS return codes: */ 863#define BRIDGE_INVALID_MAX_LEN 0x4000 /* MAX_ROUTING_FIELD_LENGTH odd, 864 * less than 6 or > 30. 865 */ 866#define BRIDGE_INVALID_SRC_RING 0x2000 /* SOURCE_RING number zero, too large 867 * or = TARGET_RING. 868 */ 869#define BRIDGE_INVALID_TRG_RING 0x1000 /* TARGET_RING number zero, too large 870 * or = SOURCE_RING. 871 */ 872#define BRIDGE_INVALID_BRDGE_NO 0x0800 /* BRIDGE_NUMBER too large. */ 873#define BRIDGE_INVALID_OPTIONS 0x0400 /* Invalid bridge options. */ 874#define BRIDGE_DIAGS_FAILED 0x0200 /* Diagnostics of TMS380SRA failed. */ 875#define BRIDGE_NO_SRA 0x0100 /* The TMS380SRA does not exist in HW 876 * configuration. 877 */ 878 879/* 880 * Bring Up Diagnostics error codes. 881 */ 882#define BUD_INITIAL_ERROR 0x0 883#define BUD_CHECKSUM_ERROR 0x1 884#define BUD_ADAPTER_RAM_ERROR 0x2 885#define BUD_INSTRUCTION_ERROR 0x3 886#define BUD_CONTEXT_ERROR 0x4 887#define BUD_PROTOCOL_ERROR 0x5 888#define BUD_INTERFACE_ERROR 0x6 889 890/* BUD constants */ 891#define BUD_MAX_RETRIES 3 892#define BUD_MAX_LOOPCNT 6 893#define BUD_TIMEOUT 3000 894 895/* Initialization constants */ 896#define INIT_MAX_RETRIES 3 /* Maximum three retries. */ 897#define INIT_MAX_LOOPCNT 22 /* Maximum loop counts. */ 898 899/* RING STATUS field values (high/low) */ 900#define SIGNAL_LOSS 0x0080 /* Loss of signal on the ring 901 * detected. 902 */ 903#define HARD_ERROR 0x0040 /* Transmitting or receiving beacon 904 * frames. 905 */ 906#define SOFT_ERROR 0x0020 /* Report error MAC frame 907 * transmitted. 908 */ 909#define TRANSMIT_BEACON 0x0010 /* Transmitting beacon frames on the 910 * ring. 911 */ 912#define LOBE_WIRE_FAULT 0x0008 /* Open or short circuit in the 913 * cable to concentrator; adapter 914 * closed. 915 */ 916#define AUTO_REMOVAL_ERROR 0x0004 /* Lobe wrap test failed, deinserted; 917 * adapter closed. 918 */ 919#define REMOVE_RECEIVED 0x0001 /* Received a remove ring station MAC 920 * MAC frame request; adapter closed. 921 */ 922#define COUNTER_OVERFLOW 0x8000 /* Overflow of one of the adapters 923 * error counters; READ.ERROR.LOG. 924 */ 925#define SINGLE_STATION 0x4000 /* Adapter is the only station on the 926 * ring. 927 */ 928#define RING_RECOVERY 0x2000 /* Claim token MAC frames on the ring; 929 * reset after ring purge frame. 930 */ 931 932#define ADAPTER_CLOSED (LOBE_WIRE_FAULT | AUTO_REMOVAL_ERROR |\ 933 REMOVE_RECEIVED) 934 935/* Adapter_check_block.Status field bit assignments: */ 936#define DIO_PARITY 0x8000 /* Adapter detects bad parity 937 * through direct I/O access. 938 */ 939#define DMA_READ_ABORT 0x4000 /* Aborting DMA read operation 940 * from system Parm[0]: 0=timeout, 941 * 1=parity error, 2=bus error; 942 * Parm[1]: 32 bit pointer to host 943 * system address at failure. 944 */ 945#define DMA_WRITE_ABORT 0x2000 /* Aborting DMA write operation 946 * to system. (parameters analogous to 947 * DMA_READ_ABORT) 948 */ 949#define ILLEGAL_OP_CODE 0x1000 /* Illegal operation code in the 950 * the adapters firmware Parm[0]-2: 951 * communications processor registers 952 * R13-R15. 953 */ 954#define PARITY_ERRORS 0x0800 /* Adapter detects internal bus 955 * parity error. 956 */ 957#define RAM_DATA_ERROR 0x0080 /* Valid only during RAM testing; 958 * RAM data error Parm[0-1]: 32 bit 959 * pointer to RAM location. 960 */ 961#define RAM_PARITY_ERROR 0x0040 /* Valid only during RAM testing; 962 * RAM parity error Parm[0-1]: 32 bit 963 * pointer to RAM location. 964 */ 965#define RING_UNDERRUN 0x0020 /* Internal DMA underrun when 966 * transmitting onto ring. 967 */ 968#define INVALID_IRQ 0x0008 /* Unrecognized interrupt generated 969 * internal to adapter Parm[0-2]: 970 * adapter register R13-R15. 971 */ 972#define INVALID_ERROR_IRQ 0x0004 /* Unrecognized error interrupt 973 * generated Parm[0-2]: adapter register 974 * R13-R15. 975 */ 976#define INVALID_XOP 0x0002 /* Unrecognized XOP request in 977 * communication processor Parm[0-2]: 978 * adapter register R13-R15. 979 */ 980#define CHECKADDR 0x05E0 /* Adapter check status information 981 * address offset. 982 */ 983#define ROM_PAGE_0 0x0000 /* Adapter ROM page 0. */ 984 985/* 986 * RECEIVE.STATUS interrupt result SSB values: (high-low) 987 * (RECEIVE_COMPLETE field bit definitions in SSB.Parm[0]) 988 */ 989#define RX_COMPLETE 0x0080 /* SSB.Parm[0]; SSB.Parm[1]: 32 990 * bit pointer to last RPL. 991 */ 992#define RX_SUSPENDED 0x0040 /* SSB.Parm[0]; SSB.Parm[1]: 32 993 * bit pointer to RPL with odd 994 * forward pointer. 995 */ 996 997/* Valid receive CSTAT: */ 998#define RX_FRAME_CONTROL_BITS (RX_VALID | RX_START_FRAME | RX_END_FRAME | \ 999 RX_FRAME_COMPLETE) 1000#define VALID_SINGLE_BUFFER_FRAME (RX_START_FRAME | RX_END_FRAME | \ 1001 RX_FRAME_COMPLETE) 1002 1003typedef enum SKB_STAT SKB_STAT; 1004enum SKB_STAT { 1005 SKB_UNAVAILABLE, 1006 SKB_DMA_DIRECT, 1007 SKB_DATA_COPY 1008}; 1009 1010/* Receive Parameter List (RPL) The length of the RPLs has to be initialized 1011 * in the OPL. (OPEN parameter list) 1012 */ 1013#define RPL_NUM 3 1014 1015#define RX_FRAG_NUM 1 /* Maximal number of used fragments in one RPL. 1016 * (up to firmware v2.24: 3, now: up to 9) 1017 */ 1018 1019#pragma pack(1) 1020typedef struct s_RPL RPL; 1021struct s_RPL { /* Receive Parameter List */ 1022 u_int32_t NextRPLAddr; /* Pointer to next RPL in chain 1023 * (normalized = physical 32 bit 1024 * address) if pointer is odd: this 1025 * is last RPL. Pointing to itself can 1026 * cause problems! 1027 */ 1028 volatile u_int16_t Status; /* Set by creation of Receive Parameter 1029 * List RECEIVE_CSTAT_COMPLETE set by 1030 * adapter in lists that start or end 1031 * a frame. 1032 */ 1033 volatile u_int16_t FrameSize; /* Number of bytes received as a 1034 * frame including AC/FC, Destination, 1035 * Source, Routing field not including 1036 * CRC, FS (Frame Status), End Delimiter 1037 * (valid only if START_FRAME bit in 1038 * CSTAT nonzero) must not be zero in 1039 * any list; maximum value: (BUFFER_SIZE 1040 * - 8) * TX_BUF_MAX sum of DataCount 1041 * values in FragmentList must equal 1042 * Frame_Size value in START_FRAME TPL! 1043 * frame data fragment list 1044 */ 1045 1046 /* TPL/RPL size in OPEN parameter list depending on maximal numbers 1047 * of fragments used in one parameter list. 1048 */ 1049 Fragment FragList[RX_FRAG_NUM]; /* Maximum: nine frame fragments in 1050 * one TPL. Actual version of firmware: 1051 * 9 fragments possible. 1052 */ 1053#pragma pack() 1054 1055 /* Special proprietary data and precalculations. */ 1056 RPL *NextRPLPtr; /* Logical pointer to next RPL in chain. */ 1057 unsigned char *MData; 1058 struct sk_buff *Skb; 1059 SKB_STAT SkbStat; 1060 int RPLIndex; 1061 dma_addr_t DMABuff; /* DMA IO bus address from dma_map */ 1062}; 1063 1064/* Information that need to be kept for each board. */ 1065typedef struct net_local { 1066#pragma pack(1) 1067 IPB ipb; /* Initialization Parameter Block. */ 1068 SCB scb; /* System Command Block: system to adapter 1069 * communication. 1070 */ 1071 SSB ssb; /* System Status Block: adapter to system 1072 * communication. 1073 */ 1074 OPB ocpl; /* Open Options Parameter Block. */ 1075 1076 ERRORTAB errorlogtable; /* Adapter statistic error counters. 1077 * (read from adapter memory) 1078 */ 1079 unsigned char ProductID[PROD_ID_SIZE + 1]; /* Product ID */ 1080#pragma pack() 1081 1082 TPL Tpl[TPL_NUM]; 1083 TPL *TplFree; 1084 TPL *TplBusy; 1085 unsigned char LocalTxBuffers[TPL_NUM][DEFAULT_PACKET_SIZE]; 1086 1087 RPL Rpl[RPL_NUM]; 1088 RPL *RplHead; 1089 RPL *RplTail; 1090 unsigned char LocalRxBuffers[RPL_NUM][DEFAULT_PACKET_SIZE]; 1091 1092 struct device *pdev; 1093 int DataRate; 1094 unsigned char ScbInUse; 1095 unsigned short CMDqueue; 1096 1097 unsigned long AdapterOpenFlag:1; 1098 unsigned long AdapterVirtOpenFlag:1; 1099 unsigned long OpenCommandIssued:1; 1100 unsigned long TransmitCommandActive:1; 1101 unsigned long TransmitHaltScheduled:1; 1102 unsigned long HaltInProgress:1; 1103 unsigned long LobeWireFaultLogged:1; 1104 unsigned long ReOpenInProgress:1; 1105 unsigned long Sleeping:1; 1106 1107 unsigned long LastOpenStatus; 1108 unsigned short CurrentRingStatus; 1109 unsigned long MaxPacketSize; 1110 1111 unsigned long StartTime; 1112 unsigned long LastSendTime; 1113 1114 struct tr_statistics MacStat; /* MAC statistics structure */ 1115 1116 unsigned long dmalimit; /* the max DMA address (ie, ISA) */ 1117 dma_addr_t dmabuffer; /* the DMA bus address corresponding to 1118 priv. Might be different from virt_to_bus() 1119 for architectures with IO MMU (Alpha) */ 1120 1121 struct timer_list timer; 1122 1123 wait_queue_head_t wait_for_tok_int; 1124 1125 INTPTRS intptrs; /* Internal adapter pointer. Must be read 1126 * before OPEN command. 1127 */ 1128 unsigned short (*setnselout)(struct net_device *); 1129 unsigned short (*sifreadb)(struct net_device *, unsigned short); 1130 void (*sifwriteb)(struct net_device *, unsigned short, unsigned short); 1131 unsigned short (*sifreadw)(struct net_device *, unsigned short); 1132 void (*sifwritew)(struct net_device *, unsigned short, unsigned short); 1133 1134 spinlock_t lock; /* SMP protection */ 1135 void *tmspriv; 1136} NET_LOCAL; 1137 1138#endif /* __KERNEL__ */ 1139#endif /* __LINUX_TMS380TR_H */ 1140