1/*
2 *  linux/drivers/ide/pci/cmd640.c		Version 1.02  Sep 01, 1996
3 *
4 *  Copyright (C) 1995-1996  Linus Torvalds & authors (see below)
5 */
6
7/*
8 *  Original authors:	abramov@cecmow.enet.dec.com (Igor Abramov)
9 *  			mlord@pobox.com (Mark Lord)
10 *
11 *  See linux/MAINTAINERS for address of current maintainer.
12 *
13 *  This file provides support for the advanced features and bugs
14 *  of IDE interfaces using the CMD Technologies 0640 IDE interface chip.
15 *
16 *  These chips are basically fucked by design, and getting this driver
17 *  to work on every motherboard design that uses this screwed chip seems
18 *  bloody well impossible.  However, we're still trying.
19 *
20 *  Version 0.97 worked for everybody.
21 *
22 *  User feedback is essential.  Many thanks to the beta test team:
23 *
24 *  A.Hartgers@stud.tue.nl, JZDQC@CUNYVM.CUNY.edu, abramov@cecmow.enet.dec.com,
25 *  bardj@utopia.ppp.sn.no, bart@gaga.tue.nl, bbol001@cs.auckland.ac.nz,
26 *  chrisc@dbass.demon.co.uk, dalecki@namu26.Num.Math.Uni-Goettingen.de,
27 *  derekn@vw.ece.cmu.edu, florian@btp2x3.phy.uni-bayreuth.de,
28 *  flynn@dei.unipd.it, gadio@netvision.net.il, godzilla@futuris.net,
29 *  j@pobox.com, jkemp1@mises.uni-paderborn.de, jtoppe@hiwaay.net,
30 *  kerouac@ssnet.com, meskes@informatik.rwth-aachen.de, hzoli@cs.elte.hu,
31 *  peter@udgaard.isgtec.com, phil@tazenda.demon.co.uk, roadcapw@cfw.com,
32 *  s0033las@sun10.vsz.bme.hu, schaffer@tam.cornell.edu, sjd@slip.net,
33 *  steve@ei.org, ulrpeg@bigcomm.gun.de, ism@tardis.ed.ac.uk, mack@cray.com
34 *  liug@mama.indstate.edu, and others.
35 *
36 *  Version 0.01	Initial version, hacked out of ide.c,
37 *			and #include'd rather than compiled separately.
38 *			This will get cleaned up in a subsequent release.
39 *
40 *  Version 0.02	Fixes for vlb initialization code, enable prefetch
41 *			for versions 'B' and 'C' of chip by default,
42 *			some code cleanup.
43 *
44 *  Version 0.03	Added reset of secondary interface,
45 *			and black list for devices which are not compatible
46 *			with prefetch mode. Separate function for setting
47 *			prefetch is added, possibly it will be called some
48 *			day from ioctl processing code.
49 *
50 *  Version 0.04	Now configs/compiles separate from ide.c
51 *
52 *  Version 0.05	Major rewrite of interface timing code.
53 *			Added new function cmd640_set_mode to set PIO mode
54 *			from ioctl call. New drives added to black list.
55 *
56 *  Version 0.06	More code cleanup. Prefetch is enabled only for
57 *			detected hard drives, not included in prefetch
58 *			black list.
59 *
60 *  Version 0.07	Changed to more conservative drive tuning policy.
61 *			Unknown drives, which report PIO < 4 are set to
62 *			(reported_PIO - 1) if it is supported, or to PIO0.
63 *			List of known drives extended by info provided by
64 *			CMD at their ftp site.
65 *
66 *  Version 0.08	Added autotune/noautotune support.
67 *
68 *  Version 0.09	Try to be smarter about 2nd port enabling.
69 *  Version 0.10	Be nice and don't reset 2nd port.
70 *  Version 0.11	Try to handle more weird situations.
71 *
72 *  Version 0.12	Lots of bug fixes from Laszlo Peter
73 *			irq unmasking disabled for reliability.
74 *			try to be even smarter about the second port.
75 *			tidy up source code formatting.
76 *  Version 0.13	permit irq unmasking again.
77 *  Version 0.90	massive code cleanup, some bugs fixed.
78 *			defaults all drives to PIO mode0, prefetch off.
79 *			autotune is OFF by default, with compile time flag.
80 *			prefetch can be turned OFF/ON using "hdparm -p8/-p9"
81 *			 (requires hdparm-3.1 or newer)
82 *  Version 0.91	first release to linux-kernel list.
83 *  Version 0.92	move initial reg dump to separate callable function
84 *			change "readahead" to "prefetch" to avoid confusion
85 *  Version 0.95	respect original BIOS timings unless autotuning.
86 *			tons of code cleanup and rearrangement.
87 *			added CONFIG_BLK_DEV_CMD640_ENHANCED option
88 *			prevent use of unmask when prefetch is on
89 *  Version 0.96	prevent use of io_32bit when prefetch is off
90 *  Version 0.97	fix VLB secondary interface for sjd@slip.net
91 *			other minor tune-ups:  0.96 was very good.
92 *  Version 0.98	ignore PCI version when disabled by BIOS
93 *  Version 0.99	display setup/active/recovery clocks with PIO mode
94 *  Version 1.00	Mmm.. cannot depend on PCMD_ENA in all systems
95 *  Version 1.01	slow/fast devsel can be selected with "hdparm -p6/-p7"
96 *			 ("fast" is necessary for 32bit I/O in some systems)
97 *  Version 1.02	fix bug that resulted in slow "setup times"
98 *			 (patch courtesy of Zoltan Hidvegi)
99 */
100
101#define CMD640_PREFETCH_MASKS 1
102
103//#define CMD640_DUMP_REGS
104
105#include <linux/types.h>
106#include <linux/kernel.h>
107#include <linux/delay.h>
108#include <linux/timer.h>
109#include <linux/mm.h>
110#include <linux/ioport.h>
111#include <linux/blkdev.h>
112#include <linux/hdreg.h>
113#include <linux/ide.h>
114#include <linux/init.h>
115
116#include <asm/io.h>
117
118/*
119 * This flag is set in ide.c by the parameter:  ide0=cmd640_vlb
120 */
121int cmd640_vlb = 0;
122
123/*
124 * CMD640 specific registers definition.
125 */
126
127#define VID		0x00
128#define DID		0x02
129#define PCMD		0x04
130#define   PCMD_ENA	0x01
131#define PSTTS		0x06
132#define REVID		0x08
133#define PROGIF		0x09
134#define SUBCL		0x0a
135#define BASCL		0x0b
136#define BaseA0		0x10
137#define BaseA1		0x14
138#define BaseA2		0x18
139#define BaseA3		0x1c
140#define INTLINE		0x3c
141#define INPINE		0x3d
142
143#define	CFR		0x50
144#define   CFR_DEVREV		0x03
145#define   CFR_IDE01INTR		0x04
146#define	  CFR_DEVID		0x18
147#define	  CFR_AT_VESA_078h	0x20
148#define	  CFR_DSA1		0x40
149#define	  CFR_DSA0		0x80
150
151#define CNTRL		0x51
152#define	  CNTRL_DIS_RA0		0x40
153#define   CNTRL_DIS_RA1		0x80
154#define	  CNTRL_ENA_2ND		0x08
155
156#define	CMDTIM		0x52
157#define	ARTTIM0		0x53
158#define	DRWTIM0		0x54
159#define ARTTIM1 	0x55
160#define DRWTIM1		0x56
161#define ARTTIM23	0x57
162#define   ARTTIM23_DIS_RA2	0x04
163#define   ARTTIM23_DIS_RA3	0x08
164#define DRWTIM23	0x58
165#define BRST		0x59
166
167/*
168 * Registers and masks for easy access by drive index:
169 */
170static u8 prefetch_regs[4]  = {CNTRL, CNTRL, ARTTIM23, ARTTIM23};
171static u8 prefetch_masks[4] = {CNTRL_DIS_RA0, CNTRL_DIS_RA1, ARTTIM23_DIS_RA2, ARTTIM23_DIS_RA3};
172
173#ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
174
175static u8 arttim_regs[4] = {ARTTIM0, ARTTIM1, ARTTIM23, ARTTIM23};
176static u8 drwtim_regs[4] = {DRWTIM0, DRWTIM1, DRWTIM23, DRWTIM23};
177
178/*
179 * Current cmd640 timing values for each drive.
180 * The defaults for each are the slowest possible timings.
181 */
182static u8 setup_counts[4]    = {4, 4, 4, 4};     /* Address setup count (in clocks) */
183static u8 active_counts[4]   = {16, 16, 16, 16}; /* Active count   (encoded) */
184static u8 recovery_counts[4] = {16, 16, 16, 16}; /* Recovery count (encoded) */
185
186#endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */
187
188/*
189 * These are initialized to point at the devices we control
190 */
191static ide_hwif_t  *cmd_hwif0, *cmd_hwif1;
192static ide_drive_t *cmd_drives[4];
193
194/*
195 * Interface to access cmd640x registers
196 */
197static unsigned int cmd640_key;
198static void (*__put_cmd640_reg)(u16 reg, u8 val);
199static u8 (*__get_cmd640_reg)(u16 reg);
200
201/*
202 * This is read from the CFR reg, and is used in several places.
203 */
204static unsigned int cmd640_chip_version;
205
206/*
207 * The CMD640x chip does not support DWORD config write cycles, but some
208 * of the BIOSes use them to implement the config services.
209 * Therefore, we must use direct IO instead.
210 */
211
212/* PCI method 1 access */
213
214static void put_cmd640_reg_pci1 (u16 reg, u8 val)
215{
216	outl_p((reg & 0xfc) | cmd640_key, 0xcf8);
217	outb_p(val, (reg & 3) | 0xcfc);
218}
219
220static u8 get_cmd640_reg_pci1 (u16 reg)
221{
222	outl_p((reg & 0xfc) | cmd640_key, 0xcf8);
223	return inb_p((reg & 3) | 0xcfc);
224}
225
226/* PCI method 2 access (from CMD datasheet) */
227
228static void put_cmd640_reg_pci2 (u16 reg, u8 val)
229{
230	outb_p(0x10, 0xcf8);
231	outb_p(val, cmd640_key + reg);
232	outb_p(0, 0xcf8);
233}
234
235static u8 get_cmd640_reg_pci2 (u16 reg)
236{
237	u8 b;
238
239	outb_p(0x10, 0xcf8);
240	b = inb_p(cmd640_key + reg);
241	outb_p(0, 0xcf8);
242	return b;
243}
244
245/* VLB access */
246
247static void put_cmd640_reg_vlb (u16 reg, u8 val)
248{
249	outb_p(reg, cmd640_key);
250	outb_p(val, cmd640_key + 4);
251}
252
253static u8 get_cmd640_reg_vlb (u16 reg)
254{
255	outb_p(reg, cmd640_key);
256	return inb_p(cmd640_key + 4);
257}
258
259static u8 get_cmd640_reg(u16 reg)
260{
261	u8 b;
262	unsigned long flags;
263
264	spin_lock_irqsave(&ide_lock, flags);
265	b = __get_cmd640_reg(reg);
266	spin_unlock_irqrestore(&ide_lock, flags);
267	return b;
268}
269
270static void put_cmd640_reg(u16 reg, u8 val)
271{
272	unsigned long flags;
273
274	spin_lock_irqsave(&ide_lock, flags);
275	__put_cmd640_reg(reg,val);
276	spin_unlock_irqrestore(&ide_lock, flags);
277}
278
279static int __init match_pci_cmd640_device (void)
280{
281	const u8 ven_dev[4] = {0x95, 0x10, 0x40, 0x06};
282	unsigned int i;
283	for (i = 0; i < 4; i++) {
284		if (get_cmd640_reg(i) != ven_dev[i])
285			return 0;
286	}
287#ifdef STUPIDLY_TRUST_BROKEN_PCMD_ENA_BIT
288	if ((get_cmd640_reg(PCMD) & PCMD_ENA) == 0) {
289		printk("ide: cmd640 on PCI disabled by BIOS\n");
290		return 0;
291	}
292#endif /* STUPIDLY_TRUST_BROKEN_PCMD_ENA_BIT */
293	return 1; /* success */
294}
295
296/*
297 * Probe for CMD640x -- pci method 1
298 */
299static int __init probe_for_cmd640_pci1 (void)
300{
301	__get_cmd640_reg = get_cmd640_reg_pci1;
302	__put_cmd640_reg = put_cmd640_reg_pci1;
303	for (cmd640_key = 0x80000000;
304	     cmd640_key <= 0x8000f800;
305	     cmd640_key += 0x800) {
306		if (match_pci_cmd640_device())
307			return 1; /* success */
308	}
309	return 0;
310}
311
312/*
313 * Probe for CMD640x -- pci method 2
314 */
315static int __init probe_for_cmd640_pci2 (void)
316{
317	__get_cmd640_reg = get_cmd640_reg_pci2;
318	__put_cmd640_reg = put_cmd640_reg_pci2;
319	for (cmd640_key = 0xc000; cmd640_key <= 0xcf00; cmd640_key += 0x100) {
320		if (match_pci_cmd640_device())
321			return 1; /* success */
322	}
323	return 0;
324}
325
326/*
327 * Probe for CMD640x -- vlb
328 */
329static int __init probe_for_cmd640_vlb (void)
330{
331	u8 b;
332
333	__get_cmd640_reg = get_cmd640_reg_vlb;
334	__put_cmd640_reg = put_cmd640_reg_vlb;
335	cmd640_key = 0x178;
336	b = get_cmd640_reg(CFR);
337	if (b == 0xff || b == 0x00 || (b & CFR_AT_VESA_078h)) {
338		cmd640_key = 0x78;
339		b = get_cmd640_reg(CFR);
340		if (b == 0xff || b == 0x00 || !(b & CFR_AT_VESA_078h))
341			return 0;
342	}
343	return 1; /* success */
344}
345
346/*
347 *  Returns 1 if an IDE interface/drive exists at 0x170,
348 *  Returns 0 otherwise.
349 */
350static int __init secondary_port_responding (void)
351{
352	unsigned long flags;
353
354	spin_lock_irqsave(&ide_lock, flags);
355
356	outb_p(0x0a, 0x170 + IDE_SELECT_OFFSET);	/* select drive0 */
357	udelay(100);
358	if ((inb_p(0x170 + IDE_SELECT_OFFSET) & 0x1f) != 0x0a) {
359		outb_p(0x1a, 0x170 + IDE_SELECT_OFFSET); /* select drive1 */
360		udelay(100);
361		if ((inb_p(0x170 + IDE_SELECT_OFFSET) & 0x1f) != 0x1a) {
362			spin_unlock_irqrestore(&ide_lock, flags);
363			return 0; /* nothing responded */
364		}
365	}
366	spin_unlock_irqrestore(&ide_lock, flags);
367	return 1; /* success */
368}
369
370#ifdef CMD640_DUMP_REGS
371/*
372 * Dump out all cmd640 registers.  May be called from ide.c
373 */
374static void cmd640_dump_regs (void)
375{
376	unsigned int reg = cmd640_vlb ? 0x50 : 0x00;
377
378	/* Dump current state of chip registers */
379	printk("ide: cmd640 internal register dump:");
380	for (; reg <= 0x59; reg++) {
381		if (!(reg & 0x0f))
382			printk("\n%04x:", reg);
383		printk(" %02x", get_cmd640_reg(reg));
384	}
385	printk("\n");
386}
387#endif
388
389/*
390 * Check whether prefetch is on for a drive,
391 * and initialize the unmask flags for safe operation.
392 */
393static void __init check_prefetch (unsigned int index)
394{
395	ide_drive_t *drive = cmd_drives[index];
396	u8 b = get_cmd640_reg(prefetch_regs[index]);
397
398	if (b & prefetch_masks[index]) {	/* is prefetch off? */
399		drive->no_unmask = 0;
400		drive->no_io_32bit = 1;
401		drive->io_32bit = 0;
402	} else {
403#if CMD640_PREFETCH_MASKS
404		drive->no_unmask = 1;
405		drive->unmask = 0;
406#endif
407		drive->no_io_32bit = 0;
408	}
409}
410
411/*
412 * Figure out which devices we control
413 */
414static void __init setup_device_ptrs (void)
415{
416	unsigned int i;
417
418	cmd_hwif0 = &ide_hwifs[0]; /* default, if not found below */
419	cmd_hwif1 = &ide_hwifs[1]; /* default, if not found below */
420	for (i = 0; i < MAX_HWIFS; i++) {
421		ide_hwif_t *hwif = &ide_hwifs[i];
422		if (hwif->chipset == ide_unknown || hwif->chipset == ide_forced) {
423			if (hwif->io_ports[IDE_DATA_OFFSET] == 0x1f0)
424				cmd_hwif0 = hwif;
425			else if (hwif->io_ports[IDE_DATA_OFFSET] == 0x170)
426				cmd_hwif1 = hwif;
427		}
428	}
429	cmd_drives[0] = &cmd_hwif0->drives[0];
430	cmd_drives[1] = &cmd_hwif0->drives[1];
431	cmd_drives[2] = &cmd_hwif1->drives[0];
432	cmd_drives[3] = &cmd_hwif1->drives[1];
433}
434
435#ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
436
437/*
438 * Sets prefetch mode for a drive.
439 */
440static void set_prefetch_mode (unsigned int index, int mode)
441{
442	ide_drive_t *drive = cmd_drives[index];
443	int reg = prefetch_regs[index];
444	u8 b;
445	unsigned long flags;
446
447	spin_lock_irqsave(&ide_lock, flags);
448	b = __get_cmd640_reg(reg);
449	if (mode) {	/* want prefetch on? */
450#if CMD640_PREFETCH_MASKS
451		drive->no_unmask = 1;
452		drive->unmask = 0;
453#endif
454		drive->no_io_32bit = 0;
455		b &= ~prefetch_masks[index];	/* enable prefetch */
456	} else {
457		drive->no_unmask = 0;
458		drive->no_io_32bit = 1;
459		drive->io_32bit = 0;
460		b |= prefetch_masks[index];	/* disable prefetch */
461	}
462	__put_cmd640_reg(reg, b);
463	spin_unlock_irqrestore(&ide_lock, flags);
464}
465
466/*
467 * Dump out current drive clocks settings
468 */
469static void display_clocks (unsigned int index)
470{
471	u8 active_count, recovery_count;
472
473	active_count = active_counts[index];
474	if (active_count == 1)
475		++active_count;
476	recovery_count = recovery_counts[index];
477	if (active_count > 3 && recovery_count == 1)
478		++recovery_count;
479	if (cmd640_chip_version > 1)
480		recovery_count += 1;  /* cmd640b uses (count + 1)*/
481	printk(", clocks=%d/%d/%d\n", setup_counts[index], active_count, recovery_count);
482}
483
484/*
485 * Pack active and recovery counts into single byte representation
486 * used by controller
487 */
488static inline u8 pack_nibbles (u8 upper, u8 lower)
489{
490	return ((upper & 0x0f) << 4) | (lower & 0x0f);
491}
492
493/*
494 * This routine retrieves the initial drive timings from the chipset.
495 */
496static void __init retrieve_drive_counts (unsigned int index)
497{
498	u8 b;
499
500	/*
501	 * Get the internal setup timing, and convert to clock count
502	 */
503	b = get_cmd640_reg(arttim_regs[index]) & ~0x3f;
504	switch (b) {
505		case 0x00: b = 4; break;
506		case 0x80: b = 3; break;
507		case 0x40: b = 2; break;
508		default:   b = 5; break;
509	}
510	setup_counts[index] = b;
511
512	/*
513	 * Get the active/recovery counts
514	 */
515	b = get_cmd640_reg(drwtim_regs[index]);
516	active_counts[index]   = (b >> 4)   ? (b >> 4)   : 0x10;
517	recovery_counts[index] = (b & 0x0f) ? (b & 0x0f) : 0x10;
518}
519
520
521/*
522 * This routine writes the prepared setup/active/recovery counts
523 * for a drive into the cmd640 chipset registers to active them.
524 */
525static void program_drive_counts (unsigned int index)
526{
527	unsigned long flags;
528	u8 setup_count    = setup_counts[index];
529	u8 active_count   = active_counts[index];
530	u8 recovery_count = recovery_counts[index];
531
532	/*
533	 * Set up address setup count and drive read/write timing registers.
534	 * Primary interface has individual count/timing registers for
535	 * each drive.  Secondary interface has one common set of registers,
536	 * so we merge the timings, using the slowest value for each timing.
537	 */
538	if (index > 1) {
539		unsigned int mate;
540		if (cmd_drives[mate = index ^ 1]->present) {
541			if (setup_count < setup_counts[mate])
542				setup_count = setup_counts[mate];
543			if (active_count < active_counts[mate])
544				active_count = active_counts[mate];
545			if (recovery_count < recovery_counts[mate])
546				recovery_count = recovery_counts[mate];
547		}
548	}
549
550	/*
551	 * Convert setup_count to internal chipset representation
552	 */
553	switch (setup_count) {
554		case 4:	 setup_count = 0x00; break;
555		case 3:	 setup_count = 0x80; break;
556		case 1:
557		case 2:	 setup_count = 0x40; break;
558		default: setup_count = 0xc0; /* case 5 */
559	}
560
561	/*
562	 * Now that everything is ready, program the new timings
563	 */
564	spin_lock_irqsave(&ide_lock, flags);
565	/*
566	 * Program the address_setup clocks into ARTTIM reg,
567	 * and then the active/recovery counts into the DRWTIM reg
568	 * (this converts counts of 16 into counts of zero -- okay).
569	 */
570	setup_count |= __get_cmd640_reg(arttim_regs[index]) & 0x3f;
571	__put_cmd640_reg(arttim_regs[index], setup_count);
572	__put_cmd640_reg(drwtim_regs[index], pack_nibbles(active_count, recovery_count));
573	spin_unlock_irqrestore(&ide_lock, flags);
574}
575
576/*
577 * Set a specific pio_mode for a drive
578 */
579static void cmd640_set_mode (unsigned int index, u8 pio_mode, unsigned int cycle_time)
580{
581	int setup_time, active_time, recovery_time, clock_time;
582	u8 setup_count, active_count, recovery_count, recovery_count2, cycle_count;
583	int bus_speed = system_bus_clock();
584
585	if (pio_mode > 5)
586		pio_mode = 5;
587	setup_time  = ide_pio_timings[pio_mode].setup_time;
588	active_time = ide_pio_timings[pio_mode].active_time;
589	recovery_time = cycle_time - (setup_time + active_time);
590	clock_time = 1000 / bus_speed;
591	cycle_count = (cycle_time + clock_time - 1) / clock_time;
592
593	setup_count = (setup_time + clock_time - 1) / clock_time;
594
595	active_count = (active_time + clock_time - 1) / clock_time;
596	if (active_count < 2)
597		active_count = 2; /* minimum allowed by cmd640 */
598
599	recovery_count = (recovery_time + clock_time - 1) / clock_time;
600	recovery_count2 = cycle_count - (setup_count + active_count);
601	if (recovery_count2 > recovery_count)
602		recovery_count = recovery_count2;
603	if (recovery_count < 2)
604		recovery_count = 2; /* minimum allowed by cmd640 */
605	if (recovery_count > 17) {
606		active_count += recovery_count - 17;
607		recovery_count = 17;
608	}
609	if (active_count > 16)
610		active_count = 16; /* maximum allowed by cmd640 */
611	if (cmd640_chip_version > 1)
612		recovery_count -= 1;  /* cmd640b uses (count + 1)*/
613	if (recovery_count > 16)
614		recovery_count = 16; /* maximum allowed by cmd640 */
615
616	setup_counts[index]    = setup_count;
617	active_counts[index]   = active_count;
618	recovery_counts[index] = recovery_count;
619
620	/*
621	 * In a perfect world, we might set the drive pio mode here
622	 * (using WIN_SETFEATURE) before continuing.
623	 *
624	 * But we do not, because:
625	 *	1) this is the wrong place to do it (proper is do_special() in ide.c)
626	 * 	2) in practice this is rarely, if ever, necessary
627	 */
628	program_drive_counts (index);
629}
630
631/*
632 * Drive PIO mode selection:
633 */
634static void cmd640_tune_drive (ide_drive_t *drive, u8 mode_wanted)
635{
636	u8 b;
637	ide_pio_data_t  d;
638	unsigned int index = 0;
639
640	while (drive != cmd_drives[index]) {
641		if (++index > 3) {
642			printk("%s: bad news in cmd640_tune_drive\n", drive->name);
643			return;
644		}
645	}
646	switch (mode_wanted) {
647		case 6: /* set fast-devsel off */
648		case 7: /* set fast-devsel on */
649			mode_wanted &= 1;
650			b = get_cmd640_reg(CNTRL) & ~0x27;
651			if (mode_wanted)
652				b |= 0x27;
653			put_cmd640_reg(CNTRL, b);
654			printk("%s: %sabled cmd640 fast host timing (devsel)\n", drive->name, mode_wanted ? "en" : "dis");
655			return;
656
657		case 8: /* set prefetch off */
658		case 9: /* set prefetch on */
659			mode_wanted &= 1;
660			set_prefetch_mode(index, mode_wanted);
661			printk("%s: %sabled cmd640 prefetch\n", drive->name, mode_wanted ? "en" : "dis");
662			return;
663	}
664
665	(void) ide_get_best_pio_mode (drive, mode_wanted, 5, &d);
666	cmd640_set_mode (index, d.pio_mode, d.cycle_time);
667
668	printk ("%s: selected cmd640 PIO mode%d (%dns)%s",
669		drive->name,
670		d.pio_mode,
671		d.cycle_time,
672		d.overridden ? " (overriding vendor mode)" : "");
673	display_clocks(index);
674	return;
675}
676
677#endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */
678
679static int pci_conf1(void)
680{
681	u32 tmp;
682	unsigned long flags;
683
684	spin_lock_irqsave(&ide_lock, flags);
685	outb(0x01, 0xCFB);
686	tmp = inl(0xCF8);
687	outl(0x80000000, 0xCF8);
688	if (inl(0xCF8) == 0x80000000) {
689		outl(tmp, 0xCF8);
690		spin_unlock_irqrestore(&ide_lock, flags);
691		return 1;
692	}
693	outl(tmp, 0xCF8);
694	spin_unlock_irqrestore(&ide_lock, flags);
695	return 0;
696}
697
698static int pci_conf2(void)
699{
700	unsigned long flags;
701
702	spin_lock_irqsave(&ide_lock, flags);
703	outb(0x00, 0xCFB);
704	outb(0x00, 0xCF8);
705	outb(0x00, 0xCFA);
706	if (inb(0xCF8) == 0x00 && inb(0xCF8) == 0x00) {
707		spin_unlock_irqrestore(&ide_lock, flags);
708		return 1;
709	}
710	spin_unlock_irqrestore(&ide_lock, flags);
711	return 0;
712}
713
714/*
715 * Probe for a cmd640 chipset, and initialize it if found.  Called from ide.c
716 */
717int __init ide_probe_for_cmd640x (void)
718{
719#ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
720	int second_port_toggled = 0;
721#endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */
722	int second_port_cmd640 = 0;
723	const char *bus_type, *port2;
724	unsigned int index;
725	u8 b, cfr;
726
727	if (cmd640_vlb && probe_for_cmd640_vlb()) {
728		bus_type = "VLB";
729	} else {
730		cmd640_vlb = 0;
731		/* Find out what kind of PCI probing is supported otherwise
732		   Justin Gibbs will sulk.. */
733		if (pci_conf1() && probe_for_cmd640_pci1())
734			bus_type = "PCI (type1)";
735		else if (pci_conf2() && probe_for_cmd640_pci2())
736			bus_type = "PCI (type2)";
737		else
738			return 0;
739	}
740	/*
741	 * Undocumented magic (there is no 0x5b reg in specs)
742	 */
743	put_cmd640_reg(0x5b, 0xbd);
744	if (get_cmd640_reg(0x5b) != 0xbd) {
745		printk(KERN_ERR "ide: cmd640 init failed: wrong value in reg 0x5b\n");
746		return 0;
747	}
748	put_cmd640_reg(0x5b, 0);
749
750#ifdef CMD640_DUMP_REGS
751	cmd640_dump_regs();
752#endif
753
754	/*
755	 * Documented magic begins here
756	 */
757	cfr = get_cmd640_reg(CFR);
758	cmd640_chip_version = cfr & CFR_DEVREV;
759	if (cmd640_chip_version == 0) {
760		printk ("ide: bad cmd640 revision: %d\n", cmd640_chip_version);
761		return 0;
762	}
763
764	/*
765	 * Initialize data for primary port
766	 */
767	setup_device_ptrs ();
768	printk("%s: buggy cmd640%c interface on %s, config=0x%02x\n",
769	       cmd_hwif0->name, 'a' + cmd640_chip_version - 1, bus_type, cfr);
770	cmd_hwif0->chipset = ide_cmd640;
771#ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
772	cmd_hwif0->tuneproc = &cmd640_tune_drive;
773#endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */
774
775	/*
776	 * Ensure compatibility by always using the slowest timings
777	 * for access to the drive's command register block,
778	 * and reset the prefetch burstsize to default (512 bytes).
779	 *
780	 * Maybe we need a way to NOT do these on *some* systems?
781	 */
782	put_cmd640_reg(CMDTIM, 0);
783	put_cmd640_reg(BRST, 0x40);
784
785	/*
786	 * Try to enable the secondary interface, if not already enabled
787	 */
788	if (cmd_hwif1->noprobe) {
789		port2 = "not probed";
790	} else {
791		b = get_cmd640_reg(CNTRL);
792		if (secondary_port_responding()) {
793			if ((b & CNTRL_ENA_2ND)) {
794				second_port_cmd640 = 1;
795				port2 = "okay";
796			} else if (cmd640_vlb) {
797				second_port_cmd640 = 1;
798				port2 = "alive";
799			} else
800				port2 = "not cmd640";
801		} else {
802			put_cmd640_reg(CNTRL, b ^ CNTRL_ENA_2ND); /* toggle the bit */
803			if (secondary_port_responding()) {
804				second_port_cmd640 = 1;
805#ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
806				second_port_toggled = 1;
807#endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */
808				port2 = "enabled";
809			} else {
810				put_cmd640_reg(CNTRL, b); /* restore original setting */
811				port2 = "not responding";
812			}
813		}
814	}
815
816	/*
817	 * Initialize data for secondary cmd640 port, if enabled
818	 */
819	if (second_port_cmd640) {
820		cmd_hwif0->serialized = 1;
821		cmd_hwif1->serialized = 1;
822		cmd_hwif1->chipset = ide_cmd640;
823		cmd_hwif0->mate = cmd_hwif1;
824		cmd_hwif1->mate = cmd_hwif0;
825		cmd_hwif1->channel = 1;
826#ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
827		cmd_hwif1->tuneproc = &cmd640_tune_drive;
828#endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */
829	}
830	printk(KERN_INFO "%s: %sserialized, secondary interface %s\n", cmd_hwif1->name,
831		cmd_hwif0->serialized ? "" : "not ", port2);
832
833	/*
834	 * Establish initial timings/prefetch for all drives.
835	 * Do not unnecessarily disturb any prior BIOS setup of these.
836	 */
837	for (index = 0; index < (2 + (second_port_cmd640 << 1)); index++) {
838		ide_drive_t *drive = cmd_drives[index];
839#ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
840		if (drive->autotune || ((index > 1) && second_port_toggled)) {
841	 		/*
842	 		 * Reset timing to the slowest speed and turn off prefetch.
843			 * This way, the drive identify code has a better chance.
844			 */
845			setup_counts    [index] = 4;	/* max possible */
846			active_counts   [index] = 16;	/* max possible */
847			recovery_counts [index] = 16;	/* max possible */
848			program_drive_counts (index);
849			set_prefetch_mode (index, 0);
850			printk("cmd640: drive%d timings/prefetch cleared\n", index);
851		} else {
852			/*
853			 * Record timings/prefetch without changing them.
854			 * This preserves any prior BIOS setup.
855			 */
856			retrieve_drive_counts (index);
857			check_prefetch (index);
858			printk("cmd640: drive%d timings/prefetch(%s) preserved",
859				index, drive->no_io_32bit ? "off" : "on");
860			display_clocks(index);
861		}
862#else
863		/*
864		 * Set the drive unmask flags to match the prefetch setting
865		 */
866		check_prefetch (index);
867		printk("cmd640: drive%d timings/prefetch(%s) preserved\n",
868			index, drive->no_io_32bit ? "off" : "on");
869#endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */
870	}
871
872#ifdef CMD640_DUMP_REGS
873	cmd640_dump_regs();
874#endif
875	return 1;
876}
877