1/* 2 * linux/drivers/ide/pci/atiixp.c Version 0.01-bart2 Feb. 26, 2004 3 * 4 * Copyright (C) 2003 ATI Inc. <hyu@ati.com> 5 * Copyright (C) 2004 Bartlomiej Zolnierkiewicz 6 * 7 */ 8 9#include <linux/types.h> 10#include <linux/module.h> 11#include <linux/kernel.h> 12#include <linux/ioport.h> 13#include <linux/pci.h> 14#include <linux/hdreg.h> 15#include <linux/ide.h> 16#include <linux/delay.h> 17#include <linux/init.h> 18 19#include <asm/io.h> 20 21#define ATIIXP_IDE_PIO_TIMING 0x40 22#define ATIIXP_IDE_MDMA_TIMING 0x44 23#define ATIIXP_IDE_PIO_CONTROL 0x48 24#define ATIIXP_IDE_PIO_MODE 0x4a 25#define ATIIXP_IDE_UDMA_CONTROL 0x54 26#define ATIIXP_IDE_UDMA_MODE 0x56 27 28typedef struct { 29 u8 command_width; 30 u8 recover_width; 31} atiixp_ide_timing; 32 33static atiixp_ide_timing pio_timing[] = { 34 { 0x05, 0x0d }, 35 { 0x04, 0x07 }, 36 { 0x03, 0x04 }, 37 { 0x02, 0x02 }, 38 { 0x02, 0x00 }, 39}; 40 41static atiixp_ide_timing mdma_timing[] = { 42 { 0x07, 0x07 }, 43 { 0x02, 0x01 }, 44 { 0x02, 0x00 }, 45}; 46 47static int save_mdma_mode[4]; 48 49static DEFINE_SPINLOCK(atiixp_lock); 50 51/** 52 * atiixp_dma_2_pio - return the PIO mode matching DMA 53 * @xfer_rate: transfer speed 54 * 55 * Returns the nearest equivalent PIO timing for the PIO or DMA 56 * mode requested by the controller. 57 */ 58 59static u8 atiixp_dma_2_pio(u8 xfer_rate) { 60 switch(xfer_rate) { 61 case XFER_UDMA_6: 62 case XFER_UDMA_5: 63 case XFER_UDMA_4: 64 case XFER_UDMA_3: 65 case XFER_UDMA_2: 66 case XFER_UDMA_1: 67 case XFER_UDMA_0: 68 case XFER_MW_DMA_2: 69 case XFER_PIO_4: 70 return 4; 71 case XFER_MW_DMA_1: 72 case XFER_PIO_3: 73 return 3; 74 case XFER_SW_DMA_2: 75 case XFER_PIO_2: 76 return 2; 77 case XFER_MW_DMA_0: 78 case XFER_SW_DMA_1: 79 case XFER_SW_DMA_0: 80 case XFER_PIO_1: 81 case XFER_PIO_0: 82 case XFER_PIO_SLOW: 83 default: 84 return 0; 85 } 86} 87 88static void atiixp_dma_host_on(ide_drive_t *drive) 89{ 90 struct pci_dev *dev = drive->hwif->pci_dev; 91 unsigned long flags; 92 u16 tmp16; 93 94 spin_lock_irqsave(&atiixp_lock, flags); 95 96 pci_read_config_word(dev, ATIIXP_IDE_UDMA_CONTROL, &tmp16); 97 if (save_mdma_mode[drive->dn]) 98 tmp16 &= ~(1 << drive->dn); 99 else 100 tmp16 |= (1 << drive->dn); 101 pci_write_config_word(dev, ATIIXP_IDE_UDMA_CONTROL, tmp16); 102 103 spin_unlock_irqrestore(&atiixp_lock, flags); 104 105 ide_dma_host_on(drive); 106} 107 108static void atiixp_dma_host_off(ide_drive_t *drive) 109{ 110 struct pci_dev *dev = drive->hwif->pci_dev; 111 unsigned long flags; 112 u16 tmp16; 113 114 spin_lock_irqsave(&atiixp_lock, flags); 115 116 pci_read_config_word(dev, ATIIXP_IDE_UDMA_CONTROL, &tmp16); 117 tmp16 &= ~(1 << drive->dn); 118 pci_write_config_word(dev, ATIIXP_IDE_UDMA_CONTROL, tmp16); 119 120 spin_unlock_irqrestore(&atiixp_lock, flags); 121 122 ide_dma_host_off(drive); 123} 124 125/** 126 * atiixp_tune_drive - tune a drive attached to a ATIIXP 127 * @drive: drive to tune 128 * @pio: desired PIO mode 129 * 130 * Set the interface PIO mode. 131 */ 132 133static void atiixp_tuneproc(ide_drive_t *drive, u8 pio) 134{ 135 struct pci_dev *dev = drive->hwif->pci_dev; 136 unsigned long flags; 137 int timing_shift = (drive->dn & 2) ? 16 : 0 + (drive->dn & 1) ? 0 : 8; 138 u32 pio_timing_data; 139 u16 pio_mode_data; 140 141 spin_lock_irqsave(&atiixp_lock, flags); 142 143 pci_read_config_word(dev, ATIIXP_IDE_PIO_MODE, &pio_mode_data); 144 pio_mode_data &= ~(0x07 << (drive->dn * 4)); 145 pio_mode_data |= (pio << (drive->dn * 4)); 146 pci_write_config_word(dev, ATIIXP_IDE_PIO_MODE, pio_mode_data); 147 148 pci_read_config_dword(dev, ATIIXP_IDE_PIO_TIMING, &pio_timing_data); 149 pio_timing_data &= ~(0xff << timing_shift); 150 pio_timing_data |= (pio_timing[pio].recover_width << timing_shift) | 151 (pio_timing[pio].command_width << (timing_shift + 4)); 152 pci_write_config_dword(dev, ATIIXP_IDE_PIO_TIMING, pio_timing_data); 153 154 spin_unlock_irqrestore(&atiixp_lock, flags); 155} 156 157/** 158 * atiixp_tune_chipset - tune a ATIIXP interface 159 * @drive: IDE drive to tune 160 * @xferspeed: speed to configure 161 * 162 * Set a ATIIXP interface channel to the desired speeds. This involves 163 * requires the right timing data into the ATIIXP configuration space 164 * then setting the drive parameters appropriately 165 */ 166 167static int atiixp_speedproc(ide_drive_t *drive, u8 xferspeed) 168{ 169 struct pci_dev *dev = drive->hwif->pci_dev; 170 unsigned long flags; 171 int timing_shift = (drive->dn & 2) ? 16 : 0 + (drive->dn & 1) ? 0 : 8; 172 u32 tmp32; 173 u16 tmp16; 174 u8 speed, pio; 175 176 speed = ide_rate_filter(drive, xferspeed); 177 178 spin_lock_irqsave(&atiixp_lock, flags); 179 180 save_mdma_mode[drive->dn] = 0; 181 if (speed >= XFER_UDMA_0) { 182 pci_read_config_word(dev, ATIIXP_IDE_UDMA_MODE, &tmp16); 183 tmp16 &= ~(0x07 << (drive->dn * 4)); 184 tmp16 |= ((speed & 0x07) << (drive->dn * 4)); 185 pci_write_config_word(dev, ATIIXP_IDE_UDMA_MODE, tmp16); 186 } else { 187 if ((speed >= XFER_MW_DMA_0) && (speed <= XFER_MW_DMA_2)) { 188 save_mdma_mode[drive->dn] = speed; 189 pci_read_config_dword(dev, ATIIXP_IDE_MDMA_TIMING, &tmp32); 190 tmp32 &= ~(0xff << timing_shift); 191 tmp32 |= (mdma_timing[speed & 0x03].recover_width << timing_shift) | 192 (mdma_timing[speed & 0x03].command_width << (timing_shift + 4)); 193 pci_write_config_dword(dev, ATIIXP_IDE_MDMA_TIMING, tmp32); 194 } 195 } 196 197 spin_unlock_irqrestore(&atiixp_lock, flags); 198 199 if (speed >= XFER_SW_DMA_0) 200 pio = atiixp_dma_2_pio(speed); 201 else 202 pio = speed - XFER_PIO_0; 203 204 atiixp_tuneproc(drive, pio); 205 206 return ide_config_drive_speed(drive, speed); 207} 208 209/** 210 * atiixp_dma_check - set up an IDE device 211 * @drive: IDE drive to configure 212 * 213 * Set up the ATIIXP interface for the best available speed on this 214 * interface, preferring DMA to PIO. 215 */ 216 217static int atiixp_dma_check(ide_drive_t *drive) 218{ 219 u8 tspeed, speed; 220 221 drive->init_speed = 0; 222 223 if (ide_tune_dma(drive)) 224 return 0; 225 226 if (ide_use_fast_pio(drive)) { 227 tspeed = ide_get_best_pio_mode(drive, 255, 5, NULL); 228 speed = atiixp_dma_2_pio(XFER_PIO_0 + tspeed) + XFER_PIO_0; 229 atiixp_speedproc(drive, speed); 230 } 231 232 return -1; 233} 234 235/** 236 * init_hwif_atiixp - fill in the hwif for the ATIIXP 237 * @hwif: IDE interface 238 * 239 * Set up the ide_hwif_t for the ATIIXP interface according to the 240 * capabilities of the hardware. 241 */ 242 243static void __devinit init_hwif_atiixp(ide_hwif_t *hwif) 244{ 245 u8 udma_mode = 0; 246 u8 ch = hwif->channel; 247 struct pci_dev *pdev = hwif->pci_dev; 248 249 if (!hwif->irq) 250 hwif->irq = ch ? 15 : 14; 251 252 hwif->autodma = 0; 253 hwif->tuneproc = &atiixp_tuneproc; 254 hwif->speedproc = &atiixp_speedproc; 255 hwif->drives[0].autotune = 1; 256 hwif->drives[1].autotune = 1; 257 258 if (!hwif->dma_base) 259 return; 260 261 hwif->atapi_dma = 1; 262 hwif->ultra_mask = 0x3f; 263 hwif->mwdma_mask = 0x06; 264 hwif->swdma_mask = 0x04; 265 266 pci_read_config_byte(pdev, ATIIXP_IDE_UDMA_MODE + ch, &udma_mode); 267 if ((udma_mode & 0x07) >= 0x04 || (udma_mode & 0x70) >= 0x40) 268 hwif->udma_four = 1; 269 else 270 hwif->udma_four = 0; 271 272 hwif->dma_host_on = &atiixp_dma_host_on; 273 hwif->dma_host_off = &atiixp_dma_host_off; 274 hwif->ide_dma_check = &atiixp_dma_check; 275 if (!noautodma) 276 hwif->autodma = 1; 277 278 hwif->drives[1].autodma = hwif->autodma; 279 hwif->drives[0].autodma = hwif->autodma; 280} 281 282 283static ide_pci_device_t atiixp_pci_info[] __devinitdata = { 284 { /* 0 */ 285 .name = "ATIIXP", 286 .init_hwif = init_hwif_atiixp, 287 .channels = 2, 288 .autodma = AUTODMA, 289 .enablebits = {{0x48,0x01,0x00}, {0x48,0x08,0x00}}, 290 .bootable = ON_BOARD, 291 },{ /* 1 */ 292 .name = "SB600_PATA", 293 .init_hwif = init_hwif_atiixp, 294 .channels = 1, 295 .autodma = AUTODMA, 296 .enablebits = {{0x48,0x01,0x00}, {0x00,0x00,0x00}}, 297 .bootable = ON_BOARD, 298 }, 299}; 300 301/** 302 * atiixp_init_one - called when a ATIIXP is found 303 * @dev: the atiixp device 304 * @id: the matching pci id 305 * 306 * Called when the PCI registration layer (or the IDE initialization) 307 * finds a device matching our IDE device tables. 308 */ 309 310static int __devinit atiixp_init_one(struct pci_dev *dev, const struct pci_device_id *id) 311{ 312 return ide_setup_pci_device(dev, &atiixp_pci_info[id->driver_data]); 313} 314 315static struct pci_device_id atiixp_pci_tbl[] = { 316 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP200_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 317 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP300_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 318 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP400_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 319 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP600_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1}, 320 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP700_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1}, 321 { 0, }, 322}; 323MODULE_DEVICE_TABLE(pci, atiixp_pci_tbl); 324 325static struct pci_driver driver = { 326 .name = "ATIIXP_IDE", 327 .id_table = atiixp_pci_tbl, 328 .probe = atiixp_init_one, 329}; 330 331static int __init atiixp_ide_init(void) 332{ 333 return ide_pci_register_driver(&driver); 334} 335 336module_init(atiixp_ide_init); 337 338MODULE_AUTHOR("HUI YU"); 339MODULE_DESCRIPTION("PCI driver module for ATI IXP IDE"); 340MODULE_LICENSE("GPL"); 341