1/* 2 * pata_hpt3x3 - HPT3x3 driver 3 * (c) Copyright 2005-2006 Red Hat 4 * 5 * Was pata_hpt34x but the naming was confusing as it supported the 6 * 343 and 363 so it has been renamed. 7 * 8 * Based on: 9 * linux/drivers/ide/pci/hpt34x.c Version 0.40 Sept 10, 2002 10 * Copyright (C) 1998-2000 Andre Hedrick <andre@linux-ide.org> 11 * 12 * May be copied or modified under the terms of the GNU General Public 13 * License 14 */ 15 16#include <linux/kernel.h> 17#include <linux/module.h> 18#include <linux/pci.h> 19#include <linux/init.h> 20#include <linux/blkdev.h> 21#include <linux/delay.h> 22#include <scsi/scsi_host.h> 23#include <linux/libata.h> 24 25#define DRV_NAME "pata_hpt3x3" 26#define DRV_VERSION "0.4.3" 27 28/** 29 * hpt3x3_set_piomode - PIO setup 30 * @ap: ATA interface 31 * @adev: device on the interface 32 * 33 * Set our PIO requirements. This is fairly simple on the HPT3x3 as 34 * all we have to do is clear the MWDMA and UDMA bits then load the 35 * mode number. 36 */ 37 38static void hpt3x3_set_piomode(struct ata_port *ap, struct ata_device *adev) 39{ 40 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 41 u32 r1, r2; 42 int dn = 2 * ap->port_no + adev->devno; 43 44 pci_read_config_dword(pdev, 0x44, &r1); 45 pci_read_config_dword(pdev, 0x48, &r2); 46 /* Load the PIO timing number */ 47 r1 &= ~(7 << (3 * dn)); 48 r1 |= (adev->pio_mode - XFER_PIO_0) << (3 * dn); 49 r2 &= ~(0x11 << dn); /* Clear MWDMA and UDMA bits */ 50 51 pci_write_config_dword(pdev, 0x44, r1); 52 pci_write_config_dword(pdev, 0x48, r2); 53} 54 55/** 56 * hpt3x3_set_dmamode - DMA timing setup 57 * @ap: ATA interface 58 * @adev: Device being configured 59 * 60 * Set up the channel for MWDMA or UDMA modes. Much the same as with 61 * PIO, load the mode number and then set MWDMA or UDMA flag. 62 */ 63 64static void hpt3x3_set_dmamode(struct ata_port *ap, struct ata_device *adev) 65{ 66 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 67 u32 r1, r2; 68 int dn = 2 * ap->port_no + adev->devno; 69 int mode_num = adev->dma_mode & 0x0F; 70 71 pci_read_config_dword(pdev, 0x44, &r1); 72 pci_read_config_dword(pdev, 0x48, &r2); 73 /* Load the timing number */ 74 r1 &= ~(7 << (3 * dn)); 75 r1 |= (mode_num << (3 * dn)); 76 r2 &= ~(0x11 << dn); /* Clear MWDMA and UDMA bits */ 77 78 if (adev->dma_mode >= XFER_UDMA_0) 79 r2 |= 0x01 << dn; /* Ultra mode */ 80 else 81 r2 |= 0x10 << dn; /* MWDMA */ 82 83 pci_write_config_dword(pdev, 0x44, r1); 84 pci_write_config_dword(pdev, 0x48, r2); 85} 86 87static struct scsi_host_template hpt3x3_sht = { 88 .module = THIS_MODULE, 89 .name = DRV_NAME, 90 .ioctl = ata_scsi_ioctl, 91 .queuecommand = ata_scsi_queuecmd, 92 .can_queue = ATA_DEF_QUEUE, 93 .this_id = ATA_SHT_THIS_ID, 94 .sg_tablesize = LIBATA_MAX_PRD, 95 .cmd_per_lun = ATA_SHT_CMD_PER_LUN, 96 .emulated = ATA_SHT_EMULATED, 97 .use_clustering = ATA_SHT_USE_CLUSTERING, 98 .proc_name = DRV_NAME, 99 .dma_boundary = ATA_DMA_BOUNDARY, 100 .slave_configure = ata_scsi_slave_config, 101 .slave_destroy = ata_scsi_slave_destroy, 102 .bios_param = ata_std_bios_param, 103}; 104 105static struct ata_port_operations hpt3x3_port_ops = { 106 .port_disable = ata_port_disable, 107 .set_piomode = hpt3x3_set_piomode, 108 .set_dmamode = hpt3x3_set_dmamode, 109 .mode_filter = ata_pci_default_filter, 110 111 .tf_load = ata_tf_load, 112 .tf_read = ata_tf_read, 113 .check_status = ata_check_status, 114 .exec_command = ata_exec_command, 115 .dev_select = ata_std_dev_select, 116 117 .freeze = ata_bmdma_freeze, 118 .thaw = ata_bmdma_thaw, 119 .error_handler = ata_bmdma_error_handler, 120 .post_internal_cmd = ata_bmdma_post_internal_cmd, 121 .cable_detect = ata_cable_40wire, 122 123 .bmdma_setup = ata_bmdma_setup, 124 .bmdma_start = ata_bmdma_start, 125 .bmdma_stop = ata_bmdma_stop, 126 .bmdma_status = ata_bmdma_status, 127 128 .qc_prep = ata_qc_prep, 129 .qc_issue = ata_qc_issue_prot, 130 131 .data_xfer = ata_data_xfer, 132 133 .irq_handler = ata_interrupt, 134 .irq_clear = ata_bmdma_irq_clear, 135 .irq_on = ata_irq_on, 136 .irq_ack = ata_irq_ack, 137 138 .port_start = ata_port_start, 139}; 140 141/** 142 * hpt3x3_init_chipset - chip setup 143 * @dev: PCI device 144 * 145 * Perform the setup required at boot and on resume. 146 */ 147 148static void hpt3x3_init_chipset(struct pci_dev *dev) 149{ 150 u16 cmd; 151 /* Initialize the board */ 152 pci_write_config_word(dev, 0x80, 0x00); 153 /* Check if it is a 343 or a 363. 363 has COMMAND_MEMORY set */ 154 pci_read_config_word(dev, PCI_COMMAND, &cmd); 155 if (cmd & PCI_COMMAND_MEMORY) 156 pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0xF0); 157 else 158 pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0x20); 159} 160 161 162/** 163 * hpt3x3_init_one - Initialise an HPT343/363 164 * @dev: PCI device 165 * @id: Entry in match table 166 * 167 * Perform basic initialisation. The chip has a quirk that it won't 168 * function unless it is at XX00. The old ATA driver touched this up 169 * but we leave it for pci quirks to do properly. 170 */ 171 172static int hpt3x3_init_one(struct pci_dev *dev, const struct pci_device_id *id) 173{ 174 static const struct ata_port_info info = { 175 .sht = &hpt3x3_sht, 176 .flags = ATA_FLAG_SLAVE_POSS|ATA_FLAG_SRST, 177 .pio_mask = 0x1f, 178 .mwdma_mask = 0x07, 179 .udma_mask = 0x07, 180 .port_ops = &hpt3x3_port_ops 181 }; 182 const struct ata_port_info *ppi[] = { &info, NULL }; 183 184 hpt3x3_init_chipset(dev); 185 /* Now kick off ATA set up */ 186 return ata_pci_init_one(dev, ppi); 187} 188 189#ifdef CONFIG_PM 190static int hpt3x3_reinit_one(struct pci_dev *dev) 191{ 192 hpt3x3_init_chipset(dev); 193 return ata_pci_device_resume(dev); 194} 195#endif 196 197static const struct pci_device_id hpt3x3[] = { 198 { PCI_VDEVICE(TTI, PCI_DEVICE_ID_TTI_HPT343), }, 199 200 { }, 201}; 202 203static struct pci_driver hpt3x3_pci_driver = { 204 .name = DRV_NAME, 205 .id_table = hpt3x3, 206 .probe = hpt3x3_init_one, 207 .remove = ata_pci_remove_one, 208#ifdef CONFIG_PM 209 .suspend = ata_pci_device_suspend, 210 .resume = hpt3x3_reinit_one, 211#endif 212}; 213 214static int __init hpt3x3_init(void) 215{ 216 return pci_register_driver(&hpt3x3_pci_driver); 217} 218 219 220static void __exit hpt3x3_exit(void) 221{ 222 pci_unregister_driver(&hpt3x3_pci_driver); 223} 224 225 226MODULE_AUTHOR("Alan Cox"); 227MODULE_DESCRIPTION("low-level driver for the Highpoint HPT343/363"); 228MODULE_LICENSE("GPL"); 229MODULE_DEVICE_TABLE(pci, hpt3x3); 230MODULE_VERSION(DRV_VERSION); 231 232module_init(hpt3x3_init); 233module_exit(hpt3x3_exit); 234