1/* Target-dependent code for Renesas M32R, for GDB. 2 3 Copyright (C) 1996, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007, 4 2008, 2009, 2010, 2011 Free Software Foundation, Inc. 5 6 This file is part of GDB. 7 8 This program is free software; you can redistribute it and/or modify 9 it under the terms of the GNU General Public License as published by 10 the Free Software Foundation; either version 3 of the License, or 11 (at your option) any later version. 12 13 This program is distributed in the hope that it will be useful, 14 but WITHOUT ANY WARRANTY; without even the implied warranty of 15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 GNU General Public License for more details. 17 18 You should have received a copy of the GNU General Public License 19 along with this program. If not, see <http://www.gnu.org/licenses/>. */ 20 21#include "defs.h" 22#include "frame.h" 23#include "frame-unwind.h" 24#include "frame-base.h" 25#include "symtab.h" 26#include "gdbtypes.h" 27#include "gdbcmd.h" 28#include "gdbcore.h" 29#include "gdb_string.h" 30#include "value.h" 31#include "inferior.h" 32#include "symfile.h" 33#include "objfiles.h" 34#include "osabi.h" 35#include "language.h" 36#include "arch-utils.h" 37#include "regcache.h" 38#include "trad-frame.h" 39#include "dis-asm.h" 40 41#include "gdb_assert.h" 42 43#include "m32r-tdep.h" 44 45/* Local functions */ 46 47extern void _initialize_m32r_tdep (void); 48 49static CORE_ADDR 50m32r_frame_align (struct gdbarch *gdbarch, CORE_ADDR sp) 51{ 52 /* Align to the size of an instruction (so that they can safely be 53 pushed onto the stack. */ 54 return sp & ~3; 55} 56 57 58/* Breakpoints 59 60 The little endian mode of M32R is unique. In most of architectures, 61 two 16-bit instructions, A and B, are placed as the following: 62 63 Big endian: 64 A0 A1 B0 B1 65 66 Little endian: 67 A1 A0 B1 B0 68 69 In M32R, they are placed like this: 70 71 Big endian: 72 A0 A1 B0 B1 73 74 Little endian: 75 B1 B0 A1 A0 76 77 This is because M32R always fetches instructions in 32-bit. 78 79 The following functions take care of this behavior. */ 80 81static int 82m32r_memory_insert_breakpoint (struct gdbarch *gdbarch, 83 struct bp_target_info *bp_tgt) 84{ 85 CORE_ADDR addr = bp_tgt->placed_address; 86 int val; 87 gdb_byte buf[4]; 88 gdb_byte *contents_cache = bp_tgt->shadow_contents; 89 gdb_byte bp_entry[] = { 0x10, 0xf1 }; /* dpt */ 90 91 /* Save the memory contents. */ 92 val = target_read_memory (addr & 0xfffffffc, contents_cache, 4); 93 if (val != 0) 94 return val; /* return error */ 95 96 bp_tgt->placed_size = bp_tgt->shadow_len = 4; 97 98 /* Determine appropriate breakpoint contents and size for this address. */ 99 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) 100 { 101 if ((addr & 3) == 0) 102 { 103 buf[0] = bp_entry[0]; 104 buf[1] = bp_entry[1]; 105 buf[2] = contents_cache[2] & 0x7f; 106 buf[3] = contents_cache[3]; 107 } 108 else 109 { 110 buf[0] = contents_cache[0]; 111 buf[1] = contents_cache[1]; 112 buf[2] = bp_entry[0]; 113 buf[3] = bp_entry[1]; 114 } 115 } 116 else /* little-endian */ 117 { 118 if ((addr & 3) == 0) 119 { 120 buf[0] = contents_cache[0]; 121 buf[1] = contents_cache[1] & 0x7f; 122 buf[2] = bp_entry[1]; 123 buf[3] = bp_entry[0]; 124 } 125 else 126 { 127 buf[0] = bp_entry[1]; 128 buf[1] = bp_entry[0]; 129 buf[2] = contents_cache[2]; 130 buf[3] = contents_cache[3]; 131 } 132 } 133 134 /* Write the breakpoint. */ 135 val = target_write_memory (addr & 0xfffffffc, buf, 4); 136 return val; 137} 138 139static int 140m32r_memory_remove_breakpoint (struct gdbarch *gdbarch, 141 struct bp_target_info *bp_tgt) 142{ 143 CORE_ADDR addr = bp_tgt->placed_address; 144 int val; 145 gdb_byte buf[4]; 146 gdb_byte *contents_cache = bp_tgt->shadow_contents; 147 148 buf[0] = contents_cache[0]; 149 buf[1] = contents_cache[1]; 150 buf[2] = contents_cache[2]; 151 buf[3] = contents_cache[3]; 152 153 /* Remove parallel bit. */ 154 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) 155 { 156 if ((buf[0] & 0x80) == 0 && (buf[2] & 0x80) != 0) 157 buf[2] &= 0x7f; 158 } 159 else /* little-endian */ 160 { 161 if ((buf[3] & 0x80) == 0 && (buf[1] & 0x80) != 0) 162 buf[1] &= 0x7f; 163 } 164 165 /* Write contents. */ 166 val = target_write_memory (addr & 0xfffffffc, buf, 4); 167 return val; 168} 169 170static const gdb_byte * 171m32r_breakpoint_from_pc (struct gdbarch *gdbarch, 172 CORE_ADDR *pcptr, int *lenptr) 173{ 174 static gdb_byte be_bp_entry[] = { 175 0x10, 0xf1, 0x70, 0x00 176 }; /* dpt -> nop */ 177 static gdb_byte le_bp_entry[] = { 178 0x00, 0x70, 0xf1, 0x10 179 }; /* dpt -> nop */ 180 gdb_byte *bp; 181 182 /* Determine appropriate breakpoint. */ 183 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) 184 { 185 if ((*pcptr & 3) == 0) 186 { 187 bp = be_bp_entry; 188 *lenptr = 4; 189 } 190 else 191 { 192 bp = be_bp_entry; 193 *lenptr = 2; 194 } 195 } 196 else 197 { 198 if ((*pcptr & 3) == 0) 199 { 200 bp = le_bp_entry; 201 *lenptr = 4; 202 } 203 else 204 { 205 bp = le_bp_entry + 2; 206 *lenptr = 2; 207 } 208 } 209 210 return bp; 211} 212 213 214char *m32r_register_names[] = { 215 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 216 "r8", "r9", "r10", "r11", "r12", "fp", "lr", "sp", 217 "psw", "cbr", "spi", "spu", "bpc", "pc", "accl", "acch", 218 "evb" 219}; 220 221static const char * 222m32r_register_name (struct gdbarch *gdbarch, int reg_nr) 223{ 224 if (reg_nr < 0) 225 return NULL; 226 if (reg_nr >= M32R_NUM_REGS) 227 return NULL; 228 return m32r_register_names[reg_nr]; 229} 230 231 232/* Return the GDB type object for the "standard" data type 233 of data in register N. */ 234 235static struct type * 236m32r_register_type (struct gdbarch *gdbarch, int reg_nr) 237{ 238 if (reg_nr == M32R_PC_REGNUM) 239 return builtin_type (gdbarch)->builtin_func_ptr; 240 else if (reg_nr == M32R_SP_REGNUM || reg_nr == M32R_FP_REGNUM) 241 return builtin_type (gdbarch)->builtin_data_ptr; 242 else 243 return builtin_type (gdbarch)->builtin_int32; 244} 245 246 247/* Write into appropriate registers a function return value 248 of type TYPE, given in virtual format. 249 250 Things always get returned in RET1_REGNUM, RET2_REGNUM. */ 251 252static void 253m32r_store_return_value (struct type *type, struct regcache *regcache, 254 const void *valbuf) 255{ 256 struct gdbarch *gdbarch = get_regcache_arch (regcache); 257 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); 258 CORE_ADDR regval; 259 int len = TYPE_LENGTH (type); 260 261 regval = extract_unsigned_integer (valbuf, len > 4 ? 4 : len, byte_order); 262 regcache_cooked_write_unsigned (regcache, RET1_REGNUM, regval); 263 264 if (len > 4) 265 { 266 regval = extract_unsigned_integer ((gdb_byte *) valbuf + 4, 267 len - 4, byte_order); 268 regcache_cooked_write_unsigned (regcache, RET1_REGNUM + 1, regval); 269 } 270} 271 272/* This is required by skip_prologue. The results of decoding a prologue 273 should be cached because this thrashing is getting nuts. */ 274 275static int 276decode_prologue (struct gdbarch *gdbarch, 277 CORE_ADDR start_pc, CORE_ADDR scan_limit, 278 CORE_ADDR *pl_endptr, unsigned long *framelength) 279{ 280 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); 281 unsigned long framesize; 282 int insn; 283 int op1; 284 CORE_ADDR after_prologue = 0; 285 CORE_ADDR after_push = 0; 286 CORE_ADDR after_stack_adjust = 0; 287 CORE_ADDR current_pc; 288 LONGEST return_value; 289 290 framesize = 0; 291 after_prologue = 0; 292 293 for (current_pc = start_pc; current_pc < scan_limit; current_pc += 2) 294 { 295 /* Check if current pc's location is readable. */ 296 if (!safe_read_memory_integer (current_pc, 2, byte_order, &return_value)) 297 return -1; 298 299 insn = read_memory_unsigned_integer (current_pc, 2, byte_order); 300 301 if (insn == 0x0000) 302 break; 303 304 /* If this is a 32 bit instruction, we dont want to examine its 305 immediate data as though it were an instruction. */ 306 if (current_pc & 0x02) 307 { 308 /* Decode this instruction further. */ 309 insn &= 0x7fff; 310 } 311 else 312 { 313 if (insn & 0x8000) 314 { 315 if (current_pc == scan_limit) 316 scan_limit += 2; /* extend the search */ 317 318 current_pc += 2; /* skip the immediate data */ 319 320 /* Check if current pc's location is readable. */ 321 if (!safe_read_memory_integer (current_pc, 2, byte_order, 322 &return_value)) 323 return -1; 324 325 if (insn == 0x8faf) /* add3 sp, sp, xxxx */ 326 /* add 16 bit sign-extended offset */ 327 { 328 framesize += 329 -((short) read_memory_unsigned_integer (current_pc, 330 2, byte_order)); 331 } 332 else 333 { 334 if (((insn >> 8) == 0xe4) /* ld24 r4, xxxxxx; sub sp, r4 */ 335 && safe_read_memory_integer (current_pc + 2, 336 2, byte_order, 337 &return_value) 338 && read_memory_unsigned_integer (current_pc + 2, 339 2, byte_order) 340 == 0x0f24) 341 { 342 /* Subtract 24 bit sign-extended negative-offset. */ 343 insn = read_memory_unsigned_integer (current_pc - 2, 344 4, byte_order); 345 if (insn & 0x00800000) /* sign extend */ 346 insn |= 0xff000000; /* negative */ 347 else 348 insn &= 0x00ffffff; /* positive */ 349 framesize += insn; 350 } 351 } 352 after_push = current_pc + 2; 353 continue; 354 } 355 } 356 op1 = insn & 0xf000; /* Isolate just the first nibble. */ 357 358 if ((insn & 0xf0ff) == 0x207f) 359 { /* st reg, @-sp */ 360 int regno; 361 framesize += 4; 362 regno = ((insn >> 8) & 0xf); 363 after_prologue = 0; 364 continue; 365 } 366 if ((insn >> 8) == 0x4f) /* addi sp, xx */ 367 /* Add 8 bit sign-extended offset. */ 368 { 369 int stack_adjust = (signed char) (insn & 0xff); 370 371 /* there are probably two of these stack adjustments: 372 1) A negative one in the prologue, and 373 2) A positive one in the epilogue. 374 We are only interested in the first one. */ 375 376 if (stack_adjust < 0) 377 { 378 framesize -= stack_adjust; 379 after_prologue = 0; 380 /* A frameless function may have no "mv fp, sp". 381 In that case, this is the end of the prologue. */ 382 after_stack_adjust = current_pc + 2; 383 } 384 continue; 385 } 386 if (insn == 0x1d8f) 387 { /* mv fp, sp */ 388 after_prologue = current_pc + 2; 389 break; /* end of stack adjustments */ 390 } 391 392 /* Nop looks like a branch, continue explicitly. */ 393 if (insn == 0x7000) 394 { 395 after_prologue = current_pc + 2; 396 continue; /* nop occurs between pushes. */ 397 } 398 /* End of prolog if any of these are trap instructions. */ 399 if ((insn & 0xfff0) == 0x10f0) 400 { 401 after_prologue = current_pc; 402 break; 403 } 404 /* End of prolog if any of these are branch instructions. */ 405 if ((op1 == 0x7000) || (op1 == 0xb000) || (op1 == 0xf000)) 406 { 407 after_prologue = current_pc; 408 continue; 409 } 410 /* Some of the branch instructions are mixed with other types. */ 411 if (op1 == 0x1000) 412 { 413 int subop = insn & 0x0ff0; 414 if ((subop == 0x0ec0) || (subop == 0x0fc0)) 415 { 416 after_prologue = current_pc; 417 continue; /* jmp , jl */ 418 } 419 } 420 } 421 422 if (framelength) 423 *framelength = framesize; 424 425 if (current_pc >= scan_limit) 426 { 427 if (pl_endptr) 428 { 429 if (after_stack_adjust != 0) 430 /* We did not find a "mv fp,sp", but we DID find 431 a stack_adjust. Is it safe to use that as the 432 end of the prologue? I just don't know. */ 433 { 434 *pl_endptr = after_stack_adjust; 435 } 436 else if (after_push != 0) 437 /* We did not find a "mv fp,sp", but we DID find 438 a push. Is it safe to use that as the 439 end of the prologue? I just don't know. */ 440 { 441 *pl_endptr = after_push; 442 } 443 else 444 /* We reached the end of the loop without finding the end 445 of the prologue. No way to win -- we should report 446 failure. The way we do that is to return the original 447 start_pc. GDB will set a breakpoint at the start of 448 the function (etc.) */ 449 *pl_endptr = start_pc; 450 } 451 return 0; 452 } 453 454 if (after_prologue == 0) 455 after_prologue = current_pc; 456 457 if (pl_endptr) 458 *pl_endptr = after_prologue; 459 460 return 0; 461} /* decode_prologue */ 462 463/* Function: skip_prologue 464 Find end of function prologue. */ 465 466#define DEFAULT_SEARCH_LIMIT 128 467 468static CORE_ADDR 469m32r_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc) 470{ 471 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); 472 CORE_ADDR func_addr, func_end; 473 struct symtab_and_line sal; 474 LONGEST return_value; 475 476 /* See what the symbol table says. */ 477 478 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end)) 479 { 480 sal = find_pc_line (func_addr, 0); 481 482 if (sal.line != 0 && sal.end <= func_end) 483 { 484 func_end = sal.end; 485 } 486 else 487 /* Either there's no line info, or the line after the prologue is after 488 the end of the function. In this case, there probably isn't a 489 prologue. */ 490 { 491 func_end = min (func_end, func_addr + DEFAULT_SEARCH_LIMIT); 492 } 493 } 494 else 495 func_end = pc + DEFAULT_SEARCH_LIMIT; 496 497 /* If pc's location is not readable, just quit. */ 498 if (!safe_read_memory_integer (pc, 4, byte_order, &return_value)) 499 return pc; 500 501 /* Find the end of prologue. */ 502 if (decode_prologue (gdbarch, pc, func_end, &sal.end, NULL) < 0) 503 return pc; 504 505 return sal.end; 506} 507 508struct m32r_unwind_cache 509{ 510 /* The previous frame's inner most stack address. Used as this 511 frame ID's stack_addr. */ 512 CORE_ADDR prev_sp; 513 /* The frame's base, optionally used by the high-level debug info. */ 514 CORE_ADDR base; 515 int size; 516 /* How far the SP and r13 (FP) have been offset from the start of 517 the stack frame (as defined by the previous frame's stack 518 pointer). */ 519 LONGEST sp_offset; 520 LONGEST r13_offset; 521 int uses_frame; 522 /* Table indicating the location of each and every register. */ 523 struct trad_frame_saved_reg *saved_regs; 524}; 525 526/* Put here the code to store, into fi->saved_regs, the addresses of 527 the saved registers of frame described by FRAME_INFO. This 528 includes special registers such as pc and fp saved in special ways 529 in the stack frame. sp is even more special: the address we return 530 for it IS the sp for the next frame. */ 531 532static struct m32r_unwind_cache * 533m32r_frame_unwind_cache (struct frame_info *this_frame, 534 void **this_prologue_cache) 535{ 536 CORE_ADDR pc, scan_limit; 537 ULONGEST prev_sp; 538 ULONGEST this_base; 539 unsigned long op, op2; 540 int i; 541 struct m32r_unwind_cache *info; 542 543 544 if ((*this_prologue_cache)) 545 return (*this_prologue_cache); 546 547 info = FRAME_OBSTACK_ZALLOC (struct m32r_unwind_cache); 548 (*this_prologue_cache) = info; 549 info->saved_regs = trad_frame_alloc_saved_regs (this_frame); 550 551 info->size = 0; 552 info->sp_offset = 0; 553 info->uses_frame = 0; 554 555 scan_limit = get_frame_pc (this_frame); 556 for (pc = get_frame_func (this_frame); 557 pc > 0 && pc < scan_limit; pc += 2) 558 { 559 if ((pc & 2) == 0) 560 { 561 op = get_frame_memory_unsigned (this_frame, pc, 4); 562 if ((op & 0x80000000) == 0x80000000) 563 { 564 /* 32-bit instruction */ 565 if ((op & 0xffff0000) == 0x8faf0000) 566 { 567 /* add3 sp,sp,xxxx */ 568 short n = op & 0xffff; 569 info->sp_offset += n; 570 } 571 else if (((op >> 8) == 0xe4) 572 && get_frame_memory_unsigned (this_frame, pc + 2, 573 2) == 0x0f24) 574 { 575 /* ld24 r4, xxxxxx; sub sp, r4 */ 576 unsigned long n = op & 0xffffff; 577 info->sp_offset += n; 578 pc += 2; /* skip sub instruction */ 579 } 580 581 if (pc == scan_limit) 582 scan_limit += 2; /* extend the search */ 583 pc += 2; /* skip the immediate data */ 584 continue; 585 } 586 } 587 588 /* 16-bit instructions */ 589 op = get_frame_memory_unsigned (this_frame, pc, 2) & 0x7fff; 590 if ((op & 0xf0ff) == 0x207f) 591 { 592 /* st rn, @-sp */ 593 int regno = ((op >> 8) & 0xf); 594 info->sp_offset -= 4; 595 info->saved_regs[regno].addr = info->sp_offset; 596 } 597 else if ((op & 0xff00) == 0x4f00) 598 { 599 /* addi sp, xx */ 600 int n = (signed char) (op & 0xff); 601 info->sp_offset += n; 602 } 603 else if (op == 0x1d8f) 604 { 605 /* mv fp, sp */ 606 info->uses_frame = 1; 607 info->r13_offset = info->sp_offset; 608 break; /* end of stack adjustments */ 609 } 610 else if ((op & 0xfff0) == 0x10f0) 611 { 612 /* End of prologue if this is a trap instruction. */ 613 break; /* End of stack adjustments. */ 614 } 615 } 616 617 info->size = -info->sp_offset; 618 619 /* Compute the previous frame's stack pointer (which is also the 620 frame's ID's stack address), and this frame's base pointer. */ 621 if (info->uses_frame) 622 { 623 /* The SP was moved to the FP. This indicates that a new frame 624 was created. Get THIS frame's FP value by unwinding it from 625 the next frame. */ 626 this_base = get_frame_register_unsigned (this_frame, M32R_FP_REGNUM); 627 /* The FP points at the last saved register. Adjust the FP back 628 to before the first saved register giving the SP. */ 629 prev_sp = this_base + info->size; 630 } 631 else 632 { 633 /* Assume that the FP is this frame's SP but with that pushed 634 stack space added back. */ 635 this_base = get_frame_register_unsigned (this_frame, M32R_SP_REGNUM); 636 prev_sp = this_base + info->size; 637 } 638 639 /* Convert that SP/BASE into real addresses. */ 640 info->prev_sp = prev_sp; 641 info->base = this_base; 642 643 /* Adjust all the saved registers so that they contain addresses and 644 not offsets. */ 645 for (i = 0; i < gdbarch_num_regs (get_frame_arch (this_frame)) - 1; i++) 646 if (trad_frame_addr_p (info->saved_regs, i)) 647 info->saved_regs[i].addr = (info->prev_sp + info->saved_regs[i].addr); 648 649 /* The call instruction moves the caller's PC in the callee's LR. 650 Since this is an unwind, do the reverse. Copy the location of LR 651 into PC (the address / regnum) so that a request for PC will be 652 converted into a request for the LR. */ 653 info->saved_regs[M32R_PC_REGNUM] = info->saved_regs[LR_REGNUM]; 654 655 /* The previous frame's SP needed to be computed. Save the computed 656 value. */ 657 trad_frame_set_value (info->saved_regs, M32R_SP_REGNUM, prev_sp); 658 659 return info; 660} 661 662static CORE_ADDR 663m32r_read_pc (struct regcache *regcache) 664{ 665 ULONGEST pc; 666 regcache_cooked_read_unsigned (regcache, M32R_PC_REGNUM, &pc); 667 return pc; 668} 669 670static void 671m32r_write_pc (struct regcache *regcache, CORE_ADDR val) 672{ 673 regcache_cooked_write_unsigned (regcache, M32R_PC_REGNUM, val); 674} 675 676static CORE_ADDR 677m32r_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame) 678{ 679 return frame_unwind_register_unsigned (next_frame, M32R_SP_REGNUM); 680} 681 682 683static CORE_ADDR 684m32r_push_dummy_call (struct gdbarch *gdbarch, struct value *function, 685 struct regcache *regcache, CORE_ADDR bp_addr, int nargs, 686 struct value **args, CORE_ADDR sp, int struct_return, 687 CORE_ADDR struct_addr) 688{ 689 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); 690 int stack_offset, stack_alloc; 691 int argreg = ARG1_REGNUM; 692 int argnum; 693 struct type *type; 694 enum type_code typecode; 695 CORE_ADDR regval; 696 gdb_byte *val; 697 gdb_byte valbuf[MAX_REGISTER_SIZE]; 698 int len; 699 int odd_sized_struct; 700 701 /* First force sp to a 4-byte alignment. */ 702 sp = sp & ~3; 703 704 /* Set the return address. For the m32r, the return breakpoint is 705 always at BP_ADDR. */ 706 regcache_cooked_write_unsigned (regcache, LR_REGNUM, bp_addr); 707 708 /* If STRUCT_RETURN is true, then the struct return address (in 709 STRUCT_ADDR) will consume the first argument-passing register. 710 Both adjust the register count and store that value. */ 711 if (struct_return) 712 { 713 regcache_cooked_write_unsigned (regcache, argreg, struct_addr); 714 argreg++; 715 } 716 717 /* Now make sure there's space on the stack. */ 718 for (argnum = 0, stack_alloc = 0; argnum < nargs; argnum++) 719 stack_alloc += ((TYPE_LENGTH (value_type (args[argnum])) + 3) & ~3); 720 sp -= stack_alloc; /* Make room on stack for args. */ 721 722 for (argnum = 0, stack_offset = 0; argnum < nargs; argnum++) 723 { 724 type = value_type (args[argnum]); 725 typecode = TYPE_CODE (type); 726 len = TYPE_LENGTH (type); 727 728 memset (valbuf, 0, sizeof (valbuf)); 729 730 /* Passes structures that do not fit in 2 registers by reference. */ 731 if (len > 8 732 && (typecode == TYPE_CODE_STRUCT || typecode == TYPE_CODE_UNION)) 733 { 734 store_unsigned_integer (valbuf, 4, byte_order, 735 value_address (args[argnum])); 736 typecode = TYPE_CODE_PTR; 737 len = 4; 738 val = valbuf; 739 } 740 else if (len < 4) 741 { 742 /* Value gets right-justified in the register or stack word. */ 743 memcpy (valbuf + (register_size (gdbarch, argreg) - len), 744 (gdb_byte *) value_contents (args[argnum]), len); 745 val = valbuf; 746 } 747 else 748 val = (gdb_byte *) value_contents (args[argnum]); 749 750 while (len > 0) 751 { 752 if (argreg > ARGN_REGNUM) 753 { 754 /* Must go on the stack. */ 755 write_memory (sp + stack_offset, val, 4); 756 stack_offset += 4; 757 } 758 else if (argreg <= ARGN_REGNUM) 759 { 760 /* There's room in a register. */ 761 regval = 762 extract_unsigned_integer (val, 763 register_size (gdbarch, argreg), 764 byte_order); 765 regcache_cooked_write_unsigned (regcache, argreg++, regval); 766 } 767 768 /* Store the value 4 bytes at a time. This means that things 769 larger than 4 bytes may go partly in registers and partly 770 on the stack. */ 771 len -= register_size (gdbarch, argreg); 772 val += register_size (gdbarch, argreg); 773 } 774 } 775 776 /* Finally, update the SP register. */ 777 regcache_cooked_write_unsigned (regcache, M32R_SP_REGNUM, sp); 778 779 return sp; 780} 781 782 783/* Given a return value in `regbuf' with a type `valtype', 784 extract and copy its value into `valbuf'. */ 785 786static void 787m32r_extract_return_value (struct type *type, struct regcache *regcache, 788 void *dst) 789{ 790 struct gdbarch *gdbarch = get_regcache_arch (regcache); 791 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); 792 bfd_byte *valbuf = dst; 793 int len = TYPE_LENGTH (type); 794 ULONGEST tmp; 795 796 /* By using store_unsigned_integer we avoid having to do 797 anything special for small big-endian values. */ 798 regcache_cooked_read_unsigned (regcache, RET1_REGNUM, &tmp); 799 store_unsigned_integer (valbuf, (len > 4 ? len - 4 : len), byte_order, tmp); 800 801 /* Ignore return values more than 8 bytes in size because the m32r 802 returns anything more than 8 bytes in the stack. */ 803 if (len > 4) 804 { 805 regcache_cooked_read_unsigned (regcache, RET1_REGNUM + 1, &tmp); 806 store_unsigned_integer (valbuf + len - 4, 4, byte_order, tmp); 807 } 808} 809 810static enum return_value_convention 811m32r_return_value (struct gdbarch *gdbarch, struct type *func_type, 812 struct type *valtype, struct regcache *regcache, 813 gdb_byte *readbuf, const gdb_byte *writebuf) 814{ 815 if (TYPE_LENGTH (valtype) > 8) 816 return RETURN_VALUE_STRUCT_CONVENTION; 817 else 818 { 819 if (readbuf != NULL) 820 m32r_extract_return_value (valtype, regcache, readbuf); 821 if (writebuf != NULL) 822 m32r_store_return_value (valtype, regcache, writebuf); 823 return RETURN_VALUE_REGISTER_CONVENTION; 824 } 825} 826 827 828 829static CORE_ADDR 830m32r_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame) 831{ 832 return frame_unwind_register_unsigned (next_frame, M32R_PC_REGNUM); 833} 834 835/* Given a GDB frame, determine the address of the calling function's 836 frame. This will be used to create a new GDB frame struct. */ 837 838static void 839m32r_frame_this_id (struct frame_info *this_frame, 840 void **this_prologue_cache, struct frame_id *this_id) 841{ 842 struct m32r_unwind_cache *info 843 = m32r_frame_unwind_cache (this_frame, this_prologue_cache); 844 CORE_ADDR base; 845 CORE_ADDR func; 846 struct minimal_symbol *msym_stack; 847 struct frame_id id; 848 849 /* The FUNC is easy. */ 850 func = get_frame_func (this_frame); 851 852 /* Check if the stack is empty. */ 853 msym_stack = lookup_minimal_symbol ("_stack", NULL, NULL); 854 if (msym_stack && info->base == SYMBOL_VALUE_ADDRESS (msym_stack)) 855 return; 856 857 /* Hopefully the prologue analysis either correctly determined the 858 frame's base (which is the SP from the previous frame), or set 859 that base to "NULL". */ 860 base = info->prev_sp; 861 if (base == 0) 862 return; 863 864 id = frame_id_build (base, func); 865 (*this_id) = id; 866} 867 868static struct value * 869m32r_frame_prev_register (struct frame_info *this_frame, 870 void **this_prologue_cache, int regnum) 871{ 872 struct m32r_unwind_cache *info 873 = m32r_frame_unwind_cache (this_frame, this_prologue_cache); 874 return trad_frame_get_prev_register (this_frame, info->saved_regs, regnum); 875} 876 877static const struct frame_unwind m32r_frame_unwind = { 878 NORMAL_FRAME, 879 default_frame_unwind_stop_reason, 880 m32r_frame_this_id, 881 m32r_frame_prev_register, 882 NULL, 883 default_frame_sniffer 884}; 885 886static CORE_ADDR 887m32r_frame_base_address (struct frame_info *this_frame, void **this_cache) 888{ 889 struct m32r_unwind_cache *info 890 = m32r_frame_unwind_cache (this_frame, this_cache); 891 return info->base; 892} 893 894static const struct frame_base m32r_frame_base = { 895 &m32r_frame_unwind, 896 m32r_frame_base_address, 897 m32r_frame_base_address, 898 m32r_frame_base_address 899}; 900 901/* Assuming THIS_FRAME is a dummy, return the frame ID of that dummy 902 frame. The frame ID's base needs to match the TOS value saved by 903 save_dummy_frame_tos(), and the PC match the dummy frame's breakpoint. */ 904 905static struct frame_id 906m32r_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame) 907{ 908 CORE_ADDR sp = get_frame_register_unsigned (this_frame, M32R_SP_REGNUM); 909 return frame_id_build (sp, get_frame_pc (this_frame)); 910} 911 912 913static gdbarch_init_ftype m32r_gdbarch_init; 914 915static struct gdbarch * 916m32r_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) 917{ 918 struct gdbarch *gdbarch; 919 struct gdbarch_tdep *tdep; 920 921 /* If there is already a candidate, use it. */ 922 arches = gdbarch_list_lookup_by_info (arches, &info); 923 if (arches != NULL) 924 return arches->gdbarch; 925 926 /* Allocate space for the new architecture. */ 927 tdep = XMALLOC (struct gdbarch_tdep); 928 gdbarch = gdbarch_alloc (&info, tdep); 929 930 set_gdbarch_read_pc (gdbarch, m32r_read_pc); 931 set_gdbarch_write_pc (gdbarch, m32r_write_pc); 932 set_gdbarch_unwind_sp (gdbarch, m32r_unwind_sp); 933 934 set_gdbarch_num_regs (gdbarch, M32R_NUM_REGS); 935 set_gdbarch_sp_regnum (gdbarch, M32R_SP_REGNUM); 936 set_gdbarch_register_name (gdbarch, m32r_register_name); 937 set_gdbarch_register_type (gdbarch, m32r_register_type); 938 939 set_gdbarch_push_dummy_call (gdbarch, m32r_push_dummy_call); 940 set_gdbarch_return_value (gdbarch, m32r_return_value); 941 942 set_gdbarch_skip_prologue (gdbarch, m32r_skip_prologue); 943 set_gdbarch_inner_than (gdbarch, core_addr_lessthan); 944 set_gdbarch_breakpoint_from_pc (gdbarch, m32r_breakpoint_from_pc); 945 set_gdbarch_memory_insert_breakpoint (gdbarch, 946 m32r_memory_insert_breakpoint); 947 set_gdbarch_memory_remove_breakpoint (gdbarch, 948 m32r_memory_remove_breakpoint); 949 950 set_gdbarch_frame_align (gdbarch, m32r_frame_align); 951 952 frame_base_set_default (gdbarch, &m32r_frame_base); 953 954 /* Methods for saving / extracting a dummy frame's ID. The ID's 955 stack address must match the SP value returned by 956 PUSH_DUMMY_CALL, and saved by generic_save_dummy_frame_tos. */ 957 set_gdbarch_dummy_id (gdbarch, m32r_dummy_id); 958 959 /* Return the unwound PC value. */ 960 set_gdbarch_unwind_pc (gdbarch, m32r_unwind_pc); 961 962 set_gdbarch_print_insn (gdbarch, print_insn_m32r); 963 964 /* Hook in ABI-specific overrides, if they have been registered. */ 965 gdbarch_init_osabi (info, gdbarch); 966 967 /* Hook in the default unwinders. */ 968 frame_unwind_append_unwinder (gdbarch, &m32r_frame_unwind); 969 970 /* Support simple overlay manager. */ 971 set_gdbarch_overlay_update (gdbarch, simple_overlay_update); 972 973 return gdbarch; 974} 975 976void 977_initialize_m32r_tdep (void) 978{ 979 register_gdbarch_init (bfd_arch_m32r, m32r_gdbarch_init); 980} 981